fqpf17p06-datasheetz
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May 2001
QFETTM
FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
FQPF17P0660V P-Channel MOSFET
General Description
These P-Channel enhancement mode power field effect
transistors are produced using Fairchilds proprietary,
planar stripe, DMOS technology.
This advanced technology has been especially tailored to
minimize on-state resistance, provide superior switching
performance, and withstand a high energy pulse in the
avalanche and commutation modes. These devices are
well suited for low voltage applications such as automotive,
DC/DC converters, and high efficiency switching for power
management in portable and battery operated products.
Features
-12A, -60V, RDS(on) = 0.12 @VGS = -10 V
Low gate charge ( typical 21 nC)
Low Crss ( typical 80 pF)
Fast switching
100% avalanche tested
Improved dv/dt capability
175C maximum junction temperature rating
Absolute Maximum Ratings TC = 25C unless otherwise noted
Thermal Characteristics
Symbol Parameter FQPF17P06 Units
VDSS Drain-Source Voltage -60 VID Drain Current - Continuous (TC = 25C) -12 A
- Continuous (TC = 100C) -8.5 A
IDM Drain Current - Pulsed (Note 1) -48 A
VGSS Gate-Source Voltage 25 V
EAS Single Pulsed Avalanche Energy (Note 2) 300 mJ
IAR Avalanche Current (Note 1) -12 A
EAR Repetitive Avalanche Energy (Note 1) 3.9 mJ
dv/dt Peak Diode Recovery dv/dt (Note 3) -7.0 V/ns
PD Power Dissipation (TC = 25C) 39 W
- Derate above 25C 0.25 W/C
TJ, TSTG Operating and Storage Temperature Range -55 to +175 C
TL
Maximum lead temperature for soldering purposes,
1/8" from case for 5 seconds 300 C
Symbol Parameter Typ Max Units
RJC Thermal Resistance, Junction-to-Case -- 3.85 C/W
RJA Thermal Resistance, Junction-to-Ambient -- 62.5 C/W
TO-220FFQPF Series
G SD
!!!!
!!!!
!!!!
!!!!
!!!!
!!!!
S
D
G
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FQPF17P06
Rev. A2. May 20012001 Fairchild Semiconductor Corporation
Elerical Characteristics TC = 25C unless otherwise noted
Notes:1. Repetitive Rating : Pulse width limited by maximum junction temperature2. L = 2.4mH, IAS = -12A, VDD = -25V, RG = 25 , Starting TJ = 25C3. ISD -17A, di/dt 300A/s, VDD BVDSS, Starting TJ = 25C
4. Pulse Test : Pulse width 300s, Duty cycle 2%5. Essentially independent of operating temperature
Symbol Parameter Test Conditions Min Typ Max Units
Off Characteristics
BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 A -60 -- -- V
BVDSS
/ TJBreakdown Voltage TemperatureCoefficient ID = -250 A, Referenced to 25C -- -0.06 -- V/C
IDSSZero Gate Voltage Drain Current
VDS = -60 V, VGS = 0 V -- -- -1 A
VDS = -48 V, TC = 150C -- -- -10 A
IGSSF Gate-Body Leakage Current, Forward VGS = -25 V, VDS = 0 V -- -- -100 nA
IGSSR Gate-Body Leakage Current, Reverse VGS = 25 V, VDS = 0 V -- -- 100 nA
On CharacteristicsVGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 A -2.0 -- -4.0 V
RDS(on) Static Drain-Source
On-ResistanceVGS = -10 V, ID = -6.0 A -- 0.094 0.12
gFS Forward Transconductance VDS = -30 V, ID = -6.0 A -- 8.7 -- S
Dynamic CharacteristicsCiss Input Capacitance VDS = -25 V, VGS = 0 V,
f = 1.0 MHz
-- 690 900 pF
Coss Output Capacitance -- 325 420 pF
Crss Reverse Transfer Capacitance -- 80 105 pF
Switching Characteristicstd(on) Turn-On Delay Time VDD = -30 V, ID = -8.5 A,
RG = 25
-- 13 35 ns
tr Turn-On Rise Time -- 100 210 ns
td(off) Turn-Off Delay Time -- 22 55 ns
tf Turn-Off Fall Time -- 60 130 ns
Qg Total Gate Charge VDS = -48 V, ID = -17 A,
VGS = -10 V
-- 21 27 nC
Qgs Gate-Source Charge -- 4.2 -- nC
Qgd Gate-Drain Charge -- 10 -- nC
Drain-Source Diode Characteristics and Maximum RatingsIS Maximum Continuous Drain-Source Diode Forward Current -- -- -12 A
ISM Maximum Pulsed Drain-Source Diode Forward Current -- -- -48 A
VSD Drain-Source Diode Forward Voltage VGS = 0 V, IS = -12 A -- -- -4.0 V
trr Reverse Recovery Time VGS = 0 V, IS = -17 A,
dIF / dt = 100 A/s
-- 92 -- ns
Qrr Reverse Recovery Charge -- 0.32 -- C
(Note 4)
(Note 4, 5)
(Note 4, 5)
(Note 4)
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FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
0 4 8 12 16 20 240
2
4
6
8
10
12
VDS
= -30V
VDS
= -48V
Note : ID
= -17 A
-VGS,Gate-SourceVoltage[V]
QG, Total Gate Charge [nC]
10-1
100
101
0
200
400
600
800
1000
1200
1400
1600
1800
2000Ciss = Cgs + Cgd (Cds = shorted)
Coss= Cds + Cgd
Crss = Cgd
Notes :
1. VGS = 0 V
2. f = 1 MHz
Crss
Coss
Ciss
C
apacitance[pF]
VDS, Drain-Source Voltage [V]
0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4 1.6 1.8 2.0 2.2 2.410
-1
100
101
175Notes :
1. VGS
= 0V
2. 250 s Pulse Test
25
-IDR,ReverseDrainCurrent[A]
-VSD
, Source-Drain Voltage [V]
0 20 40 60 800.00
0.04
0.08
0.12
0.16
0.20
0.24
0.28
0.32
0.36
Note : TJ= 25
VGS
= - 20V
VGS
= - 10V
RDS(on)
[],
Drain-SourceOn-Resistance
-ID
, Drain Current [A]
2 4 6 8 1010
-1
100
101
175
25
-55 Notes :1. V
DS= -30V
2. 250 s Pulse Test
-ID
,DrainCurrent[A]
-VGS
, Gate-Source Voltage [V]
10-1
100
101
100
101
VGS
Top : - 15.0 V
- 10.0 V
- 8.0 V- 7.0 V
- 6.0 V
- 5.5 V
- 5.0 V
Bottom: - 4.5 V
Notes :
1. 250 s Pulse Test
2. TC
= 25
-ID,DrainCurrent[A]
-VDS
, Drain-Source Voltage [V]
Typical Characteristics
Figure 5. Capacitance Characteristics Figure 6. Gate Charge Characteristics
Figure 3. On-Resistance Variation vs.
Drain Current and Gate Voltage
Figure 4. Body Diode Forward Voltage
Variation vs. Source Current
and Temperature
Figure 2. Transfer CharacteristicsFigure 1. On-Region Characteristics
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FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
1 0-5
1 0-4
1 0-3
1 0-2
1 0-1
1 00
1 01
1 0-2
1 0-1
1 00
N o t e s :
1. Z JC
( t ) = 3 .85 / W M a x .
2 . D u t y F a c t o r , D = t1/t
2
3. TJM
- TC
= PDM
* Z JC
(t )
s i n g l e p u l s e
D = 0 . 5
0 . 0 2
0 .2
0 . 0 5
0 .1
0 . 0 1
Z
JC(
t),Therm
alResponse
t1, S q u a r e W a v e P u l s e D u r a t io n [ s e c ]
25 50 75 100 125 150 1750
2
4
6
8
10
12
-ID,DrainCurrent[A]
TC, Case Temperature [
]
100
101
102
10-1
100
101
102
100 ms
DC
10 ms
1 ms
Operation in This Area
is Limited by RDS(on)
Notes :
1. TC
= 25oC
2. TJ= 175
oC
3. Single Pulse
-ID,DrainCurrent[A]
-VDS, Drain-Source Voltage [V]
-100 -50 0 50 100 150 2000.0
0.5
1.0
1.5
2.0
2.5
Notes :
1. VGS
= -10 V
2. ID
= -8.5 A
RDS(ON),(Normalized)
Drain-SourceOn-Resistance
TJ, Junction Temperature [
oC]
-100 -50 0 50 100 150 2000.8
0.9
1.0
1.1
1.2
Notes :
1. VGS
= 0 V
2. ID
= -250A
-BVDSS,(Normalized)
Drain-SourceBreakdownVoltage
TJ, Junction Temperature [
oC]
Typical Characteristics (Continued)
Figure 9. Maximum Safe Operating Area Figure 10. Maximum Drain Current
vs. Case Temperature
Figure 7. Breakdown Voltage Variation
vs. Temperature
Figure 8. On-Resistance Variation
vs. Temperature
Figure 11. Transient Thermal Response Curve
t1
PDM
t2
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FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
Charge
VGS
-10V
Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Type
as DUT
Charge
VGS
-10V
Qg
Qgs Qgd
-3mA
VGS
DUT
VDS
300nF
50K
200nF12V
Same Type
as DUT
VDS
VGS10%
90%
td(on)
tr
ton
toff
td(off) t
fVDD
-10V
VDSRL
DUT
RG
VGS
VDS
VGS10%
90%
td(on)
tr
ton
toff
td(off) t
fVDD
-10V
VDSRL
DUT
RG
VGS
EAS = L IAS2----
2
1--------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
L
I D
tp
EAS = L IAS2----
2
1EAS = L IAS
2----2
1----2
1--------------------
BVDSS - VDD
BVDSS
VDD
VDS
BVDSS
tp
VDD
IAS
VDS (t)
ID (t)
Time
-10V DUT
RG
LL
I DI D
tp
Gate Charge Test Circuit & Waveform
Resistive Switching Test Circuit & Waveforms
Unclamped Inductive Switching Test Circuit & Waveforms
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FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
Peak Diode Recovery dv/dt Test Circuit & Waveforms
DUT
VDS
+
_
Driver
RG
Compliment of DUT(N-Channel)
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
L
I SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDDBody Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------
DUT
VDS
+
_
Driver
RG
Compliment of DUT(N-Channel)
VGS dv/dt controlled by RG ISD controlled by pulse period
VDD
LL
I SD
10VVGS
( Driver )
I SD
( DUT )
VDS
( DUT )
VDDBody Diode
Forward Voltage Drop
VSD
IFM , Body Diode Forward Current
Body Diode Reverse Current
IRM
Body Diode Recovery dv/dt
di/dt
D =Gate Pulse Width
Gate Pulse Period--------------------------D =Gate Pulse Width
Gate Pulse Period--------------------------
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FQPF17P06
2001 Fairchild Semiconductor Corporation Rev. A2. May 2001
Package Dimensions
(7.00) (0.70)
MAX1.47
(30)
#1
3.
30
0.
10
15.
80
0.
20
15.8
7
0.
20
6.
68
0.
20
9.7
5
0.
30
4.
70
0.
20
10.16 0.20
(1.00x45)
2.54 0.20
0.80 0.10
9.40 0.20
2.76 0.200.35 0.10
3.18 0.10
2.54TYP
[2.54 0.20]
2.54TYP
[2.54 0.20]
0.50+0.100.05
TO-220F
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2001 Fairchild Semiconductor Corporation Rev. H2
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intended to be an exhaustive list of all such trademarks.
DISCLAIMERFAIRCHILD SEMICONDUCTOR RESERVES THE RIGHT TO MAKE CHANGES WITHOUT FURTHER NOTICE TO ANY
PRODUCTS HEREIN TO IMPROVE RELIABILITY, FUNCTION OR DESIGN. FAIRCHILD DOES NOT ASSUME ANY
LIABILITY ARISING OUT OF THE APPLICATION OR USE OF ANY PRODUCT OR CIRCUIT DESCRIBED HEREIN;
NEITHER DOES IT CONVEY ANY LICENSE UNDER ITS PATENT RIGHTS, NOR THE RIGHTS OF OTHERS.
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FAIRCHILDS PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF FAIRCHILD SEMICONDUCTOR
CORPORATION.
As used herein:
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the body,
or (b) support or sustain life, or (c) whose failure to perform
when properly used in accordance with instructions for use
provided in the labeling, can be reasonably expected to
result in significant injury to the user.
2. A critical component is any component of a life support
device or system whose failure to perform can be
reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
PRODUCT STATUS DEFINITIONS
Definition of Terms
Datasheet Identification Product Status Definition
Advance Information Formative or In
Design
This datasheet contains the design specifications for
product development. Specifications may change in
any manner without notice.
Preliminary First Production This datasheet contains preliminary data, and
supplementary data will be published at a later date.
Fairchild Semiconductor reserves the right to make
changes at any time without notice in order to improve
design.
No Identification Needed Full Production This datasheet contains final specifications. Fairchild
Semiconductor reserves the right to make changes at
any time without notice in order to improve design.
Obsolete Not In Production This datasheet contains specifications on a product
that has been discontinued by Fairchild semiconductor.
The datasheet is printed for reference information only.
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