66 il'3 ITRANSACTIONS ON COMPUTIERS, VOL. C-29, NO. 2, FEBRUARY 1980

Foreword

THIS Special Issue on Microprocessors and Micro-computers represents a joint effort of the IEEE TRANS-

ACTIONS ON COMPUTERS and the IEEE JOUIKNAL O01SOLID-STATE CIRCUITS. Our goal was to integrate multipleaspects of current microprocessor and microcomputer workfrom circuits through applications. Thus, the papers in thisspecial joint issue reflect many of the current issues in themicrocomputer area. They generally fall into three categories:circuits, architecture, and applications.The circuits area is dominated by papers on special-purpose

processing and support chips starting with "A Cordic Arith-metic Processor Chip" by Haviland and Tuszynski which de-scribes a CMOS implementation which executes the CORDICalgorithm. A unique LSI application is described in the paperby Rahier and Jespers, "Dedicated LSI for a Microprocessor-Controlled Hand-Carried OCR System." Their system oper-ates on a 32 X 24 digitized pattern to produce an outputvector for final microprocessor processing. The third papercarries the prospect of bubble memories one step further asthe "The Development ofa Bubble Memory Controller for Low-Cost File Use" is described by Kita et al. A special-purposemicroprocessor is described by Townsend et al. in their paper,"An NMOS Microprocessor for Analog Signal Processing,"which may lead to some interesting applications papers forsubsequent issues. The next paper continues with the prob-lems of analog processing by describing "An NMOS Micro-computer Peripheral Interface Unit Incorporating an Analog-to-Digital Converter."An interesting and certainly unexpected result of editing this

issue was the fact that no papers describing new digital micro-processors were submitted. The paper which comes the closestis "Design Considerations for Single-Chip Computers of theFuture" by Patterson and Sequin which considers the prob-lems associated with using the million devices projected to beon the chips of the mid-80's. A related paper concerning dataintegrity for microprocessor systems, "An LSI Implementationof an Intelligent CRC Computer and Programmable Compara-tor for Character Oriented Protocols" by Weissberger follows.The increasing functionality along with the larger numbers ofdevices per chip leads to the problems of testing and are treatedin the paper by Cliff called "Acceptable Testing of VLSI Com-ponents which Contain Error Correctors."The increase in functionality per chip which has occurred to

date has resulted from circuit and process improvements. Thefinal article in the circuits category, "High Density IntegratedComputing Circuitry with Multiple Valued Logic" by Current,describes the use of multivalued logic as an additional meansfor increasing the functionality per chip.The second category, architecture, is primarily concerned

with using multiple microprocessors for various reasons. Theinterconnection of microprocessors or microcomputers istreated from different perspectives in six papers. The first byMathialagan and Biswas examines "Optimal Interconnectionsin the Design of Microprocessors and Digital Systems." Arul-pragasam et al. looked at configuring multiple microcomputersto give higher overall performance and described it in theirpaper, "Modular Minicomputers Using Microprocessors." Thethird paper in this series, by Lenahan and Fung, "Performanceof Cooperative, Loosely-Coupled Microprocessor Architecturesin an Interactive Data Base Task," treats a variety of intercon-nects and subsequent system performance. The fourth paperwhich examines the prospect of using multiple identical chipswhich execute MOVE instructions is called "MOVE Architec-ture in Digital Controllers" and was written by Tabak andLipovski. The fifth paper is motivated by the desire to im-prove reliability of a computing engine. The correspondenceby Kameyama and Hiquchi, "Design of Dependent-Failure-Tolerant Microcomputer System Using Triple Modular Redun-dancy," describes some of the implementation problems ofusing TMR in a microcomputer system. The final paper in thearchitecture area which describes the design of a memorysystem using CCD's by Inkol and Chamberlain is "Design andRealization of a Two-Level 64K Byte CCD Memory Systemfor Microcomputer Applications."The applications paper and correspondence herein cover a

broad range and encompass many different technologies. Thepaper by Zeman and Nagle, "A High-Speed Microprogram-mable Digital Signal Processor Employing Distributed Arith-metic," describes an implementation employing four-bit bi-polar microprocessor slices. The rest of the applicationsappear as correspondence items starting with a simple ap-proach to A/D conversion, "Digital Multiplexing of AnalogData in a Microprocessor Controlled Data Acquisition System,"by Cliff. Further, the use of bit slice microprocessors in satel-lite data communications is explored in the correspondence,"Microprocessor Utilization in Satellite-Born Packet Switch-ing" by Burnell et al. The final application article by Elliset al., "MTEC: A Microprocessor System for AstronomicalTelescope and Instrument Control" describes a sophisticatedreal-time control system which uses an 8 bit single boardcomputer.The publication of this Joint Special Issue resulted from the

collective efforts of many people whom we acknowledge atthis time. First, the authors of the nearly fifty papers origi-nally submitted for this issue and especially those whose papersrequired additional work with short notice deserve thanks.The reviewers also deserve recognition for responding to a

tight timetable with quality reviews:

0018-9340/80/0200-0066$00.75 © 1980 IEEE

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IEEE TRANSACTIONS ON COMPUTERS, VOL. C-29, NO. 2, FEBRUARY 1980

J. ArulpragasamG. L. BaldwinC. R. BaughD. J. BradleyA. J. BrodersenP. A. BrokawS. G. ChamberlainH. ChangP. W. CookE. W. DavisK. L. DotyD. E. DoyleR. W. DuttonR. Ehrich0. P. EngelD. GaubatzJ. W. GaultP. R. Gray

J. GreavesE. L. HallG. A. HellworthG. E. HitzD. A. HodgesM. Y. HsaioW. R. HuberC. H. KamanB. KeeneD. V. KernsW. KohlerF. R. KoperdaL. KuhnG. J. LipovskiJ. L. LowryA. MarcovitzR. MelansonV. S. Moore

J. MorseT. M. MurrayB. T. MurphyH. MussmanH. T. NagleD. NelsenV. P. NelsonR. S. NewbornK. PanG. PanigraphiR. Q. PerrittE. PetersJ. D. PlummerW. B. PohlmanB. PuetoJ. L. QuanstromN. QuaynorC. A. T. Salama

J. A. SchoeffM. SebernC. H. SequinC. V. ShafferD. P. SiewiorekA. SingerJ. R. SmithP. D. StegallS.Y.W.SuD. T. SullivanR. SwanD. E. ThomasJ. S. ThompsonR. A. UlichneyP. W. J. VerhofstadtS. WecherK. D. WiseL. WittieB. A. Wooley

The efforts of our secretaries who handled the papers, reviews, and correspondence so professionallydeserve special mention. They are Pam Hathcock, Betty Hayes, Bamby Philbin, Serena Shields, and FrancesThornton.

RICHARD C. JAEGERROBERT M. GLORIOSOGuest Editors

_| Richard C. Jaeger (S'68-M'69) was born in New York, NY, on September 2,1944. He receivedthe B.S. and M.E. degrees in electrical engineering in 1966 and the Ph.D. degree in 1969, allfrom the University of Florida, Gainesville.From 1969 to 1974 he was with the IBM General Systems Division, Boca Raton, FL, working

on data acquisition systems and small computer architecture. In 1974 he became a ResearchStaff Member at the IBM Thomas J. Watson Research Center, Yorktown Heights, NY, workingon bipolar and FET device modeling and circuit design. In 1976 he retumed to IBM, BocaRaton, where he continued work on understanding the behavior of MOS devices at low tem-

peratures. In 1979 he joined the Department of Electrical Engineering, Auburn University,Auburn, AL, where he is an Associate Professor.Dr. Jaeger has served as a member of the Program Committee for the 1979 and 1980 Inter-

national Solid-State Circuits Conferences. He is a member of Tau Beta Pi, Phi Kappa Phi,Sigma Tau, Eta Kappa Nu, and is a Registered Professional Engineer.

Robert M. Glorioso (S'59-M'65-SM'73) received the B.S.E.E. degree from Northeastern Uni-versity, Boston, MA, and the M.S. and Ph.D. degrees in electrical engineering and computerscience from the University of Connecticut, Storrs.He is presently Manager of the Applied Research and Development Group at Digital Equip-

ment Corporation, Maynard, MA, where he has been involved with small systems and terminals.Previously, he was an Associate Professor of Electrical and Computer Engineering at the Uni-versity of Massachusetts, Amherst, where he contributed to the development of the computerengineering program. He has written and coauthored several papers and four books includingEngineering Cybernetics and Introduction to Engineering, both published by Prentice-Hall,

.The CMOS Designs Primer and Handbook, published by E & L Instruments, and Engineering ofIntelligent Systems: Concepts, Theory and Applications, to be published by Digital Press.Dr. Glorioso has served on the Program Committee for ELECTRO and is an Associate Editor

of the IEEE TRANSACTIONS ON COMPUTERS. He is a member of Eta Kappa Nu, Sigma Xi,and is a Registered Professional Engineer.

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