for a single task in protected mode, the 80386 can address ... · ((marks)) (1/2/3...) 1...
TRANSCRIPT
((MARKS))
(1/2/3...)
1
((QUESTION)) For a single task in protected mode, the 80386 can address-------Vitual memory the virtual memory of Virtual memory
((OPTION_A)) 32 GB
((OPTION_B)) 64 MB
((OPTION_C)) 32 TB
((OPTION_D)) 64 TB
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism to provide protection, that is accomplished
with the help of read/write privileges is with the help of read/write
((OPTION_A)) restricted use of segments
((OPTION_B)) restricted accesses to segments
((OPTION_C)) privileged instructions
((OPTION_D)) privileged operations
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism that is accomplished using descriptor usages
limitations, and rules of privilege check is
((OPTION_A)) privileged instruction check
((OPTION_B)) operation reference check
((OPTION_C)) segment load check
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism that is executed at certain privilege levels, determined by CPL (Current Privilege Level) and I/O privilege level (IOPL) is
((OPTION_A)) restricted use of segments
((OPTION_B)) restricted accesses to segments
((OPTION_C)) privileged instructions or operations
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The paging unit is enabled only in
((OPTION_A)) virtual mode
((OPTION_B)) addressing mode
((OPTION_C)) protected mode
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
c
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The bit that is used for providing protection is
((OPTION_A)) User/Supervisor bit
((OPTION_B)) Read bit
((OPTION_C)) Write bit
((OPTION_D)) all of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
d
((EXPLANATI
ON))
(OPTIONAL)
The User/Supervisor (U/S) bit and Read/Write (R/W) bit are used
to provide protection
((MARKS))
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((QUESTION)) To enter in protected mode,____________ bit should be at logic 1.
((OPTION_A)) PG
((OPTION_B)) ET
((OPTION_C)) PE
((OPTION_D)) NT
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) In 80386, privilege levels are defined by _______
((OPTION_A)) DPL
((OPTION_B)) CPL
((OPTION_C)) RPL
((OPTION_D)) All of above
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI)
) (OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) How many privilege levels are available in 80386
((OPTION_A)) 1
((OPTION_B)) 2
((OPTION_C)) 3
((OPTION_D)) 4
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
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1
((QUESTION)) Which is highest privilege level in 80386
((OPTION_A)) 1
((OPTION_B)) 3
((OPTION_C)) 2
((OPTION_D)) 0
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Which is LOWEST privilege level in 80386
((OPTION_A)) 1
((OPTION_B)) 0
((OPTION_C)) 3
((OPTION_D)) 2
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI)
) (OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The unit that provides a four level protection mechanism, for system‟s
code and data against application program is
((OPTION_A)) central processing unit
((OPTION_B)) segmentation unit
((OPTION_C)) bus interface unit
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI)
) (OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) In protected mode of 80386, the VM flag is set by using
((OPTION_A)) IRET instruction
((OPTION_B)) task switch operation
((OPTION_C)) IRET instruction or task switch operation
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI)
) (OPTIONAL)
((MARKS))
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1
((QUESTION)) The task privilege level at the instant of execution is called
((OPTION_A)) Descriptor privilege level (DPL)
((OPTION_B)) Current privilege level (CPL)
((OPTION_C)) Effective privilege level (EPL)
((OPTION_D)) none of the mentioned
((CORRECT_CH B
((MARKS))
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1
((QUESTION)) By using privilege mechanism the protection from unauthorised
accesses is done to
((OPTION_A)) operating system
((OPTION_B)) interrupt handlers
((OPTION_C)) system softwares
((OPTION_D)) all of the mentioned
((CORRECT_CHO
ICE)) (A/B/C/D)
D
((EXPLANATIOPT
IONAL)
OICE)) A/B/C/D)
((EXPLANATIO
N)) (OPTIONAL)
((MARKS))
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1
((QUESTION)) Once the CPL is selected, it can be changed by
((OPTION_A)) HOLD
((OPTION_B)) transferring control using system descriptors
((OPTION_C)) transferring control using gate descriptors
((OPTION_D)) transferring control using interrupt descriptors
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The data segments defined in GDT (global descriptor table) and the LDT
(local descriptor table) can be accessed by a task with
((OPTION_A)) privilege level 0
((OPTION_B)) privilege level 1
((OPTION_C)) privilege level 2
((OPTION_D)) privilege level 3
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) A task with privilege level 0, does not refer to all the lower level privilege
descriptors in
((OPTION_A)) GDT (global descriptor table)
((OPTION_B)) LDT (local descriptor table)
((OPTION_C)) IDT (interrupt descriptor table)
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
B
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The selector RPL that uses a less trusted privilege than the current
privilege level for further use is known as
((OPTION_A)) Least task privilege level
((OPTION_B)) descriptor privilege level
((OPTION_C)) effective privilege level
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The effective privilege level is
((OPTION_A)) maximum numeric of RPL and CPL
((OPTION_B)) minimum privilege of RPL and CPL
((OPTION_C)) numeric minimum and privilege maximum of RPL and CPL
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The task requesting an access to a descriptor is allowed to access after
checking the
((OPTION_A)) type of descriptor
((OPTION_B)) privilege level
((OPTION_C)) type of descriptor and privilege level
((OPTION_D)) corresponding segment
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) A CALL instruction can reference only a code segment descriptor with
((OPTION_A)) DPL less privilege than CPL
((OPTION_B)) DPL equal privilege to CPL
((OPTION_C)) DPL greater privilege than CPL
((OPTION_D)) all of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The RPL of a selector that referred to the code descriptor must have
a)
b) c) d)
((OPTION_A)) less privilege than CPL
((OPTION_B)) greater privilege than CPL
((OPTION_C)) equal privilege than CPL
((OPTION_D)) any privilege regarding CPL
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) The instruction that refers to only code segment descriptors with DPL
equal to or less than the task CPL is
((OPTION_A)) CALL
((OPTION_B)) IRET
((OPTION_C)) ESC
((OPTION_D)) RET and IRET
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) By using privilege mechanism the protection from unauthorised accesses
is done to
((OPTION_A)) operating system
((OPTION_B)) interrupt handlers
((OPTION_C)) system softwares
((OPTION_D)) all of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism to provide protection, that is accomplished with the help
of read/write privileges is
((OPTION_A)) restricted use of segments
((OPTION_B)) restricted accesses to segments
((OPTION_C)) privileged instructions
((OPTION_D)) privileged operations
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism that is accomplished using descriptor usages limitations,
and rules of privilege check is
((OPTION_A)) privileged instruction check
((OPTION_B)) operation reference check
((OPTION_C)) segment load check
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The mechanism that is executed at certain privilege levels, determined by
CPL (Current Privilege Level) and I/O privilege level (IOPL) is
((OPTION_A)) restricted use of segments
((OPTION_B)) restricted accesses to segments
((OPTION_C)) privileged instructions or operations
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) If CPL is not of the required privilege level, then the instructions that get
affected is
((OPTION_A)) IRET
((OPTION_B)) POPF
((OPTION_C)) IRET and POPF
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
C
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) If CPL is greater than zero, then the instruction that remains unaffected is
((OPTION_A)) IRET
((OPTION_B)) POPF
((OPTION_C)) IRET and POPF
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The condition, “CPL not equals to zero” satisfies, when executing the
instruction
((OPTION_A)) LIDT
((OPTION_B)) LGDT
((OPTION_C)) LTR
((OPTION_D)) all of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
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1
((QUESTION)) While executing the instruction IN/OUT, the condition of CPL is
((OPTION_A)) CPL = 0
((OPTION_B)) CPL < IOPL
((OPTION_C)) CPL > IOPL
((OPTION_D)) all of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The instruction that reads the segment limit into the register, if privilege
rules and descriptor type allow is
((OPTION_A)) VERW
((OPTION_B)) APRL
((OPTION_C)) LSL
((OPTION_D)) LAR
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The instruction that adjusts the RPL (Requested Privilege Level) of the
selector, to the numeric maximum of current selector RPL value is
((OPTION_A)) LAR
((OPTION_B)) VERR
((OPTION_C)) LSL
((OPTION_D)) APRL
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) The selector RPL that uses a less trusted privilege than the current
privilege level for further use is known as
((OPTION_A)) Least task privilege level
((OPTION_B)) descriptor privilege level
((OPTION_C)) effective privilege level
((OPTION_D)) none of the mentioned
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Amongst the given which is not a privilege instruction?
((OPTION_A)) CLTS
((OPTION_B)) TEST
((OPTION_C)) HLT
((OPTION_D)) LLDT
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Amongst the given which is a privilege instruction?
((OPTION_A)) LMSW
((OPTION_B)) TEST
((OPTION_C)) AND
((OPTION_D)) STD
((CORRECT_C
HOICE))
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Amongst the given which is a privilege instruction?
((OPTION_A)) AAA
((OPTION_B)) OR
((OPTION_C)) CLD
((OPTION_D)) MOV CR3, EAX
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
((QUESTION)) What is the significance of setting R/W field of PDE in protected
mode?
((OPTION_A)) (a) Write privileges are allowed from PL3 code
((OPTION_B)) (b) Write privileges are allowed from PL2 code
((OPTION_C)) (c) Write privileges are allowed from PL1 code
((OPTION_D)) (d) Write privileges are allowed from PL0 code
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
((QUESTION)) What is the significance of setting R/W field of PTE in protected mode?
((OPTION_A)) (a) Write privileges are allowed from PL3 code
((OPTION_B)) (b) Write privileges are allowed from PL2 code
((OPTION_C)) (c) Write privileges are allowed from PL1 code
((OPTION_D)) (d) Write privileges are allowed from PL0 code
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) What privilege level must be assigned to Kernel?
((OPTION_A)) PL0
((OPTION_B)) PL1
((OPTION_C)) PL2
((OPTION_D)) PL3
((CORRECT_C
HOICE))
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) What condition must be satisfied for successful control transfer using Call
Gate mechanism?
((OPTION_A)) (a) Target DPL= >Max(RPL, CPL) <= Gate DPL
((OPTION_B)) (b) Target DPL<= Max(RPL, CPL) => Gate DPL
((OPTION_C)) (c) Target DPL=> Max(RPL, CPL) => Gate DPL
((OPTION_D)) (d) Target DPL<= Max(RPL, CPL) <= Gate DPL
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) For instruction HLT to be executed what must be the value of CPL?
((OPTION_A)) 0
((OPTION_B)) 1
((OPTION_C)) 2
((OPTION_D)) 3
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
Conforming Code segment
((QUESTION))
((OPTION_A))
((OPTION_B))
((OPTION_C))
((OPTION_D))
((CORRECT_C
HOICE))
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
The on chip protection hardware performs which checks of the following
?
((QUESTION)) Type and Limit check
((OPTION_A)) Restriction of Procedure Entry points
((OPTION_B)) Restriction of addressable DOMAIN
((OPTION_C)) Restriction on Certain Instruction Execution
((OPTION_D)) All of above
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
((QUESTION)) System services are implemented at Privilege level -----
((OPTION_A)) 0
((OPTION_B)) 1
((OPTION_C)) 2
((OPTION_D)) 3
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Custom routines to support special purpose system operations like Device
Drivers are executed at Privilege level ----
((OPTION_A)) 0
((OPTION_B)) 1
((OPTION_C)) 2
((OPTION_D)) 3
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) Inter privilege level transfer can be done using
((OPTION_A)) Task gate Descriptor
((OPTION_B)) Call Gate Descriptor
((OPTION_C)) Conforming Code segment Descriptor
((OPTION_D)) B AND C
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
((QUESTION)) Conforming Code Segments conforms the privilege level of -----
((OPTION_A)) Caller – calling code
((OPTION_B)) Callee – called code
((OPTION_C)) Both A and B
((OPTION_D)) None of above
((CORRECT_C
HOICE))
(A/B/C/D)
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) For Conforming Code Segments to be used Rule is
((OPTION_A)) CPL =DPL & C bit = 1
((OPTION_B)) CPL numerically > DPL & C bit = 1
((OPTION_C)) CPL numerically < DPL & C bit = 1
((OPTION_D)) None of above
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) Call gate is used to access --------
((OPTION_A)) Code at same Privilege level
((OPTION_B)) Code at higher privilege level
((OPTION_C)) Code at lower Privilege
((OPTION_D)) None of above
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) Privilege requirements to use a call gate are -------------- (numerically)
((OPTION_A)) CPL ≤ DPL of the Code & C bit=0
((OPTION_B)) DPL of the target code segment ≤ CPL & C bit=0
((OPTION_C)) Target DPL ≤ max (RPL,CPL) & C bit=0
((OPTION_D)) All of above
((CORRECT_C
HOICE))
(A/B/C/D)
D
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) Type field of Call gate indicates value - -------------
((OPTION_A)) S=0 and Type = 1100
((OPTION_B)) S=1 and Type = 1100
((OPTION_C)) S=0 and Type = 0100
((OPTION_D)) None of above
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
1
((QUESTION)) Destination Selector field of a call gate is ------- bits long
((OPTION_A)) 8
((OPTION_B)) 16
((OPTION_C)) 32
((OPTION_D)) 48
((CORRECT_C
HOICE))
(A/B/C/D)
B
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) Destination offset field of a call gate is ------- bits long
((OPTION_A)) 8
((OPTION_B)) 16
((OPTION_C)) 32
((OPTION_D)) 48
((CORRECT_C
HOICE))
(A/B/C/D)
C
((EXPLANATI
ON))
(OPTIONAL)
((MARKS))
(1/2/3...)
2
((QUESTION)) WC field of call gate is used to push ------- on destination privilege level
stack .
((OPTION_A)) Old stack SS:ESP and old CS:EIP
((OPTION_B)) New stack SS:ESP and old CS:EIP
((OPTION_C)) Both SS:ESP and old CS:EIP
((OPTION_D)) None of above
((CORRECT_C
HOICE))
(A/B/C/D)
A
((EXPLANATI
ON))
(OPTIONAL)
(MARKS)) (1/2/3...)
1
((QUESTION)) The task state segment descriptor for the designated task is
checked for its ----- and --------
((OPTION_A)) Limit and Base
((OPTION_B)) base and address
((OPTION_C)) limit and presence
((OPTION_D)) base and presence
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) The Task Register(TR) specify the ----- executing task by
pointing to the task State Segment(TSS)
((OPTION_A)) Normal
((OPTION_B)) Currently
((OPTION_C)) ( Multiple
((OPTION_D)) ( Single
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) What is the size of visible part present in TR of 80386?
((OPTION_A)) 16 bit
((OPTION_B)) 20 bit
((OPTION_C)) 24 bit
((OPTION_D)) 32 bit
((CORRECT_CHOICE))
A
(A/B/C/D)
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) What is the minimum size of TSS in 80386?
((OPTION_A)) 64 bytes
((OPTION_B)) 104 byte
((OPTION_C)) 4 KB
((OPTION_D)) 64 KB
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Multitasking is activated in ------------mode of the Processor 80386?
((OPTION_A)) Real
((OPTION_B)) Protected
((OPTION_C)) Virtual
((OPTION_D)) V86
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) How task switching can be obtained in 80386?
((OPTION_A)) The current task JMPs or CALLs a TSS descriptor
((OPTION_B)) The current task JMPs or CALLs a task gate
((OPTION_C)) An interrupt or exception selects a task gate
((OPTION_D)) All of above
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) To return from a task, ____ instruction is used.
((OPTION_A)) RET
((OPTION_B)) IRET
((OPTION_C)) JMP
((OPTION_D)) CALL
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Nested task switching is done by ____
((OPTION_A)) using FAR CALL instruction
((OPTION_B)) Exception
((OPTION_C)) fault or trap
((OPTION_D)) all of above
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) ............holds task environment
((OPTION_A)) TSS Descriptor
((OPTION_B)) TSS
((OPTION_C)) None of these
((OPTION_D)) TR
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) TSS is not accessible to
((OPTION_A)) Program at PL0
((OPTION_B)) User program
((OPTION_C)) Both a & b
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) To support multitasking ...........is used
((OPTION_A)) TSS
((OPTION_B)) TR
((OPTION_C)) Task Gate descriptor
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) For task switching following is used
((OPTION_A)) Interrupts
((OPTION_B)) Exceptions
((OPTION_C)) A & B
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) In TSS descriptor if bit B=1 then
((OPTION_A)) Task is busy
((OPTION_B)) Operand is 16-bit
((OPTION_C)) Operand is 32-bit
((OPTION_D)) Operand is byte
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) To perform context save 80386 needs minimum storage of
((OPTION_A)) 80 bytes
((OPTION_B)) 104 bytes
((OPTION_C)) 128 bytes
((OPTION_D)) 256 bytes
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Size of Task state segment is
((OPTION_A)) 80 bytes
((OPTION_B)) 104 bytes
((OPTION_C)) 128 bytes
((OPTION_D)) 256 bytes
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Maximum size of TSS is
((OPTION_A)) 64 KB
((OPTION_B)) 1MB
((OPTION_C)) 4GB
((OPTION_D)) 64 TB
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Task register holds
((OPTION_A)) Base
((OPTION_B)) Limit
((OPTION_C)) Both a & b
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) 1
(1/2/3...)
((QUESTION)) ...........points to TSS to specify currently executing task
((OPTION_A)) TR
((OPTION_B)) TP
((OPTION_C)) TSSD
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which field in TSS holds the 16-bit offset of the beginning of I/O permission bit map
((OPTION_A)) Bit map offset
((OPTION_B)) Back link
((OPTION_C)) CR 3
((OPTION_D)) EIP
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Which of following are dynamic set fields of TSS?
((OPTION_A)) Flag register
((OPTION_B)) Back link
((OPTION_C)) Instruction pointer
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) To keep track of previous task 80386 uses
((OPTION_A)) Flags
((OPTION_B)) EIP
((OPTION_C)) Back link
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which of following are static set fields of TSS?
((OPTION_A)) Selector of LDT
((OPTION_B)) PDBR
((OPTION_C)) T-bit
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which of following are static set fields of TSS?
((OPTION_A)) I/O map Offset
((OPTION_B)) Pointers to stack
((OPTION_C)) A & B
((OPTION_D)) none of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) TSS descriptor present in
((OPTION_A)) GDT
((OPTION_B)) LDT
((OPTION_C)) A or B
((OPTION_D)) A
((CORRECT_CHOICE)) (A/B/C/D)
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Privilege level of stack and code segment must be
((OPTION_A)) Same
((OPTION_B)) Greater than
((OPTION_C)) Less than
((OPTION_D)) Greater or equal
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which of following are dynamic set fields of TSS?
((OPTION_A)) General purpose register
((OPTION_B)) Segment register
((OPTION_C)) Instruction pointer
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Each isolated task can have
((OPTION_A)) Separate LDT and page directory
((OPTION_B)) Different logical to linear mapping
((OPTION_C)) Different linear to physical mapping
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Each task have following mapping
((OPTION_A)) logical to linear mapping
((OPTION_B)) linear to physical mapping
((OPTION_C)) Sequential
((OPTION_D)) Both A & B
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Each task can have
((OPTION_A)) Separate LDT and page directory
((OPTION_B)) Different logical to linear mapping
((OPTION_C)) Different linear to physical mapping
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) 2
(1/2/3...)
((QUESTION)) Bit T in TSS is used for
((OPTION_A)) Enabling task switch trap
((OPTION_B)) disabling task switch trap
((OPTION_C)) Both A & B
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Processor selects task gate descriptor only when the maximum of selectors ............and the ...............of procedure is less than or equal to the ..........of the descriptor
((OPTION_A)) DPL,RPL,CPL
((OPTION_B)) CPL,DPL,RPL
((OPTION_C)) RPL,CPL,DPL
((OPTION_D)) CPL,RPL,DPL
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Processor selects task gate descriptor only when the maximum of selectors RPL and the CPL of procedure are................. to the DPL of the descriptor
((OPTION_A)) less than or equal
((OPTION_B)) Greater than or equal
((OPTION_C)) Same
((OPTION_D)) Less than
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) When task gate is used, the DPL of target ..............is not used for privilege checking
((OPTION_A)) TSS descriptor
((OPTION_B)) TR
((OPTION_C)) TSS
((OPTION_D)) Stack
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Which of the following statements are false?
((OPTION_A)) Task switches cannot be recursive
((OPTION_B)) Tasks are not re-entrant
((OPTION_C)) Currently running task is always a busy task
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) During task switching without task gate which of the checks are performed
((OPTION_A)) Privilege check
((OPTION_B)) Limit check
((OPTION_C)) Present check
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) The DPL of the new TSS descriptor is not used for privilege checking ,when ...........is used for task switch
((OPTION_A)) Task gate
((OPTION_B)) Trap gate
((OPTION_C)) Call gate
((OPTION_D)) Interrupt gate
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION
)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) In the direct method Task switching is done by
((OPTION_A)) Jumping to task gate
((OPTION_B)) Calling to task gate
((OPTION_C)) Both A & B
((OPTION_D)) Both A or B
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Task switching is done by
((OPTION_A)) Direct method
((OPTION_B)) Indirect method
((OPTION_C)) Both A & B
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) During task switching without task gate which of the checks are performed
((OPTION_A)) instruction check
((OPTION_B)) Limit check
((OPTION_C)) Busy task check
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) DPL of the task gate is compared with ......... and ..........of the gate selector
((OPTION_A)) CPL,RPL
((OPTION_B)) DPL,RPL
((OPTION_C)) DPL,CPL
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which bit shows the current task is child task
((OPTION_A)) NT
((OPTION_B)) G
((OPTION_C)) TS
((OPTION_D)) B
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Task switching is done when
((OPTION_A)) A long jump or call instruction contains a selector which refers to a TSS descriptor
((OPTION_B)) Selector in long jump or call instruction refer to a task gate
((OPTION_C)) Interrupt selector refers to a task gate
((OPTION_D)) All of these
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) 1. What is the long form of TSS in multitasking?
((OPTION_A)) Test Switch Segment
((OPTION_B)) Task switch segment
((OPTION_C)) Task selector segment
((OPTION_D)) Test state segment
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) 2. In multitasking where I/O permission bitmap is located?
((OPTION_A)) At the bottom of the Task gate descriptor
((OPTION_B)) At the bottom of the TSS
((OPTION_C)) On the top of the TSS
((OPTION_D)) On the top of Task gate descriptor
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) 3. What is the condition necessary to execute I/O privilege
instructions?
((OPTION_A)) (a) CPL <= IOPL
((OPTION_B)) (b) CPL => IOPL
((OPTION_C)) (c) DPL <= IOPL
((OPTION_D)) (d) RPL => IOPL
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) What is the size IOPL field?
((OPTION_A)) (a) 1-bit
((OPTION_B)) (b) 2-bit
((OPTION_C)) (c) 8-bit
((OPTION_D)) (d) 4-bit
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) The parent task and child tasks are indicated by which fields of the TSS?
((OPTION_A)) (a) Back link field and NT field
((OPTION_B)) (b) NT field and Back link field
((OPTION_C)) (c) ESP and Back link field
((OPTION_D)) (d) NT field and ESP
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
((QUESTION)) Which instruction is used to nest the tasks?
((OPTION_A)) (a) JMP
((OPTION_B)) (b) CALL
((OPTION_C)) (c) RET
((OPTION_D)) (d)JBE
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
2
((QUESTION)) What condition is needed to permit the current task to switch to the new
task?
((OPTION_A)) (a) Task Gate DPL >= max(CPL, RPL)
((OPTION_B)) (b) Task Gate DPL <= max(CPL, RPL)
((OPTION_C)) (c) Task Gate RPL >= max(CPL, DPL)
((OPTION_D)) (d) Task Gate CPL >= max(DPL, RPL)
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) TSS descriptor appears in which descriptor table?
((OPTION_A)) (a) GDT and LDT
((OPTION_B)) (b) GDT
((OPTION_C)) (c) LDT
((OPTION_D)) (d) IDT
((CORRECT_CH B
OICE)) (A/B/C/D)
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which portion of the task register is visible?
((OPTION_A)) (a) Selector
((OPTION_B)) (b) Segment descriptor
((OPTION_C)) (c)Selector and base address
((OPTION_D)) (d) Selector and segment limit
((CORRECT_CHOICE)) (A/B/C/D)
A
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) 4. Which portion of the task register is invisible?
((OPTION_A)) (a) Selector
((OPTION_B)) (b) Segment descriptor
((OPTION_C)) (c)Selector and base address
((OPTION_D)) (d) Base address and segment limit
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Which control register is present in task state segment?
((OPTION_A)) CR0
((OPTION_B)) CR1
((OPTION_C)) CR2
((OPTION_D)) CR3
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) Which descriptor table base address is present in task state segment?
((OPTION_A)) GDT
((OPTION_B)) IDT
((OPTION_C)) LDT
((OPTION_D)) None of these
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
1
((QUESTION)) What is the meaning of „T‟ field in task state segment?
((OPTION_A)) Trap flag
((OPTION_B)) Task switch trap
((OPTION_C)) Task register
((OPTION_D)) Test register
((CORRECT_CHOICE)) (A/B/C/D)
B
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) . What is the size of segment limit in task state segment descriptor?
((OPTION_A)) (a)8 bit
((OPTION_B)) (b) 16 bit
((OPTION_C)) (c) 20 bit
((OPTION_D)) (d) 32 bit
((CORRECT_CHOICE)) (A/B/C/D)
C
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) . Which instruction is used to load the new TSS selector to the task
register?
((OPTION_A)) STR
((OPTION_B)) STD
((OPTION_C)) CLD
((OPTION_D)) LTR
((CORRECT_CHOICE)) (A/B/C/D)
D
((EXPLANATION)) (OPTIONAL)
((MARKS)) (1/2/3...)
2
((QUESTION)) Which instruction is used to read the visible portion of the task
register into memory or general-purpose register?
((OPTION_A)) LTR
((OPTION_B)) STR
((OPTION_C)) STD
((OPTION_D)) CLD
((CORRECT_CHOICE)) (A/B/C/D)
B
((MARKS)) (1/2/3...)
1
((QUESTION)) Amongst given which is a privilege instruction?
((OPTION_A)) LOOP
((OPTION_B)) XLAT
((OPTION_C)) TEST
((OPTION_D)) LTR
((CORRECT_CHOICE)) (A/B/C/D)
D
((MARKS)) (1/2/3...)
1
((QUESTION)) What must be the CPL at the time of execution of LTR instruction?
((OPTION_A)) 0
((OPTION_B)) 1
((OPTION_C)) 2
((OPTION_D)) 3
((CORRECT_CHOICE)) (A/B/C/D)
A
((MARKS)) (1/2/3...)
1
((QUESTION)) Which of the following instruction is used in protected mode only?
((OPTION_A)) AAA
((OPTION_B)) LTR
((OPTION_C)) STD
((OPTION_D)) CLD
((CORRECT_CHOICE)) (A/B/C/D)
B
((MARKS)) (1/2/3...)
((QUESTION)) Amongst given which is not a privilege instruction?
((OPTION_A)) STR
((OPTION_B)) HLT
((OPTION_C)) OUT
((OPTION_D)) LTR
((CORRECT_CHOICE)) (A/B/C/D)
C
((MARKS)) (1/2/3...)
1
((QUESTION)) What condition is needed to change the IOPL of any task?
((OPTION_A)) (a) If code is at PL3
((OPTION_B)) (b) If code is at PL2
((OPTION_C)) (c) If code is at PL1
((OPTION_D)) (d) If code is at PL0
((CORRECT_CHOICE)) (A/B/C/D)
D
((MARKS)) (1/2/3...)
1
((QUESTION)) What condition is needed to change the IOPL of any task?
((OPTION_A)) (a) If code is at PL3
((OPTION_B)) (b) If code is at PL2
((OPTION_C)) (c) If code is at PL1
((OPTION_D)) (d) If code is at PL0
((CORRECT_CHOICE)) (A/B/C/D)
D
((MARKS)) (1/2/3...)
1
((QUESTION)) Type field of Busy TSS Descriptor indicates value - -------------
((OPTION_A)) S=0 and Type = 1001
((OPTION_B)) S=1 and Type = 1100
((OPTION_C)) S=0 and Type = 0100
((OPTION_D)) None of above
((CORRECT_CHOICE)) (A/B/C/D)
A
((MARKS)) (1/2/3...)
1
((QUESTION)) Type field of Available TSS Descriptor indicates value - -------------
((OPTION_A)) S=0 and Type = 1001
((OPTION_B)) S=1 and Type = 1100
((OPTION_C)) S=0 and Type = 1011
((OPTION_D)) None of above
((CORRECT_CHOICE)) (A/B/C/D)
C
((MARKS)) (1/2/3...)
1
((QUESTION)) Type field of task Gate Descriptor indicates value - -------------
((OPTION_A)) S=0 and Type = 0101
((OPTION_B)) S=1 and Type = 1100
((OPTION_C)) S=0 and Type = 0100
((OPTION_D)) None of above
((CORRECT_CHOICE)) (A/B/C/D)
A