filter bank channelizers for multi-standard software defined radio

Filter Bank Channelizers for Multi-Standard SoftwareDefined Radio Receivers

R. Mahesh & A. P. Vinod & Edmund M-K. Lai &Amos Omondi

Received: 7 October 2008 /Accepted: 25 November 2008 /Published online: 21 January 2009# 2009 Springer Science + Business Media, LLC. Manufactured in The United States

Abstract The ability to support multiple channels ofdifferent communication standards, in the available band-width, is of importance in modern software defined radio(SDR) receivers. An SDR receiver typically employs achannelizer to extract multiple narrowband channels fromthe received wideband signal using digital filter banks.Since the filter bank channelizer is placed immediately afterthe analog-to-digital converter (ADC), it must operate at thehighest sampling rate in the digital front-end of the receiver.Therefore, computationally efficient low complexity archi-tectures are required for the implementation of thechannelizer. The compatibility of the filter bank withdifferent communication standards requires dynamic recon-figurability. The design and realization of dynamicallyreconfigurable, low complexity filter banks for SDRreceivers is a challenging task. This paper reviews someof the existing digital filter bank designs and investigatesthe potential of these filter banks for channelization inmulti-standard SDR receivers. We also review two lowcomplexity, reconfigurable filter bank architectures for SDRchannelizers based respectively on the frequency responsemasking technique and a novel coefficient decimation

technique, proposed by us recently. These filter bankarchitectures outperform existing ones in terms of bothdynamic reconfigurability and complexity.

Keywords Software defined radio . Channelization . Digitalfilter banks . Reconfigurability . Low complexity

1 Introduction

The wireless industry has been experiencing an exponentialgrowth with the emergence of new radio access technolo-gies and standards. All these technologies have beenoptimized to obtain a good trade-off between data rate,range and mobility to suit specific application needs. Lackof harmony in spectrum allocation globally has alsoresulted in this growth. However, with the increase in traderelationship between different continents, researchers had tolook for a common multi-standard wireless communicationplatform which can support all these radio technologies andstandards. This has resulted in the birth of the softwaredefined radio (SDR) concept. SDR can be regarded as anultimate communications solution which can ideally coverany cellular communication standard in a wide frequencyspectrum with any modulation and bandwidth.

The term SDR signifies that the same hardwarearchitecture can be programmed or reconfigured to copewith any radio standard. The major application of SDR willbe in mobile communication transceivers, generic cellularbase stations and military radio systems. Some of thebenefits that will result with the realization of SDR are:

& easier international roaming, improved and more flex-ible services, increased personalization and choice forsubscribers of mobile services.

J Sign Process Syst (2011) 62:157–171DOI 10.1007/s11265-008-0327-y

R. Mahesh (*) :A. P. VinodSchool of Computer Engineering,Nanyang Technological University,Singapore 639798, Singaporee-mail: [email protected]

E. M-K. LaiSchool of Engineering and Advanced Technology,Massey University,Massey, New Zealand

A. OmondiSchool of Computing, University of Teeside,Middlesbrough, United Kingdom

& the potential to rapidly develop and introduce newvalue-added services and revenue streams with in-creased flexibility of spectrum management and usagefor mobile network operators.

& the promise of increased production flexibility, im-proved and more rapid production evolution for handsetand base station manufacturers.

& the prospect of increased spectrum efficiency and betteruse of scarce resource for regulators.

The basic idea of SDR is to replace the conventionalanalog signal processing in radio transceivers by digitalsignal processing by placing the analog to digital converter(ADC) in receivers (digital to analog converters (DAC) intransmitters) as close to the antenna as possible. Thus SDRshould be able to support multiple communication stand-ards by dynamically reconfiguring the same hardwareplatform. Also, SDR should be able to use the samearchitecture for any number of channels by simplyreconfiguring the digital front-end as compared to aconventional radio transceiver whose complexity growslinearly with the number of received channels. A feasibleSDR receiver architecture is shown in Fig. 1.

A radio frequency (RF) image filter is used to removethe image frequencies that can affect the output of themixer. The mixer is used to down convert the frequency ofthe input signal from RF to intermediate frequency (IF) so

that modern day ADCs can easily digitize the IF signal.This is followed by an anti-aliasing filter to band-limit theinput signal to prevent aliasing while sampling the signal inthe analog to digital converter (ADC). The portion of theSDR which includes LNA, RF image filter, mixer and anti-aliasing filter is known as analog front-end. Thus the mainfunctions of the analog front-end are to convert the carrierfrequency from RF to IF and to bandlimit the input signalto prevent aliasing. The part of the SDR terminal whereanalog signal processing is replaced by digital signalprocessing is referred to as the digital front-end (DFE).The main functionalities of DFE are digital down conver-sion (frequency shifting) and channelization (filtering) asshown in Fig. 2. After, digital down conversion, the desiredchannel at baseband is isolated by employing lowpassfiltering. A basestation receiver is often required to extractmultiple channels, which is accomplished using a bank offilters. The order of digital down conversion and filteringcan be interchanged. After digital down conversion andfiltering, the sampling rate can be reduced. In the DFE,channelizer is the most computationally intensive part, as itcomes directly after the ADC and hence needs to operate ata very high sampling rate [1, 2]. The channelizers in SDRreceivers must be realized to meet the stringent specifica-tions of low power consumption and high speed [3, 4]. InSDR receivers, channelization is usually done using digitalfilter banks. Uniform discrete Fourier transform (DFT) filter

LOCAL OSCILLATOR,

LO1

LNA RF

IMAGE FILTER

X ANTI

ALIASING FILTER

ADC

DIGITAL FRONT END

DSP

X

X

SAMPLE

RATE CONVERSION π/2

LO2

CHANNELIZATION

Figure 1 A feasible SDRreceiver.

Figure 2 Typical channeliza-tion process in the digitalfront-end.

158 J Sign Process Syst (2011) 62:157–171

bank is the most commonly employed filter bank in SDRchannelizer [5].

In this paper, we review some of the existing digital filterbanks and investigates the potential of these filter banks forchannelization in multi-standard SDR receivers. We alsopresent two of our low complexity, reconfigurable filterbank architectures for SDR channelizers. The rest of thepaper is organized as follows. In Section 2, we present themathematical representation of SDR signals, define someimportant characteristics for SDR filter banks and reviewvarious filter bank architectures. In Section 3, we present areconfigurable frequency response masking filter basedchannelizer. A novel coefficient decimation filter bankarchitecture is presented in Section 4. In Section 5, we havecompared all the filter bank techniques reviewed in thispaper. Section 6 provides conclusions.

2 SDR Signal Formulation and Review of Filter Banks

2.1 Signal Formulation

An SDR can be regarded as a system which should be ableto modulate or demodulate any kind of signal, anywhere,on any network. In this context, it is clear that an SDRsignal is a composite signal. It is given by the equation [6]:

xðtÞ ¼XSi¼1

SiðtÞ ð1Þ

where Si(t) represents the ith standard signal and S, thenumber of standards contained in the composite signal. Thegeneric equation of a standard, for channels spread on aplurality of carriers, gives:

SiðtÞ ¼XPi

p¼1

ri;pðtÞe2jpfi;pt ð2Þ

where ri,p (t) represents the modulated and filtered signalassociated to the carrier p of the standard i, which is at thecentre frequency, fi. Thus finally we have the equation:

xðtÞ ¼XSi¼1

XPi

p¼1

ri;pðtÞe2jpfi;pt ð3Þ

with ri;pðtÞ ¼ femiðtÞ*mi;pðcðtÞÞ, where mi,p (t) representsthe modulation relative to the carrier p and femi (t) the pulseshaping filter function. In conclusion, a multi-standard SDRsignal can be represented as

xðtÞ ¼XSi¼1

XPi

p¼1

ðfemiðtÞ*mi;pðcðtÞÞÞe2jpfi;pt ð4Þ

In (4), the terms femi (t) and mi,p (t) are standarddependent and varies from one standard to another. Thus x(t) in (4) can be considered as a combination of channelswith varying factors such as bandwidth. Thus it is obviousfrom (4) that, for an SDR system, we require a filter bankwhich can adapt to any standard dynamically and efficiently.

Based on (4) and the discussion so far, we define thefollowing essential requirements for an SDR receiver:

1. The receiver must be capable of extracting channelscorresponding to different communication standardswhich are independent of each other. This meansspecifically that the receiver must be capable ofextracting non-uniform bandwidth channels as band-widths of different standards are different.

2. The receiver must be capable of extracting narrowbandchannels from the wideband input signal.

3. In an ultimate SDR, reconfigurability of the receivermust be accomplished by reconfiguring the same filterbank for a new communication standard with minimalreconfiguration overhead, instead of employing sepa-rate filter banks for each standard. In the sequel, we callthis requirement as ultimate reconfigurability.

2.2 Filter Banks for SDR Channelizers

In this section, we review existing digital filter banks anddiscuss their suitability for channelization in SDR receivers.

A. Per-Channel (PC) Approach

The PC approach is based on a parallel arrangement ofmany one-channel channelizers. Each one-channel channel-izer performs the channelization process shown in Fig. 2. Thebasic architecture of the PC approach is shown in Fig. 3.

In Fig. 3, the order of channelization is filtering (H0(z) toHn(z)), digital down conversion (DDC), sample rateconversion (SRC) and finally baseband processing (BBP).The filter, H0(z), is a low pass filter and all other filters,

H0(z)

H1(z)

H2(z)

Hn(z)

DDC

DDC

DDC

DDC

SRC

SRC

SRC

SRC

BBP

BBP

BBP

BBP

Wideband Input

Figure 3 Per-Channel approach based channelization.

J Sign Process Syst (2011) 62:157–171 159

H1(z) to Hn(z)), are bandpass filters. It is possible to dodigital down conversion followed by filtering and conse-quently, all the filters will be low pass filters (all filters areH0(z)). It is also possible to further reduce the complexityof the PC approach by employing polyphase decompositionof each of the filters and then moving the SRC to the left offiltering operation (i.e., performing SRC before filtering).By employing polyphase decomposition, the speed offiltering operation can be relaxed.

The PC approach is a straightforward approach andhence relatively simple. But the main drawback is that, thenumber of branches of filtering-DDC-SRC is directlyproportional to the number of received channels. Hencethe PC approach is not efficient when the number ofreceived channels is large. Furthermore, if the channels areof uniform bandwidth, a filter bank approach would be acost-effective solution than the PC approach. In conclusion,although all the three requirements in an SDR receiverlisted in Section 2.1 can be met using the PC approach, itshardware cost is very high, which has led to thedevelopment of DFT filter banks.

B. DFT Filter Banks

DFT filter bank is a uniformly modulated filter bank,which has been developed as an efficient substitute for PCapproach when the number of channels need to be extracted ismore, and the channels are of uniform bandwidth (forexample many single-standard communication channels needto be extracted). The main advantage of DFT filter bank isthat, it can efficiently utilize the polyphase decomposition offilters. The derivation of DFT filter bank from PC approachcan be explained with reference to Fig. 3 [7]. Consider the kth

channelization branch as shown in Fig. 4.Figure 4a shows the whole process of bandpass filtering

followed by DDC and SRC (downsampling by M). Notethat the only modulator outputs not discarded by the SRCare those with time index n = mM. For these outputs, themodulator has the value e-j2Πkn/M = 1, and thus it can beignored. The resultant figure eliminating DDC is as shownin Fig. 4b. Now it is possible to expand Hk(z) in terms of Mpolyphase branches as shown in Fig. 5 and it is possible to

move the down sampling by M to the left of filteringoperation. This can be explained with the help of followingequations:

HkðzÞ ¼X1

m¼�1hkðnÞz�n ¼

XM�1

l¼0

z�lX1

m¼�1hkðmM þ lÞz�mM

ð5Þwhere hk(mM+l) represents the polyphase components ofHk(z). Now expanding hk in terms of the lowpass filtercoefficient, h, i. e. substituting hkðmM þ lÞ ¼ hðmM þlÞe j2pkðmMþlÞ

M (5) becomes,

HkðzÞ ¼PM�1

l¼0z�l

P1m¼�1

hðmM þ lÞej2pkðmMþlÞM

� �z�mM

HkðzÞ ¼PM�1

l¼0z�l

P1m¼�1

hðmM þ lÞej2pklM

� �z�mM

HkðzÞ ¼PM�1

l¼0z�l

P1m¼�1

hðmM þ lÞz�mM

� �ej

2pklM

ð6Þ

Now replacing,P1

m¼�1hðmM þ lÞz�mM by Pl (z

M), (6)becomes,

HkðzÞ ¼XM�1

l¼0

z�lPlðzM Þej2pklM ð7Þ

The expression (7) is shown in Fig. 5. In Fig. 5, P0(z) toPM−1(z) represent the polyphase components of a lowpassfilter. The modified version of Fig. 5 by making use of thenoble identity is shown in Fig. 6. It can be seen that, thedotted portion in Fig. 6 represents the inverse DFT (IDFT)operation and hence can be replaced by IDFT. By employ-

Hk(z) x (n) X M yk(m)

e-j2Πkn/M

(a) Down conversion to baseband after bandpass filtering.

x (n) M yk(m)

(b) Modified down conversion to baseband after bandpass filtering.

Hk(z)

Figure 4 a Down conversion to baseband after bandpass filtering. bModified down conversion to baseband after bandpass filtering.

Po(zM)

P1(zM)

PM-1(zM)

Z-1

Z-1

Z-1

M +

+

ej2Πk0/M

ej2Πk1/M

ej2Πk(M-1)/M

x (n)

yk(m)

Figure 5 kth filter bank branch containing M polyphase branches.

Po(z)

P1(z)

PM-1(z)

Z-1

Z-1

Z-1

+

+

ej2Πk0/M

ej2Πk1/M

ej2Πk(M-1)/M

M

M

M

x (n)

yk(m)

IDFT

Figure 6 Modified kth filter bank branch containing M polyphasebranches.


ing IDFT, we get all the channels (frequency bands)simultaneously in a DFT filter bank as shown in Fig. 7.Efficient implementations of a channelizer using DFT filterbanks (DFTFBs) are available in literature [5].

It can be seen from Fig. 7 that DFTFB can be realized byimplementing one low-pass filter and a correspondingmodulator (IDFT). Thus instead of implementing Nseparate channel filters as in the case of PC approach, asingle lowpass filter followed by DFT (complexity of IDFTis equivalent to that of DFT) is only required. However,DFTFBs have following limitations for multi-standardreceiver applications [5]:

1. DFTFBs cannot extract channels with different band-widths. This is because DFTFBs are modulated filterbanks with equal bandwidth of all bandpass filters.Therefore, for multi-standard receivers, distinctDFTFBs are required for each standard. Hence thecomplexity of a DFTFB increases linearly with thenumber of received standards.

2. Due to fixed channel stacking, the channels must beproperly located for selecting them with the DFTFB.The channel stacking of a particular standard dependson the sample rate and the DFT size. To use the sameDFTFB for another standard, the sample rate at theinput of the DFTFB must be adapted accordingly. Thisrequires additional sample rate converters (SRCs),which would increase the complexity and cost ofDFTFBs.

3. If the channel bandwidth is very small compared towideband input signal (extremely narrowband chan-nels), the prototype filter must be highly selectiveresulting in very high-order filter. As the order of thefilter increases, the complexity increases linearly. Alsothe DFT size needs to be increased.

Reconfigurability is another key requirement as we hadmentioned earlier. Ideally, the reconfigurability of the filterbank must be accomplished by reconfiguring the sameprototype filter in the filter bank to process the signals ofthe new communication standard with the least possibleoverhead, instead of employing separate filter banks for

each standard. However reconfiguration of DFTFB suffersfrom following overheads:

1. The prototype filter needs to be reconfigured. GenerallyDFTFB employs the polyphase decomposition. Hencereconfiguration can involve changing the number ofpolyphase branches which is a tedious and expensivetask.

2. Downsampling factor needs to be changed. If downsampling is to be done after filtering, then we needseparate digital down converters. This will add morecost.

3. The DFT needs to be reformulated accordingly whichis also expensive.

For example, if we are switching from a 8-channel filterbank to 16-channel filter bank, the number of polyphasebranches need to be changed from 8 to 16 (first limitationof DFTFB), the downsampling factor needs to be adjustedfrom 8 to 16 (second limitation of DFTFB) and the 8-pointDFT needs to be expanded to 16-point DFT.

In the case of multiple channel extraction of single-standard signal i. e., extraction of many channels ofidentical bandwidth, the complexity of PC approach isgiven by N.L.fs, where N is the number of channelsextracted, L is the total length of filters employed in allthe branches for PC approach and fs is the samplingfrequency. The complexity of DFTFB is only L.fs which isN times lower than PC approach. But in the case of SDR,multiple channels of multiple standards need to be extracted(extraction of multiple channels of non-uniform band-widths). In that case, the complexity of PC approach andDFTFB are NCSs and NSs respectively, where NC and NS arethe number of channels and number of standards respec-tively. Thus the complexity of these channelizers can bereduced further if (1) the length of filter, L, can be reducedand (2) the same filter bank can be reconfigured to the newstandard (which will eliminate the dependency on the termNS from complexity equation). Thus there is a need fordeveloping new filter bank architectures for SDR receivers.In the next section, we discuss the approaches presented inliterature to minimize the hardware complexity of filtersand filter banks in the channelizer of an SDR.

C. Alternative Filter Banks

A Goertzel filter bank (GFB) based on modifiedGoertzel algorithm was proposed in [5] as a substitute toDFTFB. In GFB, the DFT is replaced by a modifiedGoertzel algorithm which performs the modulation of theprototype low-pass frequency response to any centrefrequency which is not possible using DFT. This willeliminate the limitation of fixed channel stacking associatedwith DFTFBs. But the GFB is also a type of modulated

Po(z)

P1(z)

PM-1(z)

Z-1

Z-1

Z-1

M

M

M

x (n)

M-Point

IDFT

yo(m)

y1(m)

y(M-1)(m)

Figure 7 DFT filter bank.


filter bank; hence it cannot extract channels with differentbandwidths, as in the case of DFTFB. Also, extraction ofnarrow-band channels using GFB requires a very narrowpassband prototype filter, which would in turn result inhigher order filter. The GFB approach requires IIR filter forthe implementation of Goertzel algorithm and hence hasstability constraints while reconfiguring the filter bank fromone communication standard to another. Even though atheoretical introduction of GFB as a solution to some of theproblems of DFTFB is given in [5], there is no consider-ation on the actual implementation complexities of GFB.

A channelizer based on a combination of polyphase filterbank and modified DFT (MDFT) modules have beenproposed in [8]. The MDFT module performs real signalcalculations instead of complex signal calculations and thusreduces computational complexity associated with the DFToperation. This is achieved by taking the real part of theDFT for the complex values. The MDFT module consistsof one adder and two K-tap FIR filters, where K representsthe number of polyphase branches of the prototype filter.Thus the over-all computational complexity of the filterbank is reduced when compared to conventional DFTFBs.However the channelizer in [8] is less flexible whencompared to DFTFB. This is because the coefficients ofthe FIR filters in the MDFT module are dependent on thepolyphase prototype filter. The reconfigurability of samefilter bank for a new communication standard is also notachieved by the method in [8].

A multi-standard channelizer that has two stages ofDFTFBs and efficient sample rate converters has beenproposed in [9]. The front-end DFTFB has fixed number ofchannels, but the passband supports overlap with each otherconsiderably resulting in easier isolation of channels withcenter frequencies of successive band-pass filters. Theoutputs of the front-end DFTFB are then fractionallydecimated using SRCs. These decimated outputs are fedto the back-end DFTFB. Since the sample rate is consid-erably lowered in the back-end, the DFTFB at the back-endneed to operate only at low-speed. Due to the reducedspeed requirements, the back-end DFT can be repeatedlyused to extract variable bandwidth channels. The drawbackof the architecture in [9] is that, since the back-end DFTFBis employed for varying bandwidth channels, hardwareoptimization can be done only for the fixed front-endDFTFB. The back-end needs to be changed according tothe new communication standard.

In [10], a channelizer based on modulated perfectreconstruction bank (MPRB) has been proposed. TheMPRB consists of an analysis section and a synthesissection. By adding up the subband signals generated by theanalysis section, wideband signals can be generated at thesynthesis section. Thus the approach in [10] can be used forthe channelization of signals of unequal bandwidths.

However, the bandwidths of the wideband signals generat-ed by the synthesis section are integer multiples of thebandwidths of the subband signals generated by theanalysis section. Thus the approach in [10] is not alwaysappropriate for SDR signals, where the multiple communi-cation standards have bandwidths which are not integermultiples of each other. A new method for the efficientdesign of the MPRB is also proposed in [10]. Also theapproach in [10] consists of a polyphase prototype filter,IDFT analysis section and DFT synthesis section. Thus thecomputational complexity of the MPRB is double that ofDFTFB. Also the implementation complexities associatedwith MPRB have not been considered in [10].

A pipelined frequency transform (PFT) based on the PCapproach has been proposed in [11]. The basic PFTarchitecture consists of a binary tree of DDCs and SRCs,which splits the input signal frequency into a low and highfrequency subbands, and then splits each half-band againuntil the last tree level extracts the desired channels. ThePFT architecture consisting of binary tree of DDCs andSRCs is shown in Fig. 8, where DDCs followed by SRCsare employed for dividing the input signal into a low-passand high-pass bands with half sampling rate at the output.The main advantage of PFT approach over PC approach isthat, the complexity of filtering can be reduced substantiallytaking advantage of half-band symmetry and reducedsampling rate at each output stage.

A reconfigurable channelizer using tree-structured quad-rature mirror filter bank (TQMFB) has been proposed in[12]. The TQMFB consisted of a tree of quadrature mirrorfilter banks, splitting the frequency band of input signal intohigh and low frequencies at quadrature frequency in eachstage. Thus the TQMF approach in [12] is very similar tothe PFT approach in [11]. The desired channel is obtainedat an appropriate stage corresponding to the bandwidth ofthe channel-of-interest. The main drawback of the TQMFBis its delay in obtaining the desired output due to multistagefiltering and decimation processes. The channelizers in [11]and [12] suffer from the drawback that they can only extractsignals whose channel spacing are related by a factor-of-two. This constraint is imposed by the power-of-two

Wideband Input

DDC-SRC

DDC-SRC

DDC-SRC

DDC-SRC

DDC-SRC

DDC-SRC

DDC-SRC

Baseband

Processing fs

fs/2

fs/4 fs/8

DDC SRC

DDC SRC

Figure 8 Architecture of PFT approach.


subband stacking adopted in these architectures. Anotherproblem of the methods in [11, 12] is that, as the subbanddecomposition tree extends, the wordlength of the outputincreases linearly and finite wordlength multiplicationwould introduce truncation error, which propagates alongthe tree. In the PFT approach, the problem with power-of-two subband stacking can be overcome by a tunable PFT(TPFT) architecture [13]. In the TPFT architecture, inter-leavers are introduced between different stages of PFT,which will enable the usage of intermediate outputs fromdifferent stages along the binary tree. These interleaverswill help in fine tuning of channelization process and thusadd more flexibility to the PFT architecture. Thus in TPFT,two levels of tuning are done, a coarse tuning at the PFTlevel and a fine tuning using another complex up/downconverter assisted by a numerical controlled oscillator.However the implementation complexity of TPFT approachis much more than that of the PFT approach and thus not avery good candidate for wideband channelization.

A qualitative comparison of different channelizationapproaches is given in Table 1. The PC approach iscompared to DFTFBs and PFT approaches based on fourparameters. The TPFT approach is not suitable for SDR,whereas the approaches in [5, 8–10] are modifications ofDFTFB. In Table 1, the parameter ‘computational com-plexity’ represents the number of multiplications associatedwith each method. Previous works [5, 14, 15] showed thatwhen the number of uniform bandwidth channels to beextracted is more than two, the DFTFBs outperform the PCapproach. It is also shown in [14] that an improvement inthe filters of the PC approach can make it more efficient up toextraction of 20 channels in some scenarios. The computa-tional complexity of PFTmethod is less than the PC approach,but not lower than that of DFTFB. The parameter ‘siliconcost’ shows the actual implementation cost in FPGA. Adrawback of this parameter is that it is platform dependent. Itis shown in [11] that up to 256 channels, the silicon cost ofPFT approach is comparable to DFTFB, but beyond 256channels, DFTFB outperforms PFT approach. The thirdparameter is the ‘initial design flexibility’ which involves acombination of two factors: 1) ability to extract non-uniform bandwidth channels, and 2) the number ofchannels extracted. When ‘initial design flexibility’ is

considered, the PC approach is obviously the best as allthe extracted channels are independent, can have differentbandwidths and can be non-uniformly and discontinuous-ly distributed over the input frequency band. Neither PFTnor DFTFB is able to extract independent channels. ThePFT has the limitation of power-of-two subband stackingand hence the number of extracted channels will be inpowers of two. Even though DFTFB has more flexibility,the most economical implementation of DFT has integerpower of two bins and hence the number of extractedchannels can be very similar to the PFT approach. On theother hand, the PC approach has no such problems. Theparameter ‘reconfigurability’ represents the adaptation ofchannelization architecture to satisfy the new require-ments with minimum overhead. As discussed in theprevious sections, none of the existing approaches satisfythe reconfigurability requirement. It can be noted fromTable 1 that the existing channelization approaches do notoffer an efficient trade-off between complexity andreconfigurability. In the next two sections, we present twofilter banks called frequency response masking (FRM)based filter bank and coefficient decimation (CD) basedfilter bank, which can offer a good trade-off betweenreconfigurability and low complexity and satisfy most ofthe requirements for SDR receivers.

3 Frequency Response Masking Based Filter Banks

Ideally, the reconfigurability of the receiver must beaccomplished in such a way that the filter bank architectureserving the current communications standard must bereconfigured with least possible overhead to support anew communication standard while maintaining the paralleloperation (simultaneous reception/transmission of multi-standard channels). To realize a filter bank which can bereconfigured to accommodate multiple standards withreduced hardware overhead, we have proposed a frequencyresponse masking (FRM) based reconfigurable filter bank(FRMFB) in [16, 20]. The FRM technique was originallyproposed for designing application-specific low complexitysharp transition-band finite impulse response (FIR) filters(fixed-coefficient filters) [17]. We have modified the

Table 1 Comparison of channelization approaches.

Parameter PC Approach DFTFB PFT

Computational complexity For multiple uniform bandwidth channels Poor Excellent GoodFor multiple non-uniform bandwidth channels Poor Poor Poor

Silicon cost Poor Excellent GoodInitial design flexibility Independent channels Yes No No

Number of channels Selectable 2N 2N

Reconfigurability Poor Very poor Poor


original FRM approach in [17] to achieve followingadvantages: (1) Incorporate reconfigurability at the filterlevel and architectural level, (2) Improve the speed offiltering operation and (3) Reduce the complexity.

A. Review of FRM Technique

Finite impulse response (FIR) filters are widelyemployed in wireless communication systems because ofits linear phase property and guaranteed stability. Sharptransition-band FIR filters are required in these systems tomeet the stringent wireless communication specifications.In conventional FIR filter designs, higher order filters arerequired to obtain sharp transition-band. The complexity ofFIR filters increases with the filter order. Severalapproaches have been proposed for reducing the complex-ity of FIR filters. In [17], an FRM technique was employedfor the synthesis of sharp transition-band FIR filters withlow complexity. The advantage of FRM technique is that,the bandwidths of the filters are not altered and the resultingfilter will have many sparse coefficients (because thesubfilters have wide transition-band) resulting in lesscomplex filters. The basic idea behind the FRM techniqueis to compose the overall sharp transition-band filter usingseveral wide transition-band subfilters. We proposed to usethe sharp transition-band filter designed using FRM withnecessary modifications as filter bank in a CR system [16].Given a prototype symmetrical impulse response linearphase low-pass filter (known as ‘modal filter’) Ha(z) of oddlength Na, its complementary filter Hc(z) can be expressedas

HcðzÞ ¼ z�M ðNa�1Þ2 � HaðzÞ ð8Þ

Replacing each delay elements of both filters by Mdelays, two filters with transfer functions Ha(z

M) andHc(z

M) are formed. The transition widths of Ha(zM) and

Hc(zM) are a factor of M narrower than that of Ha(z). In the

FRM technique, two filters HMa(z) and HMC(z), arecascaded to Ha(z

M) and Hc(zM), respectively as shown in

Fig. 9. The transfer function of the entire filter is given by

HðzÞ ¼ HaðzM ÞHMaðzÞ þ HcðzM ÞHMcðzÞ ð9Þ

Note that the group delay of the filters HMa(z) andHMc(z) must be equal, and M(Na−1) in the Eq. (8) must be

an even number. The design steps for the subfilters in Fig. 9(i. e the passband and stopband specifications of thesubfilters) involve the solution of the expressions [17]:

m ¼ fpM� � ð10ðaÞÞ

fap ¼ fpM � m ð10ðbÞÞ

fas ¼ fsM � m ð10ðcÞÞ

fmap ¼ fp ð10ðdÞÞ

fmas ¼ mþ 1� fasM

ð10ðeÞÞ

fmcp ¼ m� fapM

ð10ðfÞÞ

fmcs ¼ fs ð10ðgÞÞwhere m denotes the largest integer less than fpM

� �, M is

the up-sampling rate for Hap and fs are the passband andstopband edges of the overall filter, fap and fas are thepassband and stopband edges of the modal filter Ha(z), fmapand fmcp are the passband edges and fmas and fmcs are thestopband edges of the two masking filters respectively. Allthe stopband and passband edges mentioned in this paperincluding expressions (10 (a)–(g)) are normalized to unity.Thus by suitable selection of the passband and stopbandedges of the modal and the masking filters, any sharptransition-band FIR filter can be implemented with lowcomplexity [17].

The FRM approach can be illustrated with the help ofFig. 10. Figure 10a represents the frequency response of alow-pass filter Ha(z). The passband and stopband edges ofthe modal filter are fap and fas respectively. The comple-mentary filter of the modal filter, Hc(z), is shown inFig. 10b. Replacing each delay of Hac(z) by M delays, twofilters Ha(z

MM) are obtained, and their frequency responsesare shown in Fig. 10c. Two masking filters HMa(z) andHMc(z) as shown in Fig. 10d, are used to mask Ha(z

MM)respectively. If the outputs of HMa(z) and HMc(z), are added,as shown in Fig. 9, the frequency response of the resultingfilter, H(z), is shown in Fig. 10e. Thus a sharp transition-band FIR filter is obtained using four subfilters. Since thesesubfilters are having wide transition-band specifications,the overall complexity will be much less than direct orconventional design of sharp transition-band FIR filters.

Input

+

+

Ha(zM) HMa (z)

z-M(Na-1)/2 HMc (z)

Output

+-

Figure 9 FIR filter architecture based on FRM technique.


B. Reconfigurable FRM Filter Bank

In this section, we present a brief overview of the filterbank proposed by us in [16]. The reconfigurability of theproposed filter bank can be illustrated using the expressionsgiven by (11, 12). Though the proposed architecture iscapable of handling multiple modes of communication, forease of explanation, we use a dual-mode operation toillustrate reconfigurability. Let fp1 and fp2 be the passbandfrequencies and fs1 and fs2 be the stopband frequencies ofthe channel filters corresponding to two modes of opera-tion, m1 and m2 respectively. Reconfigurability can beachieved by using the same subfilters in Fig. 9 for bothmodes (communication standards). The parameters fap andfas remain unchanged for both the modes and therefore, thesame modal filter is employed for both modes. Themasking filters can be selected according to the desiredspecifications which will be explained in detail later. Thuswe have,

fp1M1 � fp1M1

� � ¼ fp2M2 � fp2M2

� � ð11Þ

fs1M1 � fs1M1b c ¼ fs2M2 � fs2M2b c ð12Þwhere M1 and M2 denote the up-sampling factors for thetwo modes m1 and m2 respectively, which can be obtainedby solving (11) and (12). Thus by changing the number ofdelay elements, we can employ the same modal filter towork for both the modes. The dual-mode filter bank can beeasily extended to incorporate additional communicationmodes by choosing an appropriate number of delayelements. For example, if the architecture needs to bemodified to include a third communication mode, m3, thenumber of delays or the up- sampling factor (M3) can be

obtained by substituting the filter specification correspondingto the third mode into expressions (11) and (12). Thearchitecture of such a modal filter is shown in Fig. 11. InFig. 11, mode-4 operation is shown.

The filters operating for all the communication modesshare the same coefficient multiplication which results ingood savings in area and power. The outputs of modal filteryA1 to yA4 are multiple frequency bands as shown inFig. 10c. The complementary outputs corresponding toeach of these modal filter outputs can be obtained by usingcomplementary delays as shown in Fig. 9 and the numberof delays needed for obtaining the complementary output isgiven by

ðN � 1ÞM=2 ð13Þwhere N is the length of the modal filter and M is thenumber of delays. Thus for obtaining four modes simulta-neously, four set of complementary delays are required.Similarly for each mode, two masking filters are alsorequired as shown in Fig. 9. A generalized architecture forthe proposed filter bank for extracting n channels is shownin Fig. 12.

In Fig. 12, FMA and FMC are masking filters for themodal filter and complementary delay outputs respectively.Since all the filters (modal filter and masking filters, FMAand FMC) employed in the proposed filter bank are wide

z-2 z-2 z-2

h0 h1 h2 h1 h0

x

yA1

z-3 z-3 z-3yA4

z-4 z-4 z-4yA3

z-6 z-6 z-6yA2

Figure 11 Architecture of modal filter for mode-4 filter bank.

Modal Filter

FMA1

FMA2

FMAn

Complementary Delays

+

+

+

FMC1

FMC2

FMCn

+

+

+

M=M1

M=M2

M=Mn y1

y2

yn

x

Figure 12 Architecture of proposed mode-n FRMFB.

HC (zM

)

HMa(z)

w

(m+1-fas)/M

a

c

d

e

Ha (z)

HC(z) = 1-Ha(z)

HMa(z)

fap fas

fap fas

(m-fap)/M fp

fp

fs

fs

b w

w

w

w

π

π

π

π

π

Ha(zM

)

H (z)

Figure 10 Frequency response illustration of FRM approach.


transition-band filters as shown in Fig. 10, their lengths areshort and consequently their complexities are low. TheFRMFB offers reconfigurability at two levels—architectur-al level and filter level. At the architectural level, it ispossible to obtain different frequency bands (channels) bychanging the number of delays as shown in Fig. 12. Bymasking out the undesired frequency bands, it is possible toobtain the desired frequency output as shown in Fig. 10. Atthe filter level, it is possible to reconfigure the filtercoefficients to obtain an entirely new frequency specifica-tion [18]. The number of coefficients to be reconfiguredfor the proposed filter bank will be much less comparedto the conventional filter bank implementations. This isbecause all the subfilters (masking filters) in the proposedFRM filter bank are having wide transition band andhence lower order filters. Note that the modal filterremains unchanged for extracting all the channels (fixed-coefficient model filter) and only the masking filters andthe complementary delays need to be changed based onthe channel to be extracted. Thus by selecting theappropriate output response of modal filter and suitablemasking filters, it is possible to obtain any frequency bandat the output of the filter bank. If DFTFB were employedfor channelization, an extremely higher order filter ofaround 8 times that of the total order of all the filters inthe proposed FRMFB would be required.

Thus by employing reconfigurabilities at architecturaland filter levels, FRMFB is capable of adapting to anysignal with reduced hardware overhead. For different valuesof M, the passband widths are different; hence non-uniformchannel extraction is possible in the FRMFB. Also FRMFBdoes not employ any modulator such as DFT and is freefrom the problem of fixed channel stacking.

4 Coefficient Decimation Based Filter Bank

The disadvantage of FRMFB is that it does not have fullflexibility of selection of passband widths and location ofcentre frequencies of passbands. Recently, we have pro-posed a novel coefficient decimation (CD) approach forimplementing computationally efficient reconfigurable filterbanks for SDR receivers [19]. The filter bank based on theCD approach have absolute control over the passbandwidth and passband locations i. e., center frequencies ofpassbands, when compared to other filter banks inliterature. The principle of CD approach is as follows: Ifthe coefficients of an FIR filter are decimated by M, i.e.,every Mth coefficient is kept unchanged and all others arereplaced by zeros, we get a frequency response similar toimages created during upsampling (Our definition ofcoefficient decimation is that unused coefficients arereplaced by zeros as opposed to the conventional notion

of discarding unused samples in the decimation of a signal).This can be explained theoretically as follows:

Let h(n) be the original set of coefficients. If we replaceall the coefficients other than every Mth coefficient byzeros,

h'ðnÞ ¼ hðnÞcM ðnÞ ð14Þwhere,

cM nð Þ ¼ 1 for n ¼ mM ; m ¼ 0; 1; 2 etc:¼ 0 otherwise

ð15ÞThe function c M(n) is periodic with period M, and hence

the Fourier series expansion is given by

cM ðnÞ ¼ 1

M

XM�1

k¼0

CðkÞej2pknM ð16Þ

where C(k) are complex-valued Fourier series coefficientsdefined by

CðkÞ ¼XM�1

n¼0

cM ðnÞe�j2pkn

M ð17Þ

Substituting (15) into (17) it follows that C(k)=1 for allk. Hence,

cM ðnÞ ¼ 1

M

XM�1

k¼0

ej2pknM ð18Þ

Now the Fourier transform of the modified coefficients,h (n),

H 0 ejwð Þ ¼ P1n¼�1

h0 nð Þe�jwn ¼ P1n¼�1

h nð ÞcM nð Þe�jwn

¼ P1n¼�1

h nð Þ 1M

PM�1

k¼0ej2pknM

� �e�jwn

ð19Þ

Finally by interchanging the sums in (19)

H 0 ejwð Þ ¼ 1M

PM�1

k¼0

P1n¼�1

h nð Þe�jn w�2pkMð Þ

¼ 1M

PM�1

k¼0H ej w�2pk

Mð Þ� � ð20Þ

It can be noted from (20) that, the frequency response isscaled by M and the replicas of the frequency spectrum areintroduced at integer multiples of 2π/M. Thus in order torecover the original signal, the output of the filter needs tobe scaled by M. For each value of M, different multibandresponses are obtained. If each of these multibandresponses are masked using suitable masking filters,different low-pass, band-pass and high-pass channels(bands) can be obtained. Reconfigurability can be easilyachieved by changing the value of M with a given set offilter coefficients. The proposed methodology can beillustrated with the help of Fig. 13. In Fig. 13a, represents


the original modal filter with normalized (with respect tosampling frequency) passband and stopband specificationsof fp=0.05 and fs=0.075. Let the passband and stopbandripple specifications be 0.1 dB and −55 dB respectively.Fig. 13b represents frequency response for M=2, i.e., thecase when every second coefficients in the original filtercoefficient set are kept unchanged and remaining coefficientsare replaced by zeros. Note that the frequency response isobtained by scaling the coefficients byM=2. In the proposedreconfigurable FIR filter implementation, this can beachieved by scaling the output of the filter by M=2. Thisis possible because ðM � hÞ � x ¼ M � ðh� xÞ, where x is

the input and h represent the filter coefficients and ⊗represents the convolution operation. As seen from (20) andFig. 13b, for M=2, the frequency responses are obtained at2πk/2 = πk, for k=0 and 1. Similarly, Fig. 13c and drepresent the case M=3 and M=4 respectively. Figure 13e isobtained as a special case of M=4. If every fourthcoefficients are grouped together, a decimated frequencyresponse compared to original frequency response ofFig. 13a is obtained with M=4. It can be seen fromFig. 13b to d that the stopband attenuation reduces as Mincreases. But it should be noted that the transition widthremains unaltered for all values of M. Therefore, based on

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-10 0

-80

-60

-40

-20

0

20

Normalized Frequency (frequency/sampling frequency)

Mag

nitu

de (

dB)

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-70

-60

-50

-40

-30

-20

-10

0

10


Mag

nitu

de (

dB)

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-160

-140

-120

-100

-80

-60

-40

-20

0

20


Mag

nitu

de (

dB)

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-90

-80

-70

-60

-50

-40

-30

-20

-10

0

10


Mag

nitu

de (

dB)

(a) Frequency response of (b) Frequency response oforiginal modal filter. modal filter with M=2.

(c) Frequency response of (d) Frequency response ofmodal filter with M=3. modal filter with M=4.

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-80

-70

-60

-50

-40

-30

-20

-10

0

10


Mag

nitu

de (

dB)

(e) Frequency response of decimated modal filter with M=4.

Figure 13 a Frequency response of original modal filter. b Frequency response of modal filter M=2. c Frequency response of modal filter M=3.d Frequency response of modal filter M=4. e Frequency response of decimated modal filter with M=4.


the desired stopband attenuation of the final filter, theoriginal modal filter should be designed with larger stopbandattenuation keeping in account of the deterioration of thefinal filter’s stopband response.

The proposed CD approach [19] can also be extended todevelop a filter bank to extract multiple frequency bandssimultaneously. This can be illustrated using Fig. 13. If thefrequency responses in Fig. 13a to d can be obtainedsimultaneously, then by subtracting the outputs of Fig. 13band Fig. 13c from Fig. 13a and the output of Fig. 13d fromFig. 13b, different frequency bands (channels) located atinteger multiples of 2π/M can be extracted. A generalizedarchitecture for the proposed FB is shown in Fig. 14. Thefrequency responses in Fig. 13 a to d are obtained using thefilter bank structure in Fig. 14 as outputs y1 to y4respectively. Also, the responses in Fig. 13a to c areobtained as outputs y21, y31 and y42 in the architectureshown in Fig. 14. Thus CDFB is capable of extractingchannels corresponding to the frequency responses inFigs. 13a to d and 15a to c simultaneously without theneed of any extra filters or modulation operations. Note thatneither the passband width nor the transition band width isaltered while obtaining all the above frequency responses.CDFB is a low complexity alternative to DFTFB and ismore flexible and easily reconfigurable than the DFT filter

bank. Furthermore, the CDFB is able to receive channels ofmultiple standards simultaneously, where as separate filterbanks would be required for simultaneous reception ofmulti-standard channels in a DFT filter bank based receiver.

5 Complexity Comparison

In this section, we present a quantitative comparison ofdifferent filter banks reviewed in this paper. Table 2 showsthe comparison of the multiplication rate of the PCapproach, DFTFB, GFB [5], MPRB [10], our FRMFB[16] and CDFB [19]. Multiplication complexity of achannelizer is defined as the total number of multiplicationsfor extracting NI number of channels (of same communi-cation standard) simultaneously. The multiplications in-volved in a channelizer can be grouped into threecategories: Multiplications associated with (1) Channelfiltering; (2) Digital down conversion and (3) Modulationof filters (this is not applicable for PC approach, FRMFBand CDFB).

In Table 1, L represents the number of non-zerocoefficients of the prototype filter for the PC approach,DFTFB and GFB, l represents the additional number ofnon-zero coefficients of the modal filter (because of over

+Z-1 +Z-1 +Z-1 +

h0 h1 h2 h3 N-1

y1

Z-2 + y2

Z-3 y3

- y2-y1

- y3-y1

+

+Z-1

h4

Z-(N-1)/2

+ y4

- y4-y2

+

hM

Z-M + yM

x

- HM1

HM2

y41C

y42C

y4C

Z-4

Figure 14 Architecture of the coefficient decimated filter bank.


design) and masking filters in the proposed CDFB, lmrepresents the total number of non-zero coefficients for themodal filter and masking filters in the FRMFB (We haveconsidered only non-zero coefficients as they will onlyresult in multiplication complexity), and Fs represents thesampling frequency.

The multiplication complexities for PC approach,DFTFB and GFB are taken directly from [5]. From Table 2,it is clear that the complexity of PC approach is directlyproportional to the number of channels, NI. Thus higher thenumber of channels, the PC approach is not hardwareefficient. It can be seen that, the complexity of filtering(multiplication) operation is same for the proposed DFTFBand GFB and slightly higher for CDFB (because ofoverdesigning and masking filters). The MPRB [10]consists of an analysis DFTFB and a synthesis DFTFB

and hence the complexity is exactly twice that of DFTFB.As the FRMFB and CDFB do not require any DFT, thereare no modulation complexity associated with FRMFB andCDFB. However separate (NI−1) digital down convertersare required in the FRMFB and CDFB for converting allthe channels except the low-pass channel to baseband. Wehave not considered FFT for the implementation of IDFT inDFTFB and MPRB, as FFT is appropriate only if thenumber of channels to be extracted is a power-of-two. FromTable 2, it can be seen that the over-all complexity of theproposed CDFB is lower than that of the PC approach,MPRB and GFB. Also, the proposed CDFB is less complexcompared to DFTFB, when the number of channels, NI,increases. The FRMFB has the least filter length because ofthe wide transition-band subfilters compared to other filterbanks and hence has the least over-all complexity.

Table 2 Multiplication rate of channelizers.

PCApproach DFTFB GFB [5] MPRB [10] FRMFB [16] CDFB [19]

Filter NI •L L L 2L lm L+lDDC NI−1 − − − NI−1 NI−1Modulation of filters − NI

2 NI •L 2NI2 − −

Sum NI •(L+1)−1 L+NI2 L •(1+NI) 2(L+NI

2) lm+NI−1 L+l+NI−1

0 0.05 0.1 0. 15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-160

-140

-120

-100

-80

-60

-40

-20

0

20


Mag

nitu

de (

dB)

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-80

-70

-60

-50

-40

-30

-20

-10

0

10


Magnitu

de (

dB

)

0 0.05 0.1 0.15 0.2 0.25 0.3 0.35 0.4 0.45 0.5-70

-60

-50

-40

-30

-20

-10

0

10

Normalized Frequency (×π rad/sample)

Magnitu

de (

dB

)(a) Frequency response at y2-y1. (b) Frequency response at y3-y1..

(c) Frequency response at y4-y2.

Figure 15 a Frequency response at y2-y1. b Frequency response at y3-y1. c Frequency response at y4-y2.


However, the design of FRMFB is a tedious task as it followsseparate design procedure for each bandpass channel. For theextraction of channels of different standards (non-uniformbandwidth channels), only PC approach and FRMFB can beemployed efficiently. Hence for non-uniform bandwidthchannel extraction, FRMFB is a very good substitute for PCapproach because of former’s inherent low complexity andeasy reconfigurability. Similarly for the extraction ofchannels of uniform bandwidth, CDFB is an excellentsubstitute for DFTFB, GFB and MPRB.

6 Conclusions

In this paper, we have studied different filter banks forchannelizers in multi-standard software defined radio(SDR) receivers. Low complexity and reconfigurabilityare the two key requirements of filter banks in SDRreceivers. From our studies it can be concluded that, noneof the existing filter banks such as per-channel approach,discrete Fourier transform (DFT) based filter bank and itsmodifications satisfy the stringent requirements of SDRreceivers. We have presented two of our contributionswhich can satisfy the above requirements and can beemployed as substitutes for the traditional approaches. Tobe more precise, the filter bank based on frequencyresponse masking can be used as an efficient substitutefor the per-channel approach and the filter bank based onthe coefficient decimation approach can be used as a lowcomplexity alternative to DFT filter banks.

References

1. Mitola, J. (2000). Software radio architecture, John Wiley.2. Hentschel, T., Henker, M., & Fettweis, G. (1999). “The digital

front-end of software radio terminals,” IEEE Person. Commun.Magazine, pp. 40–46.

3. Vinod, A. P., Premkumar, A. B., & Lai, E. M.-K. (2003). “Anoptimal Entropy coding scheme for efficient implementation ofpulse shaping FIR filters in digital receivers,” in Proc. of IEEEInternational Symposium on Circuits and Systems, vol. 4, pp.229–232, Bangkok, Thailand.

4. Vinod, A. P., & Lai, E. M-K. (2006). “Low Power and High-Speed implementation of FIR filters for software defined radioreceivers,” IEEE Transactions on Wireless Communications, pp.1669–1675, no. 5, vol. 7.

5. Hentschel, T. (2002). “Channelization for software defined base-stations.”. Annales des Telecommunications, 57(5-6), 386–420ISSN 0003-4347.

6. Zabre, S., Palicot, J., Louet, Y., Moy, C., & Lereau, C. (2006).“Carrier per Carrier Analysis of SDR Signals Power Ratio”, SDRForum Technical Conference, Orlando, US.

7. Phil Schniter: http://cnx.org/content/m10424/latest/.8. Kim, C., Shin, Y., Im, S., & Lee, W. (2000). “SDR-based digital

channelizer/de-channelizer for multiple CDMA signals,” inProceedings of IEEE Vehicular technology Conference, vol. 6,pp. 2862–2869.

9. Fung, C. Y., & Chan, S. C. (2002). “A multistage filter bank-based channelizer and its multiplier less realization”, in Proceed-ings of IEEE International Symposium on Circuits and Systems,vol.3, pp. 429–432.

10. Abu-Al-Saud, W. A., & Stuber, G. L. (2004). Efficient widebandchannelizer for software radio systems using modulated PR filterbanks. IEEE transactions on signal processing, 52(10), 2807–2820. doi:10.1109/TSP.2004.834242.

11. Lillington, J. (2003). “Comparison of wideband channelizationarchitectures,”http://www.techonline.com/community/techgroup/dsp/tech paper/33204.

12. Vinod, A. P., Lai, E. M.-K., Premkumar, A. B., & Lau, C. T.(2003). “A reconfigurable multi-standard channelizer using QMFtrees for software radio receivers,” in proceedings of 14th IEEEInternational Symposium on Personal, Indoor and Mobile RadioCommunication, pp. 119–123.

13. Lillington, J. (2002). “TPFT–Tunable pipelined frequency trans-form,” RF Engines Ltd, Technical Report. http://www.rfel.com/whipapdat.asp.

14. Zangi, K., & Koilpillai, R. (1999). Software radio issues incellular base stations. IEEE journal on selected areas incommunications, 17(4), 561–573. doi:10.1109/49.761036.

15. Zangi, K., & Koilpillai, R. (1998). “Efficient filter bankchannelizers for software radio receivers,” in Proceedings ofInternational Conference on Communications, vol. 3, pp. 1566–1570.

16. Mahesh, R., & Vinod, A. P. (2008). Christophe Moy and JacquesPalicot, “A low complexity reconfigurable filter bank architecturefor spectrum sensing in cognitive radios,” Proceedings of 3rdInternational Conference on Cognitive Radio Oriented WirelessNetworks and Communications, Singapore.

17. Lim, Y. C. (1986). Frequency-response masking approach for thesynthesis of sharp linear phase digital filters. IEEE transactions oncircuits and systems, 33, 357–364. doi:10.1109/TCS.1986.1085988.

18. Delahaye, J. P., Leray, P., Moy, C., & Palicot, J. (2005)."Managing Dynamic Partial Reconfiguration on Actual Hetero-geneous Platform", SDR Forum Technical Conference’05, Ana-heim (USA).

19. Mahesh, R., & Vinod, A. P. (2008). “Coefficient decimationapproach for realizing reconfigurable finite impulse responsefilters,” in Proceedings of IEEE International Symposium onCircuits and Systems, pp. 81–84, Seattle, USA.

20. Mahesh, R., & Vinod, A. P. (2008). “Reconfigurable frequencyresponse masking filters for software radio channelization.”. IEEETransactions on Circuits and Systems-II, 55(3), 274–278.


http://cnx.org/content/m10424/latest/

dx.doi.org/10.1109/TSP.2004.834242

http://www.techonline.com/community/techgroup/dsp/tech paper/33204

http://www.techonline.com/community/techgroup/dsp/tech paper/33204

http://www.rfel.com/whipapdat.asp

http://www.rfel.com/whipapdat.asp

dx.doi.org/10.1109/49.761036

dx.doi.org/10.1109/TCS.1986.1085988

R. Mahesh received his B Tech degree in electrical and electronicsengineering from Mahatma Gandhi University, India in 2003. He was alecturer in college of Engineering at Mahatma Gandhi University, Indiafrom August 2003 to July 2005. Currently he is pursuing Ph.D. in Schoolof Computer Engineering, Nanyang Technological University, Singapore.

His main research interests are in the areas of low complexity and highspeed digital signal processing circuits and computer arithmetic.

A. P. Vinod received his B Tech degree in instrumentation and controlengineering from University of Calicut, India in 1994 and the M.Engg and Ph.D. degrees in computer engineering from NanyangTechnological University, Singapore in 2000 and 2004 respectively.He was with Kirloskar, India, from October 1993 to October 1995,and Tata Honeywell, India, from November 1995 to May 1997.During June 1997 to November 1998, he was associated with ShellSingapore. From September 2000 to September 2002, he was alecturer in the School of Electrical and Electronic Engineering atSingapore Polytechnic, Singapore. He was a lecturer in the School ofComputer Engineering at Nanyang Technological University (NTU),Singapore, from September 2002 to November 2004, and sinceDecember 2004, he has been an assistant professor in NTU.

His research interests include digital signal processing, lowcomplexity circuits for signal processing, number theoretic transformsand software radio.

Edmund M-K. Lai received the B.E. (Hons) and Ph.D. degrees in1982 and 1991 respectively from the University of Western Australia,both in electrical engineering. He is currently a faculty member of theInstitute of Information Sciences and Technology, Massey Universityat Wellington, New Zealand. Previously he has been a faculty memberof the Department of Electrical and Electronic Engineering, TheUniversity of Western Australia from 1985 to 1990, the Department ofInformation Engineering, the Chinese University of Hong Kong from1990 to 1995, Edith Cowan University in Perth from 1995 to 1998and the School of Computer Engineering, Nanyang TechnologicalUniversity in Singapore from 1999 to 2006.

His current research interests include artificial neural networks,digital signal processing and information theory.

Amos Omondi received his B.Sc. (Hons) degree in Computer Sciencefrom the University of Manchester, UK and Ph.D. degree in ComputerScience from the University of North Carolina, Chapel Hill, USA. Hehas worked with the Flinders University of South Australia, VictoriaUniversity of Wellington, New Zealand and University of Delaware,USA. Currently he is with the University of Teeside, United Kingdom.

His research interests are in computer architecture, computerarithmetic, and parallel processing. He has published many reputedinternational books and journal papers in these areas.


filter bank channelizers for multi-standard software defined radio

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