examination, embedded system design · 2015-06-14 · discuss task control block. mention some of...

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USN l0EC74 (06 Marks) (09 Marks) Seventh Semester B.E. Degree Examination, Dec.20l4/Jan.20l1 Embedded System Design 1,., Time: 3 hrs. ,:,:: Max. Marks:100, ':, ..: .:,r,!;l1t1t. l a. tr,xplplh : i) Embedded sysrem ii) Hard RTS u,'il.lt iii) Watch'dog timer. ,..,- r,. ii, r (06 Marks) b. With a block diagram, explain briefly the various components in a microprocessor based embeddedsysted'llr ,,, ii:' (o7Marks) c. Briefly describe the r4ajor elements of the embedded sySteh{'development life cycle. (07 Nlarks) 2 a. Explain direct and register itlhirugct addressipfi tnsdes with diagram. Also write the timing diagram for serial write operation with an 8 bit register. (06 Marks) b. Compare i ". i) Big Endian and little Endian foyrqts ii) RISC and CISC registers iii) Truncation and rounding enors. (06 Marks) c. Explain the direct mapping eache managem6nt sffategy with an example. What are the trade Note: Answer FIVE full questions, selecting atleast TWO questions from euch part. PART _ A o o c) ! o. (d () o ! q2a 6v .o ,, bD" c09 .=N cd+ Hbo YO osl _co 3z d: bd boc <d6 6r <) d9 EC o.u o.j ;6 I ':e 9Q OE LO !c X(H ooo cb0 o= *d) tr> FO 3 k, e< d) o z 6 f o o, ,':, i.,,r1,,,. ,f off between write through and delayed write algorithm? (08 Marks) 3 a. Explain the intemal{iegi'tm of SRAM and write timing di4gram for read operation. rrla.,r;;;utside diagrams for DRAM atong *ith read and write opera,rffy"tuu t.t, c. Explain Asgociative mapping cache implementation. (06 Marks) 4 a. W1ite,,:+he flow diagrams for waterfall and V lifecycle models and brid'fl1:|elplain waterfall steps. (06 ltarks) br, .;\Mrite a hardware architecture and data and counter flow diagram of a counter system and ,'',,' explain briefly flow diagram. (0s marts) ,, 'r,,*,td. !1qlain the characterizng and identifying the requirements of a system, with respectto a '\ digital counter. (06 Marks) PART _ B 5 a. Discuss task control block. Mention some of the major components of task control block. (05 Marks) b. Differentiate between : i) Program and process ii) Processes and threads iit Light weighted and heavy weighted threads. Explain the different functions of embedded operating. 1 of2 c. www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP

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USN l0EC74

(06 Marks)(09 Marks)

Seventh Semester B.E. Degree Examination, Dec.20l4/Jan.20l1Embedded System Design

1,., Time: 3 hrs.,:,::

Max. Marks:100,

':,..:

.:,r,!;l1t1t.

l a. tr,xplplh :

i) Embedded sysremii) Hard RTS u,'il.ltiii) Watch'dog timer.

,..,- r,. ii, r (06 Marks)

b. With a block diagram, explain briefly the various components in a microprocessor basedembeddedsysted'llr ,,, ii:' (o7Marks)

c. Briefly describe the r4ajor elements of the embedded sySteh{'development life cycle.(07 Nlarks)

2 a. Explain direct and register itlhirugct addressipfi tnsdes with diagram. Also write the timingdiagram for serial write operation with an 8 bit register. (06 Marks)

b. Compare i ".

i) Big Endian and little Endian foyrqtsii) RISC and CISC registersiii) Truncation and rounding enors. (06 Marks)

c. Explain the direct mapping eache managem6nt sffategy with an example. What are the trade

Note: Answer FIVE full questions, selectingatleast TWO questions from euch part.

PART _ Aooc)!o.

(d

()

o!

q2a

6v.o ,,

bD"c09.=Ncd+HboYOosl_co

3zd:

bd

boc<d6

6r

<)

d9ECo.uo.j;6I ':e9QOE

LO!c

X(Hooocb0o=*d)tr>FO3 k,

e<

d)oz6foo,

,':,

i.,,r1,,,. ,f

off between write through and delayed write algorithm? (08 Marks)

3 a. Explain the intemal{iegi'tm of SRAM and write timing di4gram for read operation.

rrla.,r;;;utside diagrams for DRAM atong *ith read and write opera,rffy"tuut.t,

c. Explain Asgociative mapping cache implementation. (06 Marks)

4 a. W1ite,,:+he flow diagrams for waterfall and V lifecycle models and brid'fl1:|elplain waterfallsteps. (06 ltarks)

br, .;\Mrite a hardware architecture and data and counter flow diagram of a counter system and

,'',,' explain briefly flow diagram. (0s marts)

,, 'r,,*,td. !1qlain the characterizng and identifying the requirements of a system, with respectto a'\ digital counter. (06 Marks)

PART _ B

5 a. Discuss task control block. Mention some of the major components of task control block.(05 Marks)

b. Differentiate between :

i) Program and processii) Processes and threadsiit Light weighted and heavy weighted threads.Explain the different functions of embedded operating.

1 of2c.

www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP

www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP

2 of2

www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP

www.bookspar.com | VTU NOTES | QUESTION PAPERS | NEWS | VTU RESULTS | FORUM | VTU BOOKSPAR APP