1

Emitter-Coupled Logic(ECL)

Basic ECL Inverter/Non-inverter(ECL Current Switch)

2

Basic ECL Inverter/Non-inverter VTC

VOH = VCC

According to inverting output: VINV

CIE

EE)ECL(BEIHCCOL R

RVVV

VV+−

−=

VIL = VBB – 0.05 VIH = VBB + 0.05

E

CI

EE)SAT(BEE

CI)SAT(BCCC

S

RR1

)VV(RRVV

V+

−++=

Example

Calculate the critical VTC points for the ECL current switch

VCC = 5V, VEE = 0V, VBB = 2.6V, RCI = RCR = RE = 1kΩ,

VBE(ECL) = 0.75V, VBE(SAT) = 0.8V, VBC(SAT) = 0.6V

VOH = 5V

VOL = 3.10V

VIL = 2.55V

VIH = 2.65V

VS = 3.2V

VINV (VIN = VS) = 2.6V

3

Basic ECL NOR/OR Gate

4

MECL I NOR/OR Gate

)ECL(BECIDNFCI

)ECL(BEEEOH VR

R)1(βRVV

V −++

−−=

)ECL(BECIE

EE)ECL(BEIHOL VR

RVVV

V −+−

−=

Example

Find the logical swing, noise margins and noise immunities for the MECL I circuit above.

βF = 49, VBE(ECL) = 0.75V, VBE(FA) = 0.75V, VBE(SAT) = 0.8V, VBC(SAT) = 0.6V

VOH = – 0.76V

VOL = – 1.55V

VIL = – 1.225V

VIH = – 1.125V

VS = – 0.29V

VLS = 0.79VVNMH = 0.365V

VNML = 0.325V

VNIH = 0.53V

VNIL = 0.475V

5

MECL I Fanout

⎥⎦

⎥⎢⎣

⎢=

IH

OH

IIN

RDN)FA(BN,EOH III −=

DN

EEOHRDN R

VVI +=

BN,BF)FA(BN,E I)1(βI +=

CI

)ECL(BN,BEOHBN,B R

VVI

−−=

1βIIF

REIH +=

E

EEERE R

VVI +=

)ECL(BEOHE VVV −=

Fan-out Example

Find the maximum fan-out for the MECL I circuit above

βF = 49, VBE(ECL) = 0.75V, VBE(FA) = 0.75V, VBE(SAT) = 0.8V, VBC(SAT) = 0.6V

Assume load gates reduce VOH by 0.03 volts.

VOH = – 0.79V IRDN = 2.205 mA

IB,BN = 148 μA

IE,BN = 7.4 mA

IOH = 5.2 mA

VE = -1.54 V

IRE = 2.95 mA

IIH = 59 μA

87IINIH

OH =⎥⎦

⎥⎢⎣

⎢=

6

Power Dissipation Example

Find the average power dissipated in the MECL I circuit above

IRE(NOH) = 2.64 mA

IRDN(NOH) = 2.22 mA

IEE(NOH) = 6.685 mA

IRDO(NOH) = 1.825 mA

IRE(NOL) = 2.98 mA

IRDN(NOL) = 1.825 mA

IEE(NOL) = 7.035 mA

IRDO(NOL) = 2.22 mA

PEE(avg) = 35.6 mW

Other ECL Gates

7

DeMorgan’s Theorems

• NOR and OR using ANDs and NANDs

– NOR:

– OR:

• NAND and AND using ORs and NORs

– NAND:

– AND:

BABA ⋅=+

BABA ⋅=+

BABA +=⋅

BABA +=⋅

Example

Implement the following logic using only ECL gates

)DC)(BA( ++

Solution:

)DC()BA()DC)(BA( +++≡++

8

Collector Dotting Wired-AND Gates

Complex Logic Gates with Collector Dotting

9

Example

Series Gating – Basic ECL NAND/AND Current Switch

10

Series Gating NAND/AND Gate

Complex Logic Gates with Series Gating

11

Example

ECL XOR/XNOR Gates

12

ECL Decoding Tree