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EMBEDDED SYSTEM DESIGN: TOPICS, TECHNIQUES AND TRENDS
IFIP – The International Federation for Information Processing IFIP was founded in 1960 under the auspices of UNESCO, following the First World Computer Congress held in Paris the previous year. An umbrella organization for societies working in information processing, IFIP's aim is two-fold: to support information processing within its member countries and to encourage technology transfer to developing nations. As its mission statement clearly states,
IFIP's mission is to be the leading, truly international, apolitical organization which encourages and assists in the development, exploitation and application of information technology for the benefit of all people.
IFIP is a non-profitmaking organization, run almost solely by 2500 volunteers. It operates through a number of technical committees, which organize events and publications. IFIP's events range from an international congress to local seminars, but the most important are: • The IFIP World Computer Congress, held every second year; • Open conferences; • Working conferences. The flagship event is the IFIP World Computer Congress, at which both invited and contributed papers are presented. Contributed papers are rigorously refereed and the rejection rate is high. As with the Congress, participation in the open conferences is open to all and papers may be invited or submitted. Again, submitted papers are stringently refereed. The working conferences are structured differently. They are usually run by a working group and attendance is small and by invitation only. Their purpose is to create an atmosphere conducive to innovation and development. Refereeing is less rigorous and papers are subjected to extensive group discussion. Publications arising from IFIP events vary. The papers presented at the IFIP World Computer Congress and at open conferences are published as conference proceedings, while the results of the working conferences are often published as collections of selected and edited papers. Any national society whose primary activity is in information may apply to become a full member of IFIP, although full membership is restricted to one society per country. Full members are entitled to vote at the annual General Assembly, National societies preferring a less committed involvement may apply for associate or corresponding membership. Associate members enjoy the same benefits as full members, but without voting rights. Corresponding members are not represented in IFIP bodies. Affiliated membership is open to non-national societies, and individual and honorary membership schemes are also offered.
EMBEDDED SYSTEM DESIGN: TOPICS, TECHNIQUES AND TRENDS
IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS), May 30 – June 1, 2007, Irvine (CA), USA
Edited by Achim Rettberg Paderborn University/ C-LAB Germany
Mauro C. Zanella ZF Lemförder GmbH Germany
Rainer Dömer University of California, Irvine USA
Andreas Gerstlauer University of California, Irvine USA
Franz J. Rammig Paderborn University Germany
All rights reserved. This work may not be translated or copied in whole or in part without the written permission of the publisher (Springer Science+Business Media, LLC, 233 Spring Street, New York, NY 10013, USA), except for brief excerpts in connection with reviews or scholarly analysis. Use in connection with any form of information storage and retrieval, electronic adaptation, computer software, or by similar or dissimilar methodology now known or hereafter developed is forbidden. The use in this publication of trade names, trademarks, service marks and similar terms, even if they are not identified as such, is not to be taken as an expression of opinion as to whether or not they are subject to proprietary rights. 9 8 7 6 5 4 3 2 1 springer.com
Library of Congress Control Number: 2007925211
Embedded System Design: Topics, Techniques and Trends
Edited by A. Rettberg, M. Zanella, R. Dömer, A. Gerstlauer, and F. Rammig
Computer Science)
ISSN: 1571-5736 / 1861-2288 (Internet) ISBN: 13: 978-0-387-72257-3 eISBN: 13: 978-0-387-72258-0 Printed on acid-free paper
p. cm. (IFIP International Federation for Information Processing, a Springer Series in
Copyright © 2007 by International Federation for Information Processing.
Contents
Conference Committee 1 Validation and Verification
Requirements and Concepts for Transaction Level Assertion Refinement
Wolfgang Ecker, Volkan Esen, Thomas Steininger, Michael Velten
1
Using a Runtime Measurement Device with Measurement-Based WCET Analysis
Bernhard Rieder, Ingomar Wenzel, Klaus Steinhammer, Peter Puschner
15
Implementing Real-Time Algorithms by using the AAA Prototyping Methodology
Pierre Niang, Thierry Grandpierre, Mohamed Akil 27
Run-Time efficient Feasibility Analysis of Uni-Processor Systems with Static Priorities
Karsten Albers, Frank Bodmann, Frank Slomka 37
Approach for a Formal Verification of a Bit-serial Pipelined Architecture
Henning Zabel, Achim Rettberg, Alexander Krupp 47
Preface xixv
vi
2 Automotive Applications
Automotive System Optimization using Sensitivity Analysis Razvan Racu, Arne Hamann, Rolf Ernst
57
Towards a Dynamically Reconfigurable Automotive Control System Architecture
Richard Anthony, Achim Rettberg, Dejiu Chen, Isabell Jahnich, Gerrit de Boer, Cecilia Ekelin
71
An OSEK/VDX-based Multi-JVM for Automotive Appliances
Christian Wawersich, Michael Stilkerich, Wolfgang Schröder-Preikschat
85
Towards Dynamic Load Balancing for Distributed Embedded Automotive Systems
Isabell Jahnich, Achim Rettberg 97
3 Hardware Synthesis
Automatic Data Path Generation from C code for Custom Processors
Jelena Trajkovic, Daniel Gajski 107
Interconnect-aware Pipeline Synthesis for Array based Reconfigurable Architectures
Shanghua Gao, Kenshu Seto, Satoshi Komatsu, Masahiro Fujita
121
An Interactive Design Environment for C-based High-Level Synthesis
Dongwan Shin, Andreas Gerstlauer, Rainer Dömer, Daniel D. Gajski
135
Integrated Coupling and Clock Frequency Assignment of Accelerators During Hardware/Software Partitioning
Scott Sirowy, Frank Vahid 145
Embedded Vertex Shader in FPGA
Lars Middendorf, Felix Mühlbauer, Georg Umlauf, Christophe Bobda
155
Contents
vii
4 Specification and Partitioning
A Hybrid Approach for System-Level Design Evaluation Alexander Viehl, Markus Schwarz, Oliver Bringmann, Wolfgang Rosenstiel
165
Automatic Parallelization of Sequential Specifications for Symmetric MPSoCs
Fabrizio Ferrandi, Luca Fossati, Marco Lattuada, Gianluca Palermo,Donatella Sciuto, Antonino Tumeo
179
An Interactive Model Re-Coder for Efficient SoC Specification
Pramod Chandraiah, Rainer Dömer 193
Constrained and Unconstrained Hardware-Software Partitioning using Particle Swarm Optimization Technique
M. B. Abdelhalim, A. E. Salama, S. E.-D. Habib 207
5 Design Methodologies
Using Aspect-Oriented Concepts in the Requirements Analysis of Distributed Real-Time Embedded Systems
Edison P. Freitas, Marco A. Wehrmeister, Carlos E. Pereira, Flavio R. Wagner, Elias T. Silva Jr, Fabiano C. Carvalho
221
Smart Speed TechnologyTM
Mike Olivarez, Brian Beasley 231
6 Embedded Software
Power Optimization for Embedded System Idle Time in the Presence of Periodic Interrupt Services
Gang Zeng, Hiroyuki Tomiyama, Hiroaki Takada 241
Reducing the Code Size of Retimed Software Loops under Timing and Resource Constraints
Noureddine Chabini, Wayne Wolf 255
Identification and Removal of Program Slice Criteria for Code Size Reduction in Embedded Systems
Mark Panahi, Trevor Harmon, Juan A. Colmenares, Shruti Gorappa, Raymond Klefstad
269
Contents
viii
Configurable Hybridkernel for Embedded Real-Time Systems Timo Kerstan, Simon Oberthür
279
Embedded Software Development in a System-Level Design Flow
Gunar Schirner, Gautam Sachdeva, Andreas Gerstlauer, Rainer Dömer
289
7 Network on Chip
Data Reuse Driven Memory and Network-On-Chip Co-Synthesis Ilya Issenin, Nikil Dutt
299
Efficient and Extensible Transaction Level Modeling Based on an Object Oriented Model of Bus Transactions
Rauf Salimi Khaligh, Martin Radetzki 313
Hardware Implementation of the Time-Triggered Ethernet Controller
Klaus Steinhammer, Astrit Ademaj 325
Error Containment in the Time-Triggered System-On-a-Chip Architecture
R. Obermaisser, H. Kopetz, C. El Salloum, B. Huber 339
8 Medical Applications
Generic Architecture Designed for Biomedical Embedded Systems L. Sousa, M. Piedade, J. Germano, T. Almeida, P. Lopes, F. Cardoso, P. Freitas
353
A Small High Performance Microprocessor Core Sirius for Embedded Low Power Designs, Demonstrated in a Medical Mass Application of an Electronic Pill (EPill®)
Dirk Jansen, Nidal Fawaz, Daniel Bau, Marc Durrenberger 363
9 Distributed and Network Systems
Utilizing Reconfigurable Hardware to Optimize Workflows in Networked Nodes
Dominik Murr, Felix Mühlbauer, Falko Dressler, Christophe Bobda
373
Contents
ix
Dynamic Software Update of Resource-Constrained Distributed Embedded Systems
Meik Felser, Rüdiger Kapitza, Jürgen Kleinöder, Wolfgang Schröder-Preikschat
387
Lucas F. Wanner, Augusto B. de Oliveira, Antônio A. Fröhlich
401
Integrating Wireless Sensor Networks and the Grid through POP-C++
Augusto B. de Oliveira, Lucas F. Wanner, Pierre Kuonen, Antônio A. Fröhlich
411
10 Panel
Modeling of Software-Hardware Complexes K.H. (Kane) Kim
421
Modeling of Software-Hardware Complexes
Nikil Dutt 423
Enhancing a Real-Time Distributed Computing Component Model through Cross-Fertilization
K.H. (Kane) Kim 427
Modeling of Software-Hardware Complexes
Hermann Kopetz 431
Software-Hardware Complexes: Towards Flexible Borders
Franz J. Rammig 433
11 Tutorials
Embedded SW Design Space Exploration and Automation using UML-Based Tools
Flavio R. Wagner, Luigi Carro 437
Medical Embedded Systems
Roozbeh Jafari, Soheil Ghiasi, Majid Sarrafzadeh 441
Configurable Medium Access Control for Wireless Sensor Networks
Contents
Preface
This book presents the technical program of the International EmbeddedSystems Symposium (IESS) 2007. Timely topics, techniques and trends in embedded system design are covered by the chapters in this book, includingdesign methodology, specification and modeling, embedded software andhardware synthesis, networks-on-chip, distributed and networked systems,and system verification and validation. Particular emphasis is paid toautomotive and medical applications. A set of actual case studies and special aspects in embedded system design are included as well.
Over recent years, embedded systems have gained an enormous amount ofprocessing power and functionality. Many of the formerly externalcomponents can now be integrated into a single System-on-Chip. This tendency has resulted in a dramatic reduction in the size and cost ofembedded systems. As a unique technology, the design of embedded systemsis an essential element of many innovations.
Embedded systems meet their performance goals, including real-time constraints, through a combination of special-purpose hardware and software components tailored to the system requirements. Both the development ofnew features and the reuse of existing intellectual property components areessential to keeping up with ever demanding customer requirements.Furthermore, design complexities are steadily growing with an increasingnumber of components that have to cooperate properly. Embedded systemdesigners have to cope with multiple goals and constraints simultaneously, including timing, power, reliability, dependability, maintenance, packagingand, last but not least, price.
The significance of these constraints varies depending on the application areaa system is targeted for. Typical embedded applications include multi-media, automotive, medical, and communication devices.
The International Embedded Systems Symposium (IESS) is a unique forum to present novel ideas, exchange timely research results, and discuss the state of the art and future trends in the field of embedded systems. Contributors and participants from both industry and academia take active part in thissymposium. The IESS conference is organized by the Computer Systems
IESS is a true inter-disciplinary conference on the design of embeddedsystems. Computer Science and Electrical Engineering are the predominantacademic disciplines concerned with the topics covered in IESS, but manyapplications also involve civil, mechanical, aerospace, and automotive engineering, as well as various medical disciplines.
In 2005, IESS was held for the first time in Manaus, Brazil. In this initial installment, IESS 2005 was very successful with 30 accepted papers rangingfrom specification to embedded systems application. IESS 2007 is the second installment of this conference, establishing a regular bi-annual schedule.
IESS 2007 is held in Irvine, California, at the Beckman Conference Center of the National Academies of Sciences and Engineering. The conference center is located on the campus of the University of California at Irvine. Co-located with one of the leading research institutions on embedded systems, theCenter for Embedded Computer Systems at UC Irvine, this IESS conference is a unique venue to establish and foster research relations and collaborationbetween academic researchers and industry representatives worldwide.
The articles presented in this book are the result of a rigorous double-blind review process implemented by the technical program committee. Out of a total of 64 valid submissions, 35 papers have been accepted for publication,yielding an overall acceptance rate of 54.7%.
Confident about a strong technical program, we look forward to a fruit- and successful IESS 2007 conference,
Achim Rettberg, Mauro C. Zanella, Franz J. Rammig, Rainer Dömer, andAndreas Gerstlauer
Irvine, California, March 2007
xii Preface
Technology committee (TC10) of the International Federation for InformationProcessing (IFIP).
Acknowledgements
First and foremost, we thank our sponsors ZF Lemförder GmbH, the Office of Research at the UniversitCenter for Embedded Computer Systems (CECS) at UCI for their generous financial support of this conference. Without these contributions, IESS 2007would not have been possible in its current form.
We would also like to thank IFIP as organizational body for the promotion and support of the IESS conference.
Last but not least, we thank the authors for their interesting research contributions and the members of the technical program committee for their valuable time and effort in reviewing the articles.
y of California at Irvine (UCI), and the
xiii Preface
IFIP TC10 Working Conference: International Embedded Systems Symposium (IESS)May 30 – June 1, 2007 Irvine, California
General Chairs Achim Rettberg Mauro C. Zanella
General Co-Chair Franz J. Rammig
Technical Program Chair Rainer Dömer
Local Arrangements Chair Andreas Gerstlauer
Technical Program Committee
Richard Anthony – The University of Greenwich, England Samar Abdi – University of California at Irvine, USA Jürgen Becker – University of Karlsruhe, Germany Brandon Blodget – Xilinx Research Labs, USA Christophe Bobda – University of Kaiserslautern, Germany Rainer Doemer – University of California at Irvine, USA Cecilia Ekelin – Volvo Technology Corporation, Sweden Rolf Ernst – Technical University of Braunschweig, Germany Masahiro Fujita – University of Tokyo, Japan Andreas Gerstlauer – University of California at Irvine, USA Frank Hansen – Altera, Germany Joerg Henkel – University of Karlsruhe, Germany Thomas Heurung – Mentor Graphics, Germany Uwe Honekamp – Vector Informatik, Germany Marcel Jackowski – USP, Brazil Kane Kim – University of California at Irvine, USA Bernd Kleinjohann – C-LAB, Germany
Thorsten Koelzow – Audi Electronics Venture, Germany Hermann Kopetz – Technical University of Vienna, Austria Horst Krimmel – ZF Friedrichshafen, Germany Jean-Claude Laprie – LAAS, France Thomas Lehmann – Philips, Germany Roger May – Altera, England Mike Olivarez – Freescale Semiconductor, USA Frank Oppenheimer – OFFIS, Germany Carlos Pereira – UFRGS, Brazil Franz Rammig – University of Paderborn, Germany Achim Rettberg – C-LAB, Germany Carsten Rust – Sagem Orga, Germany Stefan Schimpf – Robert Bosch Ltda., Brazil Juergen Schirmer – Robert Bosch GmbH, Stuttgart, Germany Aviral Shrivastava – Arizona State University, USA Joachim Stroop – dSPACE, Germany Hiroyuki Tomiyama – Nagoya University, Japan Ansgar Traechtler – University of Paderborn, Germany Flavio R. Wagner – UFRGS, Brazil Mauro Zanella – ZF Lemförder, Germany Jianwen Zhu – University of Toronto, Canada
Organizing Committee
Achim Rettberg, Mauro C. Zanella, Rainer Dömer, Andreas Gerstlauer Co-Organizing Institution
IFIP TC 10, WG 10.5 and WG 10.2 Sponsors
ZF Lemförder GmbH Office of Research, University of California, Irvine Center for Embedded Computer Systems, UC Irvine
xvi Conference Committee