Guest Editors’ Introduction.........................................................................................................................................................................................................................

EMBEDDED MULTICOREPROCESSORS AND SYSTEMS

......At the highest level, embeddedmulticore can be defined as a technology, amethodology, and a business and researchopportunity. Building a multicore-enabledembedded system requires system developersto leverage a combination of these factors.Furthermore, unlike desktop PC or serverapplications, multicore devices used inembedded systems are as diverse as the starsin the universe. Well, maybe not quite thatdiverse, but the point is that there aremany potential approaches to solving the nu-merous multicore-related issues. The articlesin this special issue of IEEE Micro onembedded multicore processors and systemsrepresent a small sampling of these issues.

Embedded Multicore: The TechnologyFrom the technology perspective, embedded

multicore is represented by many differentdevices and architectures. These processorsinclude dual-, quad-, and eight-core process-ors based on symmetric multiprocessing orshared-cache architectures. They also includemanycore processors that implement a formof shared memory, distributed memory, ora combination of the two. Although thex86 is probably the most popular architec-ture represented here, it’s really just the tipof the iceberg for processors targeted at theembedded industry.

Other examples in this arena include pro-cessors such as the Freescale 8641D (dualcore), the ARM Cortex-A9 MPCore (sup-porting 2 to 4 cores), Plurality’s Hypercore pro-cessor (capable of supporting 16 to 256 cores),

and Tilera’s TilePro64 processor (64 cores).One of the articles in this special issue,Thomas Berg’s article, ‘‘Maintaining I/OData Coherence in Embedded MulticoreSystems,’’ is centered on another of theseprocessors—the MIPS32 1004K. This pro-cessor helps solve the communication prob-lem of how to pass data between the I/Operipheral devices and on-chip CPUs. Solu-tions can use software, hardware, or hybridmechanisms. Specifically, the article dis-cusses techniques for maintaining I/O co-herence and presents the tradeoffs of eachapproach.

Regardless of the number of cores, pro-cessor designers must resolve the bottlenecksassociated with shared memory and othershared system resources. System designersare actually experiencing performance dropswhen moving their single-core embeddedmultiprocessor designs to a multicore pro-cessor. Extensive efforts are underway to helpunderstand and resolve these performance-related issues, which also include issues associ-ated with oversubscription, synchronizationoverhead, and intercore communications.1

Embedded multicore technology alsoincludes systems on chip (SoCs) with analmost unlimited combination of homoge-neous and heterogeneous processors designedto tackle specific applications. Many SoCsare proprietary and deeply embedded inend-user devices. However, SoC productssuch as Cavium Network’s Octeon CN38XX,Freescale’s QorIQ P4080, and Texas In-strument’s OMAP3503 are commercially

Markus Levy

Embedded

Microprocessor

Benchmark Consortium

and Multicore

Association

Thomas M. Conte

Georgia Institute

of Technology

0272-1732/09/$25.00 �c 2009 IEEE Published by the IEEE Computer Society

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available for a wide variety of embeddedapplications.

Regarding the intercore communicationsperformance aspect of multicore, a signifi-cant amount of effort is going toward opti-mizing the networks-on-chip (NoCs)technology used in the design of multicoredevices. Vendors (Silistix and Sonics) andmany research projects are devoted to thisglue that holds systems together. As a matterof fact, quite a few articles on this technologywere submitted for this issue. We found thearticle ‘‘Double-Data-Rate, Wave-PipelinedInterconnect for Asynchronous NoCs,’’ byJiang Xu, Wayne Wolf, and Wei Zhang, par-ticularly interesting because it considers manyof the practical aspects of NoC design. In ad-dition to throughput, the article also discussespower consumption and silicon area costs.

Embedded Multicore: The MethodologyAll multicore technologies aim to either

exploit concurrency, increase compute den-sity, handle partitioned workloads, or achievesome combination of these objectives. Andregardless of the intended goals, most ofthe embedded industry has been challenged(as have the PC and server industries) withdeveloping new approaches and tools to letsystem developers optimize their multicore-targeted programs. In general, the industryis approaching these optimal solutions fromthe perspective of starting from scratch—orin an attempt to migrate decades’ worth oflegacy applications to multicore technology.

CriticalBlue and PolyCore Software offerinteresting examples of this approach to newmethodologies. CriticalBlue recently releasedPrism, a tool that lets software engineers taketheir existing sequential code and, withoutchanging it, explore and analyze opportunitiesfor concurrency, implement parallel struc-tures, and verify efficient and safe operation.Prism works from simulated execution tracesand can identify performance bottleneckscaused by long periods of serialization or mul-tiple threads of activity waiting for a resourceto become unlocked. Additionally, Prism con-siders scenarios with any number of cores, soit could also check how the performance scalesas more cores are added to the system.

Jean-Yves Mignolet and colleagues de-scribe a similar methodology in their article,

‘‘MPA: Parallelizing an Application onto aMulticore Platform Made Easy.’’ Relyingon programmer input provided through aseparate file, the MPSoC parallelization assist(MPA) tool performs the partitioning, insert-ing communication and synchronization asrequired to respect the dependencies in thesequential application. It also helps to verifythat the parallel code is correct by construc-tion, avoiding common problems with parallelprogramming models such as race condi-tions, deadlock, livelock, and starvation.

Approaching the problem from a differentperspective, PolyCore Software’s Poly-Mappertool lets multicore application developers cre-ate, configure, and reconfigure multicore com-munications topologies, allowing them to focuson partitioning and distributing the applicationacross multiple cores. The topology manageruses a graphical interface to help developerslay out the nodes and links, after which Poly-Mapper builds and validates the topology andgenerates an XML-based topology map.

Another PolyCore tool, Poly-Generator,processes the topology map and generatesan optimized C-based topology definition.Poly-Messenger, a runtime library, is aninterprocessor-communication frameworkthat abstracts application software from theunderlying interconnect networks, operatingsystems, and network topology (bus, star,mesh, or hybrid). The PolyCore platformthus supports portability and reuse of anorganization’s software investment. Poly-Messenger provides an implementation ofthe Multicore Association’s Multicore Com-munications API, which is the subject ofanother article in this issue—‘‘Software Stan-dards for the Multicore Era,’’ by Jim Holtand colleagues. MCAPI lets application soft-ware developers program to one API that isimplemented by real-time operating systemsand middleware software across multiplemulticore architectures.

Multicore: The Business and ResearchOpportunity

As is true for any industry, the embeddedindustry has its share of vendors who areexploiting the multicore buzz and simplyputting a new package on an old productand referring to it as ‘‘multicore ready.’’However, new multicore technologies and

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GUEST EDITORS’ INTRODUCTION

methodologies are providing industry and re-search organizations with many interestingopportunities. For example, the companieswe’ve mentioned here represent a mixtureof well-established and start-up companiesthat are, in fact, concocting novel approachesto help propagate the adoption of multicoretechnologies. Furthermore, the articles in thisspecial issue represent a fraction of the differ-ent perspectives and approaches that are be-coming available. Other important multicore-related topics include load balancing, operatingsystem support for symmetric and asym-metric multiprocessing, debugging issues,resource management, and hypervisors andvirtual machine monitors. But rest assuredthat these topics and more are critical tothe evolution of embedded multicoretechnology. MICR O

....................................................................Reference

1. S. Gal-On and M. Levy, ‘‘Measuring Multi-

core Performance,’’ Computer, Nov. 2008,

pp. 99-102.

Markus Levy is president of the EmbeddedMicroprocessor Benchmark Consortium andthe Multicore Association, and chair ofMulticore Expo. His research interestsinclude embeddded processor performance

and energy analysis and standards to supportmulticore system development. Levy has aBS in electrical engineering from SanFrancisco State University. He is the co-author of Designing with Flash Memory(Annabooks, 1993) and has several patentsrelated to flash memory architecture.

Thomas M. Conte is a professor in theCollege of Computing at Georgia Institute ofTechnology. His research is in the areas ofmanycore/multicore architectures, micro-processor architectures, compiler code gen-eration, architectural performance evaluation,and embedded computer systems. Conte hasa PhD in electrical engineering from theUniversity of Illinois at Urbana, Champaign.He is an associate editor of ACM Transactionson Embedded Computer Systems, ACM Trans-actions on Architecture and Compiler Optimi-zation, Computer, and IEEE Micro.

Direct questions and comments aboutthis article to Markus Levy, 4354 TownCenter Blvd. #114-200, El Dorado Hills,CA, 95762; markus.levy@eembc.org.

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