Program Counter

ALU

Registers.

Bus inter-face Logic

ROMExternal

RAMExternal

PeripheralControllerExternal

Display

i/p’s

CPU

INTERRUPTCONTROL

OSC

ON-CHIP RAM

SERIALPORT

4 I/OPORTS

BUSCONTROL

ON-CHIPROM FOR

PROGRAM CODE

TIMER0

TIMER1

EXTERNAL

INTRRUPTS

COUNTER INPUTS

ADDRESS/DATA

TXD RXDP0 P1 P2 P3

Microprocessor :

•CPU is stand-alone, RAM, ROM, I/O, timer are separate

•Designer can decide on the amount of ROM, RAM and I/O ports.

•Expensive

•Versatility

•General-purpose

Microcontroller:

•CPU, RAM, ROM, I/O and timer are all on a single chip

•Fix amount of on-chip ROM, RAM, I/O ports

•For applications in which cost, power and space are critical

•Single-purpose

Overview of 8051 family

8051 is a 8-bit micro controller ,it is introduced by

Intel corporation.8051 is the original member of the 8051 family.

Other members of 8051 family

8052 and 8031 are the other family members of 8051.

The following table gives comparison of 8051 family members

Feature 8051 8052 8031

ROM(on-chip program space in bytes) 4K 8K 0K

RAM(bytes) 128 256 128

Timers 2 3 2

1/O pins 32 32 32

Serial Port 1 1 1

Interrupt sources 6 8 6

Various 8051 microcontrollers

8051 is available in different memory types,such as UV-EPROM ,flash,and NV-RAM,all of which have different memory types.

AT89C51 from Atmel corporation:This 8051 chip has on-chip ROM in the form of flash memory.AT89C51 is used in place of the 8751 to eliminate the waiting time needed to erase the chip and thereby speed up the development time.

DS from Dallas Semiconductor

DS5000 is another chip from Dallas semiconductor.The on-

chip ROM for the DS5000 is in the form of NV-RAM.The

read/write capability of NV-RAM allows the program to be

loaded into the on-chip ROM while it is in the system.

1.Having on-chip back up battery

2.Having special circuit which connects RAM to battery immediately after removing the supply voltage

P89C51RD2BN from Phillips:

It is another major producer of 8051 family from Phillips Corporation

It has the following features

1.It has 64K bytes of on-chip ROM

2.Allows In system programming (ISP).Hence no need to use PROM programmer

P1.0

P1.1

P1.2

P1.3

P1.4

P1.5

P1.6

P1.7

RST

(RXD) P3.0

(TXD) P3.1

(INT0) P3.2(INT1) P3.3

(T0) P3.4

(T1) P3.5

(WR) P3.6

(RD) P3.7

XTAL2

XTAL1

GND

P2.7 (A15)

P2.6 (A14)

P2.5 (A13)

P2.4 (A12)

P2.3 (A11)

P2.2 (A10)

P2.1 (A9)

P2.0 (A8)

PSEN

ALE/PROG

EA/VPP

P0.7 (AD7)

P0.6 (AD6)

P0.5 (AD5)

P0.4 (AD4)

P0.3 (AD3)

P0.2 (AD2)

P0.1 (AD1)

P0.0 (AD0)

Vcc

20

19

18

17

16

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

23

22

21

24

25

2627

28

29

30

31

32

33

34

35

36

37

38

39

40

8051

8051 PIN description

Pin number Description

Vcc(Pin 40) Provides supply voltage to the chip .The voltage source is +5V

GND(Pin 20) It is the Ground

XTAL1(Pin19) and XTAL2(Pin18)

The 8051 needs external clock to run it.Most often quartz crystal oscillator is connected to inputs XTAL1(Pin 19) and XTAL(Pin 18)

RST(Pin 9) It is the RESET pin.Upon applying high pulse to this pin the micro controller will reset and terminate all activities

EA (Pin 31) The 8051 family members all come with on-chip ROM to store programs.So EA connected to Vcc.

PSEN (Pin 29) This is an output pin .PSEN stands for “Program store enable”

ALE (Pin 30) ALE(address latch enable) is an output pin and is active high.This is used for demultiplexing the address and data by connecting to the G pin of 74LS373 chip

Interfacing External program memory

P1

P3

Instruction

Address

OEPSEN

P2

ALE

EA

P0

Latch

Microcontroller External ROM

1

0

Interfacing External data memory

Data

Address

WE

Microcontroller External data memory

P1

P3

P2

ALE

EA

P0

Vcc

RDWR

OEI/O

Latch

Page bits

1

0

CPU can work only in binary,it can do so at a very high speed ,but its slow and tedious for humans to deal with 0’s and 1’s I.e with machine language.Assembly language were developed which provided mnemonics for the machine code instructions, plus other features which made programming faster and less prone to error.Assembler is a program which converts assembly language into machine level language

Assembly language is referred to as a low level language because it deals directly with the internal structure of the CPU High level languages are translated into machine code by a program called a complier

- In the CPU ,registers are used to store information temporarily.

- In 8051 there is only one data type : 8 bits.D7 D6 D5 D4 D3 D2 D1 D0

Most significant bit Least significant bitRegisters

A B R0 R1 R2 R3 R4 R5 R6 R7

8- bit Registers of the 8051

DPH DPLDPTR

PC(Program counter)PC

16-bit register

16-bit register

An assembly language program consists of series of assembly language instructions . An assembly language instruction consists of a mnemonic , optionally followed by one or more operands. The operands are the data items being manipulated , and the mnemonics are the commands to the CPU, telling it what to do with those items.

Example:ORG 00h ; start at location 0MOV R5,#25h ; load 25h into R5MOV A, #0 ;load 0 into AADD A,R5 ;add contents of R5 to A; now A =A +R5END ; end of the asm source file

The following diagram shows steps to create an executable assembly language program

Editor Program

Assembler Program

Linker Program

OH Program

Myfile.asm

Myfile.lstMyfile.obj

Other obj files

Myfile.abs

Myfile.hex

Data Type8051 micro controller has only one data type.It is of

8-bits,and the size of each register is also 8 bits.DB(Define byte)

DB directive is used to define data, the numbers can be in decimal,binary,hex,or ASCII formats.Examples:

DATA1: DB 28 ;Decimal(1C in hex)DATA2: DB 00110101B ;Binary (35 in

hex)DATA3: DB 39h ;hex

ORG 510HDATA4: DB “My name is MIC “ ;ASCII characters

Following are the more widely used directives of the 8051ORG(origin)

The ORG directive is used to indicate the beginning of the address ORG 025h ;starts at the 25th address

EQU(equate)This is used to define a constant without occupying a memory location.The EQU directive does not set aside storage for data item but associates a constant value with a data label so that when the label appears in the program,its constant value will be substituted for the label.COUNT EQU 25MOV R3 , #COUNT ;R3 becomes 25 here

END DirectiveThis indicates to the assembler the end of the source(asm) file.Anything after the END directive is ignored by the assembler.

The flag register in the 8051 is called the Program Status Word (PSW) register.It is used to indicate arithmetic conditions such as a carry but.

PSW(Program status word) Register:• The PSW register is an 8-bit register but only 6 bits

of it are used by the 8051 .• The two unused bits are user-definable flags.• Four of the flags are conditional flags meaning that

they indicate some conditions that resulted after an instruction was executed. These are CY,AC,P,OV.

• The bits PSW.3 and PSW.4 are designated as RS0 and RS1 ,and are used to change the bank registers.

• The PSW.5 and PSW.1 bits are general-purpose status flag bits and can be used by the programmer for any purpose

CY AC F0 RS1 RS0 OV ---- P

CY PSW.7 Carry flag

AC PSW.6 Auxiliary carry flag

-- PSW.5 Available to the user for general purpose

RS1 PSW.4 Register bank selector bit 1

RS0 PSW.3 Register bank selector bit 0

OV PSW.2 Overflow flag

-- PSW.1 User definable bit

P PSW.0 Parity flag.Set/Cleared by hardware each instruction cycle to indicate an odd/even number of bits in the accumulator

RS1 RS0 Register Bank Address

0 0 0 00H - 07H

0 1 1 08H – 0FH

1 0 2 10H – 17H

1 1 3 18H – 1FH

Example: Show the status of the CY,AC and P flags after the addition of 38H and 2Fh in the following instructions

MOV A,#38h

ADD A,#2FH

Solution: 38 00111000

+ 2F 00101111

67 01100111

CY = 0 since there is no carry beyond D& bit

AC = 1 Since there is no carry from D3 to the D4 bit

P = 1 Since the accumulator has an odd number of 1’s

Instruction CY OV AC

ADD X X X

ADDC X X X

SUBB X X X

MUL 0 X

DIV 0 X

DA X

RRC X

RLC X

SETB C 1

CLR C 0

CPL C X

ANL C,bit X

ANL C,/bit X

CJNE X

00

0708

0F101718

1F20

2F 30

7F

Register Bank 0

Register Bank 1(stack)

Register Bank 2

Register Bank 3

Bit Addressable RAM

Scratch pad RAM

RAM Allocation in 8051

Default register bank for R0-R7

Bank1

Bank2

Bank3

07 06 05 04 03 02 01 00

0F 0E 0D 0C 0B 0A 09 08

17 16 15 14 13 12 11 10

1F 1E 1D 1C 1B 1A 19 18

General purpose RAM

00

07080F101718

1F

20

21

22

23

2F 7F 7E 7D 7C 7B 7A 79 78

30

7F

Bit

Addressable

Locations

128 Bytes of Internal RAM

.

.

..

.

87 86 85 84 83 82 81 80

Not bit addressable

Not bit addressable

Not bit addressable

Not bit addressable

8F 8E 8D 8C 8B 8A 89 88Not bit addressable

Not bit addressable

Not bit addressable

Not bit addressable

Not bit addressable

97 96 95 94 93 92 91 90

9F 9E 9D 9C 9B 9A 99 98

Not bit addressable

A7 A6 A5 A4 A3 A2 A1 A0

AF -- -- AC AB AA A9 A8

B7 B6 B5 B4 B2 B1 B0

-- -- -- BC BB BA B9 B8

D7 D6 D5 D4 D3 D2 D1 D0

E7 E6 E5 E4 E3 E2 E1 E0

F7 F6 F5 F4 F3 F2 F1 F0

80

89888784

8A

82

81

8B

8C

8D

90

98

99

A0

A8

B0

B8

D0

E0

F0

FF

P0

SP

DPL

DPH

PCONTCONTMOD

TLO

TL1

TH0TH1

P1

SCONSBUF

P2

IE

P3

IP

PSW

ACC

B

Special function registers

Push operation

0B 0B 0B 0B

0A0A0A 0A

09090909

08080808

Start SP SP SPSP

25 25 25

12 12

F3

After PUSH 6 After PUSH 1 After PUSH 4

MOV R6,#25h MOV R1,#12h MOV R4,#0F3hPUSH 6 PUSH 1 PUSH 4

07 08 09 0A

0B 0B 0B 0B

0A0A0A 0A

09090909

08080808

Start SP SP SPSP

6C 6C 6C

76

After POP 3 After POP 5 After POP 2

POP 3 ; POP stack into R3

POP 5 ; POP stack into R5

POP 2 ; POP stack into R2

76

F9

6C

76

F9

54

0B 0A 09 08