CHAPTER – 1

INTRODUCTION

The terms eye movement measurement, eye tracking, and oculogragphy refer to

measurement of the orientation and motion of the eye, either with respect to the head, or

with respect to the visual environment. This may include not only rotations of the eye that

cause changes in gaze direction, but also rotations of the eyeball about the line of sight,

called ocular torsion.

Eye movement measurement devices have long been used for research in reading,

various aspects of visual perception and cognition, neurology, instrument panel layout, and

advertising. Technological advances, especially in the areas of digital processing and solid-

state sensor technology, have made eye tracking possible under progressively less and less

restrictive conditions. In recent years, uses have expanded to include computer application

usability research, communication devices for the disabled, sports and gait research, Lasik

surgery instrumentation, etc.,

The human eye is a complex anatomical device that remarkably demonstrates the

architectural wonders of the human body. Like a camera, the eye is able to refract light and

produce a focused image that can stimulate neural responses and enable the ability to see.

We will use our understanding of refraction and image formation to understand the means

by which the human eye produces images of distant and nearby objects. Additionally, we

will investigate some of the common vision problems which plague humans and the

customary solutions to those problems.

The human eye is controlled by three pairs of antagonistic muscles, which are

responsible for its movements. In several disorders the eye movements are affected, and it

results in distorted and sluggish movements. In various neurological disorders,

Ophthalmology problems, and certain other physiological conditions, the eye moments gets

affected. In order to diagnose these problems, it is required to study the eye ball

movements. The eye ball movement is of many types, and four basic eyeball moments can

be considered to diagnose these problems. As the eye moment is a voluntary control

mechanism, it is customary to provide a stimulus for stimulating that sort of moment in the

eye ball moment. Thus, it is required to consider a particular type of eye moment by

providing a stimulus and studying the eye moments with respect to the stimulus and to

study the responses. The response characteristics can be used to identify the disorders.

In the present project Saccadic moments are considered for the study. The saccadic

moments are the fast eyeball moments, which normally occur while reading a book. While

reading, the eye jumps from one line to the other, at the end of each line. This sudden jump

is referred as saccadic moment. In order to provide that moment a saccadic stimulator is

required.

In the present project a saccadic stimulator is to be designed and developed, along

with EOG amplifier to record the response. Both these waveforms are analyzed by another

microcontroller based device to identify the parameters related to the eye ball moment,

such as latency, settling time, eye ball velocity and acceleration.

The following chapters deal with these in the detailed manner.

CHAPTER –

RECORDING OF EYE BALL MOVEMENTS

4.1. Introduction:

The following are descriptions of the more common technologies used to record the

eye movements of both controls and patients. Emphasis in this chapter will be on the

abilities of different types of systems and the calibration requirements to provide accurate

eye-movement data in the basic and clinical research settings.

4.2. Electro oculography.

4.2.1. Theory of Operation.

Electrooculography (EOG) is the only eye-movement recording method that relies

on a bio-potential, in this case, the field potential generated between the inner retina and the

pigment epithelium. This signal may approach 0.5 mV or more in amplitude. If two

electrodes are placed on either side of, and two more above and below, the orbit (along

with a reference electrode on the forehead or ear), then as the eye rotates in the orbit, a

voltage proportional to the eye movement may be recorded, because one electrode becomes

more positive and the other more negative with respect to the reference electrode. The

technique is one of the oldest and most widespread and has been the standard for

assessment of eye movements related to vestibular function. When the term ENG is seen, it

is generally EOG that is used.

4.2.2. Characteristics.

EOG has the considerable advantage that it requires only high impedance, low noise

instrumentation amplifier for its recording and that the voltage is linearly proportional to

eye movement over most of its range. Such amplifiers are relatively inexpensive in

comparison with many other eye-tracking technologies. As the electrodes are placed on the

skin adjacent to the eye, no contact occurs with the eye itself and no obstruction of any part

of the visual field exists. It also is unaffected by head motion, because the electrodes move

with the head.

4.2.3. Applications

In theory, the EOG can be used anywhere eye movements are to be recorded.

However, as the following section will show, it has a number of inherent limitations that

practically eliminate it from many applications. Its widest use remains in the assessment of

vestibular function and for the recording of caloric nystagmus and the vestibulo-ocular

reflex. It is unsuited for use in environments with changing levels of illumination, as

normal physiological processes will change the resting potential of the EOG and thus alter

its relationship with amplitude of eye movement. EOG can be used in the assessment of

saccades and smooth pursuit, but the low-pass filtering generally required will lead to

artificially lowered saccade peak velocities. EOG has occasionally been used in scan path

studies, but its instability and fluctuating gain make it undesirable for this application,

because if scenes differing in mean luminance are presented, the EOG will gradually

change amplitude.

4.2.4. Limitations

Although conceptually simple and easy to implement, EOG has many

shortcomings. One is that because the electrodes are placed on the surface of the facial

skin, the EOG is not the only signal they detect. If the patient is nervous or clenches his or

her teeth, the resulting electro-myographic (EMG) activity in the facial muscles will be

recorded as well, with the result that the signal actually recorded is the sum of the desired

EOG and the unwanted EMG. As the spectra of the two signals overlap, no amount of

filtering can completely separate them.

Another significant problem with EOG is the fact that, like many bio-potential

recordings, it is prone to drift. Some of this drift may reflect electrochemical changes at the

electrode, causing a shift in baseline, which was particularly a problem when polarizable

electrodes were used in the early days of the technique. Even non-polarizable electrodes

such as the commonly used Ag-AgCl button electro electrodes may still yield a varying

baseline when first applied. Furthermore, the potential also shifts with changes in

illumination. Indeed, assessment of this response to light is itself a clinical tool. This

baseline variability can lead to the temptation to use an ac-coupled amplifier in the

recording of the EOG, which has frequently been done, particularly in the ENG literature.

Although not a problem if the only data required is nystagmus frequency, significant

distortion occurs when ac-coupling is used to record saccades. The apparent drift back

toward the center closely resembles a saccade whose tonic innervational component is

inadequate. Noise and drift limit the resolution of EOG to eye movements of no less than

1º; this threshold may be even higher in a nervous patient or an elderly patient with slack,

dry skin. An additional limitation undercuts the EOG’s otherwise significant advantage in

being able to record vertical eye movements, which are the overshooting seen on vertical

saccades. It has long been suggested that the lids, moving somewhat independently of the

globe, act as electrodes on the surface of the globe, conducting current in parallel to the

other current path between globe and electrodes. Another more practical drawback to the

use of EOG, when used for recording the movements of both eyes horizontally and

vertically is that a total of nine electrodes are required (see Fig. 1). Each must be

individually adhered to the patient and must be carefully aligned if spurious crosstalk

between horizontal and vertical motion is to be avoided. Even if only horizontal motion is

to be recorded, five accurately placed electrodes are still needed. A common but

unfortunate clinical shortcut has been to use only two or three electrodes at either outer

canthus of the eye and one for reference. This shortcut effectively records a ‘‘cyclopean’’

eye by summing the potentials obtained from each eye. Although eye movements other

than vergence are conjugate in normal individuals, it is not generally normal individuals

who are seen for clinical evaluation. Figure 2 illustrates how an overshooting and an

undershooting eye movement may be combined to give the appearance of a perfect

saccade. For this reason, both ac-coupling and bi-temporal electrode placement should be

avoided when anything other than the crudest information about eye movement is desired.

Figure 1. EOG electrodes arranged to record the horizontal and vertical eye movements of both eyes. Reference electrode is in the center of the forehead.

Fifure.2. Schematic illustrating the EOG method of measuring eye movement.

Figure 3. False saccadic trajectory from bitemporal EOGelectrodes resulting from the summation of the individual

Saccadic trajectories shown below.

Figure.4. Schematic illustrating the various features of the eye often used by optical eye movement measurement techniques.

4.3. Infrared Reflectance

4.3.1. Theory of Operation

Although photographic recording of eye movements dates back to 1901, such

methods remained cumbersome to use, especially when they required frame-by-frame

analysis of the location of some marker on the eye. Optical levers, where a beam of light

was reflected from a mirror attached by a stalk to a scleral contact lens, offered the

opportunity for precise registration of eye position, but occluded the view of the eye being

recorded. As might be imagined, they were also unpleasant to wear. An alternative

recording method that also makes use of reflected light relies on the differential reflectivity

of the iris and sclera of the eye to track the limbus—the boundary between these structures.

Although the number of emitters and detectors vary between designs, they share the same

fundamental principle; that is, the eye is illuminated by chopped, low intensity infrared

light (to eliminate the effects of variable ambient lighting). Photo-detectors are aimed at the

limbus on either side of the iris. As the eye moves, the amount of light reflected back onto

some detectors increases and onto others decreases. The difference between the two signals

provides the output signal. As would be expected, these signals are analog systems, so that

the output of the photo-detectors is electronically converted into a voltage that corresponds

to eye position. Figure 4 shows an IR system mounted on an earth-fixed frame spectacle

frame. Figure 5 shows an IR system mounted in goggles on a child.

Figure 4. IR system to measure the horizontal eye movements of both eyes shown mounted

on an earth-fixed frame and spectacle frame.

Figure 5. IR system to measure the horizontal and vertical eye movements of both eyes

shown mounted in goggles for a human subject.

Figure.5. Schematic showing simple reflectivity pattern tracker for horizontal

measurement.

As the signal is not a bio-potential, it is free of the instability found in the EOG; it is

also immune to interference from muscle artifact and changes in electrode potentials.

Unlike some earlier photographic methods, the device does not occlude the eyes, as the

sensors and emitters are positioned above or below the eye. The field of view is somewhat

obstructed by the emitter/detector, in contrast to EOG. Resolution is of the order of minutes

of arc. Assuming that nothing disturbs the sensors, a shaken head or a rubbed eye, for

example, stability is excellent. Thus, the question of using ac-coupling, as in many electro-

nystagmographic applications of the EOG, never occurs. System bandwidth is generally on

the order of 100 Hz, which is sufficient to capture fine details of saccades. The linear range

of these systems generally is between +/- 15º and 20º in the horizontal plane and half this

amount or less in the vertical plane (which requires vertical orientation of the detectors or

summation of the signals from horizontally-oriented detectors).

4.3.2. Applications

IR limbus trackers are probably second only to EOG in their range of applications.

Their ability to resolve fine detail with low noise makes them excellent for conditions

where subtle features of the eye movement are important; examples include analyses of

saccadic trajectories or analysis of small corrective saccades within a nystagmus waveform.

An important advantage over

EOG is that if eye velocity is to be calculated, the resulting signal is far less noisy than the

derivative of an EOG recording, especially where broadband EMG noise has contaminated

the signal developing from the eye. These systems are well suited to studies of any sort of

eye movement that falls within their linear operating range in the horizontal plane. As they

are generally head-mounted, they will tolerate modest head movement, but if the stimuli

are fixed in the environment, such movement will certainly cause a loss of baseline and

may move the tracker outside its linear range, which makes head stabilization highly

desirable, especially when stimuli are presented at gaze angles where subjects would

normally make both a head movement and an eye movement to acquire the target. Finally,

IR systems are noninvasive, a major advantage for many patients and for children.

4.3.3. Limitations

One of the biggest shortcomings of these systems is their poor performance for

vertical eye movement, their near-uselessness for oblique eye movements, and their

complete lack of value for torsional eye movements. Although the limbus is clearly visible

over a wide range of eye positions in the horizontal plane, the eyelids obscure its top and

bottom margins. Although a degree of vertical tracking can be obtained by virtue of the

differential reflectivity of the iris and pupil, the range over which this is possible is limited,

again in part because of occlusion of the lids. Oblique movement suffers from inherent

crosstalk because, as eye position changes in one plane, the sensitivity to motion in the

other plane will vary, which is a hindrance to using these systems for studies of reading,

scan path analysis, or other applications where 2D eye movements are important. The use

of the systems in rotational testing is also limited by the range of allowable gaze angles and

by the possible slippage of the head mounting on the head if accelerations are sufficiently

high. Their suitability for small children also varies; some of the systems do not fit small

heads well, although if precise calibration is not important, one can generally record

patients as young as 3 years. These systems are not generally appropriate for use with

infants. The one exception is for diagnosing nystagmus from its waveform by simply

holding the sensors in front of the eyes, which can be done for even the smallest infants

(e.g., a premature infant still in an incubator).

4.4. Scleral Search Coil

4.4.1. Theory of Operation

Robinson developed the Scleral Search Coil technique in 1963. It relies on the

principle that a coil of wire in an alternating magnetic field induces a voltage proportional

to the area of the coil, the number of turns, and the number of field lines. This latter

measure will vary with the sine of the angle the coil makes with the magnetic field. In the

basic configuration, two orthogonal pairs of field coils are used, each modulated by phase

locked square wave sources either operating in quadrature (i.e., one signal 90º phase-

shifted relative to the other) or at a different frequency (e.g., 50 and 75 kHz). An annular

contact lens with a very fine coil of wire is placed on the eye, so that it surrounds the

cornea (or in animals, is surgically implanted under the conjunctiva). Figure 6 shows an

annular search-coil contact lens on the eye of a subject. Components of the induced voltage

generated by the horizontal and vertical signals can be

Figure 5. An annular search-coil contact lens used to measure the horizontal and vertical eye movements of a human subject. The fine wire from the imbedded coil exits at the nasal

canthus.

Figure.6. Schematic showing the configuration of the second coil in a dual induction coil

system.

separated via phase-sensitive detectors. Note that this method of recording horizontal and

vertical components of eye movement eliminates the crosstalk present in 2D recordings

made by limbus trackers. With an appropriately wound coil added to the lens, torsional eye

movements may also be recorded. This technique is the only one able to record torsion with

high bandwidth.

4.4.2. Characteristics

This technology serves as the ‘‘gold standard’’ for eye-movement recording.

Resolution is in seconds of arc and the linear range +/- 20º, with linearization possible

outside this range, because the nonlinearity follows the sine function. The signals are

extremely stable, because their source is determined by the geometry of coil and magnetic

field alone. In the usual configuration, the maximum angle that can be measured is 90º.

Although the eyes cannot rotate this far in the head, if the head is also allowed to turn (and

its position recorded by a head coil), a net change of eye position > 90º is possible. A

solution to this problem was developed whereby all the field coils were oriented vertically,

generating a magnetic field whose vector rotates around 360º. Now, the phase of the field

coil varies linearly over 360º of rotation, which is most often used for horizontal eye

movements, with vertical and torsional eye movements recorded using the original design.

Figure.6 Schematic illustrating the scleral search coil method of measuring eye movement.

4.4.3. Applications

As the search-coil system provides such high quality data, it can be used in nearly

any application where stability, bandwidth, and resolution are paramount and free motion

by the subject is not essential. However, recent evidence suggests that the coils themselves

may alter the eye movements being measured. Nonetheless, the low noise level and ability

to independently record horizontal, vertical, and torsional movements at high bandwidth

and high resolution still make this the gold standard of eye-movement recording

techniques.

4.4.4. Limitations

As a result of their size, search-coil systems are clearly not suited for ambulatory

studies or those carried out in other real-world settings such as a vehicle. The system also

cannot be adapted to use in fMRI scanners, unlike IR limbus trackers or video-based

systems. Search coils are invasive, making them unsuitable for some adult patients and for

most children. A small risk of corneal abrasion exists when the coil is removed, but this

risk is generally minor. Use of the coil in infants or small children would be undesirable,

because they could not be instructed not to rub their eyes while the coil was in place.

Another practical issue associated with the technology is the cost of the coils, which have a

single supplier, have a limited lifetime, and are relatively expensive (> US$100 each). As

recommended duration of testing with the coils is 30 minutes or less, long duration studies

are also precluded.

4.5 Digital Video

4.5.1. Theory of Operation

Although electronic systems that locate and store the location of the center of the

pupil in a video image of the eye were developed in the 1960s, often in combination with

pupil diameter measurement, video-based eye trackers became a major force in eye

tracking technology when digital rather than analog image analysis was implemented. If the

camera is rigidly fixed to the head, then simply tracking this centroid is sufficient to

identify the location of the eye in its orbit. However, if there is even slight translational

movement of the camera with respect to the eye, a large error is introduced: 1 mm of

translation equals 10º of angular rotation in the image. For this reason, video systems also

track the specular reflection of a light source in the image in addition to the pupil centroid.

As this first Purkinje image does not change with rotation but does change with translation,

whereas the pupil center changes with eye rotation as well as translation, their relative

positions can be used to compensate for errors induced by relative motion occurring

between the head and camera. Figure 6 shows a digital video system in use on a human

subject.

Figure 6. A high-speed digital video system to measure thehorizontal and vertical eye movements of both eyes for a human

subject.

4.5.2. Characteristics

Assuming that the axes of the head and camera are aligned, then video-based

systems are capable of recording both horizontal and vertical eye movements over a

relatively wide range (often +/- 30º horizontally, somewhat less vertically). Resolution is

better than EOG but generally somewhat less than for IR or search-coil systems, often in

the range of 0.58. As analog video systems use a raster scan to represent an image, spatial

resolution is limited by the nature of the video system used (e.g., PAL or NTSC).

Bandwidth is limited by the frame rate of the video system. If conventional analog video is

used, then frame rates are 50 Hz for PAL and 60 Hz for NTSC. These rates impose a

maximum bandwidth of 25 and 30 Hz, respectively. Although adequate for examination of

slow eye movements, these frame rates are inadequate for assessment of saccades; indeed,

very small saccades could be completed within the inter-frame interval. Systems using

digital video are free from the constraints imposed by broadcast TV standards and can

make use of higher frame rate cameras—several now operate at 250 or 500 Hz. Generally,

a frame rate versus resolution trade-off exists— higher frame rates imply lower image

resolution. However, continued improvement in digital video technology and ever faster

and cheaper computers continue to improve performance. Although older video tracking

systems often required a good deal of ‘‘tweaking’’ of brightness and contrast settings in an

effort to obtain a reliable image of the pupil, many recent systems have more streamlined

set-up protocols. In the past, some systems internally monitored fixation on calibration

targets and rejected data that were unstable, thereby making the systems unsuitable for use

with patients with nystagmus. However, default calibration settings generally permit data to

be taken and the nystagmus records can then be retrospectively calibrated.

Figure.6. Schematic showing the basic functional architecture of most

Video – based eye tracking systems.

4.5.3. Applications

In principle, digital video is the most flexible of all eye-movement recording

technologies. Some systems use cameras mounted on the head, using either helmets or

some other relatively stable mounting system. Other systems use remote cameras, often

mounted adjacent to or within a computer stimulus display. Systems used in vehicles may

use either remote cameras or helmet-mount cameras. In addition to conventional clinical

eye-movement testing, video systems, especially remote camera models are increasingly

being used in commercial applications such as advertising studies and usability analyses of

websites. For such applications, the unobtrusiveness of the technology and the need to only

monitor fixations rather than to study saccade dynamics makes even relatively low-frame-

rate video ideal. Such systems are also excellent for use with infants and small children,

who may be induced to look at some attractive display on a screen but who generally,

respond poorly to head-mounted apparatus. Remote systems that track more than one first

Purkinje image can cope with a wider range of head movements, making the systems even

less restrictive for the subjects. Some video systems can also analyze torsional eye

movements by identifying some feature on the iris and then tracking changes in its

orientation from frame to frame. High-speed (500 Hz) digital video systems are seeing

increased use in basic and clinical laboratories, challenging magnetic search coils as the

method of choice.

4.5.4. Limitations

The problems associated with calibrating patients whose eyes are never still have

already been discussed. As noted before, the other serious limitations of some of these

systems are their somewhat limited spatial resolution and bandwidth. Both parameters can

be optimized, but doing so leads to marked increases in price. However, unlike other eye-

tracking technologies, the limiting factors for high-speed, digital video eye-movement

recording systems are the cameras and computing power. As the enormous general

consumer market rather than the quite small eye-movement recording market drives

improvements in both technologies, improvements can be anticipated to occur much faster

than they would otherwise. Even within the eye-tracking field, the development of

commercial uses for the technology will facilitate its advance faster than the smaller and

less prosperous academic research community.

Figure.9. Monocular fixation recalibration and post calibration (horizontal) records for the right and left eyes.

Out of all these methods, the EOG system is the simplest and most consistent.

The EOG system uses only electrodes, which are placed on the either side of the

eyeball and the amplifier records the electrical signal. As there are no coils placed on

the eye ball, it is a very safe method and is also very economical. Because of the above

method reasons, the EOG system is used in our project. The EOG Amplifier is designed

and developed.

CHAPTER – 5

HARD WARE DESIGN

Electrodes:

The purpose of the recording electrodes is to detect the voltage changes generated

by eye movements and present them to the recording system. The type of electrodes used

almost universally for this purpose consists of an Ag/Agcl pellet mounted in a plastic cup

that holds it away from the skin. The space between the pellet and the skin is filled with

electrolytic paste and the electrode is attached to the skin by a doughnut-shaped ring cut

from the adhesive coated plastic tape. A flexible lead wire connects it to the recording

system.

This type of electrode is widely used because it does not polarize as readily as other

metal electrodes do. The Ag/Agcl electrode displays the highest stability and lowest

impedance of any readily available and is therefore desirable for eye movement recording.

Moreover the design of this electrode is relatively insensitive to movement because the

electrode electrolyte interference is located a short distance away from the skin and is

somewhat protected from mechanical displacement. The electrolyte used under the

electrolyte is designed to overcome the electrical impedance of the dry epidermis.

Block diagram of EOG signal acquisition system

The generation of the Electro OculoGram (EOG) signal can be understood by

envisaging dipoles located in the eyes with the cornea having relatively positive potential

with respect to the retina. This EOG signal is picked up by a bi-channel signal acquisition

system consisting of the Horizontal (H) and vertical (V) channels. The placement of

electrodes is shown in Figure. The acquisition system employs Ag-AgCI surface electrodes

for signal pickup which requires application of sufficient electrolyte gel to reduce the skin

impedance. The EOG signal has a frequency range between DC and 38Hz and amplitude

between 10mV to 100mV. The EOG signal amplitude is merely dependent upon the

position of the eyeballs relative to the conductive environment of the skull. The EOG

signal, like the other bio-signals is corrupted by environmental interferences and biological

artifacts. Therefore the primary design considerations that have been kept in mind during

the design of the EOG bio-potential amplifier are proper amplification, sufficient

bandwidth, high input impedance, low noise, stability against temperature and voltage

fluctuations, elimination of DC drifts and power-line interference.

The first stage of any EOG bio-potential amplifier is the instrumentation amplifier

which provides the initial amplification while reducing the effect of signals such as power-

line inference and skin muscle artifacts owing to its high common mode rejection ratio

(CMRR). Two instrumentation amplifiers are employed for this purpose, one for each of

the two channels. Since the EOG signal content varies between DC and 38Hz, a band pass

filter is used after the signal pickup stage, with cutoff frequencies of 0.16Hz and 40Hz. The

acquired EOG signal after conditioning is interfaced to a computer.

Designing of Instrumentation Amplifier

An instrumentation amplifier is a type of differential amplifier that has been

outfitted with input buffers, which eliminate the need for input impedance matching and

thus, make the amplifier particularly suitable for use in measurement and test equipment.

Additional characteristics include very low DC offset, low drift, low noise, very high open-

loop gain, very high common-mode rejection ratio, and very high input impedances.

Instrumentation amplifiers are used where great accuracy and stability of the circuit both

short and long-term are required. Although the instrumentation amplifier is usually shown

schematically identical to a standard op-amp, the electronic instrumentation amplifier is

almost always internally composed of 3 op-amps as shown in Figure. The most commonly

used instrumentation amplifier circuit is shown in this Figure. The gain of the circuit is

Vout/V2-V1=(1+(2R1/Rgain)(R3/R2))

The ideal common-mode gain of an instrumentation amplifier is zero. In the circuit

shown, common-mode gain is caused by mismatches in the values of the equally numbered

resisters and by the non-zero common mode gains of the two input op-amps. Obtaining

very closely matched resistors is a significant difficulty in fabricating these circuits, as is

optimizing the common mode performance of the input op-amps.

Properties:

1) high common mode rejection ratio

2) low offset voltage and offset voltage drift

3) low input bias and input offset currents

4) well-matched and high value input impedances

5) low noise

6) low non-linearity

7) simple gain selection and

8) adequate bandwidth.

Applications:

1) data acquisition from low output transducers

2) medical instrumentation

3) current/voltage monitoring

4) audio applications involving weak audio signals or noisy environments

5)high-speed signal conditioning for video data acquisition and imaging and

6) high frequency signal amplification in cable RF systems.

EOG Instrumentation Amplifier

It is the first stage of the circuit. The first part of the circuit is instrumentation

amplifier then isolation amplifier which provide isolation between input and other parts of

the circuit. It has high input impedance so that entire voltage received drops into the circuit.

First stage Gain=1+[50Kohm/Rg] It has gain of 10 where Rg1=5Kohm

Second stage Gain=1+[50Kohm/Rg] It has gain of 100 where Rg2=0.5Kohm

Designing of Isolation Amplifier

The ISO122 is a precision isolation amplifier incorporating a novel duty cycle

modulation-demodulation technique. The signal is transmitted digitally across a 2pF

differential capacitive barrier. With digital modulation the barrier characteristics do not

affect signal integrity, resulting in excellent reliability and good high frequency transient

immunity across the barrier. Both barrier capacitors are imbedded in the plastic body of the

package. The ISO122 is easy to use. No external components are required for operation.

The key specifications are 0.020% max. Nonlinearity, 50KHz signal bandwidth, and

200uV/0C VOS drift. A power supply range +-4.5V to +-18V and quiescent currents of +-

5mA on VSI and +-5.5mA on VS2 make these amplifiers ideal for a wide range of

applications. The ISO122 is available in 16-pin plastic DIP and 28-lead plastic surface

mount packages.

Features

1)100% tested for high voltage breakdown;

2) Rated 1500Vrms

3) High IMR:140db at 60Hz

4) Bipolar operation V0=+-10V

5) 16-pin plastic dip and 28 lead SOIC

6) EASE OF USE: Fixed unity gain configuration

7) 0.020%max nonlinearity

8) +-4.5V to +-18V supply range.

Applications

1) Industrial process control:

Transducer Isolator, Isolator for Thermo-couples, RTDs, Pressure Bridges, and Flow

Meters, 4mA to 20mA Loop Isolation.

2) Ground loop elimination

3) Motor and SCR control

4) Power monitoring

5) PC-based data acquisition

6) Test equipment

DC-DC Converter

DC to DC converter is a circuit which converts a source of direct current (DC) from one

voltage level to another. It is a useful device in the field of medical electronics as it gives

another solution to the problem of achieving adequate low frequency response while

avoiding the drift problem inherent in direct coupled amplifiers. This type of amplifier

makes use of a chopping device, which converts a slowly varying direct current to an

alternating from with amplitude proportional to the input direct current and with phase

dependent on the polarity o the original signal. The alternating voltage is then amplified by

a conventional AC amplifier whose output is rectified to get an amplified direct current. It

is an excellent device for signals of narrow bandwidth and reduces the drift problem.

Designing of second order low pass filter

The circuit shown is known as using gain voltage controlled voltage source (VCVS)

circuit, which is also referred to as the sallen and key filter.

The cutoff frequency of the low pass filter is given by

Fc=1/ [2 (R1R2C1C2)1/2]

In order for this filter to pass a second order Butterworth or normally flat pass band

response with a roll off of-12dB per octave (-40dB/decade), one approach is to make both

resistors equal in which case C2 must be equal to twice C1. This is accomplished easily by

placing two capacitors, each equal to C1, in parallel for C2.

For fc=0.16Hz,

i.e, R1=R2=10KΩ, C2=100µF, C1=220µF (2*C2)

To remove the DC component but preserve the DC signal, a second order low pass filter

with a 1s time constant is used. The filtered signal is subtracted from the amplified signal

of the first stage.

Designing of 4th order low pass filter

This is obtained by cascading two 2nd order low pass filter sections. The cutoff

frequency of this 4th order is calculated by the same formula used for 2nd order filter. But,

the difference here is that the response decreases at-80dB/decade instated of 40dB/decade

from the cutoff frequency, so that it reaches ideal response.

For fc=38Hz,

i.e, R1=R2=R3=R4=2.7KΩ,C2=C4=1µF, C1=C3=2.2µF (2*C2)

The final stage of the analogue circuit is a 4 th order low pass filter with a cutoff frequency

of 38Hz. The filter is designed to reduce power line noise contamination.

MICRO CONTROLLER:

Introduction:

Micro controllers these days are silent workers in many apparatus, ranging from the

washing machine to the video recorder. Nearly all of these controllers are mask

programmed and therefore are of very little use for applications that require the programs

to be changed during the course of execution.

Even if the programs could be altered, the information necessary to do so an

instruction set, an assembler language and description for the basic hardware is either very

difficult to obtain or are in adequate when it came to the issue of accessibility.

A marked exception to the above category is the Atmel 89C2051 micro controller

belonging to the Atmel family. This micro controller has features that seem to make it

more accessible than any other single chip micro controller with a reasonable price tag.

The 89C51, an 8 bit single chip micro controller has got a powerful CPU optimized

for control applications, 64K program memory address space, 64K data memory address

space, 128 bytes of on chip RAM (read/write memory), for 8 bit bi-directional parallel

ports one full duplex serial ports two 16 bit timers/counters and an extensive interrupt

structure.

The 89C51 is a second-generation 8-bit single chip micro- controller. The 89C2051

provides a significantly more powerful architecture, a more powerful instruction set and a

full serial port.

The 89C51 is a complete micro controller. There are 20 pins needed by the two 8

bit bi-directional ports. Pins provide power, allow you to connect a crystal clock and

provide a few timing and control signals.

The architecture includes the ALU, the accumulator, the stack pointer; a block of

registers and a general purpose register-the B register. All these devices are connected to

the 89C51 internal 8-bit data bus.

Each I/O port is also connected to the 8-bit internal data bus through a series of

registers. These registers hold data during I/O transfers and control the I/O ports. The

architectural block diagram also shows the 89C51 ROM and RAM.

ExternalROM

InternalROM

Comparison of microprocessor and micro controller :

The difference between Microprocessor and Micro controller is Microprocessor can

only process with the data, Micro controller can control external device. That is if you

want switch “ON” or “OFF” a device, you need peripheral ICs to do this work with Micro

controller you can directly control the device.

Like Microprocessor, Micro controller is available with different features. It is

available with inbuilt memory, I/O lines, timer and ADC. The micro controller, which we

are going to use, is 89C51 it is manufactured by ATMEL, MC, and USA. This is advanced

version of 8031. This Micro controller have inbuilt 4K bytes of flash ROM, 256 bytes of

RAM, 32 I/O lines (4 bit ports) and 6 vectored interrupts.

Flash ROM:

Flash ROM can be well explained with a block diagram as shown in the

following figure. 4-kilo byte ROM is available in the Micro controller. It can be erased and

reprogrammed. If the available memory is not enough for your program, you can interface

the external ROM with this IC, it has 16 address lines, so maximum of (2^16) i.e. 64 bytes

of ROM, can be interfaced with this Micro controller. Both internal and external ROM

cannot be used simultaneously.

0FFF

0000 0000

For external accessing of ROM, A pin is provided in Micro controller itself is i.e.

pin no.31 EA should be high to use internal ROM, low to use external ROM.

RAM:

Internal 256 bytes of RAM are available for user. These 256 bytes of RAM can be

used along with the external RAM. Externally you can connect 64-kilo bytes of RAM with

micro controller. In internal RAM first 128 bytes of RAM is available for user and the

remaining 128 bytes are used as special function registers (SFR). These SFR’s are used as

control registers for timer, serial port etc.

Advantages of Micro controllers:

1. If a system is developed with a microprocessor, the designer has to go for

external memory such as RAM, ROM or EPROM and peripherals and hence the size

of the PCB will be large enough to hold all the required peripherals.

2. But the micro controller has got all these peripheral facilities on a single chip so

development of a similar system with a micro controller reduces PCB size and cost of

the design.

3. One of the major difference between a micro controller and a microprocessor is that

a controller often deals with bits, not bytes as in the real world application, for

example switch contacts can only be open or close, indicators should be lit or dark and

motors can be either turned on or off and so forth.

4. The Micro controller has two 16 bit timers / counters built within it, which makes it

more suitable to this application since we need to produce some accurate timer delays.

It is even more advantageous that the timers also act as interrupts.

Hardware description:

Introduction to 8051 Microcontroller:

The first task faced when learning to use a new computer is to become

familiar with the capability of the machine. The features of the computer best

learned by studying the internal hardware design, also called the architecture of the

device, to determine the type, number, and size of the registers and other circuitry.

The hardware is manipulated by an accompanying set of program

instructions, or software. One familiar with hardware and software, the system

designer can then apply the microcontroller to the problems at hand. In this project

we make use of microcontroller.

The 8051 microcontroller generic part number actually includes a whole

family of microcontrollers that have numbers ranging from 8031 to 8751.The block

diagram of the 8051 shows all of the features unique to microcontrollers:

· Internal ROM and RAM

· I/O ports with programmable pins

· Timers and counters

· Serial data communication\

The block diagram also shows the usual CPU components program counter,

ALU, working registers, and the clock circuits.

The 8051 architecture consists of these specific features:

· 8 bit CPU with registers A and B

· 16 bit PC &data pointer (DPTR)

· 8 bit program status word (PSW)

· 8 bit stack pointer(SP)

· Internal ROM or EPROM (8751)of 0(8031)to 4k(8051)

· Internal RAM of 128 bytes.

· 4 register banks , each containing 8 registers

· 80 bits of general purpose data memory

· 32 input/output pins arranged as four 8 bit ports:P0-P3

· two 16 bit timer/counters:T0-T1

· Two external and three internal interrupt sources

· Oscillator and clock circuits

A pin out of the 8051 packaged in a 40 pin DIP is shown below.

A pin out of the 8051 packaged in a 40 pin DIP is shown below.

VCC:

Supply voltage.

GND:

Ground.

Port 0:

Port 0 is an 8-bit open drain bi-directional I/O port. As an output port, each pin can sink

eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high-

impedance inputs. Port 0 can also be configured to be the multiplexed low-order,

address/data bus during accesses to external program and data memory. In this mode, P0

has internal pull-ups. Port 0 also receives the code bytes during Flash programming and

outputs the code bytes during program verification. External pull-ups are required during

program verification

Port 1 Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output

buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins, they are pulled

high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are

externally being pulled low will source current (IIL) because of the internal pull-ups. In

addition, P1.0 and P1.1 can be configured to be the timer/counter 2 external count input

(P1.0/T2) and the timer/counter 2 trigger input (P1.1/T2EX), respectively, as shown in the

following table.

Port Pin Alternate Functions

P1.0 T2 (external count input to Timer/Counter 2), clock-out P1.1 T2EX (Timer/Counter 2

capture/reload trigger and direction control) Port 1 also receives the low-order address

bytes during Flash programming and program verification.

Port 2:

Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers

can sink/source four TTL inputs. When 1s are written to Port 2 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally

being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the

high-order address byte during fetches from external program memory and during accesses

to external data memory that use 16-bit addresses (MOVX @ DPTR). In this application,

Port 2 uses strong internal pull-ups when emitting 1s. During accesses to external data

memory that use 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special

Function Register. Port 2 also receives the high-order address bits and some control signals

during Flash programming and verification.

Port 3:

Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers

can sink/source four TTL inputs. When 1s are written to Port 3 pins, they are pulled high

by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally

being pulled low will source current (IIL) because of the pull-ups. Port 3 also serves the

functions of various special features of the AT89C51, as shown in the following table.

Port Pin Alternate Functions

P3.0 RXD (serial input port)

P3.1 TXD (serial output port)

P3.2 INT0 (external interrupt 0)

P3.3 INT1 (external interrupt 1)

P3.4 T0 (timer 0 external input)

P3.5 T1 (timer 1 external input)

P3.6 WR (external data memory write strobe)

P3.7 RD (external data memory read strobe)

Port 3 also receives some control signals for Flash programming and programming

verification.

RST: Reset input. A high on this pin for two machine cycles while the oscillator is running

resets the device.

ALE/PROG:

Address Latch Enable is an output pulse for latching the low byte of the address during

accesses to external memory. This pin is also the program pulse input (PROG) during Flash

programming. In normal operation, ALE is emitted at a constant rate of 1/6 the oscillator

frequency and may be used for external timing or clocking purposes. Note, however, that

one ALE pulse is skipped during each access to external data memory. If desired, ALE

operation can be disabled by setting bit 0 of SFR location 8EH. With the bit set, ALE is

active only during a MOVX or MOVC instruction. Otherwise, the pin is weakly pulled

high. Setting the ALE-disable bit has no effect if the microcrontroller is in external

execution mode.

PSEN:

Program Store Enable is the read strobe to external program memory. When the AT89C52

is executing code from external program memory, PSEN is activated twice each machine

cycle, except that two PSEN activations are skipped during each access to external data

memory.

EA/VPP:

External Access Enable. EA must be strapped to GND in order to enable the device to fetch

code from external program memory locations starting at 0000H up to FFFFH. Note,

however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA

should be strapped to VCC for internal program executions. This pin also receives the 12-

volt programming enable voltage (VPP) during Flash programming when 12-volt

programming is selected.

XTAL1:

Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2:

Output from the inverting oscillator amplifier.

CRYSTAL OSCILLATOR:

DESCRIPTION:

If a piezoelectric crystal, usually quartz, has electrodes plated on opposite faces and if a

potential is applied between these electrodes, forces will be exerted on the bound charges

within the crystal. If this device is properly mounted deformations takes place within the

crystal, and electromechanical system is formed which will vibrate when properly excited.

The resonant frequency and the Q depend upon the crystal dimensions, how the surfaces

are oriented with respect to its axes and how the device is mounted. Frequency ranging

from few kilohertz to a few megahertz, and Q’s in the range from several thousand to

several hundred thousand, are commercially available. These extraordinarily high values of

Q and the fact that the characteristics of quartz are extremely stable with respect to time

and temperature account for the exceptional frequency stability of oscillators incorporating

crystals.

Figure1:SYMBOL

Figure2:

CHARACTERISTICS

It covers every significant performance characteristics of crystals such as resonance

frequency, resonance mode, load capacitance, series resistance, holder capacitance,

motional inductance and capacitance, and drive level.

Quartz crystals are available in a myriad of shapes and sizes, and can range widely

in performance specifications. These specifications include resonance frequency, resonance

mode, load capacitance, series resistance, holder capacitance, motional inductance and

capacitance, and drive level. Understanding these parameters and how they relate to the

crystal's performance will allow you to successfully specify crystals for your circuit

application.

A quartz crystal can be modeled as a series LRC circuit in parallel with a shunt

capacitor.Crystals below 30MHz are often specified at the fundamental frequency, but

above 30MHz they are typically specified as 3rd, 5th, or even 7th overtone (overtones

occur only at odd multiples). It's important to know whether the oscillator is operating in

fundamental or overtone mode. An overtone is similar in concept to a harmonic, with the

exception that crystal oscillation overtones are not exact integer multiples of the

fundamental. Selection of overtone is based upon using the lowest possible overtone that

will result in a crystal fundamental frequency below 30MHz. The vendor calibrates a 3rd

overtone crystal at the 3rd overtone, not the fundamental. For example, most crystal

vendors will automatically give you a 3rd overtone 50MHz crystal if you don't specify

fundamental mode or an overtone mode. If you plug a 50MHz 3rd overtone crystal into an

oscillator that expects a fundamental-mode crystal, you are likely to have an oscillator

running at 50/3 or 16.666MHz! If you don't know the frequency mode of your crystal,

contact the designer or the manufacturer of the oscillator circuit.

The majority of clock sources for microcontrollers can be grouped into two types:

those based on mechanical resonant devices, such as crystals and ceramic resonators, and

those based on electrical phase-shift circuits such as RC (resistor, capacitor) oscillators.

Silicon oscillators are typically a fully integrated version of the RC oscillator with the

added benefits of current sources, matched resistors and capacitors, and temperature-

compensation circuits for increased stability. Two examples of clock sources are illustrated

in Figure 1. Figure 1a shows a Pierce oscillator configuration suitable for use with

mechanical resonant devices like crystals and ceramic resonators, while Figure 1b shows a

simple RC feedback oscillator.

Power Consumption:

Power consumption is another important consideration of oscillator selection. The power

consumption of discrete component crystal-oscillator circuits is primarily determined by

the feedback-amplifier supply current and by the in-circuit capacitance values used. The

power consumption of amplifiers fabricated in CMOS is largely proportional to the

operating frequency and can be expressed as a power-dissipation capacitance value. The

power-dissipation capacitance value of an HC04 inverter gate used as an inverting

amplifier, for example, is typically 90pF. For operation at 4MHz from a 5V supply, this

equates to a supply current of 1.8mA. The discrete component crystal oscillator circuit will

typically include an additional load capacitance value of 20pF, and the total supply current

becomes 2.2mA.

Ceramic resonator circuits typically specify larger load capacitance values than crystal

circuits, and draw still more current than the crystal circuit using the same amplifier.

By comparison, crystal oscillator modules typically draw between 10mA and 60mA of

supply current because of the temperature compensation and control functions included.

The supply current for silicon oscillators depends on type and function, and can range from

a few micro-amps for low-frequency (fixed) devices to tens of milli-amps for

programmable-frequency parts. A low-power silicon oscillator, such as the MAX7375,

draws less than 2mA when operating at 4MHz.

Summary:

The optimal clock source for a particular microcontroller application is determined by a

combination of factors including accuracy, cost, power consumption, and environmental

requirements. The following table summarizes the common oscillator circuit types

discussed here, together with their strengths and weaknesses.

89C51 BLOCK DIAGRAM DESCRIPTION:

A map of the on-chip memory area called the Special Function Register (SFR) space is

shown in Table 1. Note that not all of the addresses are occupied, and unoccupied addresses

may not be implemented on the chip. Read accesses to these addresses will in general

return random data, and write accesses will have an indeterminate effect. User software

should not write 1s to these unlisted locations, since they may be used in future products to

invoke new features. In that case, the reset or inactive values of the new bits will always be

0. Timer 2 Registers Control and status bits are contained in registers T2CON (shown in

Table 2) and T2MOD (shown in Table 4) for Timer 2. The register pair (RCAP2H,

RCAP2L) are the capture/Reload registers for Timer 2 in 16-bit capture mode or 16-bit

auto-reload mode. Interrupt Registers the individual interrupt enable bits are in the IE

register. Two priorities can be set for each of the six-interrupt sources in the IP register.

Data Memory:

The AT89C52 implements 256 bytes of on-chip RAM. The upper 128 bytes occupy a

parallel address space to the Special Function Registers. That means the upper 128 bytes

have the same addresses as the SFR space but are physically separate from SFR space.

When an instruction accesses an internal location above address 7FH, the address mode

used in the instruction specifies whether the CPU accesses the upper 128 bytes of RAM or

the SFR space. Instructions that use direct addressing access SFR space. For example, the

following direct addressing instruction accesses the SFR at location 0A0H (which is P2).

MOV 0A0H, #data

Instructions that use indirect addressing access the upper 128 bytes of RAM. For example,

the following indirect addressing instruction, where R0 contains 0A0H, accesses the data

byte at address 0A0H, rather than P2 (whose address is 0A0H).

MOV @R0, #data

Note that stack operations are examples of indirect addressing, so the upper 128 bytes of

data RAM are available as stack space.

Timer 0 and 1

Timer 0 and Timer 1 in the AT89C52 operate the same way as Timer 0 and Timer 1 in the

AT89C51.

Timer 2

Timer 2 is a 16-bit Timer/Counter that can operate as either a timer or an event counter.

The type of operation is selected by bit C/T2 in the SFR T2CON (shown in Table 2). Timer

2 has three operating modes: capture, auto-reload (up or down counting), and baud rate

generator. The modes are selected by bits in T2CON, as shown in Table 3. Timer 2 consists

of two 8-bit registers, TH2 and TL2. In the Timer function, the TL2 register is incremented

every machine cycle. Since a machine cycle consists of 12 oscillator periods, the count rate

is 1/12 of the oscillator frequency. In the Counter function, the register is incremented in

response to a 1-to-0 transition at its corresponding external input pin, T2. In this function,

the external input is sampled during S5P2 of every machine cycle. When the samples show

a high in one cycle and a low in the next cycle, the count is incremented. The new count

value appears in the register during S3P1 of the cycle following the one in which the

transition was detected. Since two machine cycles (24 oscillator periods) are required to

recognize a 1-to-0 transition, the maximum count rate is 1/24 of the oscillator frequency.

To ensure that a given level is sampled at least once before it changes, the level should be

held for at least one full machine cycle.

Capture Mode

In the capture mode, two options are selected by bit EXEN2 in T2CON. If EXEN2 = 0,

Timer 2 is a 16-bit timer or counter which upon overflow sets bit TF2 in T2CON. This bit

can then be used to generate an interrupt. If EXEN2 = 1, Timer 2 performs the same

operation, but a 1- to-0 transition at external input T2EX also causes the current value in

TH2 and TL2 to be captured into RCAP2H and RCAP2L, respectively. In addition, the

transition at T2EX Causes bit EXF2 in T2CON to be set. The EXF2 bit, like TF2, can

generate an interrupt. The capture mode is illustrated in Figure 1.

Auto-reload (Up or Down Counter)

Timer 2 can be programmed to count up or down when configured in its 16-bit auto-reload

mode. This feature is invoked by the DCEN (Down Counter Enable) bit located in the SFR

T2MOD (see Table 4). Upon reset, the DCEN bit is set to 0 so that timer 2 will default to

count up. When DCEN is set, Timer 2 can count up or down, depending on the value of the

T2EX pin.

Figure 2 shows Timer 2 automatically counting up when DCEN = 0. In this mode, two

options are selected by bit EXEN2 in T2CON. If EXEN2 = 0, Timer 2 counts up to

0FFFFH and then sets the TF2 bit upon overflow. The overflow also causes the timer

registers to be reloaded with the 16-bit value in RCAP2H and RCAP2L. The values in

Timer in Capture ModeRCAP2H and RCAP2L are preset by software. If EXEN2 = 1, a

16-bit reload can be triggered either by an overflow or by a 1-to-0 transition at external

input T2EX. This transition also sets the EXF2 bit. Both the TF2 and EXF2 bits can

generate an interrupt if enabled. Setting the DCEN bit enables Timer 2 to count up or

down, as shown in Figure 3. In this mode, the T2EX pin controls the direction of the

count. Logic 1 at T2EX makes Timer 2 count up. The timer will overflow at 0FFFFH

and set the TF2 bit. This overflow also causes the 16-bit value in RCAP2H and

RCAP2L to be reloaded into the timer registers, TH2 and TL2, respectively. Logic 0 at

T2EX makes Timer 2 count down. The timer underflows when TH2 and TL2 equal the

values stored in RCAP2H and RCAP2L. The underflow sets the TF2 bit and causes

0FFFFH to be reloaded into the timer registers. The EXF2 bit toggles whenever Timer

2 overflows or underflows and can be used as a 17th bit of resolution. In this operating

mode, EXF2 does not flag an interrupt.

Baud Rate Generator:

Timer 2 is selected as the baud rate generator by setting TCLK and/or RCLK in T2CON

(Table 2). Note that the baud rates for transmit and receive can be different if Timer 2 is

used for the receiver or transmitter and Timer 1 is used for the other function. Setting

RCLK and/or TCLK puts Timer 2 into its baud rate generator mode, as shown in Figure 4.

The baud rate generator mode is similar to the auto-reload mode, in that a rollover in TH2

causes the Timer 2 registers to be reloaded with the 16-bit value in registers RCAP2H and

RCAP2L, which are preset by software. The baud rates in Modes 1 and 3 are determined

by Timer 2’s overflow rate according to the following equation.

The Timer can be configured for either timer or counter operation. In most applications, it

is configured for timer operation (CP/T2 = 0). The timer operation is different for Timer 2

when it is used as a baud rate generator. Normally, as a timer, it increments every machine

cycle (at 1/12 the oscillator frequency). As a baud rate generator, however, it increments

every state time (at 1/2 the oscillator frequency). The baud rate formula is given below.

Where (RCAP2H, RCAP2L) is the content of RCAP2H and RCAP2L taken as a 16-bit

unsigned integer. Timer 2 as a baud rate generator is shown in Figure 4. This figure is valid

only if RCLK or TCLK = 1 in T2CON. Note that a rollover in TH2 does not set TF2 and

will not generate an interrupt. Note too, that if EXEN2 is set, a 1-to-0 transition in T2EX

will set EXF2 but will not cause a reload from (RCAP2H, RCAP2L) to (TH2, TL2). Thus

when Timer 2 is in use as a baud rate generator, T2EX can be used as an extra external

interrupt. Note that when Timer 2 is running (TR2 = 1) as a timer in the baud rate generator

mode, TH2 or TL2 should not be read from or written to. Under these conditions, the Timer

is incremented every state time, and the results of a read or write may not be accurate. The

RCAP2 registers may be read but should not be written to, because a write might overlap a

reload and cause write and/or reload errors. The timer should be turned off (clear TR2)

before accessing the Timer 2 or RCAP2 registers.

Programmable Clock Out

A 50% duty cycle clock can be programmed to come out on P1.0, as shown in Figure 5.

This pin, besides being a regular I/O pin, has two alternate functions. It can be programmed

to input the external clock for Timer/Counter 2 or to output a 50% duty cycle clock ranging

from 61 Hz to 4 MHz at a 16 MHz operating frequency. To configure the Timer/Counter 2

as a clock generator, bit C/T2 (T2CON.1) must be cleared and bit T2OE (T2MOD.1) must

be set. Bit TR2 (T2CON.2) starts and stops the timer. The clock-out frequency depends on

the oscillator frequency and the reload value of Timer 2 captures registers (RCAP2H,

RCAP2L), as shown in the following equation.

In the clock-out mode, Timer 2 rollovers will not generate an interrupt. This behavior is

similar to when Timer 2 is used as a baud-rate generator. It is possible to use Timer 2 as a

baud-rate generator and a clock generator simultaneously. Note, however, that the baud-

rate and clock-out frequencies cannot be determined independently from one another since

they both use RCAP2H and RCAP2L.

UART

The UART in the AT89C52 operates the same way as the

UART in the AT89C51.

Interrupts

The AT89C52 has a total of six interrupt vectors: two external interrupts (INT0 and INT1),

three timer interrupts (Timers 0, 1, and 2), and the serial port interrupt. These interrupts are

all shown in Figure 6. Each of these interrupt sources can be individually enabled or

disabled by setting or clearing a bit in Special Function Register IE. IE also contains a

global disable bit, EA, which disables all interrupts at once. Note that Table shows that bit

position IE.6 is unimplemented. In the AT89C51, bit position IE.5 is also unimplemented.

User software should not write 1s to these bit positions, since they may be used in future

AT89 products.

Timer 2 interrupt is generated by the logical OR of bits TF2

and EXF2 in register T2CON. Neither of these flags is cleared by hardware when the

service routine is vectored to. In fact, the service routine may have to determine whether it

was TF2 or EXF2 that generated the interrupt, and that bit will have to be cleared in

software. The Timer 0 and Timer 1 flags, TF0 and TF1, are set at S5P2 of the cycle in

which the timers overflow. The values are then polled by the circuitry in the next cycle.

However, the Timer 2 flag, TF2, is set at S2P2 and is polled in the same cycle in which the

timer overflows.

Oscillator Characteristics

XTAL1 and XTAL2 are the input and output, respectively, of an inverting amplifier that

can be configured for use as an on-chip oscillator, as shown in Figure 7. Either a quartz

crystal or ceramic resonator may be used. To drive the device from an external clock

source, XTAL2 should be left unconnected while XTAL1 is driven, as shown in Figure 8.

There are no requirements on the duty cycle of the external clock signal, since the input to

the internal clocking circuitry is through a divide-by-two flip-flop, but minimum and

maximum voltage high and low time specifications must be observed.

Programming the Flash

The AT89C52 is normally shipped with the on-chip Flash memory array in the erased state

(that is, contents = FFH) and ready to be programmed. The programming interface accepts

either a high-voltage (12-volt) or a low-voltage (VCC) program enable signal. The Low-

voltage programming mode provides a convenient way to program the AT89C52 inside the

user’s system, while the high-voltage programming mode is compatible with conventional

third party Flash or EPROM programmers. The AT89C52 is shipped with either the high-

voltage or low-voltage programming mode enabled. The respective topside marking and

device signature codes are listed in the following table.

The AT89C52 code memory array is programmed byte-by byte in either programming

mode. To program any nonblank byte in the on-chip Flash Memory, the entire memory

must be erased using the Chip Erase Mode.

Programming Algorithm Before programming the AT89C52, the address, data and control

signals should be set up according to the Flash programming mode table and Figure 9 and

Figure 10. To program the AT89C52, take the Following steps.

1. Input the desired memory location on the address lines.

2. Input the appropriate data byte on the data lines.

3. Activate the correct combination of control signals.

4. Raise EA/VPP to 12V for the high-voltage programming mode.

5. Pulse ALE/PROG once to program a byte in the

Flash array or the lock bits. The byte-write cycle is self-timed and typically takes no more

than 1.5 ms. Repeat steps 1 through 5, changing the address and data for the entire array or

until the end of the object file is reached.

Data Polling The AT89C52 features Data Polling to indicate the end of a write cycle.

During a write cycle, an attempted read of the last byte written will result in the

complement of the written data on PO.7. Once the write cycle has been completed, true

data is valid on all outputs, and the next cycle may begin. Data Polling may begin any time

after a write cycle has been initiated.

Ready/Busy The progress of byte programming can also be monitored by the RDY/BSY

output signal. P3.4 is pulled low after ALE goes high during programming to indicate

BUSY. P3.4 is pulled high again when programming is done to indicate READY.

Program Verify If lock bits LB1 and LB2 have not been programmed, the programmed

code data can be read back via the address and data lines for verification. The lock bits

cannot be verified directly. Verification of the lock bits is achieved by observing that their

features are enabled.

Program Verify If lock bits LB1 and LB2 have not been programmed, the programmed

code data can be read back via the address and data lines for verification. The lock bits

cannot be verified directly. Verification of the lock bits is achieved by observing that their

features are enabled.

Chip Erase The entire Flash array is erased electrically by using the proper combination of

control signals and by holding ALE/PROG low for 10 ms. The code array is written with

all 1s. The chip erase operation must be executed before the code memory can be

reprogrammed.

Reading the Signature Bytes The signature bytes are read by the same procedure as a

normal verification of locations 030H, 031H, and 032H, except that P3.6 and P3.7 must be

pulled to logic low. The values returned are as follows. T

(030H) = 1EH indicates manufactured by Atmel

(031H) = 52H indicates 89C52

(032H) = FFH indicates 12V programming

(032H) = 05H indicates 5V programming

Programming Interface

All major programming vendors offer worldwide support for the Atmel microcontroller

series. Please contact your local programming vendor for the appropriate software revision

every code byte in the Flash array can be written, and the entire array can be erased, by

using the appropriate combination of control signals. The write operation cycle is self

timed and once initiated, will automatically time itself to completion.

Design of Instrument power supply:

With any micro controller based equipment, power supply is an essential item, which takes

the input AC(230v,50Hz) and converts the same into DC voltages of specified values,

required by the other circuits of the equipment, such as micro controller, sensor amplifier,

opto-coupler etc. Sometimes only a single power supply of value +5v is sufficient. But in

some cases both positive and negative voltages of specified values are to be derived,

because of the circuit involved; where as in other cases, different values of the voltages

may be required. This is entirely dependent on the other circuits of the system.

In the proposed power factor correction circuit, Atmel 89C52 micro controller is used and

the associated digital circuits require a 5v regulated power supply for its operation. But in

order to provide power supply to the comparators, it is required to provide isolation

between the micro controller and the comparator circuit. To achieve this second power

supply, which is completely isolated from the 5v supply is provided.

The circuit diagram of the desired power supply is as shown in fig.4.1

In the circuit, a step down transformer of rating 230v primary with the isolated secondary is

used. One secondary winding provides an 8v ac output, with a current capacity of 500mA,

and the other winding provides 15:0:15v(i.e. center tapped secondary) with a current

capacity of 500mA.

The secondary winding-1, voltage is rectified by using a bridge rectifier. This is followed

by a capacitor filter to remove the ripple.

The secondary winding-2, voltages are rectified , by using two center tapped full wave

rectifiers, one providing positive voltage and the other providing the negative voltage. The

positive and negative voltages are again filtered by using two capacitor filters as shown in

fig.4.1

In these instrument power supplies, the filter sections can be either or L sections, but

these sections are not normally needed in low power, low voltage applications and only a

single capacitor is sufficient. The internal impedance of the secondary winding is sufficient

to limit the current during the initial surge. The capacitor value should be of very high

value for low ripple. Thus, a capacitor of 1000f with a working voltage of 18v is

sufficient, but with a factor of safety the working voltage is considered as 35v.

The filtered DC output from secondary winding-1, without any load has a value of 10v to

12v with normal input supply of 230v AC. The input voltage may fluctuate over a wide

range practically. To accommodate these ranges a higher initial output, which is more than

12v is considered. The regulator itself requires 2v higher than its regulated output, i.e., 7v

is needed for getting 5v. In order to accommodate the voltage fluctuations on the lower side

of 230v, another 5v additional voltage is considered.

This voltage is fed to a three pin regulator 7805, which basically provides an output of 5v

irrespective of its input supply, provided the input is greater than 7v. But, at the maximum

input voltage, it should not exceed 32v, and as it is, it never happens, unless the input

supply voltage is greater than 400v, and is of rare nature. The output of this regulator is

connected with a small capacitor of 0.1f (between output and ground). This capacitor

improves the noise immunity. This output drives the micro controller.

The filtered DC output from secondary winding-2, is also connected to a three pin positive

regulator, 7812 to obtain +12v and a three pin negative regulator 7912, to obtain –12v.

These supplies are used to power the IGBT/power MOSFET gate drive circuits.

The three pin regulators are very handy and are widely used by industry in order to get

regulated dc power supplies. These regulators are having built in features such as over

voltage, over current limitations and also thermal shut down. Thus, because of these

protection mechanisms these devices provide all the options required for an ideal regulator.

This is the basic power supply module, which is designed and used with the circuit.

CHAPTER – 6

SOFT WARE DESIGN

Any micro controller based equipment needs associated software to be dumped into

the micro controller for executing the work, it has been designed for. In the present project,

two micro controllers were used for two different purposes. Both the programs are different

and the flow charts for both the systems were given in the figure 6.1 and 6.2. The

corresponding program written in Embedded C is provided in Annexure. The flow chart

explanation is provided here.

The saccadic stimulator is basically designed to provide a regular saccadic stream.

It can also be programmed to provide irregular saccades, either in time or direction

irregularity. But in the present system, I designed for regular saccade only. In regular

saccades, each LED glows for a predefined time of 1sec. After 1sec, the present LED goes

off and other LED glows, which makes a predefined angle, and it can be any angle between

50 to 300 in terms of 50 steps.

As and when power is applied, the micro controller gets RESET and runs the

program from starting. The micro controller initializes all the ports, and timer is also

initialized in such a way to get a desired time delay of 1sec. Initially 0 0 LED is lit and the

program waits for 1sec. After 1sec is completed, the program makes 00 LED off and left 50

LED ON. Now the program waits for 1sec and on completion of 1sec the left 50 LED is

turned off and again the central 00 LED is made on. Now, again the program waits for

another 1sec and on completion the 00 LED is made off and the Right 50 LED is made on.

This LED is also kept on for 1sec, on completion, this LED is turned off and the 00 LED is

again made on. This forms a complete cycle and takes 4sec to complete one cycle.

It is always necessary to take several readings to avoid the problems related to

external factors. In the present case, as the test is a regular saccadic test, the person can

predict and move his/her eyes before hand in anticipation. To avoid such readings, the

cycle is repeated for 10 times. The best results can be manually selected.

The program on completion of each cycle, increments the cycle counter and counter

is checked for ten counts. On completion of 10 counts, the program comes out of the

present loop and goes for the next cycle. In this case it is 100 LED. Again the counter is

initialized for 0 and the cycle repeats. But, this time with 00; left 100; 00; Right 100 and 00.

This cycle is repeated for ten times.

These two steps take total of 80secs. During this entire 80sec period, the subject has

to observe continuously the glowing LED, without moving his head and only moving eyes

towards the glowing LED. If the next step is repeated immediately, it becomes very tedious

for the patients especially, and they may become fatigue. To avoid this, after completion of

two steps, all the LEDs are put off, and the program waits for a button to be pressed.

During this period, the subject can close his eyes and take rest. After the subject feels

comfortable, the button can be pressed to precede further that is with 150 and 200 steps

subsequently with 250 and 300.

As the LEDs were glowing, at the same time information is also passed to the DAC

to provide on analog output to the processing circuit so that the processing circuit knows

which LED is glowing when the central 00 LED is glowing. The DAC provides 2.5V at the

output for the processing circuit. For left 50 LED, the DAC provides 2.9V and similarly for

right 50 LED, the DAC provides 2.1V output. The output voltage from DAC for each LED

is indicated in the table.

S.No Left Right

00 2.5V 2.5V

50 2.9V 2.1V

100 3.3V 1.7V

150 3.7V 1.3V

200 4.1V 0.9V

250 4.5V 0.5V

300 4.9V 0.1V

This way the stimulator provides an output voltage in a regular manner as the LEDs

were glowing, and this forms the reference waveform for measuring the parameters.

The second part of the project is to measure the saccadic parameters from the

stimulating and response waveforms, and this is done by the second micro controller. The

second micro controller receives two analog signals one from the stimulation and the other

once from the response that is EOG amplifier. Both these signals are analog signals.

This micro controller also on application of power gets reset and the ports are

initialized and LCD is also initialized. The timer is initialized to provide interrupt for every

2msec. On receiving this interrupt the program takes a sample from one of the ADC

channels.

Initially the program, takes the samples from channel-0 that is the stimulating

signal. The program checks for a transition. This is done by considering the previous

sample. The present to previous sample difference is more than a predefined value, it is

considered as a transition. Once the transition is identified, the program takes the second

channel that is corresponding to the response section. The program now opens a counter

and takes the samples at regular intervals of 2msec. Now also the program checks for the

deviations from the previous value. If the difference is more, the program stops, otherwise

the counter is incremented and the present value is stored as previous value and the next

sample is considered. This process goes until the transition is identified. Once the

transitions identified, the program comes out of the loop, and the counter value is stored.

The counter value represent the latency period.

Next, the program has to check for settling time and also the peek velocity. In order

to obtain these two things, it is required to store the sampled value until the stable values

are obtained, which is the steady state condition. The steady state condition is also checked

by considering the difference between previous value and present value, and difference is

less than a specified value. During this period also a counter is incremented with each new

sample, until the steady state is obtained.

The counter value indicates the response time.

The stored sampled values are again considered and the differences between the

successive values are taken. This difference indicates the differentiation. On differentiation

of the EOG signal, we get velocity curve. The Maximum is picked up and this is the peak

velocity.

On obtaining all these three values, they are displayed on the LCD, and the program

jumps back for considering the next transition.

This way the program continuously monitors the transitions in the stimulus

waveform and on detecting observes the response until the response is stabilized. From

these values, the parameters were obtained and are displayed. The corresponding programs

are provided in the annexure.

CHAPTER – 7

RESULTS AND CONCLUSIONS

Initially the total project is divided in to 3 parts. They are:

i) Stimulator development

ii) EOG Amplifier development and

iii) Response measurement device

In the first stage stimulator was developed and the wave forms were checked on the

CRO and checked for timing accuracies and also the amplitude variations with each step

size of the LED glowing. The LEDs were also checked, for whether they are glowing in the

required order or not. After conforming that the stimulator is working satisfactorily, the

second step has been considered.

In the second phase, the EOG Amplifier is designed and developed. The EOG

Amplifier is checked for the output on CRO, by placing the Electrodes on the subject at the

referred points in the literature. This part has been tested by a Neuro-physician from NIMS,

and after taking conformation from the Physician, I moved on to the 3rd step. The EOG

Amplifier is checked for movement and for very accurate measurements for diagnostic

applications it needs to be calibrated.

In the 3rd step the response system is designed and developed. The third stage micro

controller receives the analog information from both the stages, as an analog signal. These

analog signals are processed by this section and the results were obtained. After careful

evaluation of the obtained results with standard equipment, the results were certified as

satisfactory by the NIMS Physician.

After conforming that all the sections are satisfactorily working, the results were

obtained from three normal subjects and the results were analyzed manually. After the final

confirmation from the physician, the equipment was used for recording data.

The data was obtained from 10 normal subjects and 10 subjects suffering from

Wilson’s disease. The Wilson’s disease is a disease caused by the deposition of heavy

metals in the brain, which leads to sluggish movements. The results were tabulated

NORMAL GROUP

S.No Latency Settling time Peak velocity

1 20msec 45msec 2000/sec

2 40msec 80msec 1800/sec

3 30msec 80msec 1900/sec

4 60msec 90msec 1600/sec

5 30msec 70msec 1700/sec

6 36msec 80msec 1850/sec

7 48msec 90msec 1900/sec

8 56msec 98msec 1700/sec

9 60msec 100msec 1500/sec

10 25msec 50msec 1900/sec

Mean 40.5 78.3 17.85

WILSON’S GROUP

S.No Latency Settling time Peak velocity

1 140msec 120msec 1000/sec

2 180msec 140msec 600/sec

3 150msec 130msec 900/sec

4 160msec 130msec 850/sec

5 180msec 130msec 900/sec

6 170msec 150msec 700/sec

7 175msec 160msec 800/sec

8 150msec 140msec 850/sec

9 180msec 120msec 700/sec

10 170msec 130msec 750/sec

Mean 16.55 13.5 80.5

From the means it is apparent that one can use these parameters to distinguish a

given subject as normal or a patient. This technique can also be used to check whether the

disease is subsiding or not, with the given medication. This is possible as the parameters

are quantified. This technique is a better technique, instead of using an ambiguous check

done by the physicians earlier.

Though, the instrument is working satisfactorily it is a primitive one and in the

present project, there are several things for improvement.

The ADC used is a 10 bit ADC, instead a 12 bit or higher bit ADC can be used,

which can improve the performance of the system.

The EOG amplifier output still had noise, and better noise removal techniques can

be adopted. Instead of using hardware filters, the digital filters can be used, which can

improve the performance greatly.

Even the parameter extraction is also done by using the basic algorithms. Instead

DSP based techniques can be adopted, which can improve the accuracy of the system

greatly.

The other parameters can also be included in the analysis part, and they can also be

studied.

Once all these modifications are done, the equipments becomes a standalone

system, and can be used either for diagnostic or prognostic applications.