November 15, 1991 / Vol. 16, No. 22 / OPTICS LETTERS

Electrically addressed spatial light modulator that uses adynamic memory

David A. Jared, Richard Turner, and Kristina M. Johnson

Optoelectronic Computing Systems Center, University of Colorado, Boulder, Colorado 80309-0525

Received June 11, 1991

The operating characteristics of a 64 x 64 array electrically addressed spatial light modulator that uses a dy-namic memory on a very-large-scale-integration chip and a ferroelectric liquid-crystal modulator are discussed.

Recent research in silicon backplane/liquid-crystalspatial light modulators has demonstrated theability to interface optics and electronics closely.Both optically and electrically addressed deviceshave been fabricated." 5 This technology has thepotential for unlocking the advantages of using op-tics in image processing and computing systems. Inthis Letter an electrically addressed spatial lightmodulator (EASLM) that consists of a very-large-scale-integration (VLSI) chip and a ferroelectricliquid-crystal (FLC) modulator is presented. Thedevice is fabricated by sandwiching the FLC be-tween the VLSI chip and a cover glass coated with atransparent conductor.

The EASLM consists of a 64 x 64 array of pixelslocated on 40 Am x 40 Am centers. The chip,which is shown in Fig. 1, is fabricated usingthe 2-bcm, n-well, complementary metal-oxide-semiconductor process provided by the MOSIS siliconbrokerage service. The circuit at each pixel con-sists of a complementary metal-oxide-semiconductorswitch S and an inverter driver D. The schematicand layout of a pixel are shown in Fig. 2. Whenselect is high and select is low, the voltage on thedata line is passed to the input capacitance of D,which drives the liquid-crystal modulating pad.When select is low and select is high, the charge at apixel is isolated, thus storing the state at the pixel.Essentially, S acts like a switchable resistor that canbe changed from low to high resistance. The modu-lating pad is made in second-level metal situated ontop of the pixel circuitry and serves as a reflectiveelectrode for the FLC. The modulating pad is32 4um x 32 gim, with a 28 ,um x 28 Atm overglasscut that exposes the metal pad.

The rows of the array are addressed by using adynamic shift register. By shifting a single lowstate into the shift register, each row can be sequen-tially accessed. The columns are addressed in par-allel using four 16-bit blocks. A 2-to-4 multiplexeris used to select a particular block.

After the chip is received from MOSIS, the spatiallight modulator is fabricated by sandwiching a thinFLC layer between the chip surface and a coverglass. The cover glass is a 6 mm x 7 mm x 4 mmpiece cut from a BK-7 optical flat (A/10). Indium

tin oxide is evaporated onto one side of the glass toform the transparent electrode, and an antireflec-tion coating is placed on the other side. A layer ofchromium is evaporated along one edge of the glassmarginally overlapping the indium tin oxide. Thisallows for a wire to be easily attached to the coverglass to control the front electrode voltage. Apolyvinyl alcohol FLC alignment layer is applied onlyto the cover glass. To fill the chip, the glass is ini-.tially held in place by using a specially designed me-chanical jig. The jig consists of an X-Y translationstage for positioning the chip and three micrometersfor lowering the cover glass onto the chip. Once thedesired thickness is achieved, the glass is epoxied tothe chip and removed from the jig. The chips arefilled with the FLC in a vacuum. The smectic C*FLC used in the device is the British Drug HouseSCE13 mixture that is capable of providing only bi-nary modulation.

Figure 3 is a photograph of the University of Colo-rado logo displayed on the device. The data, storedas a 4 x 64 array of integers, are continuously writ-ten onto the device 16 bits at a time, which requires256 cycles for a complete frame. In these experi-ments, Vdd = 7 X and the voltage on the glass elec-trode is Velectrode = 3.5 V

The intensity contrast ratio 'on/'aff is measured byimaging one of the 16 x 64 pixel select groups ontoa photomultiplier tube and switching the state of the

Fig. 1. Photograph of the chip containing the EASLM.

0146-9592/91/221785-03$5.00/0 (© 1991 Optical Society of America

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1786 OPTICS LETTERS / Vol. 16, No. 22 / November 15, 1991

pixels from off to on. To perform this measure-ment, the timing signals to the device are changedsuch that all the pixels in the 16 x 64 group can beswitched simultaneously. A He-Ne laser withA = 633 nm is used to illuminate the device. Thecontrast ratio of the EASLM is 5:1.

To measure the response time of the EASLM, allthe pixels in a single 16 x 64 select group are ad-dressed simultaneously as in the contrast ratio ex-periments, the only difference being that the pixelsare switched on and off at high speeds. The re-sponse time of the EASLM is 0.75 ms. This resultis comparable with the response time of a single-element shutter using the same FLC material at±2.5 V The device is driven with a National In-struments parallel digital input/output board (ModelDIO-96) controlled by an IBM-compatible personal

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computer. With this software-controlled drivingmethod, frame rates of 330 Hz are obtainable.However, the shift register can be reliabily driven atclock frequencies in excess of 4.0 MHz. This im-plies that owing to the low level of the electric field(±3.5 V) across the liquid crystal, the maximumframe rate of the device is limited by the responsetime of the FLC. The response time measure-ments indicate that frame rates of greater than1300 frames/s are achievable.

Since the device uses capacitance to store data,the data are only stored for a short time before thecharge decays. The storage time of the pixels ismeasured using the same procedure used for mea-suring the response time, except that instead ofswitching the pixels off, they are isolated for a longtime (=25 ms) and allowed to decay. Because ofphotogenerated carriers, the storage time is a func-tion of the read-beam intensity. The storage timeas a function of the read-beam intensity is shown inFig. 4. As can be seen, the storage time is stronglydependent on the read-beam intensity, and the bestperformance is obtained at lower intensities.

In conclusion, an electrically addressed spatiallight modulator consisting of a ferroelectric liquid-crystal modulator on a VLSI chip is presented. Thedevice consists of a 64 x 64 array of pixels on40 Atm x 40 Atm centers with a response time of0.75 ms and a contrast ratio of 5:1.

Discussions with Tim Slagle and Kelvin Wagnerwere enjoyed while developing this project. DavidDoroski and Chongehang Mao helped in filling thechips. This research was supported by the NationalScience Foundation Engineering Research Centerfor Optoelectronic Computing Systems (CDR862228)and the Martin Marietta Corporation. GraduateFellowship support from NASA Johnson Space FlightCenter for David Jared is gratefully acknowledged.

References

Fig. 3. Photograph of the device displaying an image.1. I. Underwood, D. G. Vass, and R. M. Sillitto, IEE Proc.

133, 77 (1986).

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2. D. J. McKnight, D. G. Vass, and R. M. Sillitto, Appl.Opt. 28, 4757 (1989).

3. T. J. Drabik, L. K. Cotter, and M. A. Handschy, in Di-gest of Optical Society of America Annual Meeting(Optical Society of America, Washington, D.C., 1989),paper THS3.

4. L. K. Cotter, T. J. Drabik, R. J. Dillon, and M. A. Hand-schy, Opt. Lett. 15, 291 (1990).

5. D. A. Jared and K. M. Johnson, Opt. Lett. 16, 767(1991).