eet 4250

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EET 4250 Ch. 4: The Processor: Datapath & Control Logic Acknowledgements: Some slides and lecture notes for this course adapted from Prof. Mary Jane Irwin @ Penn State, Morgan Kaufmann supplemental material for the course text.

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EET 4250. Ch. 4: The Processor: Datapath & Control Logic. Acknowledgements: Some s lides and lecture notes for this course adapted from Prof. Mary Jane Irwin @ Penn State, Morgan Kaufmann supplemental material for the course text. Branch Instructions. Read register operands - PowerPoint PPT Presentation

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Page 1: EET  4250

EET 4250

Ch. 4: The Processor: Datapath & Control Logic

Acknowledgements: Some slides and lecture notes for this course adapted from Prof. Mary Jane Irwin @ Penn State, Morgan Kaufmann supplemental material for the course text.

Page 2: EET  4250

EET 4250: Microcomputer Architecture 2

Branch Instructions

• Read register operands• Compare operands

– Use ALU, subtract and check Zero output• Calculate target address

– Sign-extend displacement– Shift left 2 places (word displacement)– Add to PC + 4

• Already calculated by instruction fetch

Page 3: EET  4250

EET 4250: Microcomputer Architecture 3

Branch Addressing – Absolute

• Simplified branch ADDR field– If immediate field is 3 bits

instead of 16– beq $t0, $t1, ADDR

• How do we maximize how big ADDR can be?

• Case 1: ADDR is an absolute address

– Limit to 23 = 8 addresses in program!

– Only 2 instructions (at address 0 & 4)

0x00

0x01

0x02

0x03

0x04

0x05

0x06

0x07

1st

Instruction

2nd Instruction

Page 4: EET  4250

EET 4250: Microcomputer Architecture 4

Branch Addressing – Byte Offset

• Simplified branch ADDR field– If immediate field is 3 bits

instead of 16• Case 2: ADDR is a byte-offset

from PC– PC is 32 bits = 232 addresses– Branch can go PC ± 22 bytes = PC

± 4 bytes = PC ± 1 instructions!!

PC – 4 bytes

PC 0x????

PC + 4 bytes

1st

Instr.

2nd Instr.

Any of the 232

addresses

Page 5: EET  4250

EET 4250: Microcomputer Architecture 5

Branch Addressing – Word Offset

• Simplified branch ADDR field– If immediate field is 3 bits

instead of 16• Case 3: ADDR is a word-offset

from PC– PC is 32 bits = 232 addresses– Branch can go PC ± 22 words = PC

± 16 bytes = PC ± 4 instructions!!

PC -16 bytes PC – 4 Instr

PC – 3 Instr

PC - 2 Instr

PC – 4 bytes PC - 1 Instr

PC 0x????PC + 4 bytes PC + 1 Instr

PC + 2 Instr

PC + 3 Instr

Pc + 16 bytes PC + 4 Instr

Page 6: EET  4250

EET 4250: Microcomputer Architecture 6

Branch Instructions

Justre-routes wires

Sign-bit wire replicated

Page 7: EET  4250

EET 4250: Microcomputer Architecture 7

Composing the Elements

• First-cut data path does an instruction in one clock cycle– Each datapath element can only do one function

at a time– Hence, we need separate instruction and data

memories• Use multiplexers where alternate data sources

are used for different instructions

Page 8: EET  4250

EET 4250: Microcomputer Architecture 8

R-Type/Load/Store Datapath

Page 9: EET  4250

EET 4250: Microcomputer Architecture 9

Full Datapath