eel-4746 microprocessor-based system design
DESCRIPTION
EEL-4746 Microprocessor-based System Design. Fall 2004 Semester Dr. Michael P. Frank. Announcements. Announcements FSU First-Day Mandatory Attendance Policy ECE Course Prerequisite Policy ECE Academic Dishonesty Policy Today’s Agenda. Today’s Agenda. - PowerPoint PPT PresentationTRANSCRIPT
EEL-4746 EEL-4746 Microprocessor-based Microprocessor-based
System DesignSystem Design
Fall 2004 SemesterFall 2004 Semester
Dr. Michael P. FrankDr. Michael P. Frank
AnnouncementsAnnouncements
AnnouncementsAnnouncements
FSU First-Day Mandatory Attendance PolicyFSU First-Day Mandatory Attendance Policy
ECE Course Prerequisite PolicyECE Course Prerequisite Policy
ECE Academic Dishonesty PolicyECE Academic Dishonesty Policy
Today’s AgendaToday’s Agenda
Today’s AgendaToday’s Agenda
EEL-4746 Course Outline and ObjectivesEEL-4746 Course Outline and Objectives EEL-4746 Best PracticesEEL-4746 Best Practices EEL-4746 Software DistributionEEL-4746 Software Distribution Design MethodologyDesign Methodology Design AbstractionDesign Abstraction EEL-4746 Microprocessor-based System EEL-4746 Microprocessor-based System
DesignDesign Review of Digital Logic DesignReview of Digital Logic Design
Course Outline and Course Outline and ObjectivesObjectives
4746 Best Practices4746 Best Practices
Or, How do you get an A in this Or, How do you get an A in this class?class?
Definition:Definition:System Design ProcessSystem Design Process
Requirements SpecificationRequirements Specification
ConceptualizationConceptualization
AnalysisAnalysis
SynthesisSynthesis
VerificationVerification
DocumentationDocumentation
Iteration
4746: System Design Process4746: System Design ProcessRequirements SpecificationRequirements Specification Given by me: HW, Project, Exam, etc. Given by me: HW, Project, Exam, etc.
ConceptualizationConceptualization Developed by you and your groupDeveloped by you and your group
Iteration Design CycleIteration Design CycleWrite ProgramWrite ProgramCompile ProgramCompile ProgramDebug Compilation ErrorsDebug Compilation ErrorsExamine output resultsExamine output resultsDebug Logical ErrorsDebug Logical ErrorsExamine hardware resultsExamine hardware resultsDebug Hardware ErrorsDebug Hardware Errors
Iteration
4746: System Design Process4746: System Design Process
DocumentationDocumentation ““Digitally dropped” into Blackboard Site Digitally dropped” into Blackboard Site
This could take one hour or thirty hours dependingon your skills. I will help you avoid “landmines”
Homework AssignmentsHomework Assignments
Two weeks to complete an assignmentTwo weeks to complete an assignment No excuse for: network down, printer out of toner, No excuse for: network down, printer out of toner,
computer locks up, etc.computer locks up, etc.
HW assignments will “overlap”HW assignments will “overlap” Average one assignment due every 1 ½ weeks.Average one assignment due every 1 ½ weeks.
HW’s will build upon one anotherHW’s will build upon one another You may use solutions from previous HW’sYou may use solutions from previous HW’s
Homework assignments will be customizedHomework assignments will be customized Solutions will be given for a “general” problemSolutions will be given for a “general” problem
You must have You must have workingworking program for full credit program for full credit
Homework AssignmentsHomework Assignments
HW’s are “self-correcting” for the “right answer”. HW’s are “self-correcting” for the “right answer”. I’ll check for the “correct” solution.I’ll check for the “correct” solution.
HW must be HW must be onon time time Digital Drop Box (time stamped)Digital Drop Box (time stamped) Both you and your partner must digitally submitBoth you and your partner must digitally submit Only one copy of handwritten notes needed.Only one copy of handwritten notes needed.
Design ProjectsDesign Projects
Design projects DO NOT replace regular Design projects DO NOT replace regular homework assignments.homework assignments. You may have both due during the same You may have both due during the same
week.week.
Hardware MUST work for more than ½ Hardware MUST work for more than ½ creditcredit
QuizzesQuizzes
Designed to “keep you awake.”Designed to “keep you awake.”
Mostly group quizzes Mostly group quizzes
Some individual quizzes Some individual quizzes
No make-up quizzes will be givenNo make-up quizzes will be given Used to monitor attendanceUsed to monitor attendance I will drop the three lowest quiz gradesI will drop the three lowest quiz grades
Course NotesCourse Notes
All slides will be available onlineAll slides will be available online
Exam, HW, and Quiz solutions onlineExam, HW, and Quiz solutions online
EEL-4746EEL-4746Best PracticesBest Practices
Keep up with the course!!!Keep up with the course!!!Complete the Assignments!!!Complete the Assignments!!! You will be allowed to work in groups, butYou will be allowed to work in groups, but
EEL-4746EEL-4746Best PracticesBest Practices
The The onlyonly way to learn way to learn to code in Assembly to code in Assembly
Language is to Language is to codecode in in Assembly Language.Assembly Language.
In other words,In other words,practice makes practice makes
perfect.perfect.
EEL-4746Best Practices
4746 Software 4746 Software DistributionDistribution
THRSIM11THRSIM11
MS Windows based 68HC11 simulatorMS Windows based 68HC11 simulator Text EditorText Editor Cross AssemblerCross Assembler DisassemblerDisassembler Software SimulatorSoftware Simulator
Simulate HardwareSimulate Hardware Target Board DownloaderTarget Board Downloader Target Board Terminal InterfaceTarget Board Terminal Interface
THRSIM11THRSIM11
Site license for FAMU-FSU COE studentsSite license for FAMU-FSU COE students
Download program self-extracting archive Download program self-extracting archive from course webpagefrom course webpage Under “Course Library”Under “Course Library”
Request License File from ECE websiteRequest License File from ECE website Must make request from FAMU or FSU email Must make request from FAMU or FSU email
domain.domain. Cannot give license file to another student!Cannot give license file to another student!
Design MethodologyDesign Methodology
Definition: Definition: Engineering Design Engineering Design
MethodologyMethodology
A systematic approach to achieve the A systematic approach to achieve the desired goal of a solution to the problem desired goal of a solution to the problem (i.e. a working design) using proven (i.e. a working design) using proven principles or practices.principles or practices.
You must follow our 4746 design You must follow our 4746 design methodology to get full credit. methodology to get full credit.
“Right Answers”
Design MethodologyDesign Methodology
“Best Practices Solution”
Violates “Best Practices”
“Right answer” but not correct solution.
Design AbstractionDesign Abstraction
How do we “describe” a system?How do we “describe” a system?
Design AbstractionDesign Abstraction
Example: Design a “system” which will complement input A
AF(x)
where A and Y are single bit values
AA YY
00 11
11 00
We can “describe” this design using a logical Truth Table
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Our goal in ECE is physical or hardware implementationsof the design.
In ECE, we “design” at several levels of “abstraction”
Design
Specs
a11
a22
3a3
4a4
b1
b2
b3
b4
5
6
7
8
Vcc1
0
GND
0
Hard-ware
DesignProcess
Levels of Design AbstractionLevels of Design Abstraction
System Level: EEL-4746 (M68HC11)
A ASMCode
M68HC11 Assembly Language:
COMA ; Complement A STAA Y ; Store Accumulator A at Y
Example: Design a “system” which will complement input A
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Behavioral Level: EEL-4712
ANot A
VHDL code:
Y <= not A;
Example: Design a “system” which will complement input A
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Gate Level: EEL-3705 Digital Logic Design
A
InverterSymbol
Example: Design a “system” which will complement input A
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Circuit Level: EEL-3300 Electronics I
A
CMOS Technology
Example: Design a “system” which will complement input A
Vdd PFET
NFET
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Digital IC Design: EEL-4313 Digital IC Design
A
CMOS Technology
Example: Design a “system” which will complement input A
VDD GND
Y = A
Levels of Design AbstractionLevels of Design Abstraction
Fabrication Level: EEL-4330 Microelectronics Eng
NWELL
N+ N+P+P+
PSUB
Summary of LevelsSummary of Levels
““System”System”: : Assembly LanguageAssembly Language
BehavioralBehavioral: : VHDLVHDL
LogicalLogical: : GatesGates
Electronic CircuitElectronic Circuit: : TransistorsTransistors
Integrated CircuitIntegrated Circuit: : IC LayoutIC Layout
FabricationFabrication: : IC ProcessingIC Processing
SummarySummary
All “levels” give you the All “levels” give you the samesame result. result.
We will learn how to use the “system” We will learn how to use the “system” level to its highest degree of level to its highest degree of effectiveness.effectiveness.
EEL-4746 EEL-4746 Microprocessor-based System Microprocessor-based System
DesignDesign
Begin Actual Course MaterialBegin Actual Course Material
Basic Computer SystemBasic Computer System
CPUMemoryI/O
Interface
BUS
CPU: Central Processor UnitI/O: Input/OutputMemory: Program and DataBus: Address signals, Control signals, and Data signals
To I/O
Microprocessor-Based SystemMicroprocessor-Based System
CPUMemoryI/O
Interface
BUS
Microprocessor e.g. Pentium 4
To I/O
CPU: Central Processor UnitI/O: Input/OutputMemory: Program and DataBus: Address signals, Control signals, and Data signals
Microcontroller-Based SystemMicrocontroller-Based System
CPUMemoryI/O
Interface
BUS
Microcontroller e.g. M68HC11
To I/O
CPU: Central Processor UnitI/O: Input/OutputMemory: Program and DataBus: Address signals, Control signals, and Data signals
(Although a microcontroller may access external memory as well.)
EEL-4746EEL-4746M68HC11 Micro-controller Design
M68HC11INPUTDevices
OutputDevices
AssemblyLanguage
Code
We will learn to writeM68HC11 Assembly LanguageCode