ee141 - fall 1999 introduction to digital integrated...

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EE241 1 1 EE141 EE141 - Fall 1999 Introduction to Digital Integrated Circuits Tu-Th 9:30 - 11:00 am 203 McLaughlin 2 EE141 What is this class about? Introduction to digital integrated circuits. l CMOS devices and manufacturing technology. CMOS inverters and gates. Propagation delay, noise margins, and power dissipation. Regenerative logic circuits. Arithmetic, interconnect, and memories. Programmable logic arrays. Design methodologies. What will you learn? l Understanding, designing, and optimizing digital circuits with respect to different quality metrics: cost, speed, power dissipation, and reliability

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Page 1: EE141 - Fall 1999 Introduction to Digital Integrated Circuitsbwrcs.eecs.berkeley.edu/Classes/icdesign/ee141_f99/Notes/lecture1.… · Std. Cell 10 27 1.5 Gate Array 5 18 1 Single-Mask

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EE141 - Fall 1999Introduction to Digital

Integrated Circuits

Tu-Th 9:30 - 11:00 am203 McLaughlin

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What is this class about?

Introduction to digital integrated circuits.l CMOS devices and manufacturing technology. CMOS inverters

and gates. Propagation delay, noise margins, and powerdissipation. Regenerative logic circuits. Arithmetic, interconnect,and memories. Programmable logic arrays. Designmethodologies.

What will you learn?l Understanding, designing, and optimizing digital circuits with

respect to different quality metrics: cost, speed, powerdissipation, and reliability

Page 2: EE141 - Fall 1999 Introduction to Digital Integrated Circuitsbwrcs.eecs.berkeley.edu/Classes/icdesign/ee141_f99/Notes/lecture1.… · Std. Cell 10 27 1.5 Gate Array 5 18 1 Single-Mask

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Practical Informationl Instructors:

» Jan Rabaey511 Cory Hall , 3-8206, [email protected] hours: Mo 1:30-3pm (231 Cory); Tu 11-12:30pm (511 Cory)

» Bora Nikolic570 Cory Hall , tbd, [email protected] hours: Mo 11-12:30pm; We 2-3:30pm

l TAs:» Rhett Davis, [email protected] - Office hours: W 12:30-2pm (297 Cory)» Vikram Shenoy, [email protected] - Office hours: (297 Cory)» David Wang, [email protected] - No Office Hours» Englin Yeo, [email protected] - Office hour: M 5-6:30pm (297 Cory)

l “The Paperless Class”http:”//infopad.eecs.berkeley.edu/~icdesign/ee141”

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Discussions & Labs

l Discussion Sessions - flexible assignment» M 4-5pm; 405 Davis; Englin Yeo;

» W 4-5pm 285 Cory; Rhett Davis;

l Labs - 353 Cory!» Tu 3-6 pm (TBA),

» We 11-2 pm (TBA),

» Th 3-6 pm (TBA),

» Fr 11-2pm (TBA)

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Class Organization

l+/- 10 assignmentslOne Integrated Design Project with 2

deliverableslLaboratories:

» 7 software labs» 2 hardware labs

l2 midterms; 1 final» midterm1: Th 9/23; midterm2: Th 10/29» final: Fr 12/10 (8-11am)

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Grading Policy

lHomeworks: 10%lLabs: 10%lProjects: 20%lMidterms: 30%lFinal: 30%

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Class Material

l Textbook: “Digital Integrated Circuits - A DesignPerspective”, by J. Rabaey

l Class notes: Web page (New stuff!) +http://infopad.eecs.berkeley.edu/~icdesign/instructors.html

l Lab Reader;Available on the web page!Selected material will be made available fromCopy Central

l Check web page for the availability of tools

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New Software

lMicromagic “max” and “sue”» A modern version of the good ol’ magic» On-line documentation and tutorials

lHSPICE and IRSIM for simulation

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Getting Started

lAssignment 1: Getting SPICE to work -see web-page

lNO discussion sessions or labs thisweek.

lFirst discussion sessions in Week 2lFirst Software Lab in Week 3

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Digital Integrated Circuits

l Introduction: Issues in digital designl The inverter - CMOSl Combinational logic structuresl Sequential logic gates; timingl Arithmetic building blocksl Interconnect: R, L and Cl Memories and array structuresl Design methods

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Introduction

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The First Computer

The BabbageDifference Engine(1832)25,000 partscost: £17,470

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ENIAC - The first electronic computer(1946)

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The Transistor Revolution

First transistorBell Labs, 1948

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The First Integrated Circuits

Bipolar logic1960’s

ECL 3-input GateMotorola 1966

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Evolution in Complexity

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Evolution in Transistor Count

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Evolution in Speed/Performance

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Major challenges in digital design

lThe large» Complexity

lAnd the small» Very-high speed design (> 1 GHz)» Power dissipation» Interconnect» Clocking

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Intel 4004 Micro-Processor

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Intel Pentium (II) microprocessor

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Silicon in 2010

Die Area: 2.5x2.5 cmVoltage: 0.6 VTechnology: 0.07 µm

Density Access Time(Gbits/cm2) (ns)

DRAM 8.5 10DRAM (Logic) 2.5 10SRAM (Cache) 0.3 1.5

Density Max. Ave. Power Clock Rate(Mgates/cm2) (W/cm2) (GHz)

Custom 25 54 3Std. Cell 10 27 1.5

Gate Array 5 18 1Single-Mask GA 2.5 12.5 0.7

FPGA 0.4 4.5 0.25

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The Challenge

Source: sematech97

A growing gap between design complexity and design productivity

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Design Abstraction Levels

n+n+S

GD

+

DEVICE

CIRCUIT

GATE

MODULE

SYSTEM