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ECEN 689 High-Speed Links Circuits and Systems

Lab6 – Stateye Link Modeling

Objective To learn link noise budgeting and usage of Stateye to model high speed I/O link circuits.

Introduction Figure 1 shows a high-speed electrical link using TX FFE equalization and RX CTLE+DFE equalization. Before the schematic level circuit design, in order to save time, engineers use link modeling tools to investigate the circuit performance in terms of BER, eye opening, bathtub, etc. In system level, Stateye can be used to estimate the link performance through using statistical methodology in combined with the full s-parameter channel and crosstalk models. Stateye is initially developed by Anthony Sanders and Edoardo Prete from Infineon in 2004. It features TX FFE and RX DFE, supports two, four port S parameters, adds RJ & DJ, and supports crosstalk aggressors. Plus, it is open source!

Figure 1 High-Speed Electrical Link with Equalization Schemes

Power Supply Noise Power supply is one of the largest noise sources in a typical digital system. Insufficient supply grid and fast switching circuit may cause IR drop and dI/dt noise. Power supply noise can affect signaling in many ways. It may cause signals to fall outside the receiver operating range due to common-mode voltage shifts between supplies. It may corrupt the signals that use a power supply as a voltage reference. Local power supply variation may result in transmitter and receiver offsets and jitter. Figure 2 shows an example of finite supply impedance. The supplies seen by the inverter are no longer the ideal voltage. Instead, parasitic resistance and inductance are inserted into the supply distribution network.

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Figure 2 Finite Supply Impedance

System Noise and Jitter Budget During link design, signal swing and data rate are budgeted against noise sources both bounded and unbounded. For the bounded noise, in most digital system design, worst-case analysis is used. All bounded noise sources are added simultaneously at the worst possible extreme value.

𝑠𝑦𝑠𝑡𝑒𝑚 𝑡𝑜𝑡𝑎𝑙 𝑛𝑜𝑖𝑠𝑒𝑏𝑜𝑢𝑛𝑑𝑒𝑑 = �𝑛𝑜𝑖𝑠𝑒𝑏𝑜𝑢𝑛𝑑𝑒𝑑𝑖

(𝑖) (1)

For the unbounded noise, statistical noise analysis is applied to estimate the probability distributions of the statistical noise sources. When considering unbounded Gaussian noise sources (normal distribution), several Gaussian noise sources can be combined into a single noise source through summing the variance of each source and taking the square root of it as follows:

𝜎𝑅𝑀𝑆(𝑠𝑦𝑠) = ��𝜎𝑅𝑀𝑆2

𝑖

�0.5

(2)

During the system jitter budget, for a system to achieve a minimum BER performance, the total jitter should be less than one UI as follows

𝑈𝐼 ≥ 𝐷𝐽𝛿𝛿(𝑠𝑦𝑠) + 𝑄𝐵𝐸𝑅𝜎𝑅𝑀𝑆(𝑠𝑦𝑠) (3)

where 𝐷𝐽𝛿𝛿(𝑠𝑦𝑠) is the total deterministic jitter. Q is calculated from BER. The following tables show the example of system jitter budgeting.

For the noise budget calculation, please refer to our lecture notes.

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Near- and Far-End Cross Talk The capacitive and inductive coupling between lines A and B results in cross talk at both ends of line B. The example is shown in Figure 3. Assuming, a step signal is generated on line A at point u. It propagates to the receiver side point v. The signal is couple to line B from x to y. The forward-traveling wave on line B induced by line A arrives at point z at the far end of line B. So it is called Far-End Cross Talk (FEXT). The reverse-traveling wave induced on line B arrives at point w at the near end of line B. Thus, it is called NEXT.

Figure 3 Line Geometry (up) and Waveforms (down) for Cross Talk Example

Stateye Download and Installation Stateye can be downloaded through the official website: http://www.stateye.org/ It is compatible with Windows XP, Vista, and 7 in both 32-bit and 64-bit. Matlab is required to run the scripts generated by Stateye. Matlab 2007, 2008, and 2010 are tested to be compatible with the scripts. Matlab 2009 may not be compatible with the script (not verified by the author). Stateye V 4.2 is the latest version as shown in Figure 4 Stateye V.4.2 full installer package.

Figure 4 Stateye V.4.2 full installer package

Download Channel Models Stateye supports 2, 4 ports S parameter channel models. For this lab, please download all channel models and save into three separate folders.

1. Download 20” backplane channel: OPTION2, FEXT1, and NEXT1 from the course website: http://www.ece.tamu.edu/~spalermo/ecen689_spring2010.html

2. Download Molex Case 2 25” FR408 Backplane channel with backdrilled and moderate crosstalk from http://www.t11.org/ftp/t11/models/index.html

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3. Download Stateye V.4.1 testcase from http://www.stateye.org/stateyev4/index.html as shown in Figure 5.

Figure 5 Stateye V.4.1 Testcase S-matrix

What are installed? In your windows start menu, you are expected to find three Stateye apps as shown in Figure 6.

1. Stateye-GUI is the main simulator interface window. It can be used to set channel configuration, TX/RX equalization, noise, and type of analysis.

2. Smatrix-Helper is used to generate channel models command batch files in XML format from channel S-parameters. Since it is a helper, its functions can be fully realized through Stateye-GUI directly.

3. CBF-Elaborator is used to convert Stateye generated XML files into Matlab .m files. This function is also integrated into Stateye-GUI.

Figure 6 Stateye V.4.2 in Windows Start Menu

Example In this example, a simple Stateye modeling simulation will be performed at 5Gb/s. 25” FR408 Backplane channel with crosstalk aggressors are used as the channel. 2 Taps TX FFE and 5 Taps RX DFE are used for equalization. Channel frequency response, link bathtub, and eye diagram will be plotted. Optimized TX FFE taps and DFE taps will be generated. The example will guide you step by step through the setup of a complete Stateye simulation.

Create touchstone files through Stateye Helper In your Windows start menu, please open Stateye Smatrix-Helper V.4.2.3.

Add channels

In this window, add the thru channel S-parameter (Molex_Case2_T.s4p) as the forward file and add the crosstalk aggressors NEXT (Molex_Case2_N1.s4p) and FEXT (Molex_Case2_F1.s4p) as the crosstalk files. In stateye, multiple crosstalk aggressor S-parameters can be added at the same time.

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Port Mapping

Make sure that the channel ports are mapped correctly. • Victim transmitter is (1.2) • Victim receiver is (5,6) • Aggressor transmiiter is (3,4) • Aggressor receiver is (7,8) • NEXT or FEXT to Victim RX is (3,4) to (5,6) • Aggressor’s RX to Victim RX is (7,8) to (5,6)

Filters

Passive linear filters can be added at both TX and RX side. At the TX side, the filter is to create the effective low pass output filtering of the transmitter. At the RX side, the filter is to create a simple pole to limit the bandwidth or to create a CTLE with pole and zero. Also, the filter can be dimensioned to create a non-ideal return loss. Please refer to [2] page 23 for details. In this simulation, the filter is set to have a pole at 0.75x(baud rate) which is -8dB return loss at 0.75 times the baud rate.

Generate XML

Click on Generate XML and save all files (Smatrix and Channel fragments) into the fold where the channels are located. Smatrix helper will ask if you wish to copy OIF templates to the directory. Please choose “yes”. You are expected to see the files as shown in Figure 1 after using SmatrixHelper. Now you may close the Helper.

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Figure 7 Smatrix Helper

Figure 6 Files after Smatrix Helper

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Stateye-GUI V.4.2.3 Setting Stateye–GUI can be opened from Windows Start menu. The OIF_analysis file (generated from Helper) can be loaded into the GUI as shown in Figure 8. At this moment, the Stateye is loaded with the 25” FR408 channel S-parameters.

Figure 8 Loading OIF_analysis.xml into Stateye GUI

Settings &options

In Output data options, you can set the output format in .txt or .cvs. which is shown in Figure 9.

Figure 9 Output data options

As shown in Figure 10, please set the flip eye and eye compliance mask to True.

Figure 10 Output graphic option

Transmitter objects

In this section, TX equalization can be setup with a single pre or post tap or both pre and post tap, with <=6dB of emphasis and with infinite precision accuracy. The emphasis taps will be optimized within the given range and resolution. In the example, 6G long range transmitter objects are used as shown in Figure 11.

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Figure 11 Transmitter Objects

Stateye templates

CEI-11G-LR, CEI-11G-SR, CEI-6G-LR and CEI-6G-SR are the templates given by Stateye. Their basic specs are given in Table 1. CEI6GLR is chosen for this example.

Table 1 Stateye Template Basic

Support Data Rate Capable of driving Support coupling

CEI-11G-LR 9.95G~11.1G 0~39" AC/DC CEI-11G-SR 9.95G~11.1G 0~7.9" AC/DC CEI-6G-LR 4.976G~6.375G 0~39" AC/DC CEI-6G-SR 4.976G~6.375G 0~7.9" AC/DC

Smatrix objects and Channel objects

Smatrix and channel objects are setup through the helper in the previous section. There is no need to make change in this example.

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Receiver objects

CEI6GLR_RX object is used in this section as shown in Figure 12. When CDR is enable, the center of the eye is determined by finding the mean of the edge distributions, I e. bathtub. This is somewhat like how a real CDR works. When CDR is disabled, the eye center is found through the maximum eye of the eye. The BER is the target bit error rate for the link. In this example, it is 1e-12. Depending on your DFE design, number of DFE taps can be chosen. Eye and Jitter compliance are used to decide on the link standard compliance at the end of an analysis run. Eye and jitter compliance settings do NOT influence the analysis. DFE equalization will be performed and based on the number of DFE taps chosen. The tap weights chosen by Stateye will be shown in the final simulation results.

Figure 12 Receiver objects

Jitter objects

This function as shown in Figure 13 is used to introduce deterministic jitter and random jitter into the link system. The jitter can be specified in percentage per UI. 2x7.04 is the Q value for 1e-12 BER. These values can be estimated through system jitter budgeting.

Figure 13 Jitter objects

Analysis Runs

The function of Analysis runs is equivalent to Cadence’s Analog Environment, where it controls the simulation setup and simulation variables. The simulation will perform on the chosen

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templates. Multiple analysis runs can be chosen at the same time. Screen shot of Analysis runs is shown in Figure 14.

• Baudrate: Specify link data rate for simulation • Jitter: Choose the jitter object chosen in the previous section • Composition elements: Choose the components from the TX. RX and Channel objects.

Feel free to make any combination needed. • Cursors: the number of post-cursors and precursors is used in the actually simulation. For

example, in this case, the analysis will consider 90 post-cursors during the simulation.

Figure 14 Analysis Runs

Validate and Elaborate

Here validate is equivalent to Cadence’s schematic Check & Save. The setting must pass this validation before elaboration. Screen shot is shown in Figure 15.

Figure 15 Stateye GUI Validation

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Elaboration is used to generate Matlab .M file for final simulation. .M file can be saved to the channel folder. The simulation output will be saved in the same folder. .M file can be run on Matlab 2007 and 2008.

Figure 16 Stateye Elaboration

Figure 17 Save Stateye Elaboration Results

Simulation Results

After running .M code through Matlab, a set of simulation results will be saved into the output directory. In the result, it shows the optimized TX FFE taps, eye height, DFE tap weights, bathtub, eye diagram, etc.

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Figure 18 Simulation Results

Figure 19 Simulation Eye diagram and Bathtub

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Pre-Lab 1. In digital circuit design, there are many switching signals. Finite supply impedance

causes switching output noise. Please build a circuit shown in Figure 20 with supply inductance and decoupling cap. Please use Case 1:CLK and Case 2: 7 bits PRBS as the input sources. CLK frequency is set to be 2.5GHz with 30ps rise/fall time. PRBS date rate is 5Gb/s with 30ps rise/fall time. Please plot the output eye diagrams. Compare the results with the case having ideal supply (zero supply impedance, please remove all parasitics).

Figure 20 Finite Supply Impedance Simulation

2. Please complete the noise and jitter budget tables.

Table 2 Noise Budget (V)

Parameter Kn RMS Value (BER=10^-12) Peak Differential Swing

1

RX Offset+Sensitivity

0.005 Power Supply Noise

0.005

Residual ISI 0.02

? Crosstalk 0.02

?

Random Noise

0.001 ? Attenuation 0.9

?

Total Noise

? Differential Eye Height Margin

?

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Table 3 Jitter Budget (ps)

Component (BER=10^-12) RJ DJ TJ TX+PLL 1.07 10 ?

Channel 1.6 26.5 ? RX+CDR 1.6 10 ? RSS TJ ? ? ?

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Questions

1. Please use Stateye to analysis the following test cases. The channel diagram is shown in Figure 21. Please use CEI11GSR template at 11.1Gb/s. Please refer to [4] for step-by-step guide. Please show eye diagrams, bathtub, optimized FFE taps, and optimized DFE taps.(the optimized taps info is located in your simulation result directory)

Case 1: Only the forward channel (through channel) without any cross talk. Case 2: Use the forward channel with an aggressor terminated with a real load. Case 3: Use the forward channel with a real termination cascaded by TX and RX filters. Case 4: Use the forward channel with an ideally terminated aggressor with additional real load at the aggressor’s receiver.

Channel Models:

1. Victim_Fw.S4P 2. NEXT_Rx.S4P 3. FEXT.S4P 4. Crosstalk)Com.S4P 5. Aggressor_Fw.S4P 6. Real_Load.S2P

Figure 21 Stateye Test Case [4]

2. Please use Stateye to model 10Gb/s link with 20” channel with crosstalk aggressors

(NEXT & FEXT). You may use TX FFE with 0.025 tap resolution and RX DFE with max 5 taps. You may design your own CTLE in RX filter object. Please also include TX filters.

• Duty cycle distorition (DCD)=0.05 • Deterministic jitter (DJ)=0.10 UI • Random jitter (RJ)=0.10/(Q) where Q is calculated based on BER=1e-12 • Postcursors=90 • Precursors=4

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Please show eye diagrams and bathtub in the following cases in Table 4. Plot the eye heights vs. Case # at BER of 1e-12. Please use the following channel S-parameters (download from course website)

Table 4 Test Cases

TX FFE RX case 1 1 Pre 2 Taps DFE case 2 1 Post 1 Taps DFE case 3 1 Pre CTLE+1 Taps DFE case 4 1 Post CTLE+1 Taps DFE case 5 1 Pre-1 Post 1 Taps DFE case 6 1 Pre-1 Post 3 Taps DFE case 7 1 Pre-1 Post 5 Taps DFE

• If TX FFE does not converge, please use TX-CEI-11G-SR for TX FFE template for ALL test cases.

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Reference [1] Digital Systems Engineering, W. Dally and J. Poulton, Cambridge University Press, 1998. [2] http://www.stateye.org/stateyev4/stateye_documentation.pdf

[3] Common Electrical I/O (CEI) Electrical and Jitter Interoperability agreements for 6G+

bps and 11G+ bps I/O IA # OIF-CEI-02.0 28th February 2005 in

http://www.stateye.org/stateyev4/index.html

[4] http://www.stateye.org/stateyev4/stateye_testcase_doc.pdf

[5] Advanced Signal Integrity for High-Speed Digital Designs, S.H.Hall and H.L. Heck,

Wiley, 2009