ece291 computer engineering ii lecture 3
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ECE291 Computer Engineering II Lecture 3. Dr. Zbigniew Kalbarczyk University of Illinois at Urbana- Champaign. Outline. Programming with registers Instruction components and format Addressing modes Sampling of addressing modes. Programming Model Registers. Note: 32 bit registers are - PowerPoint PPT PresentationTRANSCRIPT
ECE291Computer Engineering II
Lecture 3
Dr. Zbigniew Kalbarczyk
University of Illinois at Urbana- Champaign
Z. Kalbarczyk ECE291
Outline
• Programming with registers
• Instruction components and format
• Addressing modes
• Sampling of addressing modes
Z. Kalbarczyk ECE291
Programming ModelRegisters
Note:32 bit registers are not available on 8086, 8088, 80286
Z. Kalbarczyk ECE291
Programming with RegistersGeneral-Purpose Registers
• AX(accumulator) often holds the temporary result after an arithmetic and logic operation (also addressed as EAX, AH, or AL)
• BX (base) often holds the base (offset) address of data located in the memory (also addressed as EBX, BX, BL)
• CX (count) contains the count for certain instructions such as shift count (CL) for shifts and a counter (CX or ECX) with the LOOP instruction (also addressed as ECX, CH, or CL)
• DX (data) holds
– the most significant part of the product after a 16- or 32-bit multiplication,
– the most significant part of the dividend before a division, and
– I/O port number for a variable I/O instruction (also addressed as EDX, DH, DL)
Z. Kalbarczyk ECE291
Programming with Registers Pointer and Index Registers
• SP (stack pointer) used to address data in a LIFO (last-in, first-out) stack memory, most often used when
– the PUSH and POP instructions are executed
– a subroutine is CALLed or RETurned within a program
• BP (base pointer) often used to address an array of data in the stack memory
• SI (source index) used to address source data indirectly for use with the string instructions
• DI (destination index) normally used to address destination data indirectly for use with the string instructions
• IP (instruction pointer) always used to address the next instruction executed by the microprocessor
Z. Kalbarczyk ECE291
Programming with Registers Flag Register
• Flags indicate the condition of the microprocessor as well as its operation
• The flag bits change after many arithmetic and logic instructions execute
• Example flags,
– C(carry) indicates carry after addition or a borrow after subtraction
– O(overflow) is a condition that occurs when signed numbers are added or subtracted
– Z(zero) indicates that the result of an arithmetic or logic operation is zero
– T(trap) when the trap flag is set , it enables trapping through the on-chip debugging feature
Z. Kalbarczyk ECE291
Programming with Registers Segment Registers
• CS(code) defines the starting address of the section of memory-holding code(programs and procedures used by programs)
• DS(data) a section of memory that contains most data used by a program
• ES(extra) an additional data segment
• SS(stack) defines the area of memory used for the stack.
– the location of the current entry point in the stack segment is determined by the stack pointer register.
– the BP register addresses data within the stack segment
• FS and GS available on 80386 and 80486 allow two additional memory segments for access by programs
Z. Kalbarczyk ECE291
Machine Language
• Machine language is the native binary code that the microprocessor understands and uses as the instructions that control its operation
• Interpretation of machine’s language allows debugging or modification at the machine language level
• Microprocessor requires an assembler program, which generates machine code
– the machine language instructions are too complex to generate by hand
• Machine language instructions for the 8086-80486, vary in length from 1 to as many as 13 bytes
– there are over 20000 variations of machine language instructions
Z. Kalbarczyk ECE291
Machine Language (cont.)
• 16 -bit instruction mode
– if the machine operates in the real mode the instructions for Intel family of microprocessors are 16 -bit instructions
– this means that instructions use 16-bit offset address and 16-bit registers
• In the protected mode the D bit in the descriptor (within a look-up table of descriptors) indicates how the 80386/80486 instructions access register and memory data in the protected mode
– D = 0, the 80386/80486 assumes 16 bit instructions
– D = 1, the 80386/80486 assumes 32 bit instructions
• the 32-bit instruction mode assumes all offset addresses are 32 bits as well as all registers
Z. Kalbarczyk ECE291
Instruction Components and Format
Instruction Components
Opcode Mode Displacement DataImmediate value
Z. Kalbarczyk ECE291
Addressing Modes
• Register - transfers a byte or word from the source register or memory location to the destination register or memory location
MOV BX, CX
• Immediate - transfers an immediate byte or word of data into the destination register or memory location
MOV AX, 3456h
• Direct - moves a byte or word between a memory location and a register
MOV AL, [1234h] (1234h is treated as a displacement within data segment)
Z. Kalbarczyk ECE291
Addressing Modes(cont.)
• Register Indirect (base relative or indexed) - transfers a byte or word of data between a register and the memory location addressed by an index (DI or SI) or base register (BP or BX)
MOV AX, [BX]
• Base Plus Index (base relative indexed) - transfers a byte or word of data between a register and the memory location addressed by a base register (BP or BX) plus index (DI or SI) register
MOV DX, [BX + DI]
Z. Kalbarczyk ECE291
Addressing Modes(cont.)
• Register Relative - transfers a byte or word of data between a register and the memory location addressed by an index (DI or SI) or base register (BP or BX) plus displacement
MOV AX, [BX + 1000h]
• Base Relative Plus Index (base relative indexed) - transfers a byte or word of data between a register and the memory location addressed by a base register (BP or BX) plus an index register (DI or SI)
MOV AX, [BX + SI + 100h]
Z. Kalbarczyk ECE291
Instruction ComponentsOPCODE
• Opcode (one or two bytes) selects the operation (e.g., addition, subtraction, move) performed by the microprocessor
D W
OPCODE
D - direction of the data flow D = 0 data flow to R/M field from register field D = 1 data flow to the register field from R/M in the next byte of the instruction
W - data size W = 0 data size is a byte W = 1 data size is a word/double word
Z. Kalbarczyk ECE291
Instruction ComponentsMOD
• MOD field specifies the addressing mode for the selected instruction and whether the displacement is present with the specified addressing mode
• If the MOD filed contains a 00, 01, or 10, the R/M filed selects one of the data memory-addressing modes, e.g.,
– MOV AL, [DI] (no displacement)
– MOV AL, [DI + 2] (8-bit displacement)
MOD REG R/M
MOD FUNCTION
00 no displacement01 8-bit sign-extended displacement10 16-bit displacement 11 R/M is a register (register addressing
mode)
Z. Kalbarczyk ECE291
Instruction ComponentsREG & R/M in Register Assignment
Register assignment for the REG and R/M fields
Code W = 0 (Byte) W = 1(Word) W =1 (Double Word)
000 AL AX EAX001 CL CX ECX010 DL DX EDX011 BL BX EBX100 AH SP ESP101 CH BP EBP110 DH SI ESI111 BH DI EDI
Z. Kalbarczyk ECE291
Register AssignmentExample
• Consider 2 byte instruction 8BECh in the machine language program (assuming 16-bit instruction mode)
binary representation: 1000 1011 1110 1100, from this we have
opcode: 100010 => MOV
D = W 1 => a word moves into the register specified in the REG field
REG 101 => indicates register BP
MOD 11 => R/M filed also indicates register
R/M 100 => indicates register SP
consequently the instruction is: MOV BP, SP
Z. Kalbarczyk ECE291
Use of R/M Filed in Determining Addressing Mode
• If the MOD field contains a 00, 01, or 10, the R/M field takes on a new meaning
• Examples:
1. if MOD = 00 and R/M = 101
the addressing mode is [DI]
2. if MOD = 01 or 10 and R/M = 101
the addressing mode is
[DI + 33h] or LIST[DI + 22H],
where 33h, LIST, 22h are arbitrary values
for displacement
Code Function
000 DS:[BX+SI]001 DS:[BX+DI]010 SS:[BP+SI]011 SS:[BP+DI]100 DS:[SI]101 DS:[DI]110 SS:[BP]111 DS:[BX]
Base plusIndex
Registerindirect
Z. Kalbarczyk ECE291
Example
• Consider machine language instruction 8A15h
binary representation is: 1000 1010 0001 0101
opcode:100010 => MOV
D 1 => a word moves into the register specified in the REG field
W 0 => byte
REG 010 => indicates register DL
MOD 00 => no displacement
R/M 101 => indicates addressing mode [DI]
the instruction is: MOV DL, [DI]
Z. Kalbarczyk ECE291
Direct Addressing Mode
• Direct Addressing mode (for 16-bit instructions) occurs whenever memory data are referenced by only the displacement mode of addressing, e.g.,
MOV [1000h], DL moves the contents of DL into data segment memory location 1000h
MOV NUMB, DL moves the contents of DL into symbolic data segment memory location NUMB
1 0 10 0 0 0 0 1 1 10 0 0 0 0
1 000000000000000
OPCODE D W MOD REG R/M
Displacement-low Displacement-high
Byte 1 Byte 2
0
Byte 3 Byte 4
MOV [1000h], DL
Whenever the instruction has only a displacement:
MOD is always 00R/M is always 110
Z. Kalbarczyk ECE291
Immediate Instruction
• Consider an instruction: MOV word PTR[BX + 1000h], 1234h
1 1 00 0 1 1 1 0 1 11 0 0 0 1
1 000000000000000
OPCODE W MOD R/M
Displacement-low Displacement-high
Byte 1 Byte 2
1 010000000101100
Data-low Data-high
Byte 3 Byte 4
Byte 5 Byte 6
Moves 1234h into the word-sized memory location addressed by the sum of 1000h, BX, and DS x 10h
WORD PTR directive indicates to the assembler that the instruction uses a word-sized memory pointer(if the instruction moves a byte of immediate data, then BYTE PTR directive is used).
The above directives are only needed when it is not clear if the operation is a byte or a word, e.g.,MOV [BX], AL clear a byte moveMOV [BX], 1 not clear, can be byte-, word, or double word-sized moveshould be for instanceMOV BYTE PTR [BX], 1
Z. Kalbarczyk ECE291
Segment MOV Instructions
• The contents of a segment register are moved by MOV, PUSH, POP
• Segment registers are selected by appropriate setting of register bits (REG field)
Code Segment Register
000 ES001 CS010 SS011 DS100 FS101 GS
Note: MOV CS, ?? and POP CSare not allowed
Example: MOV BX, CS
1 0 10 0 1 0 0 0 0 11 1 0 1 1
OPCODE MOD REG R/M
REG is 001 => selects CSR/M is 011 => selects BX
Note that the opcode for this instruction is different from the prior MOV instructions
Z. Kalbarczyk ECE291
Sampling of Addressing Modes
Z. Kalbarczyk ECE291
Sampling of Addressing Modes
Z. Kalbarczyk ECE291
Sampling of Addressing Modes