ece232: hardware organization and design · conditionals. ece232: logic operations + intro to...

Adapted from Computer Organization and Design, Patterson & Hennessy, UCB

ECE232: Hardware Organization and Design

Lecture 4: Logic Operations and Introduction to Conditionals

ECE232: Logic Operations + Intro to Conditionals 2

Overview

Previously examined arithmetic operations

• R and I instructions formats

Microprocessors also require logic operations

• NAND, OR, AND, etc

Operations performed in the ALU

• Similar to logic operations

Big picture

• Logic and arithmetic operations are fundamental to computer operation

Introduction to conditional operations

• How computers make choices


Typical Operations (little change since 1960)

Data Movement Load (from memory)Store (to memory)register-to-register moveinput (from I/O device)output (to I/O device)push, pop (to/from stack)

Arithmetic integer (binary + decimal) or FPAdd, Subtract, Multiply, Divide

Logical not, and, or, set, clear

Shift shift left/right, rotate left/right

Control (Jump/Branch) unconditional, conditional

Subroutine Linkage call, return

Interrupt trap, return

Graphics (MMX) parallel subword ops (e.g., 4-16 bit add)


MIPS Logical Instructions

Instruction Example Meaning Comment

and and $1,$2,$3 $1 = $2 & $3 3 reg. operands; Logical AND

or or $1,$2,$3 $1 = $2 | $3 3 reg. operands; Logical OR

xor xor $1,$2,$3 $1 = $2 $3 3 operands; Logical XOR

and immediate andi $1,$2,10 $1 = $2 & 10 Logical AND reg,constant

or immediate ori $1,$2,10 $1 = $2 | 10 Logical OR reg, constant

xor immediate xori $1, $2,10 $1 = $2 10 Logical XOR reg, constant

shift left logical sll $1,$2,10 $1 = $2 << 10 Shift left by constant

shift right logical srl $1,$2,10 $1 = $2 >> 10 Shift right by constant


Logical Operations

Instructions for bitwise manipulation

Operation C Java MIPS

Shift left << << sll

Shift right >> >>> srl

Bitwise AND & & and, andi

Bitwise OR | | or, ori

Bitwise NOT ~ ~ nor

Useful for extracting and inserting groups of bits in a word


Shift Operations

shamt: how many positions to shift

Shift left logical• Shift left and fill with 0 bits

• sll by i bits multiplies by 2i

Shift right logical• Shift right and fill with 0 bits

• srl by i bits divides by 2i (unsigned only)

op rs rt rd shamt funct

6 bits 6 bits5 bits 5 bits 5 bits 5 bits


AND Operations

Useful to mask bits in a word

• Select some bits, clear others to 0

and $t0, $t1, $t2

0000 0000 0000 0000 0000 1101 1100 0000

0000 0000 0000 0000 0011 1100 0000 0000

$t2

$t1

0000 0000 0000 0000 0000 1100 0000 0000$t0


OR Operations

Useful to include bits in a word

• Set some bits to 1, leave others unchanged

or $t0, $t1, $t2

0000 0000 0000 0000 0000 1101 1100 0000

0000 0000 0000 0000 0011 1100 0000 0000

$t2

$t1

0000 0000 0000 0000 0011 1101 1100 0000$t0


NOT Operations

Useful to invert bits in a word

• Change 0 to 1, and 1 to 0

MIPS has NOR 3-operand instruction

• a NOR b == NOT ( a OR b )

nor $t0, $t1, $zero

0000 0000 0000 0000 0011 1100 0000 0000$t1

1111 1111 1111 1111 1100 0011 1111 1111$t0

Register 0: always

read as zero


MIPS Registers and Usage

Name Register number Usage

$zero 0 the constant value 0

$at 1 reserved for assembler

$v0-$v1 2-3 values for results and expression evaluation

$a0-$a3 4-7 arguments

$t0-$t7 8-15 temporary registers

$s0-$s7 16-23 saved registers

$t8-$t9 24-25 more temporary registers

$k0-$k1 26-27 reserved for Operating System kernel

$gp 28 global pointer

$sp 29 stack pointer

$fp 30 frame pointer

$ra 31 return address


Conditional Operations

Branch to a labeled instruction if a condition is true• Otherwise, continue sequentially

beq rs, rt, L1

• if (rs == rt) branch to instruction labeled L1;

bne rs, rt, L1

• if (rs != rt) branch to instruction labeled L1;

j L1

• unconditional jump to instruction labeled L1


MIPS Conditional Branch Instructions

Conditional branches allow decision makingbeq R1, R2, LABEL if R1==R2 goto LABELbne R3, R4, LABEL if R3!=R4 goto LABEL

beq $s1, $s2, 25 if ($s1==$s2) PC = PC + 4 + 4*25else PC = PC + 4

ExampleC Code if (i==j) goto L1;

f = g + h;L1: f = f - i;

Assembly beq $s3, $s4, L1add $s0, $s1, $s2

L1: sub $s0, $s0, $s3{

Address of next

sequential instruction

Offset in bytes


Binary Representation - Branch

Branch instructions use I-Format

offset is added to PC when branch is taken

beq r0, r1, offset

has the effect:

if (r0==r1) pc = pc + 4 + (offset << 2)else pc = pc + 4;

Offset is specified in instruction words (why?)

What is the range of the branch target addresses?

op rs rt offset

6 bits 5 bits 5 bits 16 bits

Conversion to

byte offset


Binary Representation - Jump

Jump Instruction uses J-Format (op=2)

What happens during execution?PC = PC[31:28] : (IR[25:0] << 2)

op address

6 bits 26 bits

Conversion to

byte offsetConcatenate upper 4 bits

of PC to form complete

32-bit address


if statement

if ( condition ) {

statements

}

# MIPS code for the condition expression

#(if condition satisfied set $t0=1)

beq $t0, $zero, if_end_label

# MIPS code for the statements

if_end_label:


Compiling If Statements

C code:

if (i==j) f = g+h;else f = g-h;

• f, g, … in $s0, $s1, …

Compiled MIPS code:

bne $s3, $s4, Elseadd $s0, $s1, $s2j Exit

Else: sub $s0, $s1, $s2Exit: …

Assembler calculates addresses


if else statement

if ( condition ) {

if-statements

} else {

else-statements

}

# MIPS code for the condition expression

#(if condition satisfied set $t0=1)

beq $t0, $zero, else_label

# MIPS code for the if-statements

j if_end_label

else_label:

# MIPS code for the else-statements

if_end_label:


Summary

We have now covered the major “operation” instructions

Most programs require lots of arithmetic and logic operations

• Can use registers or immediate operands

• Be sure to keep instruction formats in mind

Control operations

• Modify the flow of the program

What’s next?

• Control operations – programs require decisions

• Implementing control

• Implementing methods/subroutines

ece232: hardware organization and design · conditionals. ece232: logic operations + intro to...

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