dsp u lec02 data converters

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Data Converters

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  • 1. EC533:DigitalSignalProcessing Lecture 2 : Data Converters

2. 2.1 Sample & Hold (S&H) Circuit 3. 2.1 Sample & Hold (S&H) Circuit - continued ControlSignalRateofchangeoftheoutputvoltagewhenthecontrolsignalisintheholdstate duetoleakagecurrent. 4. 2.1 Sample & Hold (S&H) Circuit - continued Ideally =0 & it should be too small.needed for the capacitance to achieve 0.993 Vi 0.7 % error. 5. 2.2 Analogue-to-Digital (ADC)DClevelnbitsO/PI/P Quantizer EncoderFullScaleADC After Sampling; the amplitude of the analogue samples is quantized & encoded using either uniform or non-uniform quantization & encoding depending on the application 6. 2.3 Quantization The quantizing operation approximates each sample value to the nearest level in a finite set of discrete levels/values, known as quantization levels. This approximation introduces quantization error. Therefore, once quantized, the instantaneous values of the signals are lost, and can never be reconstructed exactly. Continuous signal values Discrete signal valuesat discrete times at discrete times Quantizer 7. 2.3 Quantization (cont.) Quantization principle is based on that any human sense(ear & eye) can only detect finite intensity differences. asanultimatereceiverThereare2typesofquantization: 1. Uniformquantization:biomedicine, audio systems.2. Nonuniformquantization:communication systems for the need to compress signals. 8. 2.3.1 Uniform Quantization & Encoding The full scale range of the I/P signal is divided into 2n values; (n is the number of ADC bits). Each analogue sample is assigned to one of the 2n values by truncation. The difference between two adjacent values is called Quantum or step size (a)Vmax1113.5 a110 e 2.5 an = 8 levelsSignal level 1.5 a 0.5 a 0-0.5 a 010-1.5 aVFSR 001 a-2.5 a 000-3.5 a -Vmax Unipolar (+Vm or Vm)polar(Vm)FSR: Vmax - Vmin (swing). MidtreadQuantizer. L: number of quantization levels L= 2n 1L= 2nMidriseQuantizer.nincreasesforaudioapplicationsastheearismoresensitive thantheeye. 9. 2.3.1 Uniform Quantization & Encoding - Continued Quantization Transfer CharacteristicsMidtread a=QTruncation leads to quantization noise Quantization noise is random & follows a zero-mean uniform distribution (pdf).a/2 0 - a/2 Quantization Noise 10. 2.3.1 Uniform Quantization & Encoding - Continued 11. 2.3.1 Uniform Quantization & Encoding - Continued rmsNotdetectedbyADC 12. 2.4 Digital-to-Analogue Converter (DAC)Whatisadigitaltoanalogconverter(DAC)? ConvertsdigitalinputsignaltoananalogoutputsignalBn-1B01 0 0 0 1 1 1Va0 1 0 1 0 0 00 0 1 1 0 1 1DAC1 1 1 1 1 0 1CircuitSymbol B0 LSBB1B2 n:wordlength MSB 13. 2.4 Digital-to-Analogue Converter (DAC)Cont. D/A conversion can be achieved using a number of different methods such as: The Weighted-Resistor DAC The Ladder Network (The R-2R Ladder DAC) The Switched Current-Source DAC The Switched-Capacitor DACs 14. 2.4.1 Weighted Resistor DACRf = RIiR 2R 4R 8R Vo Most summingamplifier Significant Bit Least SignificantBitVREF Largen verylargeR 15. 2.4.1 Weighted Resistor DAC - continued 16. 2.4.1 Weighted Resistor DAC - continuedAdvantage Easyprinciple(lowbitDACs)Disadvantages Requirementofseveral differentpreciseinput resistorvalues:oneunique valueperbinaryinputbit. (HighbitDACs) Largerresistors~moreerror. Preciselargeresistors expensive. VREF 17. 2.4.2 R-2R Ladder Type DAC R-2R Ladder Network 18. 2.4.2 R-2R Ladder Type DAC (Cont.)D 0 2 0 + D1 21 + D 2 2 2 + D 3 2 3 Vo = 4Vref2Example: Circuit with 0110 input 19. 2.4.2 R-2R Ladder Type DAC - continuedVREFMSBLSB 20. 2.4.2 R-2R Ladder Type DAC - continued Thelesssignificantthebit,themoreresistorsthesignalmust passthroughbeforereachingtheopamp Thecurrentisdividedbyafactorof2ateachnodeLSBMSB 21. 2.4.2 R-2R Ladder Type DAC - continued Rf B2 B1 B0 VOUT = VREF + + R2 4 8Rf 22. 2.4.2 R-2R Ladder Type DAC - continued Question: Input=(101)2 VREF=10V R=2k Rf =2R RR R2R R2R 2R2R I0 I0Op-Amp inputVREFVREFGround B0 B2 23. 2.4.2 R-2R Ladder Type DAC - continued Onlytworesistorvalues Rand2R DoesnotneedthekindofprecisionasBinary weightedDACs Easytomanufacture Morepopular Lesserrors 24. 2.5 DAC Resolution Resolution: istheamountofvariancein outputvoltageforeverychangeoftheLSBin thedigitalinput. Howcloselycanweapproximatethedesired outputsignal(HigherRes.=finerdetail=smaller Voltagedivisions) AcommonDAChasa8 12bitResolution VRef Resolution = VLSB =2n 25. 2.5 DAC Resolution (Cont.) VoltageVref resolution: 2n Voltage step example : for 10 bit resolution. So n=10if Vref = 10Vvoltage step : 10V/1024 = 10mV 26. 2.5 DAC Resolution (Cont.) Poor Resolution(1 bit)Better Resolution(3 bit)VoutVout Desired Analog Desired Analog signal signal111 110110 2 Volt. Levels 1 8 Volt. Levels101101 100100 011011 010010 00100100 000 000 Digital InputApproximateDigital InputApproximateoutputoutput