dsp development kit, stratix v edition€¦ · an27 dq16b/diffio_rx_b48p an26 dq17b/diffio_tx_b49n...
TRANSCRIPT
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D D
C C
B B
A A
DESCRIPTIONREV DATE PAGES
PAGE DESCRIPTION
2
NOTES:
Title, Notes, Block Diagram, Rev. History1
3
4
7
8
Stratix V GS Bank 7
9
Stratix V GS Bank 8
10
11
12
13
14
15
16
PLL
17
JTAG
18
19
20
21
RLDRAM II CIO
22
23
24
25
5
6
Display Port (x4)
1172 Parts, 88 Library Parts, 1330 Nets, 6643 Pins
C1 05/01/2012 All INITIAL REVISION C RELEASE
FPGA Package Top
DSP Development Kit, Stratix V Edition
1. Project Drawing Numbers: Raw PCB Gerber Files PCB Design Files Assembly Drawing Fab Drawing Schematic Drawing PCB Film Bill of Materials Schematic Design Files Functional Specification PCB Layout Guidelines Assembly Rework
PCI Express Edge Connector
Stratix V GS Bank 4
Stratix V GS Bank 3
Stratix V GS Transceiver Banks
2.
100-0320202-C1110-0320202-C1120-0320202-C1130-0320202-C1140-0320202-C1150-0320202-C1160-0320202-C1170-0320202-C1180-0320202-C1210-0320202-C1220-0320202-C1320-0320202-C1
On-Board USB Blaster II
26
27
28
29
PAGE DESCRIPTION
30 Power 5 - Linear Regulator
Power 7 - Stratix V GS Power
Flash
5M2210 System Controller
User I/O (LEDs, Buttons, Switches, LCD)
Power 2 - 0.90V
SDI TX Cable Driver & SMB
31
32
33
Power 1 - DC Input, 12V, 3.3V
Stratix V GS Clocks
Stratix V GS Configuration
DDR3 - Part 1 of 2
Ethernet PHY & RJ-45
QDRII+ SRAM
QSFP Interface
Power 3 - 5V, 1.5V, 1.8V, 3.3V
HSMC Port A & Port B
Power 6 - Power & Temp Monitor
DDR3 - Part 2 of 2
Power 4 - 1.0V_GXB, 1.5V_FPGA
Decoupling34
Power 8 - Stratix V GS GND
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
1 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
1 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
1 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
8
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7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
BANK 4A VCCIO = 1.8V
BANK 4B
BANK 4C
BANK 7B
BANK 7C
BANK 7A
HSMB, USER IO
XCVR BANKS QR0, QR1
HSMC Port A x8HSMC Port B x2 (of 4 XCVRS)
FPGA Package Top View
BANK 7D
VCCIO = 2.5V default/Variable
VCCIO = 2.5VHSMA, QSFP CTL, DisplayPort CTL
BANK 8C
BANK 8A
BANK 8BDDR3, Embedded USB Blaster IIVCCIO = 1.5V
BANK 8D
BANK 4D
VCCIO = 2.5VHSMA, USER IO
FLASH, USER IO
QDRII+, FLASH VCCIO = 1.8V BANK 3C
BANK 3A
BANK 3B CONFIG, ENET, USER IOVCCIO = 2.5V
BANK 3D
VCCIO = 1.8VRLDRAM II, FLASH
HSMC Port B x2 (of 4 XCVRS)DisplayPort (x4)
XCVR BANK QR2XCVR BANK QR3
QSFPSDI
PCI Express x8
XCVR BANKS QR0, QR2
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
2 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
2 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
2 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
8
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6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
PCI Express Edge Connector
Link Width DIP Switch
PCIE_TX_CP6PCIE_TX_CN6
PCIE_TX_CP7PCIE_TX_CN7
PCIE_TX_CN5PCIE_TX_CP5
PCIE_TX_CN4PCIE_TX_CP4
PCIE_TX_CP2PCIE_TX_CN2
PCIE_TX_CP3PCIE_TX_CN3
PCIE_TX_CN1PCIE_TX_CP1
PCIE_TX_CP0PCIE_TX_CN0
PCIE_WAKEn_R3.3V_PCIE_AUX
PCIE_PRSNT2n_x4PCIE_PRSNT2n_x1
PCIE_PRSNT2n_x8
PCIE_PRSNT2n_x8
PCIE_PRSNT2n_x4
PCIE_PRSNT2n_x1
PCIE_PRSNT1n
12V_PCIE 3.3V_PCIE12V_PCIE
12V_PCIE 3.3V_PCIE
3.3V_PCIE
PCIE_RX_N08
PCIE_RX_P08
PCIE_RX_N18
PCIE_RX_P18
PCIE_RX_N28
PCIE_RX_P28
PCIE_RX_N38
PCIE_RX_P38
PCIE_RX_N48
PCIE_RX_P48
PCIE_RX_N58
PCIE_RX_P58
PCIE_RX_N68
PCIE_RX_P68
PCIE_RX_N78
PCIE_RX_P78
PCIE_JTAG_TDI 12PCIE_SMBDAT11
PCIE_JTAG_TCK 12
PCIE_JTAG_TMS 12
PCIE_TX_N08
PCIE_TX_P08
PCIE_TX_N1 8
PCIE_TX_P18
PCIE_TX_N2 8
PCIE_TX_P28
PCIE_TX_N3 8
PCIE_TX_P38
PCIE_TX_N4 8
PCIE_TX_P4 8
PCIE_TX_N5 8
PCIE_TX_P5 8
PCIE_TX_N6 8
PCIE_TX_P6 8
PCIE_TX_N7 8
PCIE_TX_P7 8
PCIE_WAKEn11 PCIE_PERSTn 11
PCIE_REFCLK_P 8PCIE_REFCLK_N 8
PCIE_SMBCLK11
PCIE_JTAG_TDO 12
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
3 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
3 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
3 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C5720.22uF
C5750.22uFC5740.22uF
C5770.22uF
C5850.1uF
C5760.22uF
C5780.22uF
C5820.1uF
KEY
X4
X8
X1
J18
PCIE_Slot
+12VB1
+12VB2
+12VB3
GNDB4
SMCLKB5
SMDATB6
GNDB7
+3_3VB8
JTAG_TRSTNB9
+3_3VAUXB10
WAKE_NB11
RSVD1B12
GNDB13
PET0PB14
PET0NB15
GNDB16
PRSNT2_N_X1B17
GNDB18
PET1PB19
PET1NB20
GNDB21
GNDB22
PET2PB23
PET2NB24
GNDB25
GNDB26
PET3PB27
PET3NB28
GNDB29
RSVD3B30
PRSNT2_N_X4B31
GNDB32
PET4PB33
PET4NB34
GNDB35
GNDB36
PET5PB37
PET5NB38
GNDB39
GNDB40
PET6PB41
PET6NB42
GNDB43
GNDB44
PET7PB45
PET7NB46
GNDB47
PRSNT2_N_X8B48
GNDB49
PRSNT1_NA1
+12VA2
+12VA3
GNDA4
JTAG_TCKA5
JTAG_TDIA6
JTAG_TDOA7
JTAG_TMSA8
+3_3VA9
+3_3VA10
PERST_NA11
GNDA12
REFCLK+A13
REFCLK-A14
GNDA15
PER0PA16
PER0NA17
GNDA18
RSVD2A19
GNDA20
PER1PA21
PER1NA22
GNDA23
GNDA24
PER2PA25
PER2NA26
GNDA27
GNDA28
PER3PA29
PER3NA30
GNDA31
RSVD4A32
RSVD5A33
GNDA34
PER4PA35
PER4NA36
GNDA37
GNDA38
PER5PA39
PER5NA40
GNDA41
GNDA42
PER6PA43
PER6NA44
GNDA45
GNDA46
PER7PA47
PER7NA48
GNDA49
B5
PCI BRACKET
C750.1uF
C5810.22uF
C740.1uF
C770.1uF
C5800.22uF
C5670.22uFC5660.22uF
C760.1uF
C5690.22uF
C5830.1uF
OPEN
SW6
TDA04H0SB1
1234 5
678
C5790.22uF
C5680.22uF
R129 DNI
C5710.22uF
R128 DNI
C5700.22uF
C5730.22uF
C5840.1uF
8
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5
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4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Stratix V GS Bank 3
ETHERNET INTERFACE
FLASH & MAX BUS INTERFACE
RLDRAM II INTERFACE
LCD & USER I/O INTERFACES
HSMC INTERFACE
PCIE INTERFACE
SDI INTERFACE
QSFP INTERFACE
VCCIO = 2.5V
VCCIO = 2.5V
VCCIO = 1.8V
VCCIO = 1.8V
See Stratix V GS Config sheet forENET_RX_P
RLDC_QVLD
RLDC_CSn
RLDC_CSnRLDC_DM
RLDC_WEnRLDC_REFn
RLDC_DQ[17:0]
RLDC_QK_P[1:0]
RLDC_QK_N[1:0]
RLDC_A[22:0]
RLDC_BA[2:0]
RLDC_CK_PRLDC_CK_N
RLDC_DK_PRLDC_DK_N
QSFP_INTERRUPTn
QSFP_MOD_SELn
QSFP_MOD_PRSn
QSFP_LP_MODE
HSMA_D1HSMA_D0
HSMB_SCLHSMB_SDA
PCIE_LED_X8
PCIE_LED_X1
PCIE_LED_X4
HSMA_SDAHSMA_SCL
HSMA_D2HSMA_D3
PCIE_LED_G2
ENET_RESETnENET_INTn
ENET_MDC
ENET_TX_PENET_TX_N
ENET_MDIO
SDI_TX_SD_HDnSDI_TX_EN
QSFP_MOD_SELn
QSFP_LP_MODEQSFP_INTERRUPTn
QSFP_MOD_PRSn
RLDC_QK_N1RLDC_QK_P1
RLDC_QVLD
RLDC_A1
RLDC_DQ1
RLDC_DQ3RLDC_DQ2
RLDC_DQ14
RLDC_DQ16
RLDC_A0RLDC_A4
RLDC_A2
RLDC_A3
RLDC_A7
RLDC_DQ17
RLDC_DQ15
RLDC_A5RLDC_A6
RLDC_A8
RLDC_A11
RLDC_A9RLDC_A10
RLDC_A14
RLDC_A12
RLDC_A13
RLDC_A15RLDC_A18RLDC_A16 RLDC_A17
RLDC_A19
RLDC_DM
RLDC_DQ4
RLDC_DQ5
RLDC_DQ6RLDC_DQ7
RLDC_DQ8
RLDC_DQ9RLDC_DQ10
RLDC_DQ11
RLDC_DQ0
RLDC_DQ12
RLDC_DQ13
RLDC_QK_P0 RLDC_DK_PRLDC_DK_N
RLDC_CSn
RLDC_BA0
RLDC_BA1
RLDC_WEnRLDC_REFn
FM_D27
FM_D26
FM_D31
FM_D30
FM_D5
FM_D4
FM_D9
FM_D8
FM_D17
FM_D16
FM_D21
FM_D20
USER_LED_R3
FM_A25
FM_D3
FM_D2
FM_D7
FM_D6
FM_D11
FM_D10
FM_D13
FM_D12
FM_D15
FM_D14
FM_D19
FM_D18
FM_D23
FM_D22
FM_D25
FM_D24
FM_D29
FM_D28
FM_D1
FM_D0
RLDC_CK_NRLDC_CK_P
RLDC_A20
RLDC_A21
RLDC_A22
RLDC_QK_N0
USER_LED_G3
ENET_RX_N
ENET_TX_N 23
ENET_TX_P 23
ENET_MDIO 23
ENET_RESETn 23
ENET_INTn 23
ENET_RX_N 23
ENET_MDC 23
FM_D[31:0]17,18
FM_A[26:0]17,18,5,9
RLDC_DQ[17:0] 16
RLDC_QK_P[1:0] 16
RLDC_QK_N[1:0] 16
RLDC_A[22:0] 16
RLDC_BA[2:0] 16,9
RLDC_CK_P 16
RLDC_CK_N 16
RLDC_CSn 16,4
RLDC_WEn 16
RLDC_REFn 16
RLDC_CSn 16,4
RLDC_DM 16RLDC_QVLD 16
USER_LED_R[7:0]24,9
RLDC_DK_P 16
RLDC_DK_N 16
HSMB_SDA 22HSMB_SCL 22
HSMA_SDA22
HSMA_SCL22
HSMA_D[3:0]22
PCIE_LED_G2 24
PCIE_LED_X4 24PCIE_LED_X8 24
PCIE_LED_X1 24
QSFP_INTERRUPTn 19
QSFP_MOD_SELn 19
QSFP_MOD_PRSn 19
QSFP_LP_MODE 19
SDI_TX_SD_HDn 21SDI_TX_EN 18,21
USER_LED_G3 24
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
4 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
4 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
4 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Stratix V GX Bank 3
Bank 3C
Bank 3D
5SGSMD5K2F40
U15B
Version = 1.0 Pin-out
DQ15B/DIFFIO_TX_B43NAU27 DQ15B/DIFFIO_TX_B43PAT27
DQSN15B/DIFFIO_RX_B44NAW26 DQS15B/DIFFIO_RX_B44PAV26
DQ15B/DIFFIO_TX_B45NAU26 DQ15B/DIFFIO_TX_B45PAT26
DQSN16B/DIFFIO_RX_B46NAR27 DQS16B/DIFFIO_RX_B46PAP27
DQ16B/DIFFIO_TX_B47NAM26 DQ16B/DIFFIO_TX_B47PAL26
DQ16B/DIFFIO_RX_B48NAN27 DQ16B/DIFFIO_RX_B48PAN26
DQ17B/DIFFIO_TX_B49NAE26 DQ17B/DIFFIO_TX_B49PAD26
DQSN17B/DIFFIO_RX_B50NAA25 DQS17B/DIFFIO_RX_B50PAB25
DQ17B/DIFFIO_TX_B51NAC26 DQ17B/DIFFIO_TX_B51PAC25
DQSN18B/DIFFIO_RX_B52NAK26 DQS18B/DIFFIO_RX_B52PAJ26
DQ18B/DIFFIO_TX_B53NAG26 DQ18B/DIFFIO_TX_B53PAF26
DQ18B/DIFFIO_RX_B54NAH25 DQ18B/DIFFIO_RX_B54PAG25
DQ23B/DIFFIO_TX_B67NAW23 DQ23B/DIFFIO_TX_B67PAV23
DQSN23B/DIFFIO_RX_B68NAW22 DQS23B/DIFFIO_RX_B68PAV22
DQ23B/DIFFIO_TX_B69NAU23 DQ23B/DIFFIO_TX_B69PAT23
DQSN24B/DIFFIO_RX_B70NAR22 DQS24B/DIFFIO_RX_B70PAP22
DQ24B/DIFFIO_TX_B71NAN22 DQ24B/DIFFIO_TX_B71PAM22
DQ24B/DIFFIO_RX_B72NAN23 DQ24B/DIFFIO_RX_B72PAM23
DQ25B/DIFFIO_TX_B73NAE23 DQ25B/DIFFIO_TX_B73PAD23
DQSN25B/DIFFIO_RX_B74NAG23 DQS25B/DIFFIO_RX_B74PAF23
DQ25B/DIFFIO_TX_B75NAE22 DQ25B/DIFFIO_TX_B75PAD22
DQ26B/DIFFIO_TX_B77NAG22 DQ26B/DIFFIO_TX_B77PAF22
DQ19B/DIFFIO_TX_B55NAW25DQ19B/DIFFIO_TX_B55PAV25
DQSN19B/DIFFIO_RX_B56NAU25DQS19B/DIFFIO_RX_B56PAU24
DQ19B/DIFFIO_TX_B57NAT24DQ19B/DIFFIO_TX_B57PAR24
DQSN20B/DIFFIO_RX_B58NAR25DQS20B/DIFFIO_RX_B58PAP25
DQ20B/DIFFIO_TX_B59NAN25DQ20B/DIFFIO_TX_B59PAM25
DQ20B/DIFFIO_RX_B60NAP24DQ20B/DIFFIO_RX_B60PAN24
DQ21B/DIFFIO_TX_B61NAC24DQ21B/DIFFIO_TX_B61PAB24
DQSN21B/DIFFIO_RX_B62NAF25DQS21B/DIFFIO_RX_B62PAE25
DQ21B/DIFFIO_TX_B63NAE24DQ21B/DIFFIO_TX_B63PAD24
DQSN22B/DIFFIO_RX_B64NAG24DQS22B/DIFFIO_RX_B64PAH24
DQ22B/DIFFIO_TX_B65NAK24DQ22B/DIFFIO_TX_B65PAJ24
DQ22B/DIFFIO_RX_B66NAL24DQ22B/DIFFIO_RX_B66PAL25
DQ27B/DIFFIO_TX_B79NAW20DQ27B/DIFFIO_TX_B79PAV20
DQSN27B/DIFFIO_RX_B80NAU21DQS27B/DIFFIO_RX_B80PAT21
DQ27B/DIFFIO_TX_B81NAU20DQ27B/DIFFIO_TX_B81PAT20
DQSN28B/DIFFIO_RX_B82NAR21DQS28B/DIFFIO_RX_B82PAR20
DQ28B/DIFFIO_TX_B83NAM20DQ28B/DIFFIO_TX_B83PAN20
DQ28B/DIFFIO_RX_B84NAP21DQ28B/DIFFIO_RX_B84PAN21
DQ29B/DIFFIO_TX_B85NAD21DQ29B/DIFFIO_TX_B85PAD20
DQSN29B/DIFFIO_RX_B86NAG21DQS29B/DIFFIO_RX_B86PAH21
DQ29B/DIFFIO_TX_B87NAE21DQ29B/DIFFIO_TX_B87PAE20
DQSN30B/DIFFIO_RX_B88NAL22DQS30B/DIFFIO_RX_B88PAK21
DQ30B/DIFFIO_TX_B89NAJ21DQ30B/DIFFIO_TX_B89PAJ20
DQ30B/DIFFIO_RX_B90NAL21DQ30B/DIFFIO_RX_B90PAL20
Stratix V GX Bank 3
Bank 3A
Bank 3B
5SGSMD5K2F40
U15A
Version = 1.0 Pin-out
DQ11B/DIFFIO_TX_B31NAL30 DQ11B/DIFFIO_TX_B31PAK30
DQSN11B/DIFFIO_RX_B32NAM29 DQS11B/DIFFIO_RX_B32PAL29
DQ11B/DIFFIO_TX_B33NAJ29 DQ11B/DIFFIO_TX_B33PAK29
DQSN12B/DIFFIO_RX_B34NAR28 DQS12B/DIFFIO_RX_B34PAP28
DQ12B/DIFFIO_TX_B35NAL28 DQ12B/DIFFIO_TX_B35PAL27
DQ12B/DIFFIO_RX_B36NAN28 DQ12B/DIFFIO_RX_B36PAM28
RZQ_0/DQSN1B/DIFFIO_RX_B2NAR34
DQ13B/DIFFIO_TX_B37NAA27DQ13B/DIFFIO_TX_B37PAA26
DQSN13B/DIFFIO_RX_B38NAA29DQS13B/DIFFIO_RX_B38PAA28
DQ13B/DIFFIO_TX_B39NAC27DQ13B/DIFFIO_TX_B39PAB27
DQSN14B/DIFFIO_RX_B40NAE27DQS14B/DIFFIO_RX_B40PAD27
DQ14B/DIFFIO_TX_B41NAH27DQ14B/DIFFIO_TX_B41PAG27
DQ14B/DIFFIO_RX_B42NAK27DQ14B/DIFFIO_RX_B42PAJ27
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Stratix V GS Bank 4QDRII INTERFACE
FLASH INTERFACE
LCD & USER I/O INTERFACES
HSMC INTERFACE
VCCIO = 1.8V
VCCIO = 1.8V
VCCIO = 1.8V
VCCIO = 2.5V
QDRII+ ODT = QDRII C_N
QDRII+ QVLD = QDRII C_P
Si571 VCXO
HSMA_RX_D_N1HSMA_RX_D_P1
HSMA_TX_D_N5HSMA_TX_D_P5
HSMA_RX_D_P3HSMA_RX_D_N3
HSMB_TX_LED
HSMA_TX_D_P3HSMA_TX_D_N3
HSMA_PRSNTnHSMB_PRSNTn
HSMA_RX_D_N2HSMA_RX_D_P2
HSMA_RX_D_P0HSMA_RX_D_N0
HSMA_TX_LED
HSMA_TX_D_N2HSMA_TX_D_P2
HSMB_RX_LED
FLASH_CLKFLASH_WEn
HSMA_RX_LED
HSMA_TX_D_N4HSMA_TX_D_P4
HSMA_RX_D_N4HSMA_RX_D_P4
HSMA_TX_D_N0HSMA_TX_D_P0
HSMA_RX_D_N5HSMA_RX_D_P5
HSMA_TX_D_P1HSMA_TX_D_N1
FLASH_RDYBSYn0
FLASH_OEnFLASH_RESETn
HSMA_CLK_OUT_P1HSMA_CLK_OUT_N1
LCD_DATA5
LCD_DATA7
LCD_DATA0
LCD_WEn
LCD_DATA3
LCD_DATA4
LCD_DATA6LCD_CSn
HSMA_TX_D_P6HSMA_TX_D_N6
HSMA_RX_D_P6HSMA_RX_D_N6
HSMA_TX_D_P7HSMA_TX_D_N7
HSMA_CLK_OUT0
USER_LED_G7
LCD_DATA2
LCD_DATA1
LCD_D_Cn
HSMA_RX_D_P7HSMA_RX_D_N7
QDRII_D4
QDRII_D12QDRII_D10QDRII_D9
QDRII_D11
QDRII_D0
QDRII_Q2
QDRII_Q4
QDRII_Q17
QDRII_Q15
QDRII_Q14
QDRII_Q0
QDRII_CQ_N
QDRII_Q3
QDRII_Q16
QDRII_Q1
QDRII_C_P
QDRII_RPSn
QDRII_Q7
QDRII_Q10
QDRII_Q13
QDRII_Q5
QDRII_Q6QDRII_Q8
QDRII_CQ_P
QDRII_Q11
QDRII_Q12
QDRII_D14
QDRII_BWSn0QDRII_BWSn1
QDRII_Q9
QDRII_K_PQDRII_K_N
QDRII_D16
QDRII_D8
QDRII_D3QDRII_D7
FM_A0FM_A1
QDRII_D5
QDRII_D1
QDRII_D15
QDRII_D13
QDRII_C_N
QDRII_WPSn
QDRII_D2
QDRII_D6
QDRII_D17
FM_A14FM_A15
FM_A4FM_A5
FM_A12FM_A13
FM_A16FM_A17
FM_A2FM_A3
FM_A6FM_A7
FM_A8FM_A9
FM_A10FM_A11
QDRII_A16
QDRII_A18
QDRII_A7
QDRII_A10
QDRII_A1
QDRII_A3QDRII_A0
QDRII_A11
QDRII_A12
QDRII_A14
QDRII_A15
QDRII_A5
QDRII_A19
QDRII_A20
QDRII_A2QDRII_A4
QDRII_A17
QDRII_A13
QDRII_A6QDRII_A9
QDRII_DOFFn
FLASH_CEn0
QDRII_A8
FLASH_CEn1
SDI_CLK148_DN
QDRII_C_P 15
QDRII_Q[17:0]15
QDRII_A[20:0]15
QDRII_D[17:0]15
QDRII_BWSn0 15QDRII_BWSn1 15
QDRII_K_P 15QDRII_K_N 15
QDRII_C_N 15
QDRII_WPSn 15QDRII_RPSn 15
QDRII_CQ_N 15
QDRII_CQ_P 15
FLASH_CLK 17,18
FLASH_RESETn 17,18
FLASH_OEn 17,18
FLASH_WEn 17,18FLASH_RDYBSYn0 17,18
LCD_CSn24
LCD_DATA[7:0]24
LCD_WEn 24
LCD_D_Cn 24
HSMB_TX_LED 24HSMA_CLK_OUT0 22
USER_LED_G[7:0]11,24,4,6,9
FLASH_CEn0 17,18FLASH_CEn1 17,18
HSMA_RX_LED24
HSMA_PRSNTn18,22,24
HSMA_TX_LED24
HSMB_PRSNTn18,22,24
HSMB_RX_LED24
HSMA_CLK_OUT_N[2:1]22,6
HSMA_CLK_OUT_P[2:1]22,6
QDRII_DOFFn 15
FM_A[26:0]17,18,4,9
HSMA_TX_D_P[16:0]22,6
HSMA_TX_D_N[16:0]22,6
HSMA_RX_D_P[16:0]22,6
HSMA_RX_D_N[16:0]22,6
SDI_CLK148_DN 10
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
5 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
5 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
5 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R199 100, 1%
Stratix V GX Bank 4
Bank 4C
Bank 4D
5SGSMD5K2F40
U15D
Version = 1.0 Pin-out
DQ43B/DIFFIO_TX_B127NAH19 DQ43B/DIFFIO_TX_B127PAG19
DQSN43B/DIFFIO_RX_B128NAK18 DQS43B/DIFFIO_RX_B128PAJ19
DQ43B/DIFFIO_TX_B129NAJ18 DQ43B/DIFFIO_TX_B129PAH18
DQSN44B/DIFFIO_RX_B130NAG18 DQS44B/DIFFIO_RX_B130PAF19
DQ44B/DIFFIO_TX_B131NAE19 DQ44B/DIFFIO_TX_B131PAE18
DQ44B/DIFFIO_RX_B132NAD17 DQ44B/DIFFIO_RX_B132PAD18
DQ45B/DIFFIO_TX_B133NAM19 DQ45B/DIFFIO_TX_B133PAL18
DQSN45B/DIFFIO_RX_B134NAN18 DQS45B/DIFFIO_RX_B134PAN19
DQ45B/DIFFIO_TX_B135NAR18 DQ45B/DIFFIO_TX_B135PAP18
DQSN46B/DIFFIO_RX_B136NAR19 DQS46B/DIFFIO_RX_B136PAP19
DQ46B/DIFFIO_TX_B137NAU18 DQ46B/DIFFIO_TX_B137PAT18
DQ46B/DIFFIO_RX_B138NAW19 DQ46B/DIFFIO_RX_B138PAV19
DQ51B/DIFFIO_TX_B151NAB15 DQ51B/DIFFIO_TX_B151PAB16
DQSN51B/DIFFIO_RX_B152NAD16 DQS51B/DIFFIO_RX_B152PAC15
DQ51B/DIFFIO_TX_B153NAA15 DQ51B/DIFFIO_TX_B153PAA14
DQSN52B/DIFFIO_RX_B154NAE15 DQS52B/DIFFIO_RX_B154PAD15
DQ52B/DIFFIO_TX_B155NAJ15 DQ52B/DIFFIO_TX_B155PAH15
DQ52B/DIFFIO_RX_B156NAG14 DQ52B/DIFFIO_RX_B156PAG15
DQ53B/DIFFIO_TX_B157NAL15 DQ53B/DIFFIO_TX_B157PAK15
DQSN53B/DIFFIO_RX_B158NAL14 DQS53B/DIFFIO_RX_B158PAK14
DQ53B/DIFFIO_TX_B159NAN14 DQ53B/DIFFIO_TX_B159PAM14
DQSN54B/DIFFIO_RX_B160NAP15 DQS54B/DIFFIO_RX_B160PAN15
DQ54B/DIFFIO_TX_B161NAR15 DQ54B/DIFFIO_TX_B161PAR14
DQ54B/DIFFIO_RX_B162NAU15 DQ54B/DIFFIO_RX_B162PAT15
DQ47B/DIFFIO_TX_B141NAM16DQ47B/DIFFIO_TX_B141PAL16
DQ48B/DIFFIO_TX_B143NAG16DQ48B/DIFFIO_TX_B143PAF16
DQ49B/DIFFIO_TX_B145NAN17DQ49B/DIFFIO_TX_B145PAM17
DQSN49B/DIFFIO_RX_B146NAP16DQS49B/DIFFIO_RX_B146PAN16
DQ49B/DIFFIO_TX_B147NAT17DQ49B/DIFFIO_TX_B147PAR17
DQSN50B/DIFFIO_RX_B148NAU16DQS50B/DIFFIO_RX_B148PAU17
DQ50B/DIFFIO_TX_B149NAW16DQ50B/DIFFIO_TX_B149PAV16
DQ50B/DIFFIO_RX_B150NAW17DQ50B/DIFFIO_RX_B150PAV17
DQ55B/DIFFIO_TX_B163NAC13DQ55B/DIFFIO_TX_B163PAB13
DQSN55B/DIFFIO_RX_B164NAD14DQS55B/DIFFIO_RX_B164PAC14
DQ55B/DIFFIO_TX_B165NAA13DQ55B/DIFFIO_TX_B165PAA12
DQSN56B/DIFFIO_RX_B166NAF14DQS56B/DIFFIO_RX_B166PAE14
DQ56B/DIFFIO_TX_B167NAJ13DQ56B/DIFFIO_TX_B167PAH13
DQ56B/DIFFIO_RX_B168NAG13DQ56B/DIFFIO_RX_B168PAF13
DQ57B/DIFFIO_TX_B169NAM13DQ57B/DIFFIO_TX_B169PAL13
DQSN57B/DIFFIO_RX_B170NAP12DQS57B/DIFFIO_RX_B170PAN12
DQ57B/DIFFIO_TX_B171NAP13DQ57B/DIFFIO_TX_B171PAN13
DQSN58B/DIFFIO_RX_B172NAU14DQS58B/DIFFIO_RX_B172PAT14
DQ58B/DIFFIO_TX_B173NAW14DQ58B/DIFFIO_TX_B173PAV14
DQ58B/DIFFIO_RX_B174NAW13DQ58B/DIFFIO_RX_B174PAV13
Stratix V GX Bank 4
Bank 4A
Bank 4B
5SGSMD5K2F40
U15C
Version = 1.0 Pin-out
DQ59B/DIFFIO_TX_B175NAC12 DQ59B/DIFFIO_TX_B175PAB12
DQSN59B/DIFFIO_RX_B176NAE12 DQS59B/DIFFIO_RX_B176PAD12
DQ59B/DIFFIO_TX_B177NAE11 DQ59B/DIFFIO_TX_B177PAE10
DQSN60B/DIFFIO_RX_B178NAJ12 DQS60B/DIFFIO_RX_B178PAH12
DQ60B/DIFFIO_TX_B179NAF11 DQ60B/DIFFIO_TX_B179PAG12
DQ60B/DIFFIO_RX_B180NAK12 DQ60B/DIFFIO_RX_B180PAL12
DQ61B/DIFFIO_TX_B181NAL11 DQ61B/DIFFIO_TX_B181PAK11
DQSN61B/DIFFIO_RX_B182NAR12 DQS61B/DIFFIO_RX_B182PAR11
DQ61B/DIFFIO_TX_B183NAN11 DQ61B/DIFFIO_TX_B183PAM11
DQSN62B/DIFFIO_RX_B184NAU12 DQS62B/DIFFIO_RX_B184PAT12
DQ62B/DIFFIO_TX_B185NAU11 DQ62B/DIFFIO_TX_B185PAT11
DQ62B/DIFFIO_RX_B186NAW11 DQ62B/DIFFIO_RX_B186PAV11
DQ67B/DIFFIO_TX_B199NAW8 DQ67B/DIFFIO_TX_B199PAV8
DQ67B/DIFFIO_TX_B201NAU8 DQ67B/DIFFIO_TX_B201PAU7
DQ69B/DIFFIO_TX_B205NAR6 DQ69B/DIFFIO_TX_B205PAP6
DQ69B/DIFFIO_TX_B207NAM8 DQ69B/DIFFIO_TX_B207PAN8
DQ70B/DIFFIO_TX_B209NAJ7DQ70B/DIFFIO_TX_B209PAJ6DQ70B/DIFFIO_RX_B210NAL6
DQ63B/DIFFIO_TX_B187NAC9DQ63B/DIFFIO_TX_B187PAB9
DQSN63B/DIFFIO_RX_B188NAC10DQS63B/DIFFIO_RX_B188PAB10
DQ63B/DIFFIO_TX_B189NAE9DQ63B/DIFFIO_TX_B189PAD9
DQSN64B/DIFFIO_RX_B190NAG10DQS64B/DIFFIO_RX_B190PAF10
DQ64B/DIFFIO_TX_B191NAH9DQ64B/DIFFIO_TX_B191PAG9
DQ64B/DIFFIO_RX_B192NAJ10DQ64B/DIFFIO_RX_B192PAH10
DQ65B/DIFFIO_TX_B193NAM10DQ65B/DIFFIO_TX_B193PAL10
DQSN65B/DIFFIO_RX_B194NAP10DQS65B/DIFFIO_RX_B194PAN10
DQ65B/DIFFIO_TX_B195NAP9DQ65B/DIFFIO_TX_B195PAN9
DQSN66B/DIFFIO_RX_B196NAW10DQS66B/DIFFIO_RX_B196PAV10
DQ66B/DIFFIO_TX_B197NAT9DQ66B/DIFFIO_TX_B197PAR9
DQ66B/DIFFIO_RX_B198NAU10DQ66B/DIFFIO_RX_B198PAU9
RZQ_1/DQ70B/DIFFIO_RX_B210PAK6
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Stratix V GS Bank 7
DISPLAYPORT INTERFACE
USER I/O INTERFACES
HSMC INTERFACE
HSMB INTERFACE
FLASH INTERFACES
VCCIO = HSMB VARIABLE 1.2V/1.5V/1.8V/2.5V
VCCIO = HSMB VARIABLE 1.2V/1.5V/1.8V/2.5V
VCCIO = HSMB VARIABLE 1.2V/1.5V/1.8V/2.5V
VCCIO = 2.5V
DDR ODT
DP_HOT_PLUG
DP_RETURNDP_AUX_PDP_AUX_N
DP_DIRECTION
DP_AUX_TX_PDP_AUX_TX_N
HSMA_CLK_OUT_P2HSMA_CLK_OUT_N2
USER_DIPSW1
USER_DIPSW7USER_DIPSW6
HSMA_TX_D_N10
HSMA_TX_D_P9
HSMA_TX_D_P10
HSMA_RX_D_N13
HSMA_TX_D_P11HSMA_TX_D_N9
HSMA_RX_D_P13
HSMA_TX_D_N11
HSMA_RX_D_N9
HSMA_TX_D_P12
HSMA_RX_D_P9
HSMA_RX_D_N11
HSMA_RX_D_P12
HSMA_RX_D_P11
HSMA_TX_D_N12
HSMA_RX_D_P8HSMA_RX_D_N8
HSMA_TX_D_N8HSMA_TX_D_P8
USER_DIPSW3USER_DIPSW2
USER_DIPSW5USER_DIPSW4
USER_LED_G1
HSMA_RX_D_P14HSMA_RX_D_N14
HSMA_RX_D_N15HSMA_RX_D_P15
DP_DIRECTION
USER_LED_G2
DP_AUX_TX_NDP_AUX_TX_P
DP_RETURNDP_HOT_PLUGDP_AUX_PDP_AUX_N
HSMA_TX_D_P14HSMA_TX_D_N14
HSMA_RX_D_N16HSMA_RX_D_P16
HSMA_TX_D_P15HSMA_TX_D_N15
HSMA_TX_D_P16HSMA_TX_D_N16
HSMA_TX_D_N13HSMA_TX_D_P13
USER_DIPSW0
USER_LED_G0
HSMB_CLK_OUT_P2HSMB_CLK_OUT_N2
HSMB_WEn
HSMB_C_P
HSMB_RASn
HSMB_CSn
HSMB_DQ1
HSMB_CKE
HSMB_DQ2
HSMB_DQ0
HSMB_DQ5
HSMB_DQS_P0
HSMB_DQ7
HSMB_DQS_N0
HSMB_DQ6
HSMB_DQ3
HSMB_C_N
HSMB_DQ11HSMB_DQ10
HSMB_DQ13
HSMB_DQ15HSMB_DQ12
HSMB_DQ8
HSMB_DQS_P1
HSMB_DQ9
HSMB_DQS_N1
HSMB_DQ14
HSMB_DM1
HSMB_DQ4
HSMB_DM0
HSMB_CLK_OUT_P1HSMB_CLK_OUT_N1
HSMB_A3HSMB_A2
HSMB_BA3
HSMB_A13
HSMB_ADDR_CMD0HSMB_A4
HSMB_A10
HSMB_A8
HSMB_A15HSMB_BA1
HSMB_A0
HSMB_A7
HSMB_BA2
HSMB_A12
HSMB_A5
HSMB_CASn
HSMB_A11
HSMB_A9 HSMB_A14
HSMB_A1
HSMB_A6
HSMB_DQ16HSMB_DM2
HSMB_DQ30
HSMB_DM3
HSMB_DQ19
HSMB_DQ22
HSMB_DQ18
HSMB_DQ21
HSMB_DQ23
HSMB_DQ17HSMB_DQ20
HSMB_DQS_P2HSMB_DQS_N2
HSMB_DQ24HSMB_DQS_N3
HSMB_DQ31
HSMB_DQ29HSMB_DQ25
HSMB_DQS_P3
HSMB_DQ28
HSMB_DQ26
HSMA_RX_D_N12
HSMB_DQ27
HSMB_BA0
HSMA_RX_D_P10HSMA_RX_D_N10
HSMA_CLK_OUT_N[2:1]22,5
HSMA_CLK_OUT_P[2:1]22,5
HSMB_CLK_OUT_N[2:1]22
HSMB_CLK_OUT_P[2:1]22
HSMA_TX_D_P[16:0]22,5
HSMA_TX_D_N[16:0]22,5
HSMA_RX_D_P[16:0]22,5
HSMA_RX_D_N[16:0]22,5
DP_HOT_PLUG 20
DP_RETURN 20
DP_AUX_N 20DP_AUX_P 20
USER_DIPSW[7:0]24
USER_LED_R[7:0]24,4,9
DP_DIRECTION 20
USER_LED_G[7:0]11,24,4,5,9
HSMB_DQS_P[3:0]22
HSMB_DQS_N[3:0]22
HSMB_A[15:0]22
HSMB_BA[3:0]22
HSMB_CLK_IN_N[2:1]22,9
HSMB_CLK_IN_P[2:1]22,9
HSMB_CLK_IN0 22,9HSMB_CLK_OUT0 22,9
HSMB_CASn 22HSMB_RASn 22
HSMB_CKE 22
HSMB_CSn 22
HSMB_DQ[31:0]22
HSMB_DM[3:0]22
HSMB_WEn 22
DP_AUX_TX_P 20DP_AUX_TX_N 20
HSMB_C_P 22
HSMB_ADDR_CMD022
HSMB_C_N 22
FM_A[26:0]17,18,4,5,9
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
6 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
6 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
6 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Stratix V GX Bank 7
Bank 7D
Bank 7C
5SGSMD5K2F40
U15F
Version = 1.0 Pin-out
DQ13T/DIFFIO_RX_T37PB13
DQ13T/DIFFIO_RX_T37NA13
DQ13T/DIFFIO_TX_T38PD12
DQ13T/DIFFIO_TX_T38NC12
DQS13T/DIFFIO_RX_T39PD13
DQSN13T/DIFFIO_RX_T39NC13
DQ14T/DIFFIO_TX_T40PG12
DQ14T/DIFFIO_TX_T40NG13
DQS14T/DIFFIO_RX_T41PF12
DQSN14T/DIFFIO_RX_T41NE12
DQ14T/DIFFIO_TX_T42PJ13
DQ14T/DIFFIO_TX_T42NH13
DQ15T/DIFFIO_RX_T43PM12
DQ15T/DIFFIO_RX_T43NL12
DQ15T/DIFFIO_TX_T44PK12
DQ15T/DIFFIO_TX_T44NJ12
DQS15T/DIFFIO_RX_T45PL13
DQSN15T/DIFFIO_RX_T45NK13
DQ16T/DIFFIO_TX_T46PN13
DQ16T/DIFFIO_TX_T46NN12
DQS16T/DIFFIO_RX_T47PU11
DQSN16T/DIFFIO_RX_T47NT12
DQ16T/DIFFIO_TX_T48PR12
DQ16T/DIFFIO_TX_T48NP13
DQ21T/DIFFIO_RX_T61PB17
DQ21T/DIFFIO_RX_T61NA17
DQ21T/DIFFIO_TX_T62PB16
DQ21T/DIFFIO_TX_T62NA16
DQS21T/DIFFIO_RX_T63PD16
DQSN21T/DIFFIO_RX_T63NC16
DQ22T/DIFFIO_TX_T64PF17
DQ22T/DIFFIO_TX_T64NE17
DQS22T/DIFFIO_RX_T65PH16
DQSN22T/DIFFIO_RX_T65NG16
DQ22T/DIFFIO_TX_T66PH17
DQ22T/DIFFIO_TX_T66NG17
DQ23T/DIFFIO_TX_T68PT15
DQ23T/DIFFIO_TX_T68NR15
DQ24T/DIFFIO_TX_T70PN15
DQ24T/DIFFIO_TX_T70NM15
DQ17T/DIFFIO_RX_T49PC14
DQ17T/DIFFIO_RX_T49NC15
DQ17T/DIFFIO_TX_T50PB14
DQ17T/DIFFIO_TX_T50NA14
DQS17T/DIFFIO_RX_T51PE15
DQSN17T/DIFFIO_RX_T51ND15
DQ18T/DIFFIO_TX_T52PF14
DQ18T/DIFFIO_TX_T52NE14
DQS18T/DIFFIO_RX_T53PG15
DQSN18T/DIFFIO_RX_T53NF15
DQ18T/DIFFIO_TX_T54PH14
DQ18T/DIFFIO_TX_T54NG14
DQ19T/DIFFIO_RX_T55PU13
DQ19T/DIFFIO_RX_T55NU12
DQ19T/DIFFIO_TX_T56PT13
DQ19T/DIFFIO_TX_T56NU14
DQS19T/DIFFIO_RX_T57PR14
DQSN19T/DIFFIO_RX_T57NP14
DQ20T/DIFFIO_TX_T58PN14
DQ20T/DIFFIO_TX_T58NM14
DQS20T/DIFFIO_RX_T59PJ14
DQSN20T/DIFFIO_RX_T59NJ15
DQ20T/DIFFIO_TX_T60PL15
DQ20T/DIFFIO_TX_T60NK15
DQ25T/DIFFIO_RX_T73PB19
DQ25T/DIFFIO_RX_T73NA19
DQ25T/DIFFIO_TX_T74PD18
DQ25T/DIFFIO_TX_T74NC18
DQS25T/DIFFIO_RX_T75PD19
DQSN25T/DIFFIO_RX_T75NC19
DQ26T/DIFFIO_TX_T76PE18
DQ26T/DIFFIO_TX_T76NE19
DQS26T/DIFFIO_RX_T77PG18
DQSN26T/DIFFIO_RX_T77NF18
DQ26T/DIFFIO_TX_T78PH19
DQ26T/DIFFIO_TX_T78NG19
DQ27T/DIFFIO_RX_T79PN17
DQ27T/DIFFIO_RX_T79NM17
DQ27T/DIFFIO_TX_T80PR16
DQ27T/DIFFIO_TX_T80NP17
DQS27T/DIFFIO_RX_T81PN18
DQSN27T/DIFFIO_RX_T81NN19
DQ28T/DIFFIO_TX_T82PM18
DQ28T/DIFFIO_TX_T82NL18
DQS28T/DIFFIO_RX_T83PK18
DQSN28T/DIFFIO_RX_T83NJ18
DQ28T/DIFFIO_TX_T84PK19
DQ28T/DIFFIO_TX_T84NL19
Stratix V GX Bank 7
Bank 7A
Bank 7B
5SGSMD5K2F40
U15E
Version = 1.0 Pin-out
DQ1T/DIFFIO_RX_T1NH7
DQ1T/DIFFIO_TX_T2PJ7
DQ1T/DIFFIO_TX_T2NK7
DQ2T/DIFFIO_TX_T4PM6
DQ2T/DIFFIO_TX_T4NN6
DQ2T/DIFFIO_TX_T6PP7
DQ2T/DIFFIO_TX_T6NN7
DQ5T/DIFFIO_RX_T13PF8
DQ5T/DIFFIO_RX_T13NE8
DQ5T/DIFFIO_TX_T14PG9
DQ5T/DIFFIO_TX_T14NG8
DQS5T/DIFFIO_RX_T15PG10
DQSN5T/DIFFIO_RX_T15NF9
DQ6T/DIFFIO_TX_T16PA8
DQ6T/DIFFIO_TX_T16NB8
DQS6T/DIFFIO_RX_T17PC8
DQSN6T/DIFFIO_RX_T17NC9
DQ6T/DIFFIO_TX_T18PE9
DQ6T/DIFFIO_TX_T18ND9
DQ7T/DIFFIO_RX_T19PM8
DQ7T/DIFFIO_RX_T19NL8
DQ7T/DIFFIO_TX_T20PK9
DQ7T/DIFFIO_TX_T20NJ9
DQS7T/DIFFIO_RX_T21PM9
DQSN7T/DIFFIO_RX_T21NL9
DQ8T/DIFFIO_TX_T22PN8
DQ8T/DIFFIO_TX_T22NN9
DQS8T/DIFFIO_RX_T23PT9
DQSN8T/DIFFIO_RX_T23NR9
DQ8T/DIFFIO_TX_T24PR8
DQ8T/DIFFIO_TX_T24NP8
RZQ_4/DQ1T/DIFFIO_RX_T1PJ6
DQ4T/DIFFIO_TX_T10PE6
DQ4T/DIFFIO_TX_T10ND6
DQ4T/DIFFIO_TX_T12PF6
DQ4T/DIFFIO_TX_T12NE7
DQ9T/DIFFIO_RX_T25PH11
DQ9T/DIFFIO_RX_T25NG11
DQ9T/DIFFIO_TX_T26PJ10
DQ9T/DIFFIO_TX_T26NH10
DQS9T/DIFFIO_RX_T27PF11
DQSN9T/DIFFIO_RX_T27NE11
DQ10T/DIFFIO_TX_T28PD10
DQ10T/DIFFIO_TX_T28NC10
DQS10T/DIFFIO_RX_T29PB10
DQSN10T/DIFFIO_RX_T29NA10
DQ10T/DIFFIO_TX_T30PB11
DQ10T/DIFFIO_TX_T30NA11
DQ11T/DIFFIO_RX_T31PK10
DQ11T/DIFFIO_RX_T31NJ11
DQ11T/DIFFIO_TX_T32PP10
DQ11T/DIFFIO_TX_T32NN10
DQS11T/DIFFIO_RX_T33PM11
DQSN11T/DIFFIO_RX_T33NL11
DQ12T/DIFFIO_TX_T34PT10
DQ12T/DIFFIO_TX_T34NR10
DQS12T/DIFFIO_RX_T35PR11
DQSN12T/DIFFIO_RX_T35NP11
DQ12T/DIFFIO_TX_T36PU10
DQ12T/DIFFIO_TX_T36NU9
R197 100, 1%
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
STRATIX V USB INTERFACE
Stratix V GS Bank 8
DDR3 x72 INTERFACE
MAX V CONTROL
VCCIO = 1.5V
VCCIO = 1.5V
VCCIO = 1.5V
VCCIO = 1.5V
In order to operate DDR3 at 1066MHz Altera requires all DDR3 address andcommand signals to be in the same sub-bank. With the current DDR3 pin out thisboard only supports DDR3 up to 800MHz. In order to support DDR3 at 1066MHz inthe future DDR3_RASn would need to move to sub-bank 8B, pin U15.D30.
USB_ADDR[1:0]
USB_RESETnUSB_OEnUSB_RDnUSB_WRn
USB_SDAUSB_SCL
USB_DATA[7:0]
DDR3_DQ8
DDR3_CSn
DDR3_A6
MAX5_BEn0
MAX5_OEn
MAX5_BEn1
DDR3_DM1
DDR3_DQ9
DDR3_DQ11
DDR3_DQ10
MAX5_BEn3
DDR3_DQ13DDR3_DQ15
DDR3_DQ14DDR3_DQ12
DDR3_DQS_N1DDR3_DQS_P1
DDR3_DQS_N0DDR3_DQS_P0
DDR3_DM0
DDR3_DQ0
DDR3_DQ1
DDR3_DQ2
DDR3_DQ7DDR3_DQ5
DDR3_DQ6
DDR3_DQ3
DDR3_DQ4
MAX5_CSn
MAX5_BEn2
USB_OEn
USB_RDn
USB_RESETn
USB_WRn
USB_SDA
USB_SCL
USB_DATA3
DDR3_CASn
DDR3_RASn
DDR3_ODT
DDR3_A3
DDR3_WEn
DDR3_A10
DDR3_A4
DDR3_A9
DDR3_A8
DDR3_A12
USB_ADDR1
DDR3_A7
DDR3_A11
DDR3_A1
DDR3_CKE
DDR3_BA0
DDR3_A2
DDR3_CLK_PDDR3_CLK_N
DDR3_BA1
DDR3_BA2
USB_DATA7
USB_DATA4
DDR3_A5
USB_ADDR0
MAX5_WEn
USB_DATA2
USB_DATA5
USB_DATA0
USB_DATA1
USB_DATA6
DDR3_DQ64
DDR3_DM5
DDR3_DQ66
DDR3_DM8
DDR3_DQ67
DDR3_DQ65
DDR3_DQS_N8DDR3_DQS_P8
DDR3_DQ70DDR3_DQ71
DDR3_DQ69
DDR3_DQ68
DDR3_DQ42
DDR3_DQ43DDR3_DQ41
DDR3_DQ40
DDR3_DQS_N5DDR3_DQS_P5
DDR3_DQ46DDR3_DQ47DDR3_DQ45
DDR3_DQ44
DDR3_DQS_N4DDR3_DQS_P4
DDR3_DM4
DDR3_DQ39DDR3_DQ37DDR3_DQ33
DDR3_DQ36
DDR3_DQ34
DDR3_DQ38DDR3_DQ32
DDR3_DQ35
DDR3_DQS_P7DDR3_DQS_N7
DDR3_DQ58DDR3_DQ63
DDR3_DQ61
DDR3_DQ57DDR3_DQ59DDR3_DM7
DDR3_DQ60
DDR3_DQ56
DDR3_DQ22
DDR3_DQ20
DDR3_DQ16
DDR3_DQ17
DDR3_DQ21DDR3_DQ18
DDR3_DQ23
DDR3_DQ19
DDR3_DM2
DDR3_DQS_P2DDR3_DQS_N2
DDR3_RESETn
DDR3_DQS_N6DDR3_DQS_P6
DDR3_DQ53
DDR3_DM6
DDR3_DQ52DDR3_DQ49
DDR3_DQ54DDR3_DQ50
DDR3_DQ55
DDR3_DQ51
DDR3_DQ29
DDR3_DQ28
DDR3_DQ26DDR3_DQ30
DDR3_DM3
DDR3_DQ25
DDR3_DQ24
DDR3_DQ27
DDR3_DQ31
DDR3_DQS_N3DDR3_DQS_P3
DDR3_DQ48
DDR3_A13
DDR3_A0DDR3_DQ62
USB_DATA[7:0] 25
USB_SDA 25USB_RESETn 25USB_OEn 25
USB_WRn 25USB_RDn 25
DDR3_DQ[71:0]13,14
DDR3_CSn 13,14
DDR3_CKE 13,14
DDR3_CASn 13,14
DDR3_RASn 13,14
DDR3_WEn 13,14
DDR3_ODT 13,14
DDR3_DQS_P[8:0]13,14
DDR3_DQS_N[8:0]13,14
DDR3_DM[8:0]13,14
DDR3_BA[2:0]13,14
DDR3_CLK_P 13,14DDR3_CLK_N 13,14
DDR3_A[13:0]13,14
MAX5_BEn[3:0]18
MAX5_CSn 18MAX5_WEn 18
MAX5_OEn 18
DDR3_RESETn 13,14
USB_ADDR[1:0] 25
USB_SCL 25
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
7 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
7 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
7 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R297100, 1%
Stratix V GX Bank 8
Bank 8C
Bank 8D
5SGSMD5K2F40
U15H
Version = 1.0 Pin-out
DQ41T/DIFFIO_RX_T121PK21
DQ41T/DIFFIO_RX_T121NJ21
DQ41T/DIFFIO_TX_T122PM20
DQ41T/DIFFIO_TX_T122NL20
DQS41T/DIFFIO_RX_T123PK22
DQSN41T/DIFFIO_RX_T123NJ22
DQ42T/DIFFIO_TX_T124PM21
DQ42T/DIFFIO_TX_T124NL21
DQS42T/DIFFIO_RX_T125PP22
DQSN42T/DIFFIO_RX_T125NN22
DQ42T/DIFFIO_TX_T126PN20
DQ42T/DIFFIO_TX_T126NN21
DQ43T/DIFFIO_RX_T127PF20
DQ43T/DIFFIO_RX_T127NE20
DQ43T/DIFFIO_TX_T128PH20
DQ43T/DIFFIO_TX_T128NG20
DQS43T/DIFFIO_RX_T129PG21
DQSN43T/DIFFIO_RX_T129NF21
DQ44T/DIFFIO_TX_T130PC20
DQ44T/DIFFIO_TX_T130NC21
DQS44T/DIFFIO_RX_T131PE21
DQSN44T/DIFFIO_RX_T131ND21
DQ44T/DIFFIO_TX_T132PB20
DQ44T/DIFFIO_TX_T132NA20
DQ49T/DIFFIO_RX_T145PP25
DQ49T/DIFFIO_RX_T145NN25
DQ49T/DIFFIO_TX_T146PU25
DQ49T/DIFFIO_TX_T146NT25
DQS49T/DIFFIO_RX_T147PR25
DQSN49T/DIFFIO_RX_T147NR26
DQ50T/DIFFIO_TX_T148PP26
DQ50T/DIFFIO_TX_T148NN26
DQS50T/DIFFIO_RX_T149PM26
DQSN50T/DIFFIO_RX_T149NL26
DQ50T/DIFFIO_TX_T150PK25
DQ50T/DIFFIO_TX_T150NJ25
DQ51T/DIFFIO_RX_T151PG24
DQ51T/DIFFIO_RX_T151NF24
DQ51T/DIFFIO_TX_T152PH25
DQ51T/DIFFIO_TX_T152NG25
DQS51T/DIFFIO_RX_T153PE24
DQSN51T/DIFFIO_RX_T153NE25
DQ52T/DIFFIO_TX_T154PD24
DQ52T/DIFFIO_TX_T154NC24
DQS52T/DIFFIO_RX_T155PD25
DQSN52T/DIFFIO_RX_T155NC25
DQ52T/DIFFIO_TX_T156PB25
DQ52T/DIFFIO_TX_T156NA25
DQ45T/DIFFIO_TX_T134PL24
DQ45T/DIFFIO_TX_T134NK24
DQ46T/DIFFIO_TX_T136PP23
DQ46T/DIFFIO_TX_T136NN23
DQS46T/DIFFIO_RX_T137PN24
DQSN46T/DIFFIO_RX_T137NM24
DQ46T/DIFFIO_TX_T138PT24
DQ46T/DIFFIO_TX_T138NR24
DQ47T/DIFFIO_RX_T139PH23
DQ47T/DIFFIO_RX_T139NG23
DQ47T/DIFFIO_TX_T140PH22
DQ47T/DIFFIO_TX_T140NG22
DQS47T/DIFFIO_RX_T141PF23
DQSN47T/DIFFIO_RX_T141NE23
DQ48T/DIFFIO_TX_T142PC22
DQ48T/DIFFIO_TX_T142ND22
DQS48T/DIFFIO_RX_T143PB22
DQSN48T/DIFFIO_RX_T143NA22
DQ48T/DIFFIO_TX_T144PB23
DQ48T/DIFFIO_TX_T144NA23
DQ53T/DIFFIO_RX_T157PU26
DQ53T/DIFFIO_RX_T157NU27
DQ53T/DIFFIO_TX_T158PT27
DQ53T/DIFFIO_TX_T158NR27
DQS53T/DIFFIO_RX_T159PU28
DQSN53T/DIFFIO_RX_T159NT28
DQ54T/DIFFIO_TX_T160PN27
DQ54T/DIFFIO_TX_T160NP28
DQS54T/DIFFIO_RX_T161PK27
DQSN54T/DIFFIO_RX_T161NJ27
DQ54T/DIFFIO_TX_T162PM27
DQ54T/DIFFIO_TX_T162NL27
DQ55T/DIFFIO_RX_T163PG26
DQ55T/DIFFIO_RX_T163NF26
DQ55T/DIFFIO_TX_T164PJ26
DQ55T/DIFFIO_TX_T164NH26
DQS55T/DIFFIO_RX_T165PG27
DQSN55T/DIFFIO_RX_T165NF27
DQ56T/DIFFIO_TX_T166PE27
DQ56T/DIFFIO_TX_T166ND27
DQS56T/DIFFIO_RX_T167PB26
DQSN56T/DIFFIO_RX_T167NA26
DQ56T/DIFFIO_TX_T168PC26
DQ56T/DIFFIO_TX_T168NC27
Stratix V GX Bank 8
Bank 8A
Bank 8B
5SGSMD5K2F40
U15G
Version = 1.0 Pin-out
DQ57T/DIFFIO_RX_T169PV29
DQ57T/DIFFIO_RX_T169NU29
DQ57T/DIFFIO_TX_T170PR29
DQ57T/DIFFIO_TX_T170NP29
DQS57T/DIFFIO_RX_T171PU30
DQSN57T/DIFFIO_RX_T171NT30
DQ58T/DIFFIO_TX_T172PN28
DQ58T/DIFFIO_TX_T172NM29
DQS58T/DIFFIO_RX_T173PJ29
DQSN58T/DIFFIO_RX_T173NJ28
DQ58T/DIFFIO_TX_T174PL28
DQ58T/DIFFIO_TX_T174NK28
DQ59T/DIFFIO_RX_T175PF29
DQ59T/DIFFIO_RX_T175NE28
DQ59T/DIFFIO_TX_T176PH28
DQ59T/DIFFIO_TX_T176NG28
DQS59T/DIFFIO_RX_T177PH29
DQSN59T/DIFFIO_RX_T177NG29
DQ60T/DIFFIO_TX_T178PD28
DQ60T/DIFFIO_TX_T178NC28
DQS60T/DIFFIO_RX_T179PB28
DQSN60T/DIFFIO_RX_T179NA28
DQ60T/DIFFIO_TX_T180PB29
DQ60T/DIFFIO_TX_T180NA29
DQ65T/DIFFIO_TX_T194PU31
DQ65T/DIFFIO_TX_T194NT31
DQ66T/DIFFIO_TX_T196PN33
DQ66T/DIFFIO_TX_T196NM33
DQ67T/DIFFIO_TX_T200PB32
DQ67T/DIFFIO_TX_T200NA32
DQ61T/DIFFIO_RX_T181PN30
DQ61T/DIFFIO_RX_T181NM30
DQ61T/DIFFIO_TX_T182PR30
DQ61T/DIFFIO_TX_T182NR31
DQS61T/DIFFIO_RX_T183PP31
DQSN61T/DIFFIO_RX_T183NN31
DQ62T/DIFFIO_TX_T184PL31
DQ62T/DIFFIO_TX_T184NL30
DQS62T/DIFFIO_RX_T185PK30
DQSN62T/DIFFIO_RX_T185NJ30
DQ62T/DIFFIO_TX_T186PK31
DQ62T/DIFFIO_TX_T186NJ31
DQ63T/DIFFIO_RX_T187PB31
DQ63T/DIFFIO_RX_T187NA31
DQ63T/DIFFIO_TX_T188PD30
DQ63T/DIFFIO_TX_T188NC30
DQS63T/DIFFIO_RX_T189PD31
DQSN63T/DIFFIO_RX_T189NC31
DQ64T/DIFFIO_TX_T190PG30
DQ64T/DIFFIO_TX_T190NF30
DQS64T/DIFFIO_RX_T191PE30
DQSN64T/DIFFIO_RX_T191NE31
DQ64T/DIFFIO_TX_T192PH31
DQ64T/DIFFIO_TX_T192NG31
DQ68T/DIFFIO_TX_T202PA34
DQ68T/DIFFIO_TX_T202NA35
DQS68T/DIFFIO_RX_T203PC34
RZQ_5/DQSN68T/DIFFIO_RX_T203NB34
DQ68T/DIFFIO_TX_T204PA36
DQ68T/DIFFIO_TX_T204NA37
DQ69T/DIFFIO_RX_T205PE32
DQ69T/DIFFIO_RX_T205NF32
DQ69T/DIFFIO_TX_T206PG33
DQ69T/DIFFIO_TX_T206NG32
DQS69T/DIFFIO_RX_T207PF33
DQSN69T/DIFFIO_RX_T207NE33
DQ70T/DIFFIO_TX_T208PK33
DQ70T/DIFFIO_TX_T208NJ33
DQS70T/DIFFIO_RX_T209PH34
DQSN70T/DIFFIO_RX_T209NG34
DQ70T/DIFFIO_TX_T210PK34
DQ70T/DIFFIO_TX_T210NJ34
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Stratix V GS Transceivers and Power
CMU PLL (PCIe) CMU PLL (PCIe)
CMU (PCIe Gen 1/2) CMU (PCIe Gen 1/2)
RREF_L0RREF_L1
RREF_R0RREF_R1
SMA_TX_NSMA_TX_P
SMA_TX_N
SMA_TX_P
HSMA_RX_N722
HSMA_RX_P722
HSMA_RX_N622
HSMA_RX_P622
HSMA_RX_N522
HSMA_RX_P522
HSMA_RX_N422
HSMA_RX_P422
HSMA_RX_N222
HSMA_RX_P222
HSMA_RX_N122
HSMA_RX_P122
HSMA_RX_N022
HSMA_RX_P022
HSMA_RX_N322
HSMA_RX_P322
SDI_RX_P21SDI_RX_N21 HSMB_TX_N0 22
HSMB_TX_P0 22
HSMB_TX_N1 22
HSMB_TX_P1 22
HSMB_TX_N2 22
HSMB_TX_P2 22
HSMB_TX_N3 22
HSMB_TX_P3 22
PCIE_TX_N7 3
PCIE_TX_P7 3
PCIE_TX_N4 3
PCIE_TX_P4 3
PCIE_TX_N5 3
PCIE_TX_P5 3
PCIE_TX_N6 3
PCIE_TX_P6 3
PCIE_TX_N0 3
PCIE_TX_N1 3
PCIE_TX_P1 3
PCIE_TX_N2 3
PCIE_TX_P2 3
PCIE_TX_N3 3
PCIE_TX_P3 3
PCIE_TX_P0 3HSMA_TX_N0 22
HSMA_TX_P0 22
HSMA_TX_N1 22
HSMA_TX_P1 22
HSMA_TX_N2 22
HSMA_TX_P2 22
HSMA_TX_N3 22
HSMA_TX_P3 22
HSMA_TX_N4 22
HSMA_TX_P4 22
HSMA_TX_N5 22
HSMA_TX_P5 22
HSMA_TX_N6 22
HSMA_TX_P6 22
HSMA_TX_N7 22
HSMA_TX_P7 22
SDI_TX_N 21
SDI_TX_P 21
PCIE_REFCLK_P3PCIE_REFCLK_N3
PCIE_RX_N03
PCIE_RX_N13
PCIE_RX_P13
PCIE_RX_N23
PCIE_RX_P23
PCIE_RX_N33
PCIE_RX_P33
PCIE_RX_P03
PCIE_RX_N63
PCIE_RX_P63
PCIE_RX_N73
PCIE_RX_P73
PCIE_RX_N43
PCIE_RX_P43
PCIE_RX_N53
PCIE_RX_P53
HSMB_RX_N022
HSMB_RX_P022
HSMB_RX_N122
HSMB_RX_P122
HSMB_RX_N222
HSMB_RX_P222
HSMB_RX_N322
HSMB_RX_P322
REFCLK1_QL0_P10REFCLK1_QL0_N10
QSFP_RX_N019
QSFP_RX_P019 QSFP_TX_P0 19QSFP_TX_N0 19
QSFP_TX_N1 19
QSFP_TX_P1 19QSFP_RX_P119QSFP_RX_N119
QSFP_TX_N2 19QSFP_RX_N219
QSFP_RX_P219 QSFP_TX_P2 19
QSFP_RX_P319QSFP_RX_N319 QSFP_TX_N3 19
QSFP_TX_P3 19
REFCLK5_QL2_P10REFCLK5_QL2_N10
REFCLK4_QL2_P10REFCLK4_QL2_N10
REFCLK1_QR0_P10REFCLK1_QR0_N10
REFCLK0_QR0_P10REFCLK0_QR0_N10
REFCLK2_QR1_P10REFCLK2_QR1_N10
DP_ML_LANE_P0 20DP_ML_LANE_N0 20
DP_ML_LANE_N1 20
DP_ML_LANE_P1 20
DP_ML_LANE_N2 20
DP_ML_LANE_P2 20
DP_ML_LANE_P3 20DP_ML_LANE_N3 20
REFCLK4_QR2_P10
REFCLK5_QR2_N10
REFCLK5_QR2_P10
REFCLK4_QR2_N10
REFCLK2_QL1_P10REFCLK2_QL1_N10
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
8 34Monday, May 07, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
8 34Monday, May 07, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
8 34Monday, May 07, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R29810.0K
R1851.80K
Stratix V GX Transceivers
Bank GXB_L0
Bank GXB_L1
Bank GXB_L2
Reference Resistor
5SGSMD5K2F40
U15Q
Version = 1.0 Pin-out
REFCLK5LPT33
REFCLK5LNT34
GXB_RX_L17N,GXB_REFCLK_L17ND39 GXB_RX_L17P,GXB_REFCLK_L17PD38 GXB_RX_L16N,GXB_REFCLK_L16NF39 GXB_RX_L16P,GXB_REFCLK_L16PF38 GXB_RX_L15N,GXB_REFCLK_L15NH39 GXB_RX_L15P,GXB_REFCLK_L15PH38 GXB_RX_L14N,GXB_REFCLK_L14NK39 GXB_RX_L14P,GXB_REFCLK_L14PK38 GXB_RX_L13N,GXB_REFCLK_L13NM39 GXB_RX_L13P,GXB_REFCLK_L13PM38 GXB_RX_L12N,GXB_REFCLK_L12NP39 GXB_RX_L12P,GXB_REFCLK_L12PP38
REFCLK4LPV34
REFCLK4LNV35
REFCLK3LPY33
REFCLK3LNY34
GXB_RX_L11N,GXB_REFCLK_L11NT39 GXB_RX_L11P,GXB_REFCLK_L11PT38 GXB_RX_L10N,GXB_REFCLK_L10NV39 GXB_RX_L10P,GXB_REFCLK_L10PV38 GXB_RX_L9N,GXB_REFCLK_L9NY39 GXB_RX_L9P,GXB_REFCLK_L9PY38 GXB_RX_L8N,GXB_REFCLK_L8N
AB39 GXB_RX_L8P,GXB_REFCLK_L8PAB38 GXB_RX_L7N,GXB_REFCLK_L7NAD39 GXB_RX_L7P,GXB_REFCLK_L7PAD38 GXB_RX_L6N,GXB_REFCLK_L6NAF39 GXB_RX_L6P,GXB_REFCLK_L6PAF38
REFCLK2LPAB34
REFCLK2LNAB35
REFCLK1LPAD33
REFCLK1LNAD34
GXB_RX_L5N,GXB_REFCLK_L5NAH39 GXB_RX_L5P,GXB_REFCLK_L5PAH38 GXB_RX_L4N,GXB_REFCLK_L4NAK39 GXB_RX_L4P,GXB_REFCLK_L4PAK38 GXB_RX_L3N,GXB_REFCLK_L3NAM39 GXB_RX_L3P,GXB_REFCLK_L3PAM38 GXB_RX_L2N,GXB_REFCLK_L2NAP39 GXB_RX_L2P,GXB_REFCLK_L2PAP38 GXB_RX_L1N,GXB_REFCLK_L1NAT39 GXB_RX_L1P,GXB_REFCLK_L1PAT38 GXB_RX_L0N,GXB_REFCLK_L0NAV39 GXB_RX_L0P,GXB_REFCLK_L0PAV38
REFCLK0LPAF34
REFCLK0LNAF35
RREF_TLB39
GXB_TX_L17NC37GXB_TX_L17PC36GXB_TX_L16NE37GXB_TX_L16PE36GXB_TX_L15NG37GXB_TX_L15PG36GXB_TX_L14NJ37GXB_TX_L14PJ36GXB_TX_L13NL37GXB_TX_L13PL36GXB_TX_L12NN37GXB_TX_L12PN36
GXB_TX_L11NR37GXB_TX_L11PR36GXB_TX_L10NU37GXB_TX_L10PU36GXB_TX_L9NW37GXB_TX_L9PW36GXB_TX_L8NAA37GXB_TX_L8PAA36GXB_TX_L7NAC37GXB_TX_L7PAC36GXB_TX_L6NAE37GXB_TX_L6PAE36
GXB_TX_L5NAG37GXB_TX_L5PAG36GXB_TX_L4NAJ37GXB_TX_L4PAJ36GXB_TX_L3NAL37GXB_TX_L3PAL36GXB_TX_L2NAN37GXB_TX_L2PAN36GXB_TX_L1NAR37GXB_TX_L1PAR36GXB_TX_L0NAU37GXB_TX_L0PAU36
RREF_BLAW36
Stratix V GX Transceivers
Bank GXB_R0
Bank GXB_R1
Bank GXB_R2
Reference Resistor
5SGSMD5K2F40
U15R
Version = 1.0 Pin-out
REFCLK0RNAF5 REFCLK0RPAF6
GXB_RX_R0P,GXB_REFCLK_R0PAV2
GXB_RX_R0N,GXB_REFCLK_R0NAV1
GXB_RX_R1P,GXB_REFCLK_R1PAT2
GXB_RX_R1N,GXB_REFCLK_R1NAT1
GXB_RX_R2P,GXB_REFCLK_R2PAP2
GXB_RX_R2N,GXB_REFCLK_R2NAP1
GXB_RX_R3P,GXB_REFCLK_R3PAM2
GXB_RX_R3N,GXB_REFCLK_R3NAM1
GXB_RX_R4P,GXB_REFCLK_R4PAK2
GXB_RX_R4N,GXB_REFCLK_R4NAK1
GXB_RX_R5P,GXB_REFCLK_R5PAH2
GXB_RX_R5N,GXB_REFCLK_R5NAH1
REFCLK1RNAD6 REFCLK1RPAD7
REFCLK2RNAB5 REFCLK2RPAB6
GXB_RX_R6P,GXB_REFCLK_R6PAF2
GXB_RX_R6N,GXB_REFCLK_R6NAF1
GXB_RX_R7P,GXB_REFCLK_R7PAD2
GXB_RX_R7N,GXB_REFCLK_R7NAD1
GXB_RX_R8P,GXB_REFCLK_R8PAB2
GXB_RX_R8N,GXB_REFCLK_R8NAB1
GXB_RX_R9P,GXB_REFCLK_R9PY2
GXB_RX_R9N,GXB_REFCLK_R9NY1
GXB_RX_R10P,GXB_REFCLK_R10PV2
GXB_RX_R10N,GXB_REFCLK_R10NV1
GXB_RX_R11P,GXB_REFCLK_R11PT2
GXB_RX_R11N,GXB_REFCLK_R11NT1
REFCLK3RNY6 REFCLK3RPY7
REFCLK4RNV5 REFCLK4RPV6
GXB_RX_R12P,GXB_REFCLK_R12PP2
GXB_RX_R12N,GXB_REFCLK_R12NP1
GXB_RX_R13P,GXB_REFCLK_R13PM2
GXB_RX_R13N,GXB_REFCLK_R13NM1
GXB_RX_R14P,GXB_REFCLK_R14PK2
GXB_RX_R14N,GXB_REFCLK_R14NK1
GXB_RX_R15P,GXB_REFCLK_R15PH2
GXB_RX_R15N,GXB_REFCLK_R15NH1
GXB_RX_R16P,GXB_REFCLK_R16PF2
GXB_RX_R16N,GXB_REFCLK_R16NF1
GXB_RX_R17P,GXB_REFCLK_R17PD2
GXB_RX_R17N,GXB_REFCLK_R17ND1
REFCLK5RNT6 REFCLK5RPT7
RREF_TRB1
GXB_TX_R0PAU4
GXB_TX_R0NAU3
GXB_TX_R1PAR4
GXB_TX_R1NAR3
GXB_TX_R2PAN4
GXB_TX_R2NAN3
GXB_TX_R3PAL4
GXB_TX_R3NAL3
GXB_TX_R4PAJ4
GXB_TX_R4NAJ3
GXB_TX_R5PAG4
GXB_TX_R5NAG3
GXB_TX_R6PAE4
GXB_TX_R6NAE3
GXB_TX_R7PAC4
GXB_TX_R7NAC3
GXB_TX_R8PAA4
GXB_TX_R8NAA3
GXB_TX_R9PW4
GXB_TX_R9NW3
GXB_TX_R10PU4
GXB_TX_R10NU3
GXB_TX_R11PR4
GXB_TX_R11NR3
GXB_TX_R12PN4
GXB_TX_R12NN3
GXB_TX_R13PL4
GXB_TX_R13NL3
GXB_TX_R14PJ4
GXB_TX_R14NJ3
GXB_TX_R15PG4
GXB_TX_R15NG3
GXB_TX_R16PE4
GXB_TX_R16NE3
GXB_TX_R17PC4
GXB_TX_R17NC3
RREF_BRAW4
R188 0
R303 0
R304 0
R3091.80KR3051.80K
R19810.0K
R1921.80K
R186 0
J31
2 3 4 5
J61
2 3 4 5
R187 0R310 0
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
STRATIX V USB INTERFACE
HSMC INTERFACE
STRATIX V CLOCKS
Stratix V GS Clocks
QSFP INTERFACE
FLASH INTERFACE
LCD & USER I/O INTERFACES
MAX V CONTROL
SDI INTERFACES
RLDRAM II INTERFACE
VCCIO = 1.8V
VCCIO = 1.8V
VCCIO = 1.8V
VCCIO = HSMB VARIABLE
VCCIO = HSMB VARIABLE
VCCIO = 1.5V
VCCIO = 1.5V
VCCIO = 2.5V
CLKINTOP_N0CLKINTOP_P0
USER_LED_R0HSMA_CLK_IN0
HSMA_CLK_IN_N2HSMA_CLK_IN_P2
HSMA_CLK_IN_N1HSMA_CLK_IN_P1
HSMA_CLK_IN_N1HSMA_CLK_IN_P1
HSMB_CLK_IN_N1HSMB_CLK_IN_P1
CLKINTOP_N0CLKINTOP_P0
USB_FULLUSB_EMPTY
USB_FULLUSB_EMPTY
CLKINTOP_P1CLKINTOP_N1
CLKINBOT_N1CLKINBOT_P1
CLKINBOT_P1 CLKINBOT_N1
CLKINTOP_P1 CLKINTOP_N1
HSMA_CLK_IN_P2 HSMA_CLK_IN_N2
HSMB_CLK_IN_P2 HSMB_CLK_IN_N2 CLKIN_50CLK_125_PCLK_125_N
CLKINTOP_P[1:0]
CLKINTOP_N[1:0]
CLKINBOT_P[1:0]
CLKINBOT_N[1:0]
CLKINBOT_N0CLKINBOT_P0
QSFP_SDAQSFP_SCL
QSFP_SCLQSFP_RSTn
QSFP_SDA
FLASH_ADVn
QSFP_RSTn
HSMB_CLK_OUT0
HSMB_CLK_IN0USER_LED_R1
USER_LED_R6
FM_A26
SDI_RX_BYPASS
SDI_RX_BYPASS
USER_LED_R4
USER_LED_R5
USB_CLK
USER_LED_R7
MAX5_CLK
FM_A22FM_A23
FM_A24
USER_LED_R2
CLKIN_50FLASH_RDYBSYn1
USER_PB0USER_PB1
USER_PB2
FM_A18FM_A19
FM_A20FM_A21
USB_CLK
HSMB_CLK_IN_P2HSMB_CLK_IN_N2
HSMB_CLK_IN_N1HSMB_CLK_IN_P1
RLDC_BA2
RLDC_BA[2:0]
SDI_CLK148_UP
SDI_CLK148_UP
USER_LED_G6
CLKINBOT_P0CLKINBOT_N0
CLK_125_PCLK_125_N
USB_FULL 25USB_EMPTY 25
HSMA_CLK_IN022
HSMB_CLK_IN022
HSMA_CLK_IN_P[2:1]22
HSMA_CLK_IN_N[2:1]22
HSMB_CLK_IN_P[2:1]22
HSMB_CLK_IN_N[2:1]22
CLKINTOP_P[1:0] 10
CLKINTOP_N[1:0] 10
CLKINBOT_P[1:0] 10
CLKINBOT_N[1:0] 10
CLKIN_50 10,18
CLK_125_P 10
CLK_125_N 10
QSFP_SDA 19QSFP_SCL 19
FLASH_ADVn 17,18
QSFP_RSTn 19
HSMB_CLK_OUT0 22
USER_PB[2:0]24
MAX5_CLK 18
USER_LED_R[7:0]24,4
FM_A[26:0]17,18,4,5
FLASH_RDYBSYn1 17,18
SDI_RX_BYPASS 18,21
USB_CLK 18,25
RLDC_BA[2:0] 16,4
SDI_CLK148_UP 10
USER_LED_G[7:0]11,24,4,5,6
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
9 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
9 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
9 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R253 100, 1%
Stratix V GX Clocks
Bank 3B
Bank 3D
Bank 4A
Bank 4D
Bank 7A
Bank 7D
Bank 8A
Bank 8D
5SGSMD5K2F40
U15I
Version = 1.0 Pin-out
CLK0N/DQSN8B/DIFFIO_RX_B22NAW29 CLK0P/DQS8B/DIFFIO_RX_B22PAV29
CLK1N/DQ8B/DIFFIO_RX_B24NAW28 CLK1P/DQ8B/DIFFIO_RX_B24PAV28
CLK2N/DQSN10B/DIFFIO_RX_B28NAG30 CLK2P/DQS10B/DIFFIO_RX_B28PAF29
CLK3N/DQ10B/DIFFIO_RX_B30NAH28 CLK3P/DQ10B/DIFFIO_RX_B30PAG28
CLK4N/DQSN26B/DIFFIO_RX_B76NAJ22 CLK4P/DQS26B/DIFFIO_RX_B76PAH22
CLK5N/DQ26B/DIFFIO_RX_B78NAL23 CLK5P/DQ26B/DIFFIO_RX_B78PAK23
CLK6N/DQSN48B/DIFFIO_RX_B142NAG17 CLK6P/DQS48B/DIFFIO_RX_B142PAF17
CLK7N/DQ48B/DIFFIO_RX_B144NAE16 CLK7P/DQ48B/DIFFIO_RX_B144PAE17
CLK11N/DQSN67B/DIFFIO_RX_B200NAW7 CLK11P/DQS67B/DIFFIO_RX_B200PAV7 CLK10N/DQSN68B/DIFFIO_RX_B202NAT8 CLK10P/DQS68B/DIFFIO_RX_B202PAR8 CLK9N/DQSN69B/DIFFIO_RX_B206NAN7 CLK9P/DQS69B/DIFFIO_RX_B206PAN6 CLK8N/DQSN70B/DIFFIO_RX_B208NAM7 CLK8P/DQS70B/DIFFIO_RX_B208PAL7
CLK12P/DQS1T/DIFFIO_RX_T3PG7
CLK12N/DQSN1T/DIFFIO_RX_T3NG6
CLK13P/DQS2T/DIFFIO_RX_T5PL6
CLK13N/DQSN2T/DIFFIO_RX_T5NK6
CLK14P/DQS3T/DIFFIO_RX_T9PB7
CLK14N/DQSN3T/DIFFIO_RX_T9NA7
CLK15P/DQS4T/DIFFIO_RX_T11PD7
CLK15N/DQSN4T/DIFFIO_RX_T11NC7
CLK19P/DQ23T/DIFFIO_RX_T67PU15
CLK19N/DQ23T/DIFFIO_RX_T67NT16
CLK18P/DQS23T/DIFFIO_RX_T69PP16
CLK18N/DQSN23T/DIFFIO_RX_T69NN16
CLK17P/DQ45T/DIFFIO_RX_T133PM23
CLK17N/DQ45T/DIFFIO_RX_T133NL23
CLK16P/DQS45T/DIFFIO_RX_T135PJ23
CLK16N/DQSN45T/DIFFIO_RX_T135NJ24
CLK23P/DQ65T/DIFFIO_RX_T193PR32
CLK23N/DQ65T/DIFFIO_RX_T193NP32
CLK22P/DQS65T/DIFFIO_RX_T195PN32
CLK22N/DQSN65T/DIFFIO_RX_T195NM32
CLK21P/DQ67T/DIFFIO_RX_T199PD33
CLK21N/DQ67T/DIFFIO_RX_T199NC33
CLK20P/DQS67T/DIFFIO_RX_T201PE34
CLK20N/DQSN67T/DIFFIO_RX_T201ND34
FPLL_BL_CLKOUTN/DQ9B/DIFFIO_TX_B25NAE30FPLL_BL_CLKOUTP/DQ9B/DIFFIO_TX_B25PAD30
FPLL_BL_FB/CLKOUTN/DQSN9B/DIFFIO_RX_B26NAC30FPLL_BL_FB/CLKOUTP/DQS9B/DIFFIO_RX_B26PAB30
FPLL_BC_CLKOUTN/DQ47B/DIFFIO_TX_B139NAJ17FPLL_BC_CLKOUTP/DQ47B/DIFFIO_TX_B139PAH16
FPLL_BC_FB/CLKOUTN/DQSN47B/DIFFIO_RX_B140NAL17FPLL_BC_FB/CLKOUTP/DQS47B/DIFFIO_RX_B140PAK17
FPLL_BR_CLKOUTN/DQ68B/DIFFIO_TX_B203NAU6FPLL_BR_CLKOUTP/DQ68B/DIFFIO_TX_B203PAT6
FPLL_BR_FB/CLKOUTN/DQ68B/DIFFIO_RX_B204NAR7FPLL_BR_FB/CLKOUTP/DQ68B/DIFFIO_RX_B204PAP7
FPLL_TR_FB/CLKOUTP/DQ3T/DIFFIO_RX_T7PA3
FPLL_TR_FB/CLKOUTN/DQ3T/DIFFIO_RX_T7NA4
FPLL_TR_CLKOUTP/DQ3T/DIFFIO_TX_T8PA6
FPLL_TR_CLKOUTN/DQ3T/DIFFIO_TX_T8NA5
FPLL_TC_FB/CLKOUTP/DQS24T/DIFFIO_RX_T71PJ16
FPLL_TC_FB/CLKOUTN/DQSN24T/DIFFIO_RX_T71NJ17
FPLL_TC_CLKOUTP/DQ24T/DIFFIO_TX_T72PL16
FPLL_TC_CLKOUTN/DQ24T/DIFFIO_TX_T72NK16
FPLL_TL_FB/CLKOUTP/DQS66T/DIFFIO_RX_T197PL33
FPLL_TL_FB/CLKOUTN/DQSN66T/DIFFIO_RX_T197NL34
FPLL_TL_CLKOUTP/DQ66T/DIFFIO_TX_T198PP34
FPLL_TL_CLKOUTN/DQ66T/DIFFIO_TX_T198NN34
R286 100, 1%
R196 100, 1%
R261 100, 1%R225 100, 1%
R223 100, 1%
R202 100, 1%
R224 100, 1%
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
LVDS
LVDS
Si570 Programmable OscillatorUse Clock Control GUI(Default 100MHz)I2C Address 00 HEX
PLL
CLK_SEL = HIGH selects (CLK1p/n) Si570 inputCLK_SEL = LOW selects (CLK2p/n) SMA input
Si571 Programmable OscillatorUse Clock Control GUI(Default 148.5MHz)I2C Address 55 HEX
Si5338 Programmable Oscillator Use Clock Control GUI (Defaults100MHz, 156.25MHz, 625MHz, 270MHz)I2C Address 70 HEX
Si5338 Programmable Oscillator Use Clock Control GUI (Defaults125MHz, 644.53125MHz, 282.5MHz, 125MHz)I2C Address 71 HEX
From FPGA
100M_OSC_N
CLKIN_SMA_CN
100M_OSC_P
CLKIN_SMA_NCLKIN_SMA_CPCLKIN_SMA_CN
CLKIN_SMA_P
CLOCK_SCL
CLOCK_SDA
2.5V_RPLL
2.5V_PLL
CLOCK_SDACLOCK_SCL
REFCLK5_QR2_CP
REFCLK2_QR1_CP
REFCLK1_QR0_CP
REFCLK0_QR0_CP
REFCLK5_QR2_CN
REFCLK2_QR1_CN
REFCLK1_QR0_CN
REFCLK0_QR0_CN
REFCLK1_QL0_CP
REFCLK4_QR2_CNREFCLK4_QR2_CP
REFCLK1_QL0_CNPDn
GLBUFFER_EN
CLKIN_SMA_CP
REFCLK5_QL2_CPREFCLK5_QL2_CN
REFCLK5_QL2_CP
REFCLK5_QL2_CN
REFCLK2_QL1_CPREFCLK2_QL1_CN
REFCLK4_QL2_CPREFCLK4_QL2_CN
Si570_EN
Si571_EN
2.5V_PLL
CLOCK_SDA
CLOCK_SCL
CLOCK_SCL
CLOCK_SDA
SI571_VCONTROL
SDI_CLK148_UPSDI_CLK148_DN
2.5V
1.8V
2.5V
3.3V
2.5V 2.5V
2.5V
2.5V
2.5V
2.5V
2.5V2.5V
CLK50_EN18
CLK125_EN18
CLKIN_50 18,9
CLOCK_SCL18
CLOCK_SDA18
SI570_EN18
CLK_125_P 9
CLK_125_N 9
REFCLK1_QR0_P 8
REFCLK2_QR1_P 8
REFCLK5_QR2_P 8
REFCLK0_QR0_P 8
REFCLK1_QR0_N 8
REFCLK2_QR1_N 8
REFCLK5_QR2_N 8
REFCLK0_QR0_N 8
CLKINTOP_P1 9
CLKINBOT_P1 9
CLKINTOP_N1 9
CLKINBOT_N1 9
REFCLK1_QL0_P 8REFCLK1_QL0_N 8
REFCLK4_QR2_P 8REFCLK4_QR2_N 8
CLKINTOP_P0 9CLKINTOP_N0 9
CLKINBOT_P0 9CLKINBOT_N0 9
CLK_SEL18,24
SI571_EN18
REFCLK5_QL2_P 8
REFCLK5_QL2_N 8
REFCLK2_QL1_P 8
REFCLK2_QL1_N 8
REFCLK4_QL2_P 8
REFCLK4_QL2_N 8
SDI_CLK148_DN 5
SDI_CLK148_UP 9
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
10 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
10 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
10 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C238
0.1uF
R263100, 1%
C371 DNI
R285 4.70K, 1%
Y3
25.00MHz
13
24
C259 0.1uF
C365 0.1uF
R226 4.70K, 1%
U46
Si5338A-CUSTOM
CLKIN_P1
CLKIN_N2
CLKIN3
I2C_LSB4
FDBK_P5
FDBK_N6
VDD17
VDD224
VDDO311
VDDO215
VDDO116
VDDO020
INTR8
CLK3B9
CLK3A10SCL
12
CLK2B13
CLK2A14
CLK1B17
CLK1A18
SDA19
CLK0B21
CLK0A22
RSVD_GND23
EPAD25
C229 0.1uF
C48
0.1uF
X1
125.0MHz
EN1
NC2
GND3
OUT4
OUTn5
VCC6
R211 4.7K
C354 DNI
C421
0.1uF
R204 4.70K, 1%
C239
0.1uF
C294 0.1uF
R112 4.70K, 1%
C226 0.1uF
R203 4.70K, 1% C243
0.1uFC244
0.1uF
L9
BLM15AG221SN1
C30
0.1uF
C220
0.1uF
C256 0.1uF
R296 4.99K
C501 0.1uF
C232
10uF
J13
LTI-SASF546-P26-X11
2345
Y2
25.00MHz
13
24
C180 DNI
C257 0.1uF
R1944.70K, 1%
C322 0.1uF
R295 4.99K
C227 0.1uF
U38
Si5338A-CUSTOM
CLKIN_P1
CLKIN_N2
CLKIN3
I2C_LSB4
FDBK_P5
FDBK_N6
VDD17
VDD224
VDDO311
VDDO215
VDDO116
VDDO020
INTR8
CLK3B9
CLK3A10SCL
12
CLK2B13
CLK2A14
CLK1B17
CLK1A18
SDA19
CLK0B21
CLK0A22
RSVD_GND23
EPAD25
J14LTI-SASF546-P26-X1
1
2345
C52
0.1uF
R210 100, 1%
C219
2.2uF
L6
BLM15AG221SN1
C437 0.1uF
R302
180K
R257124
C49
10uF
C211
0.1uF
C324
0.1uF
R255124
C471
0.1uF
X4
SI570
OE2
NC1
GND3
CLK+4
CLK-5
VCC6
SDA7
SCL8
R25484.5
X6
SI571
OE2
VC1
GND3
CLK+4
CLK-5
VDD6
SDA7
SCL8
C364 0.1uF
C436 0.1uF
R215 4.7K
C258 0.1uF
C323 0.1uF
C296
2.2uFU41
IDT5T9306
GN
D29
GL8
PDn21
CLK1p6
CLK1n7
CLK2p16
CLK2n15
Gn1
Q4n18Q4p19
Q3n13Q3p12
Q2n11Q2p10
VD
D17
Q1n4Q1p3
Q6p26
Q6n25
Q5n23Q5p24
CLK_SEL28
VD
D14
VDD5 VDD9
VD
D20
VDD2 V
DD
27
NC
22
C228 0.1uF
R241 4.7K
C34
0.1uF
C434
1.0nF
C295 0.1uF
C438 0.1uF
C406
0.1uF
R264100, 1%
C435 0.1uF
X3
50MHz
VCC4
GND2
OUT3
EN1
C195 DNI
C407
0.1uF
C28
10uF
C47
0.1uF
C29
0.1uF
R25684.5
C212
0.1uF
C408
0.1uF
C500 0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Stratix V GS Configuration
USER I/O INTERFACES
FPGA_CONFIG_D7
FPGA_CONFIG_D0FPGA_CONFIG_D1FPGA_CONFIG_D2FPGA_CONFIG_D3FPGA_CONFIG_D4FPGA_CONFIG_D5FPGA_CONFIG_D6
FPGA_CONFIG_D8FPGA_CONFIG_D9FPGA_CONFIG_D10FPGA_CONFIG_D11FPGA_CONFIG_D12FPGA_CONFIG_D13FPGA_CONFIG_D14FPGA_CONFIG_D15FPGA_CONFIG_D16FPGA_CONFIG_D17FPGA_CONFIG_D18FPGA_CONFIG_D19FPGA_CONFIG_D20FPGA_CONFIG_D21FPGA_CONFIG_D22FPGA_CONFIG_D23FPGA_CONFIG_D24FPGA_CONFIG_D25FPGA_CONFIG_D26FPGA_CONFIG_D27FPGA_CONFIG_D28
FPGA_CONFIG_D29FPGA_CONFIG_D30FPGA_CONFIG_D31
MSEL0MSEL1MSEL2MSEL3MSEL4
USER_LED_G4USER_LED_G5
FPGA_DCLK
2.5V
2.5V
2.5V
2.5V
S5_VCCPD_PGM_2.5V
FPGA_CONFIG_D[31:0]18
JTAG_BLASTER_TDO 12,25
JTAG_FPGA_TDO 25
TEMPDIODE_P31TEMPDIODE_N31
CPU_RESETn18,24
FPGA_DCLK17,18
FPGA_nCONFIG18
FPGA_nCSO 17
FPGA_AS_DATA1 17
FPGA_AS_DATA0 17
FPGA_AS_DATA2 17FPGA_AS_DATA3 17
PCIE_SMBDAT3
PCIE_WAKEn 3
PCIE_LED_G324
FPGA_PR_REQUEST 18
FPGA_PR_DONE 18
FPGA_PR_READY 18FPGA_PR_ERROR 18
FPGA_CvP_CONFDONE 18
JTAG_TCK 12,18,22,25JTAG_TMS 12,25
MSEL0 18MSEL1 18MSEL2 18MSEL3 18MSEL4 18
USER_LED_G[7:0]24,4,5,6,9
FPGA_CONF_DONE18
FPGA_nSTATUS18
PCIE_PERSTn 3SDI_RX_EN 18,21
PCIE_SMBCLK3
ENET_RX_P23
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
11 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
11 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
11 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C66 DNI
R138 1.00k
R135 1.00k
R29910K
R137 1.00k
R2
71
10K
R201 10K
R124
DNI
R2
76
10K
Stratix V GX Configuration
Bank 3A
Bank 3B
Bank 4A
Temperature Sense Do Not Use
5SGSMD5K2F40
U15J
Version = 1.0 Pin-out
NCONFIGAK35
DCLKAC31
CLKUSR/DQ1B/DIFFIO_TX_B1NAN34
CRC_ERROR/DQ1B/DIFFIO_TX_B1PAN33
DEV_OE/DQS1B/DIFFIO_RX_B2PAP34
DEV_CLRN/DQ1B/DIFFIO_TX_B3NAM34
INIT_DONE/DQ1B/DIFFIO_TX_B3PAL34
DATA0/DQS2B/DIFFIO_RX_B4PAP33
DATA1/DQ2B/DIFFIO_TX_B5NAT33
DATA2/DQ2B/DIFFIO_TX_B5PAR33
DATA3/DQ2B/DIFFIO_RX_B6NAU34
DATA4/DQ2B/DIFFIO_RX_B6PAU33
DATA5/DQ3B/DIFFIO_TX_B7NAN31
DATA6/DQ3B/DIFFIO_TX_B7PAM31
DATA7/DQSN3B/DIFFIO_RX_B8NAU32
DATA8/DQS3B/DIFFIO_RX_B8PAT32
DATA9/DQ3B/DIFFIO_TX_B9NAR31
DATA10/DQ3B/DIFFIO_TX_B9PAP31
DATA11/DQSN4B/DIFFIO_RX_B10NAW34
DATA12/DQS4B/DIFFIO_RX_B10PAV34
DATA13/DQ4B/DIFFIO_TX_B11NAW31
DATA14/DQ4B/DIFFIO_TX_B11PAV31
DATA15/DQ4B/DIFFIO_RX_B12NAW32
DATA16/DQ4B/DIFFIO_RX_B12PAV32
DATA17/DQ5B/DIFFIO_TX_B13NAJ33
DATA18/DQ5B/DIFFIO_TX_B13PAH33
DATA19/DQSN5B/DIFFIO_RX_B14NAL33
DATA20/DQS5B/DIFFIO_RX_B14PAK33
DATA21/DQ5B/DIFFIO_TX_B15NAK32
DATA22/DQ5B/DIFFIO_TX_B15PAJ32
DATA23/DQSN6B/DIFFIO_RX_B16NAH31
DATA24/DQS6B/DIFFIO_RX_B16PAG31
DATA25/DQ6B/DIFFIO_TX_B17NAF31
DATA26/DQ6B/DIFFIO_TX_B17PAE31
DATA27/DQ6B/DIFFIO_RX_B18NAJ30
DATA28/DQ6B/DIFFIO_RX_B18PAH30
DATA29/DQ7B/DIFFIO_TX_B19NAR30
DATA30/DQ7B/DIFFIO_TX_B19PAP30
DATA31/DQSN7B/DIFFIO_RX_B20NAU30
NCEAC8
CONF_DONEAH6
NSTATUSAM5
TRSTAM35
TMSAT35TCKAA31
TDIAJ34TDOAH34
NCSOAD32
AS_DATA3AG32AS_DATA2AC32AS_DATA1Y31AS_DATA0,ASDOAB31
NCEO/DQSN2B/DIFFIO_RX_B4NAN32
PR_DONE/DQS7B/DIFFIO_RX_B20PAT30
PR_REQUEST/DQ7B/DIFFIO_TX_B21NAN30
PR_READY/DQ7B/DIFFIO_TX_B21PAN29
PR_ERROR/DQ8B/DIFFIO_TX_B23NAU29
CVP_CONFDONE/DQ8B/DIFFIO_TX_B23PAT29
NPERSTL0/DQ9B/DIFFIO_TX_B27NAC28
NPERSTL1/DQ9B/DIFFIO_TX_B27PAB28
NPERSTR1/DQ10B/DIFFIO_TX_B29NAE29NPERSTR0/DQ10B/DIFFIO_TX_B29PAF28
MSEL4AH7MSEL3AG8MSEL2AD8MSEL1AA10MSEL0AA9
NIO_PULLUPAK5
DNU_1AA30
DNU_2AL19
DNU_3J19
TEMPDIODENP5 TEMPDIODEPR6
DNU_4Y20
DNU_5AV35
DNU_6AV5
DNU_7AW35
DNU_8AW5
DNU_9R7
OPEN
SW4
TDA06H0SB1
123456 7
89101112
R2
87
10K
R30610K
R136 1.00k
R2
72
10K
R139 1.00k
R193 10K
R123 DNI
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
JTAG
(uses JTAG mode only)USB Blaster Programming Header
JTAG Chain Control
ON = not-in-chainOFF = in-chain
TS5A23157 Switch FunctionsWhen Pins 1 & 5 are:LOW --> NC to/from COM = ON and NO to/from COM = OFFHIGH --> NC to/from COM = OFF and NO to/from COM = ON
Logic 0 = pin 10 <--> pin 9 (5M2210 Bypass)Logic 1 = pin 10 <--> pin 2 (5M2210 Enable)
Logic 0 = pin 6 <--> pin 7 (5M2210 Bypass)Logic 1 = pin 6 <--> pin 4 (5M2210 Enable)
Logic 0 = pin 10 <--> pin 9 (HSMB Bypass)Logic 1 = pin 10 <--> pin 2 (HSMB Enable)
Logic 0 = pin 6 <--> pin 7 (HSMBBypass)Logic 1 = pin 6 <--> pin 4 (HSMB Enable)
Logic 0 = pin 10 <--> pin 9 (HSMA Bypass)Logic 1 = pin 10 <--> pin 2 (HSMA Enable)
Logic 0 = pin 6 <--> pin 7 (HSMA Bypass)Logic 1 = pin 6 <--> pin 4 (HSMA Enable)
Populate R117 if you would like toMaster the JTAG chain throughHSMC Port A or HSMC Port B.
HSMA TDI = JTAG_FPGA_TDO_RETIMER
JTAG_BLASTER_TDI
HSMB_JTAG_EN
5M2210_JTAG_ENHSMA_JTAG_EN
PCIE_JTAG_EN
JTAG_TCK5M2210_JTAG_EN
HSMB_JTAG_EN
HSMB_JTAG_TDI
JTAG_TMS
JTAG_TMSJTAG_BLASTER_TDIJTAG_BLASTER_TDOJTAG_TCK
HSMA_JTAG_EN
5M2210_JTAG_EN
JTAG_TMS
JTAG_TMS
HSMA_JTAG_EN
HSMB_JTAG_EN
JTAG_BLASTER_TDO JTAG_BLASTER_TDI
JTAG_5M2210_TDI
2.5V2.5V
2.5V
2.5V
2.5V
3.3V2.5V
2.5V
2.5V
2.5V
2.5V
2.5V
JTAG_TCK 11,18,22,25
JTAG_TMS 11,25
JTAG_BLASTER_TDO 11,25
JTAG_5M2210_TDO18
HSMB_JTAG_TDO22
HSMB_JTAG_TMS 22
PCIE_JTAG_TDO 3
PCIE_JTAG_TCK 3
PCIE_JTAG_TMS 3
PCIE_JTAG_TDI 3
HSMA_JTAG_TMS 22
HSMB_JTAG_TDI 22
HSMA_JTAG_TDO22
5M2210_JTAG_TMS 18
PCIE_JTAG_EN18
USB_DISABLEn25
JTAG_FPGA_TDO_RETIMER 22,25
JTAG_BLASTER_TDI 25
JTAG_5M2210_TDI 18
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
12 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
12 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
12 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
J10
70247-1051
2468
10
13579
C554 0.1uF
C510.1uF
R105 1.00kR122 1.00k
R133 1.00kR132 1.00k
OPEN
SW3
TDA04H0SB1
1234 5
678
R113 1.00k
C565 0.1uF
C533 0.1uF
R355 1.00k
R379 1.00k
R107
1.00k
U54
TS5A23157
IN11
NO12
GND3
NO24
IN25
COM26
NC27
V+8
NC19
COM110
U55
TS5A23157
IN11
NO12
GND3
NO24
IN25
COM26
NC27
V+8
NC19
COM110
R374 1.00k
R131 1.00k
C500.1uF
U51
TS5A23157
IN11
NO12
GND3
NO24
IN25
COM26
NC27
V+8
NC19
COM110
R117 DNI
C53 DNI
R134 1.00k
U22
MAX13042
VLB2
IO_VL4C1
IO_VL3C2
IO_VL2C3
IO_VL1C4
GNDB4
VCCB1
IO_VCC1A4
IO_VCC2A3
IO_VCC3A2
IO_VCC4A1
ENB3
R110 DNI
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
512MB DDR3 (x72 devices) - Part 1 of 2
DDR3_A7
DDR3_A5
DDR3_CLK_P DDR3_CLK_N
DDR3_A9DDR3_A2
DDR3_A1
DDR3_A5
DDR3_A1
DDR3_A6
DDR3_A11
DDR3_A0
DDR3_A7
DDR3_A12
DDR3_A2
DDR3_A8
DDR3_A3
DDR3_A9
DDR3_A4
DDR3_A10
DDR3_A6
DDR3_A11
DDR3_RESETn
DDR3_A5
DDR3_A1
DDR3_A6
DDR3_A11
DDR3_A0
DDR3_A7
DDR3_A12
DDR3_A2
DDR3_A8
DDR3_A3
DDR3_A9
DDR3_A4
DDR3_A10
DDR3_A0
DDR3_A3
DDR3_A7
DDR3_A5
DDR3_A1
DDR3_A6
DDR3_A11
DDR3_A0
DDR3_A7
DDR3_A12
DDR3_A2
DDR3_A8
DDR3_A3
DDR3_A9
DDR3_A4
DDR3_A10
DDR3_CKE
DDR3_A12
DDR3_A11DDR3_A4
DDR3_A2
DDR3_A8
DDR3_A12 DDR3_BA1DDR3_A5
DDR3_CSn
DDR3_RASnDDR3_BA0
DDR3_WEn
DDR3_CASnDDR3_ODT
DDR3_A3
DDR3_A9
DDR3_A13 DDR3_BA2DDR3_A6
DDR3_A4
DDR3_A10
DDR3_A8DDR3_A0
DDR3_A10
DDR3_A1
DDR3_DQS_P0
DDR3_DQ5
DDR3_DQ11
DDR3_DQ6
DDR3_DQ12
DDR3_DQ0DDR3_DQ1
DDR3_DQS_N0
DDR3_DQ7
DDR3_DQ13
DDR3_DQS_P1
DDR3_DQ2
DDR3_DQS_N1
DDR3_DQ8
DDR3_DQ14
DDR3_DQ3
DDR3_DQ9
DDR3_DQ15
DDR3_DQ4
DDR3_DQ10
DDR3_DQ48
DDR3_DQ55
DDR3_DQ61
DDR3_DQS_P6DDR3_DQS_N6
DDR3_DQS_N7DDR3_DQS_P7
DDR3_DQ50
DDR3_DQ56
DDR3_DQ62
DDR3_DQ51
DDR3_DQ57
DDR3_DQ63
DDR3_DQ52
DDR3_DQ58
DDR3_DQ53
DDR3_DQ59
DDR3_DQ54
DDR3_DQ60
DDR3_DQ49
DDR3_DQ37
DDR3_DQ46
DDR3_DQS_P4DDR3_DQS_N4
DDR3_DQ41
DDR3_DQ38
DDR3_DQ47
DDR3_DQS_P5DDR3_DQS_N5
DDR3_DQ42
DDR3_DQ33DDR3_DQ32
DDR3_DQ39
DDR3_DQ34
DDR3_DQ43
DDR3_DQ40
DDR3_DQ35
DDR3_DQ44
DDR3_DQ36
DDR3_DQ45
DDR3_DQ20
DDR3_DQ26
DDR3_DQ21
DDR3_DQ27
DDR3_DQ22
DDR3_DQ28
DDR3_DQ17
DDR3_DQ23
DDR3_DQ16
DDR3_DQ29
DDR3_DQS_P2DDR3_DQS_N2
DDR3_DQ18
DDR3_DQ24
DDR3_DQ30
DDR3_DQS_P3DDR3_DQS_N3
DDR3_DQ19
DDR3_DQ25
DDR3_DQ31
DDR3_DM2DDR3_DM3
DDR3_ZQ02
DDR3_BA2DDR3_BA1DDR3_BA0
DDR3_A13
DDR3_DM6DDR3_DM7
DDR3_ZQ04
DDR3_CLK_P
DDR3_CSnDDR3_WEnDDR3_RASnDDR3_CASn
DDR3_RESETnDDR3_ODT
DDR3_BA2
DDR3_CKE
DDR3_BA1
DDR3_CLK_N
DDR3_BA0
DDR3_A13
DDR3_DM4DDR3_DM5
DDR3_ZQ03
DDR3_BA2DDR3_BA1DDR3_BA0
DDR3_A13
DDR3_DM0DDR3_DM1
DDR3_ZQ01
DDR3_BA2DDR3_BA1DDR3_BA0
DDR3_A13
DDR3_CLK_P
DDR3_CSnDDR3_WEnDDR3_RASnDDR3_CASn
DDR3_RESETnDDR3_ODT
DDR3_CKE
DDR3_CLK_NDDR3_CLK_P
DDR3_CSnDDR3_WEnDDR3_RASnDDR3_CASn
DDR3_RESETnDDR3_ODT
DDR3_CKE
DDR3_CLK_N
1.5V
VTT_DDR3
VTT_DDR3
VTT_DDR3
VTT_DDR3VTT_DDR3
VTT_DDR3
1.5V
VREF_DDR3
1.5V
VREF_DDR3
1.5V
VREF_DDR3
1.5V
VREF_DDR3
1.5V
DDR3_DM[8:0]14,7
DDR3_BA[2:0]14,7
DDR3_DQ[71:0]14,7
DDR3_DQS_P[8:0]14,7
DDR3_DQS_N[8:0]14,7
DDR3_CLK_P14,7
DDR3_CSn14,7DDR3_WEn14,7DDR3_RASn14,7DDR3_CASn14,7
DDR3_RESETn14,7DDR3_ODT14,7
DDR3_CKE14,7
DDR3_CLK_N14,7
DDR3_A[13:0]14,7
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
13 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
13 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
13 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C551
2.2nF
C402
0.47uF
RN3B 512 15
C349
0.1uF
C520
2.2nF
C496
4.7nF
C521
0.1uF
CN1
0.1uF
1234 5
678
RN4D 514 13
C545
2.2nF
C493
0.1uF
DDR3 DeviceU21
MT41J128M16HA
A5P2 A4P8 A3N2 A2P3 A1P7 A0N3
NC4L9
A10/APL7
A11R7
A12/BCnN7
RESETnT2
VSSQB1
VSSQB9
VSSQD1
A9R3 A8T8 A7R2 A6R8
NC5M7
NC1J1
NC3L1
ZQL8
CK_NK7
WEL3
CKEK9
A13T3
ODTK1
NC2J9
RASJ3
CK_PJ7
CSL2
BA0M2
BA1N8
BA2M3
CASK3
DM1D3
NC6T7
DM0E7
VDDB2
VDDD9
VDDG7
VDDK2
VSSA9
VSSB3
VSSE1
VSSG8
DQ0E3
DQS_P0F3
DQ1F7
DQ2F2
DQ3F8
DQ4H3
DQ5H8
DQ6G2
DQ7H7
DQ8D7
DQ9C3
DQ10C8
DQ11C2
DQ12A7
DQ13A2
DQ14B8
DQ15A3
DQS_P1C7DQS_N0G3
DQS_N1B7
VSSQD8
VSSQE2
VSSQE8
VSSQF9
VDDQH9
VDDK8
VDDN1
VDDN9
VDDR1
VDDR9
VREFDQH1
VREFCAM8
VSSQG1
VSSQG9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
VDDQD2
VDDQE9
VDDQF1
VDDQH2
VSSJ2
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
C529
0.47uF
C351
0.1uF
R270
240
C469
2.2nF
RN2B 512 15
C528
2.2nF
C368
0.47uF
CN3
0.1uF
1234 5
678
R301
240
C350
2.2nF
RN4F 516 11
C547
0.1uF
C495
0.47uF
RN2H 518 9RN4A 511 16
RN4G 517 10
C498
2.2nF
C370
3.3nF
C563
0.1uF
RN3A 511 16
C369
2.2nF
C470
0.01uF
RN3E 515 12
C310
2.2nF
RN4E 515 12
C309
0.47uF
RN2D 514 13
C352
0.01uF
DDR3 DeviceU17
MT41J128M16HA
A5P2 A4P8 A3N2 A2P3 A1P7 A0N3
NC4L9
A10/APL7
A11R7
A12/BCnN7
RESETnT2
VSSQB1
VSSQB9
VSSQD1
A9R3 A8T8 A7R2 A6R8
NC5M7
NC1J1
NC3L1
ZQL8
CK_NK7
WEL3
CKEK9
A13T3
ODTK1
NC2J9
RASJ3
CK_PJ7
CSL2
BA0M2
BA1N8
BA2M3
CASK3
DM1D3
NC6T7
DM0E7
VDDB2
VDDD9
VDDG7
VDDK2
VSSA9
VSSB3
VSSE1
VSSG8
DQ0E3
DQS_P0F3
DQ1F7
DQ2F2
DQ3F8
DQ4H3
DQ5H8
DQ6G2
DQ7H7
DQ8D7
DQ9C3
DQ10C8
DQ11C2
DQ12A7
DQ13A2
DQ14B8
DQ15A3
DQS_P1C7DQS_N0G3
DQS_N1B7
VSSQD8
VSSQE2
VSSQE8
VSSQF9
VDDQH9
VDDK8
VDDN1
VDDN9
VDDR1
VDDR9
VREFDQH1
VREFCAM8
VSSQG1
VSSQG9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
VDDQD2
VDDQE9
VDDQF1
VDDQH2
VSSJ2
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
RN4C 513 14
C281
0.01uF
C560
0.47uF
RN4B 512 15
RN3D 514 13
C404
0.1uF
C418
2.2nF
RN2C 513 14
C559
0.01uF
C312
2.2nF
RN2G 517 10
C544
0.47uF
RN4H 518 9
C405
0.47uF
RN2A 511 16
C543
0.01uF
C564
0.1uF
RN3H 518 9
C479
3.3nF
RN2F 516 11
C464
0.01uF
C519
0.01uF
CN2
0.1uF
1234 5
678
RN3F 516 11
R207100, 1%
C401
0.1uF
C419
4.7nF
C420
2.2nF
RN3C 513 14
C466
2.2nF
C400
0.01uF
C308
0.1uF
C562
2.2nF
R340
240
DDR3 DeviceU28
MT41J128M16HA
A5P2 A4P8 A3N2 A2P3 A1P7 A0N3
NC4L9
A10/APL7
A11R7
A12/BCnN7
RESETnT2
VSSQB1
VSSQB9
VSSQD1
A9R3 A8T8 A7R2 A6R8
NC5M7
NC1J1
NC3L1
ZQL8
CK_NK7
WEL3
CKEK9
A13T3
ODTK1
NC2J9
RASJ3
CK_PJ7
CSL2
BA0M2
BA1N8
BA2M3
CASK3
DM1D3
NC6T7
DM0E7
VDDB2
VDDD9
VDDG7
VDDK2
VSSA9
VSSB3
VSSE1
VSSG8
DQ0E3
DQS_P0F3
DQ1F7
DQ2F2
DQ3F8
DQ4H3
DQ5H8
DQ6G2
DQ7H7
DQ8D7
DQ9C3
DQ10C8
DQ11C2
DQ12A7
DQ13A2
DQ14B8
DQ15A3
DQS_P1C7DQS_N0G3
DQS_N1B7
VSSQD8
VSSQE2
VSSQE8
VSSQF9
VDDQH9
VDDK8
VDDN1
VDDN9
VDDR1
VDDR9
VREFDQH1
VREFCAM8
VSSQG1
VSSQG9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
VDDQD2
VDDQE9
VDDQF1
VDDQH2
VSSJ2
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
R376
240
RN2E 515 12
C465
0.1uF
C561
2.2nF
C494
2.2nF
C527
0.1uF
RN3G 517 10
C499
0.01uF
DDR3 DeviceU23
MT41J128M16HA
A5P2 A4P8 A3N2 A2P3 A1P7 A0N3
NC4L9
A10/APL7
A11R7
A12/BCnN7
RESETnT2
VSSQB1
VSSQB9
VSSQD1
A9R3 A8T8 A7R2 A6R8
NC5M7
NC1J1
NC3L1
ZQL8
CK_NK7
WEL3
CKEK9
A13T3
ODTK1
NC2J9
RASJ3
CK_PJ7
CSL2
BA0M2
BA1N8
BA2M3
CASK3
DM1D3
NC6T7
DM0E7
VDDB2
VDDD9
VDDG7
VDDK2
VSSA9
VSSB3
VSSE1
VSSG8
DQ0E3
DQS_P0F3
DQ1F7
DQ2F2
DQ3F8
DQ4H3
DQ5H8
DQ6G2
DQ7H7
DQ8D7
DQ9C3
DQ10C8
DQ11C2
DQ12A7
DQ13A2
DQ14B8
DQ15A3
DQS_P1C7DQS_N0G3
DQS_N1B7
VSSQD8
VSSQE2
VSSQE8
VSSQF9
VDDQH9
VDDK8
VDDN1
VDDN9
VDDR1
VDDR9
VREFDQH1
VREFCAM8
VSSQG1
VSSQG9
VDDQA1
VDDQA8
VDDQC1
VDDQC9
VDDQD2
VDDQE9
VDDQF1
VDDQH2
VSSJ2
VSSJ8
VSSM1
VSSM9
VSSP1
VSSP9
VSST1
VSST9
C468
0.1uF
C467
2.2nF
C522
4.7nF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
1152MB DDR3 - Part 2 of 2
Place near DDR3 (U?)
DDR3_A5
DDR3_A1
DDR3_A6
DDR3_A11
DDR3_A0
DDR3_A7
DDR3_A12
DDR3_A2
DDR3_A8
DDR3_A3
DDR3_A9
DDR3_A4
DDR3_A10
DDR3_DM8
DDR3_ZQ05
DDR3_BA2
DDR3_BA0DDR3_BA1
DDR3_A13
DDR3_DQ64
DDR3_DQ71
DDR3_DQ66DDR3_DQ67DDR3_DQ68DDR3_DQ69DDR3_DQ70
DDR3_DQ65
DDR3_DQS_P8DDR3_DQS_N8
1.5V
1.5V
VREF_DDR3
DDR3_DM[8:0]13,7
DDR3_A[13:0]13,7
DDR3_BA[2:0]13,7
DDR3_DQ[71:0]13,7
DDR3_DQS_P[8:0]13,7
DDR3_DQS_N[8:0]13,7
DDR3_RESETn13,7DDR3_ODT13,7
DDR3_CSn13,7DDR3_WEn13,7DDR3_RASn13,7DDR3_CASn13,7
DDR3_CLK_P13,7
DDR3_CKE13,7
DDR3_CLK_N13,7
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
14 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
14 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
14 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C250
0.47uF
C237
0.47uF
C330
0.47uF
DDR3 DeviceU12
MT41J128M8JP
A0K3
A1L7
A10/APH7
A11M7
A12/BCnK7
A13N3
A2L3
A3K2
A4L8
A5L2
A6M8
A7M2
A8N8
A9M3
BA0J2
BA1K8
BA2J3
CASG3
CSH2
CK_NG7 CK_PF7 CKEG9
DM/TDQS_PB7
DQ0B3
DQ1C7
DQ2C2
DQ3C8
DQS_ND3 DQS_PC3
NC5H9
NC1A3
NC2F1
NC3F9
NC4H1
NC6J7
NC7N7
NF/DQ4E3
NF/DQ5E8
NF/DQ6D2
NF/DQ7E7
NF/TDQS_NA7
ODTG1
RASF3
RESETnN2
VDDA2 VDDA9 VDDD7 VDDG2 VDDG8 VDDK1 VDDK9 VDDM1 VDDM9
VDDQB9
VDDQC1
VDDQE2 VDDQE9
VREFCAJ8
VREFDQE1
VSSA1
VSSA8
VSSB1
VSSD8
VSSF2
VSSF8
VSSJ1
VSSJ9
VSSL1
VSSL9
VSSN1
VSSN9
VSSQB2
VSSQB8
VSSQC9
VSSQD1
VSSQD9
WEH3
ZQH8
C251
0.47uF
C209
4.7nF
C253
0.1uF
C254
0.47uF
C210
0.01uF
C224
0.1uF
C255
0.01uF
R214
240
C252
0.47uF
C225
0.1uF
C208
0.01uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
QDRII+
Place Near QDRII+
VDDQ DECOUPLING
VDD DECOUPLING
GND QDRII A21NC PIN ON QDRII+
QDRII+ ODT = QDRII C_N
QDRII+ QVLD = QDRII C_P
Altera recommends to use external termination for QDRII/+ address andcommand signals. In this case external termination was not used, becausesimulations showed that with the short trace length and a point to pointconnection the external termination was not necessary. As a result since thereis limited board space external termination is not used.
QDRII_Q13QDRII_Q14QDRII_Q15
QDRII_Q1QDRII_Q2QDRII_Q3QDRII_Q4QDRII_Q5QDRII_Q6QDRII_Q7QDRII_Q8QDRII_Q9QDRII_Q10QDRII_Q11QDRII_Q12
QDRII_Q0
QDRII_D13QDRII_D14QDRII_D15
QDRII_D1QDRII_D2QDRII_D3QDRII_D4QDRII_D5QDRII_D6QDRII_D7QDRII_D8QDRII_D9QDRII_D10QDRII_D11QDRII_D12
QDRII_D0
QDRII_Q16QDRII_Q17
QDRII_D16QDRII_D17
QDRII_A13QDRII_A14QDRII_A15QDRII_A16QDRII_A17QDRII_A18
QDRII_A1QDRII_A2QDRII_A3QDRII_A4QDRII_A5QDRII_A6QDRII_A7QDRII_A8QDRII_A9QDRII_A10QDRII_A11QDRII_A12
QDRII_A0
QDRII_A19
QDRII_C_N
QDRII_A20
VREF_QDRII_RLD
1.8V
1.8V
1.8V
1.8V
1.8V
QDRII_WPSn5QDRII_RPSn5
QDRII_K_P5QDRII_K_N5
QDRII_DOFFn5
QDRII_C_N5
QDRII_CQ_N5
QDRII_CQ_P5
QDRII_C_P5
QDRII_BWSn05QDRII_BWSn15
QDRII_D[17:0]5
QDRII_Q[17:0]5
QDRII_A[20:0]5
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
15 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
15 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
15 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C164
2.2nF
C120
0.1uFC160
0.1uF
R18110.0K
C163
3.3nF
C187
4.7nF
C189
4.7nF
C141
1.0nF
C159
4.7nF
C199
22nF
JTAG
U5A
CY7C2263KV18
K_PB6
K_NA6
QVLDP6
ODTR6
CQ_PA11
CQ_NA1
DOFFH1
WPSA4
RPSA8
BWS0B7
NC/288MA7
BWS1A5
NC37B5
ZQH11
TMSR10
TDIR11
TCKR2 TDOR1
D0P10
D1N11
D2M11
D3K10
D4J11
D5G11
D6E10
D7D11
D8C11
NC1N10
NC2M9
NC3L9
NC4J9
NC5G10
NC6F9
NC7D10
NC8C9
NC9B9
D9B3
D10C3
D11D2
D12F3
D13G2
D14J3
D15L3
D16M3
D17N2
NC10C1
NC11D1
NC12E2
NC13G1
NC14J1
NC15K2
NC16M1
NC17N1
NC18P2
Q0P11
Q1M10
Q2L11
Q3K11
Q4J10
Q5F11
Q6E11
Q7C10
Q8B11
NC19P9
NC20N9
NC21L10
NC22K9
NC23F10
NC24E9
NC25D9
NC26B10
Q9B2
Q10D3
Q11E3
Q12F2
Q13G3
Q14K3
Q15L2
Q16N3
Q17P3
NC27B1
NC28C2
NC29E1
NC30F1
NC31J2
NC32K1
NC33L1
NC34M2
NC35P1
A18A3A17A9
A2B4
A3B8
A4C5
A5C7
A6N5
A7N6
A8N7
A9P4
A10P5
A11P7
A12P8
A13R3
A14R4
A15R5
A16R7
A1R8A0R9
VREFH2
VREFH10
NC36C6
NC/144MA2NC/72MA10
NC38G9
U5B
CY7C2263KV18
VSSC4
VSSC8
VSSD4
VSSD5
VSSD6
VSSD7
VSSD8
VSSE5
VSSE6
VSSE7
VSSF6
VSSG6
VSSH6
VSSJ6
VSSK6
VSSL5
VSSL6
VSSL7
VSSM4
VSSM8
VSSN4
VSSN8
VDDF5
VDDF7
VDDG5
VDDG7
VDDH5
VDDH7
VDDJ5
VDDJ7
VDDK5
VDDK7
VDDQE4
VDDQE8
VDDQF4
VDDQF8
VDDQG4
VDDQG8
VDDQH3
VDDQH4
VDDQH8
VDDQH9
VDDQJ4
VDDQJ8
VDDQK4
VDDQK8
VDDQL4
VDDQL8
VSSM5
VSSM6
VSSM7
C123
22nF
C121
0.01uF
C162
0.01uF
C185
0.01uF
C138
0.1uF
C161
0.01uF
C183
2.2uF
R200 49.9
C140
0.1uF
C122
1.0uF
C218
0.1uF
C104
0.1uF
C139
0.1uF
C184
2.2nF
C217
0.01uF
C186
3.3nF
R180 249
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
RLDRAM II, CIO
PLACE THESE CAPACITORS AS CLOSE ASPOSSIBLE TO THE RLDRAM II
PLACE THESE RESISTORS AS CLOSE ASPOSSIBLE TO THE RLDRAM II
BYPASS CAPS FOR RLDRAM II CIO
HSTL1
RLDRAM II INTERFACE
1.8V
60 Ohms 301 Ohm to GND
50 Ohms
RLDC_ZQ
250 Ohm to GND
MAX Drive
Setting
Output Impedence
On-die termination (ODT) is enabled by settingA9 to “1” during an MRS command.
Altera recommends to use external termination for RLDRAM II address andcommand signals. In this case external termination was not used, becausesimulations showed that with the short trace length and a point to pointconnection the external termination was not necessary. As a result since there islimited board space external termination is not used.
RLDC_CK_PRLDC_CK_N
RLDC_DK_PRLDC_DK_N
RLDC_WEnRLDC_REFn
RLDC_DQ[17:0]
RLDC_QK_P[1:0]
RLDC_QK_N[1:0]
RLDC_A[22:0]
RLDC_BA[2:0]
RLDC_CSnRLDC_DM
RLDC_CK_PRLDC_CK_N
RLDC_QVLD
RLDC_CSn
RLDC_ZQ
RLDC_QK_N0
RLDC_QK_N1
RLDC_QK_P0
RLDC_CSn
RLDC_DM
RLDC_QK_P1
RLDC_QVLD
RLDC_BA0RLDC_BA1RLDC_BA2
RLDC_WEnRLDC_REFn
RLDC_ZQ
RLDC_DQ1RLDC_DQ2RLDC_DQ3RLDC_DQ4RLDC_DQ5RLDC_DQ6RLDC_DQ7RLDC_DQ8RLDC_DQ9RLDC_DQ10RLDC_DQ11
RLDC_DQ0
RLDC_DQ16RLDC_DQ17
RLDC_DQ12RLDC_DQ13RLDC_DQ14RLDC_DQ15
RLDC_A1RLDC_A0
RLDC_A4
RLDC_A2RLDC_A3
RLDC_A7
RLDC_A5RLDC_A6
RLDC_A8
RLDC_A11
RLDC_A9RLDC_A10
RLDC_A14
RLDC_A12RLDC_A13
RLDC_A15
RLDC_A18
RLDC_A16RLDC_A17
RLDC_A19
RLDC_A20
RLDC_A22RLDC_A21
RLDC_CK_P RLDC_CK_NRLDC_DK_P RLDC_DK_N
RLDC_DK_NRLDC_DK_P
2.5V
VREF_QDRII_RLD
VREF_QDRII_RLD
VTT_QDRII_RLD
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
1.8V
2.5V
VTT_QDRII_RLD
VTT_QDRII_RLD
RLDC_REFn 4RLDC_WEn 4
RLDC_DQ[17:0] 4
RLDC_QK_P[1:0] 4
RLDC_QK_N[1:0] 4
RLDC_BA[2:0]4,9
RLDC_A[22:0] 4
RLDC_DM 4RLDC_CSn 16,4
RLDC_CK_N 4RLDC_CK_P4
RLDC_QVLD 4
RLDC_CSn 16,4
RLDC_DK_P4RLDC_DK_N 4
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
16 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
16 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
16 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
RLDRAM II CIO, x18
U20B
MT49H32M18BM
VDDJ10
VSSH10
VDDB1
VDDB12
VDDG4
VDDG9
VDDJ3
VDDJ4
VDDJ9
VDDK3
VDDQC4
VDDQC9
VDDQE4
VDDQE9
VDDQP4
VDDQP9
VDDQT4
VDDQT9
VSSA2
VSSA4
VSSA9
VSSH3
VSSH4
VSSH9
VSSL3
VSSL4
VSSL9
VSSL10
VSSR1
VSSR12
VSSV4
VSSV9
VSSD12
VSSQB4
VSSQB9
VSSQD4
VSSQD9
VSSQF4
VSSQF9
VEXTA3
VREFA1
VEXTA10
VSSQN4
VSSQN9
VSSQR4
VSSQR9
VSSQU4
VSSQU9
VDDK4
VDDK9
VDDK10
VDDM4
VDDM9
VDDU1
VDDU12
VREFV1
VEXTV3
VEXTV10
VTTC1
VTTC12
VTTT1
VTTT12
C427
100uF
R300 100, 1%
C477 0.1uF
C428
1uF
RLDRAM II CIO, x18
U20A
MT49H32M18BM
DNU10U2
DNU13P2
CKJ12
CKK12
NF1J1
NF2J2
REFL1
B0J11
B1K11
A0G12
A1G11
A2G10
A3H12
A4H11
A5F1
A6G2
A7G3
A8G1
A9H2
A10M12
A11M11
A12M10
TCKA12 TMSA11
B2H1
A13L12
DQ17U3
DNU16T2
DQ16T3DQ15P3
DNU11N2
DQ14N3
DNU18U11
DQ13U10
DNU17T11
DQ12T10
DNU15R11
DQ11R10
DNU14P11
DQ10P10
DNU12N11
DQ9N10
DNU1B11
DQ0B10
DNU4C11
DQ1C10
DNU7E11
DQ2E10
DNU9F11
DQ3F10
DNU2B2
DQ4B3
DNU3C2
DQ5C3
DNU5D2
DQ6D3
DNU6E2
DQ7E3
DNU8F2
DQ8F3
A14L11
A15P1
A16M2
A17M3
A18N1
A19N12
DNU19/A20E12
DNU20/A21E1
DNU21/A22D1
CSL2
WEM1
QK0D11
QK0D10
DMP12
QVLDF12
QK1R2
QK1R3
TDOV11
TDIV12
ZQV2
DK0K1
DK0K2
C446
0.1uF
C472 0.1uF
C474 0.1uF
C448
1uF
C382
0.1uF
C414
0.33uF
C383 0.1uF
R273 100, 1%
C445
0.33uF C443
0.1uF
C426
100uF
R289 DNI
C476 0.1uF
C387
0.1uF
C384
0.1uF
R288 301
C385 0.1uF
C444
0.1uF
C447
0.1uF
C386
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
FM BUS
FLASH
FLASH 512Mb (32M X 16)FLASH 512Mb (32M X 16)
- When using a single x16 flash device a word consists of 16 data bits so addressing starts with FM_A1 mapped to address bit 1 in software.- When using dual x16 flash devices for an equivalent x32 (x16||x16) flash device a word consists of 32 data bits so addressing starts with FM_A1 mapped to address bit 2 in software.
FM_A1
FM_D0
FLASH_RESETn
FLASH_WEnFLASH_RDYBSYn0
FLASH_WPn
FM_D19
FM_D31
FM_D25
FM_D20
FM_D26
FM_D21
FM_D27
FM_D22
FM_D16
FM_D28
FM_D23
FM_D17
FM_D29
FM_D24
FM_D18
FM_D30
FM_D1FM_D2FM_D3FM_D4FM_D5FM_D6FM_D7
FM_D8FM_D9FM_D10FM_D11FM_D12FM_D13FM_D14FM_D15
FM_A2FM_A3FM_A4FM_A5FM_A6FM_A7FM_A8FM_A9FM_A10FM_A11FM_A12FM_A13FM_A14FM_A15FM_A16FM_A17FM_A18FM_A19FM_A20FM_A21FM_A22FM_A23FM_A24FM_A25
FM_A17
FM_A2
FM_A21
FM_A6
FM_A1
FM_A25
FM_A10
FM_A14
FM_A18
FM_A3
FM_A22
FM_A7
FM_A11
FM_A15
FM_A19
FM_A4
FM_A23
FM_A8
FM_A12
FM_A16
FM_A20
FM_A5
FM_A24
FM_A9
FM_A13
FLASH_WPn
FLASH_OEnFLASH_WEnFLASH_ADVn
FLASH_WPn
FLASH_RESETn
FLASH_CLK
FM_A26 FM_A26
FLASH_RDYBSYn1
FPGA_AS_DATA0FPGA_AS_DATA1FPGA_AS_DATA2FPGA_AS_DATA3FPGA_DCLKFPGA_nCSO 1.8V
1.8V
1.8V
1.8V1.8V1.8V1.8V
1.8V
1.8V
3.3V
3.3V
3.3V
FM_A[26:0]18,4,5,9
FLASH_RDYBSYn0 18,5
FM_D[31:0]18,4
FLASH_RDYBSYn1 18,9FLASH_CLK18,5
FLASH_RESETn18,5FLASH_CEn018,5FLASH_OEn18,5FLASH_WEn18,5FLASH_ADVn18,9
FLASH_CEn118,5
FPGA_DCLK11,18FPGA_nCSO11
FPGA_AS_DATA0 11FPGA_AS_DATA1 11FPGA_AS_DATA2 11FPGA_AS_DATA3 11
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
17 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
17 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
17 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
U53
N25Q256A
CSn1 DQ1
2
W#/VPP/DQ23
GND4
DQ05
CLK6
HOLD#/DQ37
VCC8
TAB_DNC9
C246
0.1uF
C63
0.1uF
R227 10KC298
0.1uF
C303
0.1uF
R212 10K
R228 10KC300
0.1uF
C297
0.1uF
C301
0.1uFR217 10K
C245
0.1uF
R118 DNI
C302
0.1uF
R119 DNI
R125 DNI
R216 10K
R347 DNI
R120 DNI
C299
0.1uF
R126 DNI
C234
0.1uF
C62
0.1uF
C304
0.1uF
PC28FxxxP30B85FLASH
U11
PC28F512P30BF
A1A1
A2B1
A3C1
A4D1
A5D2
A6A2
A7C2
A8A3
A9B3
A10C3
A11D3
A12C4
A13A5
A14B5
A15C5
A16D7
A17D8
A18A7
A19B7
A20C7
A21C8
A22A8
NC(64M)/A23G1
CE#B4
OE#F8
WE#G8
WP#C6
VCCA6
RESET#D4
VCCH3
D0F2
D1E2
D2G3
D3E4
D4E5
D5G5
D6G6
D7H7
D8E1
D9E3
D10F3
D11F4
D12F5
D13H5
D14G7
D15E7
WAITF7
GNDB2
GNDH4GNDH2
CLKE6
ADV#F6
NC/A26(1G)B8
RFU3E8RFU2F1RFU1G2RFU0H1
NC(64M,128M)/A24H8
NC/A25(512M)B6
VPPA4
VCCQD6VCCQD5
VCCQG4
GNDH6
PC28FxxxP30B85FLASH
U10
PC28F512P30BF
A1A1
A2B1
A3C1
A4D1
A5D2
A6A2
A7C2
A8A3
A9B3
A10C3
A11D3
A12C4
A13A5
A14B5
A15C5
A16D7
A17D8
A18A7
A19B7
A20C7
A21C8
A22A8
NC(64M)/A23G1
CE#B4
OE#F8
WE#G8
WP#C6
VCCA6
RESET#D4
VCCH3
D0F2
D1E2
D2G3
D3E4
D4E5
D5G5
D6G6
D7H7
D8E1
D9E3
D10F3
D11F4
D12F5
D13H5
D14G7
D15E7
WAITF7
GNDB2
GNDH4GNDH2
CLKE6
ADV#F6
NC/A26(1G)B8
RFU3E8RFU2F1RFU1G2RFU0H1
NC(64M,128M)/A24H8
NC/A25(512M)B6
VPPA4
VCCQD6VCCQD5
VCCQG4
GNDH6
C233
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
LED INTERFACE
PUSH BUTTON INTERFACE
MAXV DIPSWITCH
5M2210 System Controller
VCCINT 2.5V VCCIO 1.8V VCCIO
ON-BOARD USB BLASTER II
FPGA_DCLKFPGA_CONFIG_D1FPGA_CONFIG_D2FPGA_CONFIG_D3
FPGA_CONFIG_D5FPGA_CONFIG_D6
FPGA_CONFIG_D4
FPGA_nSTATUSFPGA_CONF_DONE
FPGA_CONFIG_D0
FPGA_CONFIG_D7
CLK_CONFIG
PGM_LED[2:0]
MAX_ERROR
MAX_CONF_DONEMAX_LOAD
PGM_CONFIGMAX_RESETn
PGM_SEL
MSEL1MSEL2
MSEL0
MSEL3MSEL4
FPGA_CONFIG_D8FPGA_CONFIG_D9FPGA_CONFIG_D10FPGA_CONFIG_D11FPGA_CONFIG_D12FPGA_CONFIG_D13FPGA_CONFIG_D14FPGA_CONFIG_D15
FPGA_CONFIG_D18FPGA_CONFIG_D19FPGA_CONFIG_D20FPGA_CONFIG_D21
FPGA_CONFIG_D16FPGA_CONFIG_D17
FPGA_CONFIG_D22
CLK_CONFIG
CLKIN_50
FPGA_CONFIG_D24
FPGA_CONFIG_D26FPGA_CONFIG_D25
FPGA_CONFIG_D27FPGA_CONFIG_D28
FM_A21FM_A22
SENSE_SDO
SENSE_SCKSENSE_SDI
SENSE_CS0n
SENSE_SMB_CLK
FPGA_CONFIG_D29FPGA_CONFIG_D30
FPGA_CvP_CONFDONEFPGA_PR_ERROR
FPGA_CONFIG_D31
CLK50_EN
Si570_EN
CLK125_ENCLOCK_SDA
CLOCK_SCL
HSMB_PRSNTnHSMA_PRSNTn
PGM_SEL
MAX_CONF_DONE
FPGA_nCONFIG
PGM_LED0PGM_CONFIG
SENSE_SMB_DATA
OVERTEMP
TSENSE_ALERTn
OVERTEMPn
SDI_RX_EN
SDI_TX_ENSDI_RX_BYPASS
FLASH_CEn1
FLASH_OEn
FLASH_ADVn
FLASH_CEn0
FLASH_CLKFLASH_RESETn
FLASH_WEn
FLASH_RDYBSYn0
CPU_RESETn
MAX_ERRORMAX_LOAD
FLASH_RDYBSYn1
SI571_EN
VCCINT_SCLVCCINT_SDA
FM_D19
FM_D16FM_D17FM_D18
FM_D25FM_D26FM_D27
FM_D23
FM_D24
FM_D14FM_D15
FM_D10FM_D11FM_D12FM_D13
FM_D8FM_D9
FM_A1FM_A2FM_A3
FM_A0
FM_A4FM_A5FM_A6FM_A7
FM_A14
FM_A8FM_A9
FM_A15
FM_A10FM_A11FM_A12FM_A13
FM_A19FM_A20
FM_A18
FM_A16FM_A17
FM_D1FM_D2FM_D3
FM_D0
FM_D4FM_D5FM_D6FM_D7
FM_D20FM_D21FM_D22
FM_D31FM_D30
FM_D28FM_D29FM_A25
FM_A23FM_A24
FPGA_PR_READYFPGA_PR_REQUESTFPGA_PR_DONE
PGM_LED1PGM_LED2
FACTORY_LOAD
CLK_SELCLK_ENABLE
MAX_RESETn
FACTORY_STATUS
SECURITY_MODE
MAX5_BEn1MAX5_BEn0
MAX5_OEn
MAX5_WEnMAX5_CSn
MAX5_CLK
M570_CLOCK
FACTORY_REQUEST
MAX5_BEn2MAX5_BEn3
PCIE_JTAG_EN
M570_PCIE_JTAG_EN
USB_CFG[11:0]
USB_CFG0
USB_CFG1
USB_CFG2USB_CFG3USB_CFG4USB_CFG5USB_CFG6USB_CFG7USB_CFG8USB_CFG9
USB_CFG10
USB_CFG11
USB_CLK
FPGA_CONFIG_D23
EXTRA_SIG[2:0]
EXTRA_SIG0
EXTRA_SIG1
EXTRA_SIG2
2.5V
1.8V
2.5V
2.5V1.8V
2.5V
1.8V
1.8V
CPU_RESETn 11,24
MAX5_BEn[3:0]7
FLASH_RDYBSYn0 17,5
MAX5_WEn7
MAX5_OEn7
MAX5_CSn7
MAX5_CLK9
SENSE_SCK 31
SENSE_SDI 31
JTAG_TCK 11,12,22,25JTAG_5M2210_TDI 12
5M2210_JTAG_TMS12
JTAG_5M2210_TDO 12
FPGA_nCONFIG11
CLK_SEL10,24
CLK_ENABLE24
SENSE_SMB_CLK 31
OVERTEMP 31
FM_A[26:0]17,4,5,9
FM_D[31:0]17,4
SENSE_SMB_DATA 31
FPGA_DCLK 11,17
FPGA_CONF_DONE 11
FPGA_nSTATUS 11
FLASH_CEn0 17,5
TSENSE_ALERTn31
CLKIN_5010,9
OVERTEMPn24,31
HSMA_PRSNTn 22,24,5HSMB_PRSNTn 22,24,5
FLASH_ADVn 17,9
FLASH_WEn17,5
FLASH_OEn 17,5
FLASH_RESETn 17,5FLASH_CLK 17,5
SDI_TX_EN 21,4SDI_RX_BYPASS 21,9SDI_RX_EN 11,21
SENSE_CS0n 31
CLK125_EN 10
Si570_EN 10
CLK50_EN 10
SENSE_SDO 31
FPGA_CONFIG_D[31:0]11
FACTORY_LOAD 24SECURITY_MODE 24
PGM_SEL 24PGM_CONFIG 24MAX_RESETn 24
PGM_LED[2:0] 24
MAX_ERROR 24
MAX_LOAD 24
MAX_CONF_DONE 24
FLASH_CEn1 17,5FPGA_PR_DONE 11FPGA_PR_REQUEST 11FPGA_PR_READY 11FPGA_PR_ERROR 11FPGA_CvP_CONFDONE 11
MSEL0 11MSEL1 11MSEL2 11MSEL3 11MSEL4 11
FLASH_RDYBSYn1 17,9
SI571_EN 10CLOCK_SDA 10CLOCK_SCL 10
VCCINT_SDA 27
VCCINT_SCL 27
M570_CLOCK 25FACTORY_STATUS 25FACTORY_REQUEST 25
PCIE_JTAG_EN12
M570_PCIE_JTAG_EN 25
USB_CFG[11:0] 25
USB_CLK25,9
EXTRA_SIG[2:0] 25
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
18 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
18 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
18 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C166
0.1uF
C96
2.2uF
C124
0.1uF
C191
0.1uF
C125
0.1uF
MAX VBANK1
U4A
5M2210ZF256
DIFFIO_L19PN1
IOB1/CLK0H5
IOB1/CLK1J5
DIFFIO_L9PG1
DIFFIO_L9NG4
DIFFIO_L8PG2
DIFFIO_L8NG3
DIFFIO_L7PF1
DIFFIO_L7NF6
DIFFIO_L6PF4
DIFFIO_L6NF2
DIFFIO_L5PF3
DIFFIO_L5NE1
DIFFIO_L4PD1
DIFFIO_L4NE5
DIFFIO_L3PD2
DIFFIO_L3NE4
DIFFIO_L2PC3
DIFFIO_L2NE3
DIFFIO_L21PN3
DIFFIO_L21NP2
DIFFIO_L20PN2
DIFFIO_L20NM3
DIFFIO_L1PD3
DIFFIO_L1NC2
DIFFIO_L19NM4
DIFFIO_L18PL4
DIFFIO_L18NL3
DIFFIO_L17PM1
DIFFIO_L17NM2
DIFFIO_L16PL2
DIFFIO_L16NK3
DIFFIO_L15PK5
DIFFIO_L15NL1
DIFFIO_L14PJ3
DIFFIO_L14NK2
DIFFIO_L13PJ4
DIFFIO_L13NK1
DIFFIO_L12PH4
DIFFIO_L12NJ2
DIFFIO_L11PH3
DIFFIO_L11NJ1
DIFFIO_L10PH2
DIFFIO_L10NG5
IOB1_1E2
IOB1_2F5
IOB1_3H1
IOB1_4K4
IOB1_5L5
TMSN4TDOM5TDIL6TCKP3
X2
100MHz
VCC4
GND2
OUT3
EN1
C165
0.1uF
MAX VBANK4
U4D
5M2210ZF256
DIFFIO_B13N/DEV_CLRnM9
DIFFIO_B13P/DEV_OEM8
DIFFIO_B9PP8
DIFFIO_B9NT7
DIFFIO_B8PM7
DIFFIO_B8NR7
DIFFIO_B7PR6
DIFFIO_B7NN7
DIFFIO_B6PT5
DIFFIO_B6NP7
DIFFIO_B5PR5
DIFFIO_B5NM6
DIFFIO_B4PP6
DIFFIO_B4NN6
DIFFIO_B3PR3
DIFFIO_B3NN5
DIFFIO_B2PT2
DIFFIO_B2NP5
DIFFIO_B22PR16
DIFFIO_B22NP13
DIFFIO_B21PP12
DIFFIO_B21NT15
DIFFIO_B20PN12
DIFFIO_B20NR14
DIFFIO_B1PR1
DIFFIO_B1NP4
DIFFIO_B19PT13
DIFFIO_B19NR13
DIFFIO_B18PR12
DIFFIO_B18NP11
DIFFIO_B17PT12
DIFFIO_B17NN11
DIFFIO_B16PP10
DIFFIO_B16NR11
DIFFIO_B15PN10
DIFFIO_B15NT11
DIFFIO_B14PM10
DIFFIO_B14NR10
DIFFIO_B12PR9
DIFFIO_B12NP9
DIFFIO_B11PT8
DIFFIO_B11NT9
DIFFIO_B10PN8
DIFFIO_B10NR8 IOB4_28
M11
IOB4_29M12
IOB4_30N9
IOB4_31R4
IOB4_32T10
IOB4_33T4
C146
0.1uF
C168
0.1uF
C145
0.1uF
C167
0.1uF
MAX VBANK2
U4B
5M2210ZF256
DIFFIO_T9PB8
DIFFIO_T9NA8
DIFFIO_T8PD8
DIFFIO_T8NA7
DIFFIO_T7PC8
DIFFIO_T7NB7
DIFFIO_T6PB6
DIFFIO_T6NE7
DIFFIO_T5PA5
DIFFIO_T5ND7
DIFFIO_T4PE6
DIFFIO_T4NB5
DIFFIO_T3PB4
DIFFIO_T3ND6
DIFFIO_T2PC5
DIFFIO_T2NC4
DIFFIO_T1PD4
DIFFIO_T1NB1
DIFFIO_T18PC13
DIFFIO_T18NB16
DIFFIO_T17PD12
DIFFIO_T17NB14
DIFFIO_T16PC11
DIFFIO_T16NB13
DIFFIO_T15PE11
DIFFIO_T15NB12
DIFFIO_T14PB11
DIFFIO_T14NA12
DIFFIO_T13PE10
DIFFIO_T13NA11
DIFFIO_T12PA10
DIFFIO_T12NC9
DIFFIO_T11PB9
DIFFIO_T11ND9
DIFFIO_T10PA9
DIFFIO_T10NE9
IOB2_6A13
IOB2_7A15
IOB2_8A2
IOB2_9A4
IOB2_10A6
IOB2_11B10
IOB2_12B3
IOB2_13C10
IOB2_14C12
IOB2_15C6
IOB2_16C7
IOB2_17D10
IOB2_18D11
IOB2_19D5
IOB2_20E8
C126
0.1uF
C109
0.1uF
C108
0.1uF
C144
0.1uF
C92
0.1uF
C200
0.1uF
C142
0.1uF
C147
0.1uF
MAX VPower
U4E
5M2210ZF256
GNDINTF7
GNDINTG6
GNDINTH7
GNDINTH9
GNDIOA1
GNDIOA16
GNDIOB15
GNDIOB2
GNDIOG10
GNDIOG7
GNDIOG8
GNDIOG9
GNDIOK10
GNDIOK7
GNDIOK8
GNDIOK9
GNDIOR15
GNDIOR2
GNDIOT1
GNDIOT16
VCCINTH8VCCINTH10VCCINTG11VCCINTF10
VCCIO1C1
VCCIO1H6
VCCIO1J6
VCCIO1P1
VCCIO2A14
VCCIO2A3
VCCIO2F8
VCCIO2F9
VCCIO3C16
VCCIO3H11
VCCIO3J11
VCCIO3P16
VCCIO4L8
VCCIO4L9
VCCIO4T14
VCCIO4T3
GNDINTJ10
VCCINTJ7
VCCINTL7
GNDINTJ8
GNDINTK11
VCCINTK6VCCINTJ9
GNDINTL10
GNDIOT6
MAX VBANK3
U4C
5M2210ZF256
IOB3/CLK2J12
IOB3/CLK3H12
DIFFIO_R9PG12
DIFFIO_R9NG16
DIFFIO_R8PG13
DIFFIO_R8NG15
DIFFIO_R7PG14
DIFFIO_R7NF16
DIFFIO_R6PE16
DIFFIO_R6NF15
DIFFIO_R5PF13
DIFFIO_R5NE15
DIFFIO_R4PF14
DIFFIO_R4ND16
DIFFIO_R3PE12
DIFFIO_R3ND15
DIFFIO_R2PC15
DIFFIO_R2NE13
DIFFIO_R22PP15
DIFFIO_R22NP14
DIFFIO_R21PN15
DIFFIO_R21NN14
DIFFIO_R20PN16
DIFFIO_R20NM13
DIFFIO_R1PE14
DIFFIO_R1NC14
DIFFIO_R19PM15
DIFFIO_R19NL14
DIFFIO_R18PM16
DIFFIO_R18NL13
DIFFIO_R17PL15
DIFFIO_R17NL12
DIFFIO_R16PL16
DIFFIO_R16NL11
DIFFIO_R15PK15
DIFFIO_R15NK14
DIFFIO_R14PK16
DIFFIO_R14NK13
DIFFIO_R13PJ14
DIFFIO_R13NJ15
DIFFIO_R12PJ13
DIFFIO_R12NJ16
DIFFIO_R11PH13
DIFFIO_R11NH16
DIFFIO_R10PH14
DIFFIO_R10NH15
IOB3_21D13
IOB3_22D14
IOB3_23F11
IOB3_24F12
IOB3_25K12
IOB3_26M14
IOB3_27N13
C107
0.1uF
C190
0.1uF
C201
0.1uF
C143
0.1uF
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
QSFP INTERFACE
Quad Small Form-factor Pluggable (QSFP) Interface
QSFP_RSTnQSFP_SCLQSFP_SDA
QSFP_MOD_SELn
QSFP_LP_MODE
QSFP_MOD_PRSnQSFP_INTERRUPTn
QSFP_VCCR
QSFP_VCC
QSFP_TX_P0
QSFP_TX_P1
QSFP_TX_P2
QSFP_TX_P3
QSFP_TX_N0
QSFP_TX_N1
QSFP_TX_N2
QSFP_TX_N3
QSFP_RX_P0QSFP_RX_N0
QSFP_RX_P1QSFP_RX_N1
QSFP_RX_N2QSFP_RX_P2
QSFP_RX_N3QSFP_RX_P3
QSFP_TX_N[3..0]
QSFP_RX_N[3..0]
QSFP_RX_P[3..0]
QSFP_TX_P[3..0]
QSFP_LP_MODEQSFP_SDA
QSFP_MOD_SELnQSFP_RSTnQSFP_SCL
QSFP_MOD_SELn
QSFP_RSTn
QSFP_SCLQSFP_SDA
QSFP_INTERRUPTnQSFP_MOD_PRSn
QSFP_LP_MODE
QSFP_INTERRUPTnQSFP_MOD_PRSn
QSFP_VCCT
QSFP_VCCT
QSFP_VCCR
3.3V
QSFP_VCCQSFP_VCCT
QSFP_VCCRQSFP_VCC
2.5V
GND_CAGE GND_CAGE
GND_CAGE
QSFP_RSTn 9
QSFP_SCL 9QSFP_SDA 9
QSFP_MOD_SELn 4
QSFP_LP_MODE 4
QSFP_MOD_PRSn 4QSFP_INTERRUPTn 4
QSFP_TX_P[3..0] 8
QSFP_TX_N[3..0] 8
QSFP_RX_N[3..0] 8
QSFP_RX_P[3..0] 8
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
19 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
19 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
19 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C532
0.1uF
C550
22uF
QSFP_CAGE1
C525
22uF
C552
0.1uF
R368 4.7K
L14 1.0uH
C558
0.1uF
R336 4.7K
R373 4.7K
R353 4.7K
R11110K
L15 1.0uH
C557
0.1uF
R367 4.7K
C507
22uF
J12
QSFP_AND_CAGE
CAGE_GND49
CAGE_GND39
CAGE_GND40
CAGE_GND41
CAGE_GND42
CAGE_GND43
CAGE_GND44
CAGE_GND45
CAGE_GND46
CAGE_GND47
CAGE_GND48
CAGE_GND50
INTn28
VCCT29 VCCR10
LP_MODE31
MOD_SELn8
MOD_PRSn27
SCL11
SDA12
VCC30
TD1_N37 TD1_P36
TD2_N2 TD2_P3
TD3_P33
TD3_N34
RD1_N18RD1_P17
RD2_N21RD2_P22
RD3_P14
RD3_N15
GND1
GND4
GND32GND26GND23GND20GND19GND16GND13GND7
GND35
GND38
TD4_P6
TD4_N5
RD4_N24RD4_P25
RSTn9
L10 1.0uH
R372 4.7K
C553
22uF
R354 4.7K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Display Port (x4)
DISPLAYPORT INTERFACE
Used to bypass m-LVDS transceiver
UNTESTED AND UNPOPULATED.
DP_HOT_PLUG
DP_DIRECTION
DP_RETURN
DP_AUX_P
DP_AUX_N
DP_ML_LANE_P0DP_ML_LANE_N0
DP_ML_LANE_P1DP_ML_LANE_N1
DP_ML_LANE_P2DP_ML_LANE_N2
DP_ML_LANE_P3DP_ML_LANE_N3
DP_DIRECTION
DP_AUX_CPDP_AUX_CN
DP_AUX_CH_PDP_AUX_CH_N
DP_AUX_CP
DP_AUX_CN
DP_AUX_CH_PDP_AUX_CH_N
DP_AUX_PDP_AUX_N
DP_HOT_PLUGDP_RETURNDP_AUX_PDP_AUX_N
DP_ML_LANE_P[3:0]
DP_ML_LANE_N[3:0]
DP_DIRECTION
DP_AUX_TX_PDP_AUX_TX_N
DP_AUX_TX_PDP_AUX_TX_N
VBIAS_DP
DP_ML_LANE_CP1DP_ML_LANE_CN1
DP_ML_LANE_CN3DP_ML_LANE_CP3
DP_ML_LANE_CP2DP_ML_LANE_CN2
DP_ML_LANE_CN0DP_ML_LANE_CP0
3.3V
3.3V3.3V
3.3V
3.3V 3.3V
DP_AUX_N 6DP_AUX_P 6
DP_HOT_PLUG6DP_RETURN 6
DP_DIRECTION6
DP_ML_LANE_P[3:0]8
DP_ML_LANE_N[3:0]8
DP_AUX_TX_P 6DP_AUX_TX_N 6
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
20 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
20 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
20 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
VDD GND IO6 IO5
IO3 IO4IO2IO1
D40
DNI
7
4
81 2 3
56
R208
DNI
J5
DNI
ML_LANE_0P1
ML_LANE_0N3
GND5
ML_LANE_2P7
ML_LANE_2N9
GND11
GND2
ML_LANE_1P4
ML_LANE_1N6
GND8
ML_LANE_3P10
ML_LANE_3N12
CONFIG214 CONFIG113
AUX_CH_P15
GND16
HP_DETECT18
DP_PWR20
AUX_CH_N17
RTN19
MH121
MH222 MH3
23
MH424
R154
DNI
C89 DNI
C1480.1uF
R209
DNI
C103
DNI
R173 DNI
U34
DNI
R1
DE3
GND5
B7
RE2
D4
A6 VCC
8
R58 DNI
C6 DNI
C85 DNI
C1150.1uF
C102
DNI
C86 DNI
R54
DNI
C91 DNI
C87 DNI
C1100.1uF
R59 DNI
R182 DNI
R55 DNI
VDD GND IO6 IO5
IO3 IO4IO2IO1
D43
DNI
7
4
81 2 3
56
C82 DNI
R161 DNI
R57
DNI
C88 DNI
C7 DNI
R153
DNI R56 DNI
C90 DNI
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
SDI Cable Driver, Equalizer, and SMB
75 Ohm Impedance
75 Ohm Impedance
SDI_TXDRV_P
SDI_TXBNC_P
SDI_TXBNC_N
SDI_TXDRV_N
SDI_IN_P1
SDI_EQIN_P1SDI_EQIN_N1
SDO_NSDO_P
SDI_TX_RSET
SDI_TXCAP_PSDI_TXCAP_N
AEC
SDI_RX_CDn
3.3V_SDI
3.3V_SDI
3.3V_SDI
3.3V_SDI
3.3V_SDI
3.3V_SDI
3.3V
3.3V_SDI
3.3V_SDI
3.3V_SDI
SDI_RX_P 8SDI_RX_N 8
SDI_RX_EN11,18
SDI_RX_BYPASS18,9
SDI_TX_N8
SDI_TX_EN18,4
SDI_TX_SD_HDn4
SDI_TX_P8
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
21 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
21 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
21 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C68
22uF
J16BNC
1
2345
C530 1uF
R343 75
R342 75
C511 4.7uF
L5120 Ohm FB
C531 1uF
R33510K
C58 4.7uF
C523
0.01uF
C64
0.1uF
R365
75
L133.9nH
1 2
R341 75
C69
0.1uF
D38
Green_LED
C67
220nF
R12775
U24
LMH0384
VEE11
SPI_EN4
SDI2
SDI3
AEC+5
AEC-6
BYPASS7
MUTEref8 VEE2
9
SDO11
SDO10
AUTO_SLEEP12
MUTE14
CD15
VCC113
VCC216
DAP17
R366 75
R333
49.9 L12 5.6nH1 2
R332 750
J17BNC
1
2 3 4 5
L11 5.6nH1 2
C548 4.7uF
C59 4.7uF
C549 4.7uF
R324
0
R344 75
C65 1uF
C70
220nF
R121
0
CableDriver
U25
LMH0303
SDI1
SDI2
VEE3
RREF4
VCC9
SD/HD10
SDO12
SDO11
CENTERPAD17
RSTI5
ENABLE6
SDA7
SCL8
FAULT13
NC514
NC615
RSTO16
R334
49.9
C510 4.7uF
R34675
R345
37.4
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
HSMC Port A & Port B
A B
HSMC PORT A
HSMC PORT B INTERFACE
DDR ODT
HSMA_TX_CN4HSMA_TX_CP4HSMA_TX_CN5
HSMA_TX_CN1HSMA_TX_CP1
HSMA_TX_CN0HSMA_TX_CP0
HSMA_TX_CP5
HSMA_TX_CN3HSMA_TX_CP3
HSMA_TX_CN2HSMA_TX_CP2
HSMA_TX_CN6HSMA_TX_CP6HSMA_TX_CN7HSMA_TX_CP7
JTAG_TCK
HSMB_TX_CN1HSMB_TX_CP1
HSMB_TX_CN0HSMB_TX_CP0
HSMB_TX_CN2HSMB_TX_CP2HSMB_TX_CN3HSMB_TX_CP3
HSMA_D1HSMA_D3
HSMA_RX_D_P0HSMA_RX_D_N0
HSMA_RX_D_P1HSMA_RX_D_N1
HSMA_RX_D_P2HSMA_RX_D_N2
HSMA_RX_D_P3HSMA_RX_D_N3
HSMA_RX_D_P4HSMA_RX_D_N4
HSMA_RX_D_P5HSMA_RX_D_N5
HSMA_RX_D_P6HSMA_RX_D_N6
HSMA_RX_D_P7HSMA_RX_D_N7
HSMA_CLK_IN_P1HSMA_CLK_IN_N1
HSMA_RX_D_P8HSMA_RX_D_N8
HSMA_RX_D_P9HSMA_RX_D_N9
HSMA_RX_D_P10HSMA_RX_D_N10
HSMA_RX_D_P11HSMA_RX_D_N11
HSMA_RX_D_P12HSMA_RX_D_N12
HSMA_RX_D_P13HSMA_RX_D_N13
HSMA_RX_D_P14HSMA_RX_D_N14
HSMA_RX_D_P15HSMA_RX_D_N15
HSMA_RX_D_P16HSMA_RX_D_N16
HSMA_CLK_IN_P2HSMA_CLK_IN_N2
HSMA_TX_D_P0HSMA_TX_D_N0
HSMA_TX_D_P1HSMA_TX_D_N1
HSMA_TX_D_P2HSMA_TX_D_N2
HSMA_TX_D_P3HSMA_TX_D_N3
HSMA_TX_D_P4HSMA_TX_D_N4
HSMA_TX_D_P5HSMA_TX_D_N5
HSMA_TX_D_P6HSMA_TX_D_N6
HSMA_TX_D_P7HSMA_TX_D_N7
HSMA_CLK_OUT_P1HSMA_CLK_OUT_N1
HSMA_TX_D_P8HSMA_TX_D_N8
HSMA_TX_D_P9HSMA_TX_D_N9
HSMA_TX_D_P10HSMA_TX_D_N10
HSMA_TX_D_P11HSMA_TX_D_N11
HSMA_TX_D_P12HSMA_TX_D_N12
HSMA_TX_D_P13HSMA_TX_D_N13
HSMA_TX_D_P14HSMA_TX_D_N14
HSMA_TX_D_P15HSMA_TX_D_N15
HSMA_TX_D_P16HSMA_TX_D_N16
HSMA_CLK_OUT_P2HSMA_CLK_OUT_N2
HSMA_D0HSMA_D2
HSMA_PRSNTn
HSMB_DQ0
HSMB_CLK_OUT_P1HSMB_CLK_OUT_N1
HSMB_CLK_OUT_P2HSMB_CLK_OUT_N2
HSMB_WEn
HSMB_CLK_IN_P1HSMB_CLK_IN_N1
HSMB_CLK_IN_P2HSMB_CLK_IN_N2HSMB_PRSNTn
HSMB_RASnHSMB_CASn
HSMB_A1
HSMB_A0
HSMB_A2
HSMB_A3HSMB_A4
HSMB_A5
HSMB_A6HSMB_A7
HSMB_A8HSMB_A9
HSMB_A10
HSMB_A11HSMB_A12
HSMB_A13HSMB_A14
HSMB_A15
HSMB_BA0HSMB_BA1
HSMB_BA2HSMB_BA3
HSMB_DM0
HSMB_DM1
HSMB_DM2
HSMB_DM3
HSMB_DQ1
HSMB_DQ2HSMB_DQ3
HSMB_DQ4HSMB_DQ5
HSMB_DQ6HSMB_DQ7
HSMB_DQ8HSMB_DQ9
HSMB_DQ10HSMB_DQ11
HSMB_DQ12HSMB_DQ13
HSMB_DQ14HSMB_DQ15
HSMB_DQ16HSMB_DQ17
HSMB_DQ18HSMB_DQ19
HSMB_DQ20HSMB_DQ21
HSMB_DQ22HSMB_DQ23
HSMB_DQ24HSMB_DQ25
HSMB_DQ26HSMB_DQ27
HSMB_DQ28HSMB_DQ29
HSMB_DQ30HSMB_DQ31
HSMB_DQS_P0HSMB_DQS_N0
HSMB_DQS_P1HSMB_DQS_N1
HSMB_DQS_P2HSMB_DQS_N2
HSMB_DQS_P3HSMB_DQS_N3
HSMB_CKEHSMB_CSn
HSMB_C_PHSMB_C_N
HSMB_ADDR_CMD0
12V3.3V
12V
3.3V
12V 3.3V
12V 3.3V
HSMA_SCL 4HSMA_JTAG_TMS 12
JTAG_FPGA_TDO_RETIMER 12,25
HSMB_JTAG_TMS 12HSMB_JTAG_TDI 12
HSMB_SCL 4
HSMA_TX_N48
HSMA_TX_P48
HSMA_TX_N58
HSMA_TX_P58
HSMA_TX_N68
HSMA_TX_P68
HSMA_TX_N78
HSMA_TX_P78
HSMA_TX_N08
HSMA_TX_P08
HSMA_TX_N18
HSMA_TX_P18
HSMA_TX_N28
HSMA_TX_P28
HSMA_TX_N38
HSMA_TX_P38
HSMA_CLK_OUT_P[2:1]5,6
HSMA_CLK_OUT_N[2:1]5,6
HSMA_CLK_IN_N[2:1]9
HSMA_CLK_IN_P[2:1]9
HSMB_CLK_OUT_P[2:1]6
HSMB_CLK_OUT_N[2:1]6
HSMB_TX_N38
HSMB_TX_P38
HSMB_TX_N28
HSMB_TX_P28
HSMB_TX_N18
HSMB_TX_P18
HSMB_TX_N08
HSMB_TX_P08
HSMA_SDA4
HSMB_SDA4
JTAG_TCK11,12,18,25HSMA_D[3:0]
4
HSMA_TX_D_P[16:0]5,6
HSMA_TX_D_N[16:0]5,6
HSMA_RX_D_P[16:0]5,6
HSMA_RX_D_N[16:0]5,6
HSMA_PRSNTn18,24,5
HSMA_JTAG_TDO12HSMA_CLK_IN0 9HSMA_CLK_OUT05
HSMB_RX_N3 8
HSMB_RX_P3 8
HSMB_CLK_OUT09
HSMB_RX_N2 8
HSMB_RX_P2 8
HSMB_RX_N1 8
HSMB_RX_P1 8
HSMB_RX_N0 8
HSMB_RX_P0 8
HSMB_JTAG_TDO12
HSMB_CLK_IN0 9
HSMA_RX_N3 8
HSMA_RX_P3 8
HSMA_RX_N4 8
HSMA_RX_P4 8
HSMA_RX_N5 8
HSMA_RX_P5 8
HSMA_RX_N6 8
HSMA_RX_P6 8
HSMA_RX_N0 8
HSMA_RX_P0 8
HSMA_RX_N7 8
HSMA_RX_P7 8
HSMA_RX_N1 8
HSMA_RX_P1 8
HSMA_RX_N2 8
HSMA_RX_P2 8
HSMB_CLK_IN_P[2:1]9
HSMB_CLK_IN_N[2:1]9
HSMB_CASn 6
HSMB_CKE 6
HSMB_DQS_P[3:0]6
HSMB_DQS_N[3:0]6
HSMB_RASn 6
HSMB_ADDR_CMD06
HSMB_DQ[31:0]6
HSMB_BA[3:0]6
HSMB_DM[3:0]6
HSMB_A[15:0]6
HSMB_CSn 6
HSMB_WEn 6
HSMB_PRSNTn 18,24,5HSMB_C_P 6HSMB_C_N 6
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
22 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
22 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
22 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R9 0
R13 0
R34 0
R4 0
C79
10uF
C80
10uF
R15 0
R3 0
R29 0
R16 0
R10 0
R35 0
R5 0
R11 0
R17 0
C78
10uF
R12 0 R30 0R31 0
R6 0R7 0
R18 0
R14 0 R32 0
BANK 1
BANK 2
BANK 3
J2
ASP-122953-01
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
3.3V45
4747
4949
3.3V51
5353
5555
3.3V57
5959
6161
3.3V63
6565
6767
3.3V69
7171
7373
3.3V75
7777
7979
3.3V81
8383
8585
3.3V87
8989
9191
3.3V93
9595
9797
3.3V99
101101
103103
3.3V105
107107
109109
3.3V111
113113
115115
3.3V117
119119
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
12V46
4848
5050
12V52
5454
5656
12V58
6060
6262
12V64
6666
6868
12V70
7272
7474
12V76
7878
8080
12V82
8484
8686
12V88
9090
9292
12V94
9696
9898
12V100
102102
104104
12V106
108108
110110
12V112
114114
116116
12V118
120120
GN
D_1_1
161
GN
D_1_2
162
GN
D_1_3
163
GN
D_1_4
164
GN
D_2_1
165
GN
D_2_2
166
GN
D_2_3
167
GN
D_3_1
169
GN
D_2_4
168
GN
D_3_2
170
GN
D_3_3
171
GN
D_3_4
172
121121
3.3V123
125125
127127
3.3V129
131131
133133
3.3V135
137137
139139
3.3V141
143143
145145
3.3V147
149149
151151
3.3V153
155155
157157
3.3V159
122122
12V124
126126
128128
12V130
132132
134134
12V136
138138
140140
12V142
144144
146146
12V148
150150
152152
12V154
156156
158158
PSNTn160
BANK 1
BANK 2
BANK 3
J1
ASP-122953-01
11
33
55
77
99
1111
1313
1515
1717
1919
2121
2323
2525
2727
2929
3131
3333
3535
3737
3939
4141
4343
3.3V45
4747
4949
3.3V51
5353
5555
3.3V57
5959
6161
3.3V63
6565
6767
3.3V69
7171
7373
3.3V75
7777
7979
3.3V81
8383
8585
3.3V87
8989
9191
3.3V93
9595
9797
3.3V99
101101
103103
3.3V105
107107
109109
3.3V111
113113
115115
3.3V117
119119
22
44
66
88
1010
1212
1414
1616
1818
2020
2222
2424
2626
2828
3030
3232
3434
3636
3838
4040
4242
4444
12V46
4848
5050
12V52
5454
5656
12V58
6060
6262
12V64
6666
6868
12V70
7272
7474
12V76
7878
8080
12V82
8484
8686
12V88
9090
9292
12V94
9696
9898
12V100
102102
104104
12V106
108108
110110
12V112
114114
116116
12V118
120120
GN
D_1_1
161
GN
D_1_2
162
GN
D_1_3
163
GN
D_1_4
164
GN
D_2_1
165
GN
D_2_2
166
GN
D_2_3
167
GN
D_3_1
169
GN
D_2_4
168
GN
D_3_2
170
GN
D_3_3
171
GN
D_3_4
172
121121
3.3V123
125125
127127
3.3V129
131131
133133
3.3V135
137137
139139
3.3V141
143143
145145
3.3V147
149149
151151
3.3V153
155155
157157
3.3V159
122122
12V124
126126
128128
12V130
132132
134134
12V136
138138
140140
12V142
144144
146146
12V148
150150
152152
12V154
156156
158158
PSNTn160
R33 0
C81
10uF
R28 0
R8 0
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
10/100/1000 Ethernet
SGMII Mode (default)
Place near 88E1111 PHY
ENET_LED_RX
ENET_LED_LINK10
ENET_LED_TX
ENET_LED_LINK100
ENET_LED_LINK1000
ENET_MDC
ENET_LED_TX
ENET_INTn
MDI_P1MDI_N1MDI_P2MDI_N2
ENET_RESETn
MDI_P3
ENET_LED_RX
ENET_LED_LINK1000ENET_LED_LINK100ENET_LED_LINK10
MDI_N3
ENET_XTAL_25MHZ
MDI_N0
ENET_RSET
ENET_MDIO
MDI_P0MDI_P1MDI_N1MDI_P2MDI_N2MDI_P3MDI_N3
MDI_N0MDI_P0 ENET_LED_RX
ENET_LED_LINK1000
2.5V
ENET_DVDD2.5V
2.5V
2.5V
2.5V
ENET_DVDD
2.5V
2.5V
2.5V
ENET_TX_N 4
ENET_TX_P 4
ENET_RX_P 11ENET_RX_N 4
ENET_MDIO4
ENET_RESETn 4
ENET_INTn4
ENET_MDC4
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
23 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
23 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
23 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R314 220
R279 49.9
R106
4.7K
J9
HFJ11-1G02E
TD0_P1
TD0_N2
TD1_P3
TD1_N6
TD2_P4
TD2_N5
TD3_P7
TD3_N8
VCC9
GND10
GN
D_T
AB
11
GN
D_T
AB
12
C389
0.1uF
X5
25.00MHz
VCC4
GND2
OUT3
EN1
R93 4.7K
C367
0.1uF
C415
0.1uF
R290
10.0K
R94 4.7K
C451 0.01uF
D29Green_LED
C478
0.1uF
R277 49.9
D30Green_LED
C430
0.1uF
R291 49.9
GMII/MII/TBI INTERFACE
TEST
SGMII INTERFACE
JTAG
MDI INTERFACE
MGMT
U19A
88E1111
COMA27
RESET_N28
CONFIG658 CONFIG559 CONFIG460 CONFIG361 CONFIG263 CONFIG164 CONFIG065
125CLK22
XTAL155
XTAL254
VSSC53
RSET30
SEL_FREQ56
MDI3_P42
MDI3_N43
MDI2_P39
MDI2_N41
MDI1_P33
MDI1_N34
MDI0_P29
MDI0_N31
MDIO24
MDC25
INT_N23
HSDAC_P37
HSDAC_N38
GTX_CLK8
TX_CLK4
TX_EN9
RXCLK2
RX_DV94
CRS84
COL83
S_CLK_P79
S_CLK_N80
S_IN_P82
S_IN_N81
S_OUT_P77
S_OUT_N75
LED_TX68
LED_RX69
LED_DUPLEX70
LED_LINK100073
LED_LINK10074
LED_LINK1076
RXD095
RXD192
RXD293
RXD391
RXD490
RXD589
RXD687
RXD786
RX_ER3
TXD011
TXD112
TXD214
TXD316
TXD417
TXD518
TXD619
TXD720
TX_ER7
TMS46 TDO50 TDI44 TCK49 TRST_N47
C391
0.1uF
D32Green_LED
R103
4.99K
C432 0.01uF
R316 220
C392
0.1uF
U19B
88E1111
NC113
VSS97
DVDD1
DVDD6
DVDD10
DVDD15
DVDD57
DVDD62
DVDD67
DVDD71
DVDD85
AVDD32
AVDD36
AVDD35
AVDD40
AVDD45
AVDD78
VD
DO
X26
VD
DO
X48
VD
DO
5
VD
DO
21
VD
DO
88
VD
DO
96
VD
DO
H72
VD
DO
H66
VD
DO
H52
NC251
R293 49.9R292 49.9
C388
0.1uF
C390
0.1uF
D31Green_LED
R281 49.9
C429
0.1uF
C416
0.1uF
R100 4.7K
C393 0.01uFR280 49.9
C450
0.1uF
R315 220
C417 0.01uF
C449
0.1uF
R313 220
R102 4.7K
C431
0.01uF
R278 49.9
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
PUSH BUTTON INTERFACE
LED INTERFACE
User I/O
LCD_DATA1
CLK_ENABLEFACTORY_LOAD
LCD_DATA2
MAX_LOAD RES_MAX_LOAD
LCD_DATA3
LCD_D_Cn
LCD_DATA4 LCD_DATA5LCD_DATA6
CLK_SEL
SECURITY_MODE
LCD_DATA7
LCD_WEn
RES_MAX_ERROR
LCD_DATA0LCD_CSn
MAX_ERROR
USER_DIPSW5
USER_DIPSW1
USER_DIPSW7
USER_DIPSW0
USER_DIPSW2
USER_DIPSW4USER_DIPSW3
USER_DIPSW6
MAX_CONF_DONE RES_CONF_DONEn
HSMB_RX_LED RESn_HSMB_RX_LED
HSMB_TX_LED RESn_HSMB_TX_LED
RESn_HSMA_RX_LEDHSMA_RX_LED
HSMA_TX_LED RESn_HSMA_TX_LED
PCIE_LED_X4
PCIE_LED_X1
PCIE_LED_X8
HSMA_PRSNTn
HSMB_PRSNTn
PCIE_LED_G2
RESn_LED_FANOVERTEMPn
MAX_RESETn
CPU_RESETn
USER_PB0
USER_PB1
USER_PB2
USER_LED_G0
USER_LED_R0
USER_LED_G1
USER_LED_R1
USER_LED_G2
USER_LED_R2
USER_LED_G3
USER_LED_R3
USER_LED_G4
USER_LED_R4
USER_LED_G5
USER_LED_R5
USER_LED_G6
USER_LED_R6
USER_LED_G7
USER_LED_R7
PGM_SEL
PGM_CONFIG
RESn_PGM_LED1
RESn_PGM_LED2
PGM_LED1
PGM_LED2
PGM_LED0 RESn_PGM_LED0
PGM_CONFIGMAX_RESETn
PGM_SEL
PGM_LED[2:0]
MAX_ERROR
MAX_CONF_DONEMAX_LOAD
CLK_ENABLEFACTORY_LOAD
CLK_SEL
SECURITY_MODEPCIE_LED_G3
2.5V
2.5V
2.5V
S5_VCCIO_HSMB
2.5V
2.5V
3.3V
5.0V
2.5V
2.5V
2.5V
S5_VCCIO_HSMB
1.8V
2.5V
1.8V
USER_DIPSW[7:0]6
CPU_RESETn 11,18
HSMA_RX_LED 5
HSMB_RX_LED 5
HSMA_TX_LED 5
HSMB_TX_LED 5
LCD_WEn 5
LCD_CSn 5LCD_D_Cn 5
MAX_ERROR18,24
MAX_LOAD 18,24
USER_PB[2:0]9
USER_LED_R[7:0]4,9
MAX_CONF_DONE18,24
PCIE_LED_X1 4
PCIE_LED_X8 4
PCIE_LED_X4 4
PCIE_LED_G2 4
HSMA_PRSNTn 18,22,5HSMB_PRSNTn 18,22,5
OVERTEMPn18,31
LCD_DATA[7:0]5
USER_LED_G[7:0]11,4,5,6,9
PGM_SEL 18
PGM_CONFIG 18
MAX_RESETn 18
PGM_LED[2:0] 18
MAX_ERROR 18,24MAX_LOAD 18,24MAX_CONF_DONE18,24
CLK_SEL 10,18
CLK_ENABLE 18
FACTORY_LOAD18
SECURITY_MODE18
PCIE_LED_G3 11
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
24 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
24 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
24 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R359 10.0K
S2
PB Switch
1 32 4
R44 75
R21 75
S3
PB Switch
1 32 4
R352 56.2
G
R
D18 LED_GR1 3
24
OPEN
SW5
TDA04H0SB1
12345
678
R46 75
D1 Green_LED
D4 Green_LED
G
R
D7 LED_GR1 3
24
R43 75
G
R
D9 LED_GR1 3
24
D14
Green_LED
R49 75D15 Green_LED
R351 56.2
R39 10.0K
R27 75
D12 Red_LED
G
R
D20 LED_GR1 3
24
R42 75
R41 10.0K
D17 Green_LED
R143 56.2
R362 10.0KRN1G 10K7 10RN1H 10K8 9
R1 56.2
R360 10.0K
S7
PB Switch
1 32 4
R350 56.2
R146 100, 1%
G
R
D19 LED_GR1 3
24
RN1F 10K6 11
S4
PB Switch
1 32 4
R47 75 R141 56.2
R25 75
D6 Green_LED
D34YELLOW LED
R142 56.2
D2 Green_LED
R140 56.2R48 75
R20 75
R19 10.0K
R348 56.2
D5 Green_LED
D11
Green_LED
R361 10.0K
RN1A 10K1 16
S5
PB Switch
1 32 4
R24 75
RN1E 10K5 12RN1D 10K4 13
G
R
D21 LED_GR1 3
24
G
R
D10 LED_GR1 3
24
S6
PB Switch
1 32 4
R23 75
R38 10.0K
R349 56.2
D37YELLOW LED
R40 10.0K
D35YELLOW LED
G
R
D8 LED_GR1 3
24
R144 56.2
D36YELLOW LED
R148 56.2
R130 56.2
R37 10.0K
R22 75
R36 10.0K
R147 56.2
R45 75
RN1B 10K2 15RN1C 10K3 14
R2 56.2
B3
2x7 HDR
SW1
TDA08H0SB1
12345678
161514131211109
R145 56.2
J15
HDR2X7
11
33
55
77
99
1111
1313
22
44
66
88
1010
1212
1414
D3
Green_LED
R26 75
D33YELLOW LED
R149 56.2
B2
2x16 LCD
S1
PB Switch
1 32 4
D13
Green_LED
D16 Red_LED
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
On-Board USB Blaster II STRATIX V USB INTERFACE
PLACE NEAR MAX II (U14)
JTAG INTERFACE
PLACE NEAR CY7C68013A
MAX V USB INTERFACE
C_USB_MAX_TDOC_USB_MAX_TMS
C_USB_MAX_TCK
C_USB_MAX_TDI
FX2_D_NFX2_D_P
FX2_WAKEUPVBUS_5V
VBUS_5V
RESn_JTAG_TXJTAG_TX
FX2_PD4FX2_PD3
FX2_PD0FX2_PD1FX2_PD2
FX2_PD5FX2_PD6FX2_PD7
24M_XTALIN24M_XTALOUT
FX2_PB0FX2_PB1FX2_PB2FX2_PB3FX2_PB4FX2_PB5FX2_PB6FX2_PB7
FX2_PA1FX2_PA2FX2_PA3FX2_PA4FX2_PA5FX2_PA6FX2_PA7
USB_CLK
FX2_RESETn
USB_DATA[7:0]
USB_ADDR[1:0]
USB_FULLUSB_EMPTYUSB_SCLUSB_SDAUSB_CLKUSB_RESETnUSB_OEnUSB_RDnUSB_WRn
FX2_SDA MAX_SDA
RESn_SC_RXSC_RX
RESn_SC_TXSC_TX
RESn_JTAG_RXJTAG_RX
JTAG_BLASTER_TDO
JTAG_TMSJTAG_BLASTER_TDI
JTAG_TCK
USB_DISABLEnFX2_FLAGCFX2_FLAGB
FX2_WAKEUP
FX2_SLWRnFX2_SLRDn
FX2_FLAGA
FX2_SCLFX2_SDA
FX2_RESETn
JTAG_FPGA_TDOJTAG_FPGA_TDO_RETIMER
USB_SCLUSB_SDAUSB_FULLUSB_EMPTY
FACTORY_STATUSM570_CLOCK
FACTORY_REQUEST
FACTORY_REQUEST
JTAG_BLASTER_TDOJTAG_BLASTER_TDIJTAG_TMSJTAG_TCK
C_JTAG_TDOC_JTAG_TDIC_JTAG_TMSC_JTAG_TCK
M570_PCIE_JTAG_EN
FX2_PD2FX2_PD0
FX2_PD3FX2_PD1
JTAG_BLASTER_TDI
USB_CFG[11:0]
C_USB_MAX_TDIUSB_CLK
C_USB_MAX_TMS
FX2_PB5
MAX_SDA
JTAG_FPGA_TDO_RETIMER
C_USB_MAX_TCK
C_USB_MAX_TDOFX2_RESETn
USB_FULLUSB_EMPTYUSB_SCL
USB_ADDR0USB_ADDR1
SC_RX
USB_DATA5
JTAG_TX
FACTORY_REQUEST
USB_CFG2
USB_SDA
USB_RESETn
USB_DATA2
USB_DATA0
USB_OEn
SC_TX
USB_RDn
USB_DATA6
USB_DATA1
USB_WRn
USB_CFG1
USB_DATA3JTAG_RX
M570_PCIE_JTAG_EN
USB_DATA7
USB_DATA4
USB_CFG9
USB_CFG0
FACTORY_STATUS
M570_CLOCK
USB_CFG3
USB_CFG4
USB_CFG6
USB_CFG7
USB_CFG8
USB_CFG10
USB_CFG5
USB_CFG11
EXTRA_SIG0
EXTRA_SIG1
EXTRA_SIG2
EXTRA_SIG[2:0]
C_JTAG_TDO
C_JTAG_TDIC_JTAG_TMS
C_JTAG_TCK
FX2_SCL
FX2_SLRDn
FX2_SLWRn
FX2_FLAGB
FX2_FLAGC
FX2_PA1
FX2_PA3
FX2_PA2
FX2_PA4
FX2_PA5
FX2_PA6
FX2_PA7
FX2_PB0
FX2_PB1
FX2_PB2
FX2_PB3
FX2_PB4
FX2_PB6
FX2_PB7
FX2_PD4
FX2_PD5
FX2_PD6
FX2_PD7
USB_DISABLEnJTAG_FPGA_TDO
FX2_FLAGA
3.3V3.3V
3.3V3.3V
1.5V 1.8V3.3V
1.8V
3.3V
3.3V
1.5V
2.5V
3.3V
1.8V
1.5V
USB_DATA[7:0]7
USB_FULL 9USB_EMPTY 9
USB_SDA 7
USB_RESETn7USB_OEn 7USB_RDn 7USB_WRn 7
JTAG_BLASTER_TDO 11,12
JTAG_TMS 11,12JTAG_TCK11,12,18,22
JTAG_BLASTER_TDI 12
USB_DISABLEn 12
JTAG_FPGA_TDO11
USB_ADDR[1:0]7
USB_SCL 7
FACTORY_STATUS 18M570_CLOCK 18
USB_CLK 18,9
FACTORY_REQUEST18
M570_PCIE_JTAG_EN18
JTAG_FPGA_TDO_RETIMER12,22
USB_CFG[11:0]18
EXTRA_SIG[2:0]18
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
25 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
25 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
25 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R246 DNI
Y1
24.00MHz
1 3
24
R2740
R244 56.2
C327
0.1uF
R2601M
C221
0.1uF
R80 1.00k
R87 0
R2590
R190 10.0K
R85 0
R72 0
R86 0
R88 0
R2750
R155 1.00K
D25
Green_LED
R75 1.00k
C269
0.1uF
C306
0.1uF
R206 2.00K
R2660
MAX IIPower
U14C
EPM570GM100
GNDINTC5
GNDINTE8
GNDINTG4
GNDINTJ5
GNDIOD5
GNDIOD7
GNDIOE4
GNDIOG8
VCCINTJ7VCCINTG3
VCCIO1E3
VCCIO1J4
VCCIO1J8
VCCIO2C4
VCCIO2C8
VCCIO2G9
GNDIOH5
GNDIOH7
VCCINTC7
VCCINTE9
C3464.7nF
VBUS
D-
D+
ID
J7MICRO_USB_CONN
12345
6789
R242 56.2
C193
0.1uF
V13
U8
CY7C68013A_VFBGA
RDY0A1
RDY1B1
XTALINC1
AVCCD1
DMINUSE1
AGNDF1
VCCG1
GNDH1
PD7A2
CLKOUTB2
XTALOUTC2
AVCCD2
DPLUSE2
AGNDF2
IFCLKG2
RESERVEDH2
PD5A3PD4B3
PD6C3
SCLF3
SDAG3
PB0H3
GNDA4
GNDB4
GNDC4
PB1F4
PB3G4PB2H4
VCCA5
VCCB5
PB6F5PB5G5PB4H5
PD3A6PD2B6
PA7C6
PA4F6
PA1G6
PB7H6
PD1A7
WAKEUPB7
PA6C7
GNDD7
VCCE7
PA3F7
CTL1G7CTL0H7
PD0A8
RESETB8
PA5C8
GNDD8
VCCE8
PA2F8
PA0G8
CTL2H8
VCCC5
R77 1.00k
C305
0.1uF
V15
C270
0.1uF
R243 56.2
R308 DNI
R172 1.00K
C247 0.1uF
U9
MAX811
GND1
RESET2
VCC4
MR3
R2650
C235
0.1uFV14
U43
TPD2EUSB30
D-2D+1
GND3
D27
Green_LED
R205100K
R73 1.00k
C326
0.1uF
R76 1.00k
C248
0.1uF
C268
0.1uF
C192
0.1uF
C204
12pF
D28
Green_LED
C222
0.1uF
R71 2.00K
D26
Green_LED
J19
DNI
11
33
55
77
22
44
66
88
99
1010
MAX IIBANK1
U14A
EPM570GM100
IOB1_23L1
IOB1_24L10
IOB1/GCLK0F2
IOB1/GCLK1E1
IOB1_1B1
IOB1_2C1
IOB1_3C2
IOB1_4D1
IOB1_5D2
IOB1_6D3
IOB1_7E2
IOB1_8F1
IOB1_9F3
IOB1_10G1
IOB1_11G2
IOB1_12H1
IOB1_13H2
IOB1_14H3
IOB1_15J6
IOB1_16K10
IOB1_17K3
IOB1_18K4
IOB1_19K5
IOB1_20K6
IOB1_21K7
IOB1_22K9
IOB1_25L11
IOB1_26L2
IOB1_27L3
IOB1_28L4
IOB1_29L5
IOB1_30L6
IOB1_31L7
IOB1_32L9
TMSJ1TDOK2TDIJ2TCKK1
IOB1/DEV_OEL8 IOB1/DEV_CLRnK8
C203
0.1uF
C202
0.1uF
C205
12pF
MAX IIBANK2
U14B
EPM570GM100
IOB2_1A1
IOB2_2A10
IOB2_3A11
IOB2_4A2
IOB2_5A3
IOB2_6A4
IOB2_7A5
IOB2_8A6
IOB2_9A7
IOB2_10A8
IOB2_11A9
IOB2_12B10
IOB2_13B11
IOB2_14B2
IOB2_15B3
IOB2_16B4
IOB2_17B5
IOB2_18B6
IOB2_19B7
IOB2_20B8
IOB2_21B9
IOB2_22C10
IOB2_23C11
IOB2_24C6
IOB2_25D10
IOB2_26D11
IOB2_27D9
IOB2_28E10
IOB2_29E11
IOB2_30F11
IOB2_31F9
IOB2_32G10
IOB2_33H10
IOB2_34H11
IOB2_35H9
IOB2_36J10
IOB2_37J11
IOB2_38K11IOB2/GCLK2
F10
IOB2/GCLK3G11
R245 56.2
R189
20.0K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 1 - DC Input & 12V, 3.3V Output
POWER LED
19VDC Input
LTC3855_S2PLTC3855_S2N
PG_12V
VFB2
INTVCC_1
INTVCC_1
VFB2
LTC3855_S1N
INTVCC_1
3.3V_SHDNn
DIFFOUT
12V_SHDNn
DIFFOUT
3.3V_MUXVCCP
3.3V_MUXVCC
3.3V_SHDNn12V_SHDNn
LTC3855_S1P
5.0V
DC_IN
12V_MUX
3.3V_MUX
DC_IN
3.3V_MUX
3.3V_REG3.3V_OUT
3.3V_PCIE
3.3V_MUX
12V_OUT
12V_PCIE
12V
12V_MUX
DC_INPUT
DC_IN DC_IN
DC_IN
5.0V
3.3V_MUX
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
26 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
26 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
26 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C8422uF25V
R101100K
C11 0.1uF
C111
47uF20V
drain-tab
Q5
RJK0305DPB4
5
31 2
R60100K
C13247pF
drain-tab
Q3RJK0305DPB
4
5
31 2
C10 0.1uF
R175121.0K
R150 8.2K
C360.1uF
C16330uF4V
C122uF25V
R177
2.55K
C131
18pF
R503.4K
V1
SENSE_PAD
RSNS1
SNS2
U39FDMC8878
5678
1 2 3
4
SW2SW SLIDE-4P2T
1
239
8
7
4
56
10
1211
L1
2.0uH1 2
C12910pF
C8322uF25V
R15820.0K
J4CONN JACK PWR
3
21
R61
DNIC23
0.1uF
C35
0.1uF
D41CMDSH-3
U36FDMC8878
5678
123
4
U37FDMC8878
5678
123
4
C4
47uF35V
R9920.0K
C128
1000pF
C2
47uF35V
D22 LTC4352CDD
VIN1
CPO10
SOURCE12
GATE11
OUT8
UV
3
OV
4S
TA
TU
S5
FA
ULT
6
VCC2
REV7
EP13
GND9
drain-tab
Q6RJK0301DPB
4
5
31 2
U30
LTC4357
OUT1
GND4VDD6
NC5
GATE3
IN2
EP_GND7
R176
66.5K
gnd-pad
U3
LTC3855EUJ
TK/SS11 ITH12
VFB13
SGND14
VFB25
ITH26
TK/SS27
SENSE2+8
SENSE2-9
PGOOD217
NC18
PGOOD116
TG220
BOOST221
PGND222
BG223
EXTVCC24 INTVCC25
PGND128
SW219
DIFFP10
DIFFN11
DIFFOUT12
RUN213
ILIM114
ILIM215
VIN26
BG127
BOOST129
TG130
SW131
CLKOUT32 PHSASMD33 MODE/PLLIN34 FREQ35
ITEMP236
ITEMP137 RUN138
SENSE1+39
SENSE1-40
SGND241
U6
LTC4357
OUT1
GND4VDD6
NC5
GATE3
IN2
EP_GND7
R16611.5KR163
100K
U40FDMC8878
5678
1 2 3
4
R174215.0K
drain-tab
Q7
RJK0301DPB4
5
31 2
R660.003
C133
82pF
U7
LTC4357
OUT1
GND4VDD6
NC5
GATE3
IN2
EP_GND7
U29FDMC8878
5678
123
4
R104 100K
R79
1.00k
drain-tab
Q4RJK0305DPB
4
5
31 2
R16720.0K
C130
1000pF
C322uF25V
C9100uF
6.3v
D42
CMDSH-3
V3
SENSE_PAD
RSNS1
SNS2
C17
220uF16V
R9820.0K
D23 LTC4352CDD
VIN1
CPO10
SOURCE12 GATE11 OUT8
UV
3
OV
4S
TA
TU
S5
FA
ULT
6
VCC2
REV7EP13GND9
R16411.3K
R162100K
L2
2uH12
V4
SENSE_PAD
RS
NS
1S
NS
2
D39
MMBD1205
R168100K
R16549.9K
R15749.9K
C97
4.7uF
R620.003
V2
SENSE_PAD
RS
NS
1S
NS
2
C127
47uF20V
R69
DNI
D24
BLUE LED
R70
DNI
R156169.0K
C18
0.1uF
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 2 - 0.90V
LTC3880_IS0PLTC3880_IS0N
LTC3880_IS1NLTC3880_IS1P
0.85V_TSNS10.85V_TSNS0
PG_VCCINT
VCCINT_SDAVCCINT_SCL
3880_RUN
RT
VM_0P5VSV_VCCINT_PG
MANUAL_RESETn
12V
12V
VDD25
VDD33
5.0V_LTC3880
5.0V_LTC3880
S5_VCCINT
12V
S5_VCCINT
VDD33
VDD33
VDD25
VDD25
VDD25
0.9V
VDD25
0.9V S5_VCCINT
3.3V_REG
3.3V
3.3V
S5_VCCINT
3.3V
3.3V
VCCINT_SCL18VCCINT_SDA18
SV_VCCINT_PG28
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
27 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
27 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
27 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R247 10K
C20
22uF4V
C223
4.7uF
V10
SENSE_PAD
RSNS1
SNS2
R222 DNI
C172
330uF2.5V
R231 DNI
R237 10K R650.0015
C173
330uF2.5V
C320.1uF
C174
330uF2.5V
C276
680pF
U13
LTC3880
VSENSE0+1
VSENSE0-2
ISENSE1+3
ISENSE1-4
ITH05
ISENSE0+6
ISENSE0-7
SYNC8
SCL9 SDA
10
ALERT11
GPIO012
GPIO113
RUN014
RUN115
ASEL16
FREQ_CFG17
VOUT0_CFG18
VOUT1_CFG19
VTRIM0_CFG20
VTRIM1_CFG21
VDD2522
WP23 SHARE_CLK24
VDD3325
ITH126
VSENSE127
TSNS128
SW129
TG130
BOOST131
BG132
INTVCC33
PGND34
VIN35
BG036
BOOST037
TG038
SW039
TSNS040
GND_PAD41
C279
10uF
D44CMDSH-3
drain-tab
Q11
RJK0301DPB4
5
31 2
R240 4.99K
C329
0.1uF
L3
0.33uH12
R219 DNI
C194
47uF20V
R232 3.57K
C20722uF25V
R221 10K
R630.0015
R23610K
C22
22uF4V
Q13MMBT3906
32
1
C278
1uF
R252 15.0K
R68301K
C24
22uF25V
C275
680pF
R74 2.2KR220 30.1K
R67 2.2K
R251 12.0K
C277
3.3nF
drain-tab
Q8
RJK0305DPB4
5
31 2
R23510K
C280
0.01uF
R248 23.2K
C21
22uF4V
C38
0.1uFC274
0.01uF
C176
100uF6.3V
C33 0.1uF
C175
100uF6.3V
L4
0.33uH12
drain-tab
Q10
RJK0301DPB4
5
31 2
Q12MMBT3906
32
1
C2722uF25V
C171
330uF2.5V
R83301K
C31
0.1uF
C307
1uF
R250 0
drain-tab
Q9
RJK0305DPB4
5
31 2
V9
SENSE_PAD
RS
NS
1S
NS
2
R640.001
V8
SENSE_PAD
RSNS1
SNS2
U44
LTC2915
GND1
TOL/MR2
SEL13
VM4
VCC5
SEL26
RT7
RST8
EPAD9
R239 10K
D45
CMDSH-3
R233 16.2K
C19
22uF4V
C20622uF25V
drain-tab
Q1
RJK0301DPB4
5
31 2
drain-tab
Q2
RJK0301DPB4
5
31 2
V7
SENSE_PAD
RS
NS
1S
NS
2
R24910K
C169
100uF6.3V
R229
3.01K
R234 17.4K
C170
100uF6.3V
R230 10K
R238 10K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 3 - 5.0V, 1.5V, 1.8V and 3.3V
VOUTS2_1P5 PG_1.5VPG_5.0V
PG_3.3VVOUTS1_1P8
LTM4628_RUN1
PG_1.8V
RUN_LTM4628
VOUTS2_1P5
VOUTS1_1P8
SV_VCCINT_PGPG_3.3V
RUN_LTM4628
12V5.0V
1.5V
3.3V
12V1.8V
1.5V
5.0V5.0V
3.3V
1.8V
3.3V
5.0V
5.0V
3.3V_REG
SV_VCCINT_PG27
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
28 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
28 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
28 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C518
4.7uF
U27B
LTM4628
VINJ9
VINJ10
VINJ11
VINK2
VINK3
VINK4
VINK9
VINK10
VINK11
VINM2
VINM3
VINM4
VOUT1A1
VOUT1A2
VOUT1A3
VOUT1A4
VOUT1A5
VOUT1B1
VOUT1B2
VOUT1B3
VOUT1B4
VOUT1B5
VOUT1C1
VOUT1C2
VOUT1C3
VOUT1C4VIN
L8
VINL7
VINL6
VINL5
VINL4
VINL3
VINL2
VINM11
VINM10
VINM9
VINM8
VINM7
VINM6
VINM5
VINJ4
VINJ3
VINJ2
VINL11
VINL10
VINL9
VOUT2C12
VOUT2C11
VOUT2C10
VOUT2C9
VOUT2B12
VOUT2B11
VOUT2B10
VOUT2B9
VOUT2B8
VOUT2A8
VOUT2A9
VOUT2A10
VOUT2A11
VOUT2A12
C540
10uF35V
C537
10uF35V
R32810K
C454
22uF6.3VR327 10K
C536
10uF35V
C516
4.7uF
U26B
LTM4628
VINJ9
VINJ10
VINJ11
VINK2
VINK3
VINK4
VINK9
VINK10
VINK11
VINM2
VINM3
VINM4
VOUT1A1
VOUT1A2
VOUT1A3
VOUT1A4
VOUT1A5
VOUT1B1
VOUT1B2
VOUT1B3
VOUT1B4
VOUT1B5
VOUT1C1
VOUT1C2
VOUT1C3
VOUT1C4VIN
L8
VINL7
VINL6
VINL5
VINL4
VINL3
VINL2
VINM11
VINM10
VINM9
VINM8
VINM7
VINM6
VINM5
VINJ4
VINJ3
VINJ2
VINL11
VINL10
VINL9
VOUT2C12
VOUT2C11
VOUT2C10
VOUT2C9
VOUT2B12
VOUT2B11
VOUT2B10
VOUT2B9
VOUT2B8
VOUT2A8
VOUT2A9
VOUT2A10
VOUT2A11
VOUT2A12
C535
10uF35V
C452
22uF6.3V
C453
22uF6.3V
C462
22uF4V
C459
22uF4V
C456
22uF4V
U26C
LTM4628
GNDA6
GNDA7
GNDB6
GNDB7
GNDD1
GNDD2
GNDD3
GNDD4
GNDD9
GNDD10
GNDD11
GNDD12
GNDE1
GNDE2
GNDE3
GNDE4
GNDE10
GNDE11
GNDE12
GNDF1
GNDF2
GNDF3
GNDF10
SGNDC7
SGNDF6
SGNDF7
SGNDG6
SGNDG7
SGNDD6
GNDF11
GNDF12
GNDG1
GNDG10
GNDG12
GNDH1
GNDH2
GNDH3
GNDH4
GNDH5
GNDH6
GNDH7
GNDH9
GNDH10
GNDH11
GNDH12
GNDJ1
GNDJ5
GNDJ8
GNDJ12
GNDK1
GNDK5
GNDK6
GNDG3
GNDM12
GNDM1
GNDL12
GNDL1
GNDK12
GNDK8
GNDK7
R108 DNI
C398
47uF20V
U27A
LTM4628
COMP1E6
DIFFPE8
PGOOD1G9
TEMPJ6
MODE-PLLINF4
RUN1F5
VFB2D7
RUN2F9
CLKOUTG5
FSETC6
SW1G2
SW2G11
VFB1D5
PGOOD2G8
PHASMDG4
TRACK1E5
TRACK2D8
DIFFOUTF8
DIFFNE9
COMP2E7
INTVCCH8
EXTVCCJ7
VOUTS1C5
VOUTS2C8
C538
10uF35V
U27C
LTM4628
GNDA6
GNDA7
GNDB6
GNDB7
GNDD1
GNDD2
GNDD3
GNDD4
GNDD9
GNDD10
GNDD11
GNDD12
GNDE1
GNDE2
GNDE3
GNDE4
GNDE10
GNDE11
GNDE12
GNDF1
GNDF2
GNDF3
GNDF10
SGNDC7
SGNDF6
SGNDF7
SGNDG6
SGNDG7
SGNDD6
GNDF11
GNDF12
GNDG1
GNDG10
GNDG12
GNDH1
GNDH2
GNDH3
GNDH4
GNDH5
GNDH6
GNDH7
GNDH9
GNDH10
GNDH11
GNDH12
GNDJ1
GNDJ5
GNDJ8
GNDJ12
GNDK1
GNDK5
GNDK6
GNDG3
GNDM12
GNDM1
GNDL12
GNDL1
GNDK12
GNDK8
GNDK7
C455
22uF4V
R32030.1K
R109 0
U26A
LTM4628
COMP1E6
DIFFPE8
PGOOD1G9
TEMPJ6
MODE-PLLINF4
RUN1F5
VFB2D7
RUN2F9
CLKOUTG5
FSETC6
SW1G2
SW2G11
VFB1D5
PGOOD2G8
PHASMDG4
TRACK1E5
TRACK2D8
DIFFOUTF8
DIFFNE9
COMP2E7
INTVCCH8
EXTVCCJ7
VOUTS1C5
VOUTS2C8
C463
22uF4V
R321150K
R32213.3K
C460
22uF4V
C542
10uF35V
C457
22uF4V
R329 10K
C541
10uF35V
C486
100uF6.3V
C488
470uF6.3V
C489
470uF6.3V
C5170.1uF
R323 10K
C491
100uF6.3V
R318150K
C539
10uF35V
C485
470uF6.3V
C461
22uF4V
C5090.1uF
R3178.25K
C399
47uF20V
C458
22uF4V
C492
470uF6.3V
C490
100uF6.3V
R326 10K
R31940.2K
C487
100uF6.3V
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 3 - 1.0V (GXB), 1.5V (VCCD_FPLL, VCCH_GXB, VCCPT)
1.0V @ 2.625A
1.5V @ 1.5A
1.0V_SW 1.5V_SW
1.5V_FB1.0V_FB
PG_1.5V_FPGA
1.5V_RUN
PG_1.0V_FPGA
1.0V_FPGA_RUN
5.0V 5.0V
5.0V
S5_VCC_1.5V1.5V_VCCS5_XCVR_GXB_1.0V
5.0V
S5_VCCR_GXB
S5_VCCT_GXB
5.0V
S5_VCCPD_PGM_2.5V S5_VCCA_GXB
PG_1.0V_FPGA 30
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
29 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
29 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
29 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
R284 0.003
R294
10.0K
R283
20.0K
LTM4614 - CHANNEL 2
U18B
LTM4614
VOUT2_4D9
VOUT2_5D10
VOUT2_6D11
VOUT2_7D12
VOUT2_0C9
VOUT2_1C10
VOUT2_2C11
VOUT2_3C12
VOUT2_8E9
VOUT2_9E10
VOUT2_10E11
VOUT2_11E12
VOUT2_12F9
VOUT2_13F10
VOUT2_14F11
VOUT2_15F12
VIN2_0C1
VIN2_1C2
VIN2_2C3
VIN2_3C4
VIN2_4C5
VIN2_5C6
VIN2_6D1
VIN2_7D2
VIN2_8D3
VIN2_9D4
VIN2_10D5
VIN2_11D6
PGOOD2E4
RUN/SS2E2
TRACK2E3
COMP2E5
FB2E6
SW2_0B2
SW2_1B3
SW2_2B4
SW2_3B5
SW2_4B6
GND2_0A1
GND2_1A2
GND2_2A3
GND2_3A4
GND2_4A5
GND2_5A6
GND2_6A7
GND2_7A8
GND2_8A9
GND2_9A10
GND2_10A11
GND2_11A12
GND2_12B1
GND2_13B7
GND2_14B8
GND2_15B9
GND2_16B10
GND2_17B11
GND2_18B12
GND2_19C7
GND2_20C8
GND2_21D7
GND2_22D8
GND2_23E1
GND2_24E7
GND2_25E8
GND2_26F1
GND2_27F2
GND2_28F3
GND2_29F4
GND2_30F5
GND2_31F6
GND2_32F7
GND2_33F8
C433
0.01uF
R268
5.76K
LTM4614 - CHANNEL 1
U18A
LTM4614
VOUT1_4K9
VOUT1_5K10
VOUT1_6K11
VOUT1_7K12
VOUT1_0J9
VOUT1_1J10
VOUT1_2J11
VOUT1_3J12
VOUT1_8L9
VOUT1_9L10
VOUT1_10L11
VOUT1_11L12
VOUT1_12M9
VOUT1_13M10
VOUT1_14M11
VOUT1_15M12
VIN1_0J1
VIN1_1J2
VIN1_2J3
VIN1_3J4
VIN1_4J5
VIN1_5J6
VIN1_6K1
VIN1_7K2
VIN1_8K3
VIN1_9K4
VIN1_10K5
VIN1_11K6
PGOOD1L4
RUN/SS1L2
TRACK1L3
COMP1L5
FB1L6
SW1_0H2
SW1_1H3
SW1_2H4
SW1_3H5
SW1_4H6
GND1_0G1
GND1_1G2
GND1_2G3
GND1_3G4
GND1_4G5
GND1_5G6
GND1_6G7
GND1_7G8
GND1_8G9
GND1_9G10
GND1_10G11
GND1_11G12
GND1_12H1
GND1_13H7
GND1_14H8
GND1_15H9
GND1_16H10
GND1_17H11
GND1_18H12
GND1_19J7
GND1_20J8
GND1_21K7
GND1_22K8
GND1_23L1
GND1_24L7
GND1_25L8
GND1_26M1
GND1_27M2
GND1_28M3
GND1_29M4
GND1_30M5
GND1_31M6
GND1_32M7
GND1_33M8
C395
330uF2.5V
R26710.0K
L83A, 30 Ohm FB
R51
10.0K
C34747uF6.3V
R269 0.003
C39447uF6.3V
C397
0.1uF
C396
0.1uF
R28210.0K
C348
0.1uF
C328
330uF2.5V
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 4 - Linear RegulatorsS5VCCPD_PGM = 2.5V/1.5A
DDR3 VTT, VREF
QDRII+ and RLDRAM II VTT, VREF
S5VCCA_GXB = 3.0V/0.308A
ENET_DVDD = 1.0V/0.253A
2.5V/0.337A
2.5V/1.279A
1.5V/0.426A
2.5V/0.299A
1.8V/0.601A
1.2V
JUMPER 1-2
1.5VJUMPER 3-4
VCCIO HSMB SELECT
1.8V
NO JUMPER
Setting
HSMB Voltage
2.5V
JUMPER 5-6
2.5V_SET
2.5V_SET
S5_VCCIO_HSMB_SEL
HSMB_SHDn
PG_1.0V_FPGA
S5_VCCIO_HSMB_SEL
HSMB_SHDn
VCCIO_2.5V_SHDn
VCCIO_2.5V_SHDnVCCIO_1.5V_SHDn
VCCIO_1.5V_SHDn
VCCIO_1.8V_SHDn
VCCIO_1.8V_SHDn
S5_VCCPD_PGM_2.5V
5.0V
3.3V_REG
ENET_DVDD
5.0V
5.0V
5.0V
5.0V
S5_VCCPD_PGM
S5_VCCA_PLL_2.5V
5.37V_MONITOR12V
3.3V_REG S5_VCCIO_2.5V
S5_VCCIO_1.5VS5_1.5V
S5_2.5V
3.3V_REG S5_VCCIO_1.8VS5_1.8V
2.5V3.3V_REG
5.0V
3.3V_REG
S5_VCCIO_HSMB
5.0VS5_VCCA_GXB
S5_VCCA_GXB_OUT
VTT_DDR3VREF_DDR3
VREF_QDRII_RLD VTT_QDRII_RLD
3.3V
1.5V
3.3V
1.8V
S5_VAR
S5_VCCIO_HSMB
5.0V
5.0V
S5_VCCPD_PGM
S5_VCCPD_PGM
S5_VCCPD_PGM
PG_1.0V_FPGA29Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
30 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
30 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
30 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C25
10uF
C366
10uF
U42
LTC3025-1
BIAS1
GND2
ADJ5
OUT4
SHDN6
EP_GND7
IN3
C95
22uF
C113
22uF
R92 1.07K
U50
LT3022EDHC
NC11
NC38
AGND7
VOUT4
SHDN9
EP_GND17
VIN14
NC22
ADJ5
AGND6
NC516 NC415
VIN13
PGND11PGND10
VOUT3
VIN12
R114 187
C273
10uF C236
22uF
C93
0.1uF
C26
10uF
R53255K
C342
10uF
R378 10.7K
R178
10.0K
R97 604
C177
10uF
R3250.003
R116 1.50K
C94
10uF
U32
LT3080-1/1.1A LDO
IN7
IN8
VCONT5
OUT1
OUT2
OUT3
SET4
EP9NC
6
U57
LT3029EDE
BYP11
BYP28
VOUT27
VOUT14
ADJ29
EP_GND17
VIN114
NC2
GND5
VOUT26
ADJ116SHDN1
15
VIN113
VIN211
SHDN210
VOUT13
VIN212
R3630.003
R312 15.0K
XJ1
2mm Shunt
C56
10uF
U33
LT3080-1/1.1A LDO
IN7
IN8
VCONT5
OUT1
OUT2
OUT3
SET4
EP9 NC
6
C100
10uF
C98
10uF
R213 976
R1690.003
U2
LT3021EDH
NC11
AGND8
ADJ7
VOUT4
SHDN9
EP_GND17
VIN14
NC22
NC35
NC46
NC616
NC715
NC813
NC511
PGND10
VOUT3
VIN12
C178
10uF
C483
2.2uF
L7
BLM21PG331SN1
C556
0.01uF
R780.003
C40
10uF
R171 10.0K
R1700.003
C150
1uF
C134
10uF
C475
1uF
R377 43.2K
C149
10uF
R311 2.49K
C71
10uF
R9110.0K
C57 0.1uF
R159 10.0K
C136
2.2uF
R307
10.0K
C55
10uF
C345
1uF
C555
0.01uF
C135
1.0nF
C101
2.2uF
C249
2.2uF
C42
10uF
R331 10.2K
C508
10uF
R338 4.70M
R52
18.0K
R96
10.0K
C60
10uF
U35
TPS51200
VIN10
EN7
PGOOD9
REFOUT6
GN
D_P
AD
11
PG
ND
4
GN
D8
VLDOIN2
REFIN1
VO3
VOSNS5
R18310.0K
R184 10.0K
C99
2.2uF
R152 10.0K
C473
10uF
C272
1uF
C73
10uF
C514
2.2uF
R115 49.9K C179
10uF
R330 11.3K
C43
1.0nF
C41
10uF
R179
82.5K
U48
LT3083EDF
VOUT1
VCTL8
VCTL7
VOUT4
VIN9
VOUT_EPAD13
VIN10
VOUT2
VOUT5
SET6
VIN11
VOUT3
VIN12
R218
187
U47
LTC3025-1
BIAS1
GND2
ADJ5
OUT4
SHDN6
EP_GND7
IN3
C484
22uF
R3640.003
C325
0.1uF
R337590K
C114
2.2uF
J8
2x3_2mm
1 23 45 6
U49
LT3009xDC
ADJ/NC1
OUT12
OUT23
SHDN4
VIN5
GND6
GND_TAB7
C343
10uF
C344
10uF
C54
10uF
C181
0.1uF
R160 10.0K
R84 2.00K
R15110.0K
U16
TPS51200
VIN10
EN7
PGOOD9
REFOUT6
GN
D_P
AD
11
PG
ND
4
GN
D8
VLDOIN2
REFIN1
VO3
VOSNS5
C271
0.1uF
C515
10uF
U31
LT3080-1/1.1A LDO
IN7
IN8
VCONT5
OUT1
OUT2
OUT3
SET4
EP9NC
6
C72
10uF
R258 10.0K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 6 - Power & Temperature Monitor
ADDR = 01 ADDR = 10
TSENSE_FAN_CNTL
SENSE5_CS0n
SENSE5_SDO
SENSE5_SDO
SENSE5_SDI
SENSE5_SDI
SENSE5_SCK
SENSE5_SCK
SENSE5_CS0n
S5_VCCIO_2.5V_N
S5_VCCIO_2.5V_P
S5_XCVR_GXB_1.0V_N
S5_XCVR_GXB_1.0V_P
S5_VCC_1.5V_N
S5_VCC_1.5V_P
S5_VCCIO_HSMB_N
S5_VCCIO_HSMB_P
S5_VCCINT_N
S5_VCCINT_P
S5_VCCPD_PGM_N
S5_VCCPD_PGM_P
S5_VCCIO_1.5V_N
S5_VCCIO_1.5V_P
S5_VCCIO_1.8V_N
S5_VCCIO_1.8V_P
SENSE_SMB_CLKSENSE_SMB_DATA
S5_VCCA_GXB_NS5_VCCA_GXB_P
S5_VCCIO_HSMB_PS5_VCCIO_HSMB_N
S5_XCVR_GXB_1.0V_NS5_XCVR_GXB_1.0V_P
S5_VCCIO_1.8V_NS5_VCCIO_1.8V_P
S5_VCCPD_PGM_NS5_VCCPD_PGM_P
S5_VCCINT_NS5_VCCINT_P
S5_VCC_1.5V_NS5_VCC_1.5V_P
S5_VCCIO_2.5V_NS5_VCCIO_2.5V_P
S5_VCCIO_1.5V_NS5_VCCIO_1.5V_P
3.3V
3.3V
3.3V
12V
5.0V
5.37V_MONITOR
5.0V 2.5V
2.5V
S5_VCCR_GXB
1.5V_VCC
S5_VCC_1.5V
S5_2.5V
0.9V
S5_VCCINT
S5_1.5V
S5_VCCPD_PGM_2.5V
S5_VCCIO_1.8V
S5_XCVR_GXB_1.0V
S5_VCCPD_PGM
S5_VCCIO_1.5V
S5_VCCIO_2.5V
S5_1.8V
3.3VS5_VCCA_GXB
S5_VCCA_GXB_OUT
S5_VCCIO_HSMB
S5_VAR
SENSE_SCK 18
SENSE_SDI 18
SENSE_CS0n 18
SENSE_SMB_DATA 18
SENSE_SMB_CLK 18TEMPDIODE_P11TEMPDIODE_N11
TSENSE_ALERTn 18
SENSE_SDO 18
OVERTEMPn 18,24
OVERTEMP 18
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
31 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
31 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
31 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
V5
SENSE_PAD
RSNS1
SNS2
C52610uF
Q14
FDV305N
C50.1uF
R357DNI
V16
SENSE_PAD
RSNS1
SNS2
V12
SENSE_PAD
RSNS1
SNS2
J11
22_23_2021
12
V24
SENSE_PAD
RSNS1
SNS2
R356
0
V20
SENSE_PAD
RSNS1
SNS2
R82 200
R3690
V25
SENSE_PAD
RSNS1
SNS2
U56
MAX3378
VL1
IO VL12
IO VL23
IO VL34
IO VL45
NC16
GND7
VCC14
IO VCC113
IO VCC212
IO VCC311
IO VCC410
NC29
/TS8
V22
SENSE_PAD
RSNS1
SNS2
R8
11
0K
C390.1uF
R375 10.0K
U52
LTC2418
CH021
CH122
CH223
CH324
CH425
CH526
CH627
CH728
CH81
CH92
CH103
CH114
CH125
CH136
CH147
CH158
COM10
GND15
VCC9
REF+11
REF-12
F019
CSn16SCK18SDI20SDO17
NC113
NC214
R8
91
0K
R3
58
10
K
R9
51
0K
B1
FAN_2pin_Conn
R3
71
10
K
C5340.1uF
R9
01
0K
V19
SENSE_PAD
RSNS1
SNS2
U45
MAX1619
ADD16
ADD010
SMBCLK14
SMBDATA12DXP
3
DXN4
VCC1
OVERTn9
ALERTn11
STBYn15 GND1
2
GND27
GND38
NC15
NC213
NC316
V17
SENSE_PAD
RSNS1
SNS2
V29
SENSE_PAD
RSNS1
SNS2
R3
70
10
K
V27
SENSE_PAD
RSNS1
SNS2
R3
39
10
K
V26
SENSE_PAD
RSNS1
SNS2
V23
SENSE_PAD
RSNS1
SNS2
U1
LTC2990
V11
V22
V33
V44
GND5
SDA6 SCL7
ADR08 ADR19
VCC10
V11
SENSE_PAD
RSNS1
SNS2
V6
SENSE_PAD
RSNS1
SNS2
V28
SENSE_PAD
RSNS1
SNS2
V18
SENSE_PAD
RSNS1
SNS2
V21
SENSE_PAD
RSNS1
SNS2
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 7 - Stratix V GS Power
(2.5V) (2.5V)
(2.5V)
HSMB VREFVREF_HSMB
VREF_HSMB
VREF_HSMB
S5_VCCINT
S5_VCCPD_PGM_2.5V
S5_VCCA_PLL_2.5V
S5_VCCA_PLL_2.5V
S5_VCC_1.5V
S5_VCCPD_PGM_2.5V
S5_VCC_1.5V
S5_VCCIO_1.8V
S5_VCCIO_2.5V
VREF_QDRII_RLD
VREF_DDR3
S5_VCCIO_HSMB
S5_VCCIO_1.5V
S5_VCCIO_2.5V
S5_VCCIO_HSMB
S5_VCCINT
S5_VCCINT
S5_VCCT_GXB
S5_VCC_1.5VS5_VCCR_GXB
S5_VCCA_GXB
S5_VCCIO_HSMB
S5_VCC_1.5V
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
32 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
32 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
32 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C262
0.1uF
TP1
C214
0.1uF
C196
0.1uF
Stratix V GX I/O Power
3V/2.5V/1.8V/1.5V/
1.35V/1.25V/1.2V
5SGSMD5K2F40
U15L
Version = 1.0 Pin-out
VCCIO3AAU31
VCCIO3AAW33
VCCIO3BAU28
VCCIO3BAW30
VCCIO3CAW24
VCCIO3CAW27
VCCIO3DAU22
VCCIO3DAW21
VCCIO4AAW6
VCCIO4BAW12
VCCIO4BAW9
VCCIO4CAU13
VCCIO4CAW15
VCCIO4DAU19
VCCIO4DAW18
VREFB3AN0AJ31
VREFB3BN0AJ28
VREFB3CN0AJ25
VREFB3DN0AJ23
VREFB4AN0AJ8
VREFB4BN0AJ11
VREFB4CN0AJ14
VREFB4DN0AJ16
VCCIO7AC6
VCCIO7BA9
VCCIO7BC11
VCCIO7CA12
VCCIO7CA15
VCCIO7DA18
VCCIO7DC17
VCCIO8AA33
VCCIO8AC32
VCCIO8BA30
VCCIO8BC29
VCCIO8CA24
VCCIO8CA27
VCCIO8DA21
VCCIO8DC23
VREFB7AN0L7
VREFB7BN0L10
VREFB7CN0L14
VREFB7DN0L17
VREFB8AN0L32
VREFB8BN0L29
VREFB8CN0L25
VREFB8DN0L22
R191
10.0K
Stratix V GX Transceiver Power
Analog Power
TX Buffer Block
Analog Power
RX
Digital Power
PCIe Hard IP
PCS Power
Analog Power
TX
TX Driver,
RX Receiver,
Analog Power
CDR
1.5V
1V/0.85V
0.85V
1V/
0.85V
0.85V
3V/
2.5V
5SGSMD5K2F40
U15P
Version = 1.0 Pin-out
VCCH_GXBL0AE35
VCCH_GXBL1AA35
VCCH_GXBL2U35
VCCH_GXBR0AE5
VCCH_GXBR1AA5
VCCH_GXBR2U5
VCCHIP_LAA24
VCCHIP_LU24
VCCHIP_LV24
VCCHIP_LW24
VCCHIP_LW25
VCCHIP_LY24
VCCHIP_RAA16
VCCHIP_RU16
VCCHIP_RV16
VCCHIP_RW15
VCCHIP_RW16
VCCHIP_RY16
VCCHSSI_LV26
VCCHSSI_LV27
VCCHSSI_LW26
VCCHSSI_LW27
VCCHSSI_LY26
VCCHSSI_RV14
VCCHSSI_RW13
VCCHSSI_RW14
VCCHSSI_RY13
VCCHSSI_RY14
VCCR_GXBL0AG34
VCCR_GXBL1AC34
VCCR_GXBL2W34
VCCR_GXBR0AG6
VCCR_GXBR1AC6
VCCR_GXBR2W6
VCCT_GXBL0AE33
VCCT_GXBL0AF33
VCCT_GXBL1AA33
VCCT_GXBL1AB33
VCCT_GXBL2U33
VCCT_GXBL2V33
VCCT_GXBR0AE7
VCCT_GXBR0AF7
VCCT_GXBR1AA7
VCCT_GXBR1AB7
VCCT_GXBR2U7
VCCT_GXBR2V7
VCCA_GXBL0AD35
VCCA_GXBL1Y35
VCCA_GXBL2T35
VCCA_GXBR0AD5
VCCA_GXBR1Y5
VCCA_GXBR2T5
Stratix V GX Power
Core and
Periphery
Programmable
Power Technology
Configuration
Battery
Auxiliary
Supply
I/O Pre-Driver
PLL Digital
PLL Analog
0.85V
2.5V
1.5V
3V/
2.5V
1.5V
2.5V
Back-up
3V/
2.5V/
1.8V
1.2V-3V5SGSMD5K2F40
U15K
Version = 1.0 Pin-out
VCCAC17
VCCAC19
VCCAC21
VCCAC23
VCCR17
VCCR19
VCCR21
VCCR23
VCCAA18
VCCAA19
VCCAB19
VCCAA22
VCCAA23
VCCAB17
VCCAB18
VCCAB20
VCCAB21
VCCAB22
VCCT18
VCCT19
VCCT20
VCCT22
VCCT23
VCCU17
VCCU18
VCCU20
VCCU21
VCCU22
VCCV17
VCCV18
VCCV19
VCCV21
VCCV22
VCCV23
VCCW18
VCCW19
VCCW20
VCCW21
VCCW22
VCCY17
VCCY18
VCCY21
VCCY22
VCCY23
VCCY19
VCCPTAD19
VCCPTAE13
VCCPTAE28
VCCPTP19
VCCPTR13
VCCPTR28
VCCPGMAL31 VCCPGM
AJ9
VCCBATAK9
VCCPD3ABAR29
VCCPD3ABAR32
VCCPD3CDAR23
VCCPD3CDAR26
VCCPD4AR10
VCCPD4AR13
VCCPD4AR16
VCCPD7E10
VCCPD7E13
VCCPD7E16
VCCPD8E22
VCCPD8E26
VCCPD8E29
VCCA_FPLLAL32
VCCA_FPLLAG20
VCCA_FPLLAK8
VCCA_FPLLJ8
VCCA_FPLLP20
VCCA_FPLLJ32
VCCA_FPLLAD29
VCCA_FPLLW29
VCCA_FPLLAD11
VCCA_FPLLW11
VCCD_FPLLAM32
VCCD_FPLLAF20
VCCD_FPLLAL8
VCCD_FPLLH8
VCCD_FPLLP21
VCCD_FPLLH32
VCCD_FPLLAC29
VCCD_FPLLY29
VCCD_FPLLAC11
VCCD_FPLLY11
VCC_AUXAG11
VCC_AUXAG29
VCC_AUXAK20
VCC_AUXJ20
VCC_AUXN11
VCC_AUXN29
C286
1uF
R195
10.0K
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
Power 8 - Stratix V GS Ground
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
33 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
33 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
33 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Stratix V GX Power
5SGSMD5K2F40
U15M
Version = 1.0 Pin-out
GNDA38
GNDAA34
GNDAA38
GNDAA39
GNDAB36
GNDAB37
GNDAC33
GNDAC35
GNDAC38
GNDAC39
GNDAD36
GNDAD37
GNDAE34
GNDAE38
GNDAE39
GNDAF36
GNDAF37
GNDAG33
GNDAG35
GNDAG38
GNDAG39
GNDAH36
GNDAH37
GNDAJ38
GNDAJ39
GNDAK36
GNDAK37
GNDAL38
GNDAL39
GNDAM36
GNDAM37
GNDAN38
GNDAN39
GNDAP36
GNDAP37
GNDAR38
GNDAR39
GNDAT36
GNDAT37
GNDAU38
GNDAU39
GNDAV36
GNDAV37
GNDAW37
GNDAW38
GNDB36
GNDB37
GNDB38
GNDC38
GNDC39
GNDD36
GNDD37
GNDE38
GNDE39
GNDF36
GNDF37
GNDG38
GNDG39
GNDH36
GNDH37
GNDJ38
GNDJ39
GNDK36
GNDK37
GNDL38
GNDL39
GNDM36
GNDM37
GNDN38
GNDN39
GNDP36
GNDP37
GNDR38
GNDR39
GNDT36
GNDT37
GNDU34
GNDU38
GNDU39
GNDV36
GNDV37
GNDW33
GNDW35
GNDW38
GNDW39
GNDY36
GNDY37
GNDA2
GNDAA1
GNDAA2
GNDAA6
GNDAB3
GNDAB4
GNDAC1
GNDAC2
GNDAC5
GNDAC7
GNDAD3
GNDAD4
GNDAE1
GNDAE2
GNDAE6
GNDAF3
GNDAF4
GNDAG1
GNDAG2
GNDAG5
GNDAG7
GNDAH3
GNDAH4
GNDAJ1
GNDAJ2
GNDAK3
GNDAK4
GNDAL1
GNDAL2
GNDAM3
GNDAM4
GNDAN1
GNDAN2
Stratix V GX Power
5SGSMD5K2F40
U15S
Version = 1.0 Pin-out
GNDAA11
GNDAA20
GNDAA32
GNDAA8
GNDAB32
GNDAB8
GNDAE32
GNDAE8
GNDAF32
GNDAF8
GNDAJ35
GNDAJ5
GNDAL35
GNDAL5
GNDAL9
GNDAN35
GNDAN5
GNDAR35
GNDAR5
GNDAT5
GNDAU35
GNDAU5
GNDB35
GNDB5
GNDC35
GNDC5
GNDE35
GNDE5
GNDF35
GNDF5
GNDG35
GNDH35
GNDH5
GNDJ35
GNDJ5
GNDL35
GNDL5
GNDM35
GNDM5
GNDN35
GNDP35
GNDR33
GNDR34
GNDR35
GNDR5
GNDU32
GNDU8
GNDV12
GNDV32
GNDV8
GNDW10
GNDW12
GNDW28
GNDW31
GNDW32
GNDW8
GNDW9
GNDY10
GNDY28
GNDY32
GNDY8GND
G5
GNDV11
GNDV30
GNDV9
GNDW30
Stratix V GX Power
5SGSMD5K2F40
U15O
Version = 1.0 Pin-out
GNDAT10
GNDAT13
GNDAT16
GNDAT19
GNDAT22
GNDAT25
GNDAT28
GNDAT31
GNDAT34
GNDAT7
GNDAV12
GNDAV15
GNDAV18
GNDAV21
GNDAV24
GNDAV27
GNDAV30
GNDAV33
GNDAV6
GNDAV9
GNDB12
GNDB15
GNDB18
GNDB21
GNDB24
GNDB27
GNDB30
GNDB33
GNDB6
GNDB9
GNDD11
GNDD14
GNDD17
GNDD20
GNDD23
GNDD26
GNDD29
GNDD32
GNDD35
GNDD5
GNDD8
GNDF10
GNDF13
GNDF16
GNDF19
GNDF22
GNDF25
GNDF28
GNDF31
GNDF34
GNDF7
GNDH12
GNDH15
GNDH18
GNDH21
GNDH24
GNDH27
GNDH30
GNDH33
GNDH6
GNDH9
GNDK11
GNDK14
GNDK17
GNDK20
GNDK23
GNDK26
GNDK29
GNDK32
GNDK35
GNDK5
GNDK8
GNDM10
GNDM13
GNDM16
GNDM19
GNDM22
GNDM25
GNDM28
GNDM31
GNDM34
GNDM7
GNDP12
GNDP15
GNDP18
GNDP24
GNDP27
GNDP30
GNDP33
GNDP6
GNDP9
GNDR18
GNDR20
GNDR22
GNDT11
GNDT14
GNDT17
GNDT21
GNDT26
GNDT29
GNDT32
GNDT8
GNDU19
GNDU23
GNDV10
GNDV13
GNDV15
GNDV20
GNDV25
GNDV28
GNDV31
GNDW17
GNDW23
GNDY12
GNDY15
GNDY25
GNDY27
GNDY30
GNDY9
GNDAP8
Stratix V GX Power
5SGSMD5K2F40
U15N
Version = 1.0 Pin-out
GNDAP3
GNDAP4
GNDAR1
GNDAR2
GNDAT3
GNDAT4
GNDAU1
GNDAU2
GNDAV3
GNDAV4
GNDAW2
GNDAW3
GNDB2
GNDB3
GNDB4
GNDC1
GNDC2
GNDD3
GNDD4
GNDE1
GNDE2
GNDF3
GNDF4
GNDG1
GNDG2
GNDH3
GNDH4
GNDJ1
GNDJ2
GNDK3
GNDK4
GNDL1
GNDL2
GNDM3
GNDM4
GNDN1
GNDN2
GNDP3
GNDP4
GNDR1
GNDR2
GNDT3
GNDT4
GNDU1
GNDU2
GNDU6
GNDV3
GNDV4
GNDW1
GNDW2
GNDW5
GNDW7
GNDY3
GNDY4
GNDAA17
GNDAA21
GNDAB11
GNDAB14
GNDAB23
GNDAB26
GNDN5
GNDAB29
GNDAC16
GNDAC18
GNDAC20
GNDAC22
GNDAD10
GNDAD13
GNDAD25
GNDAD28
GNDAD31
GNDAF12
GNDAF15
GNDAF18
GNDAF21
GNDAF24
GNDAF27
GNDAF30
GNDAF9
GNDAH11
GNDAH14
GNDAH17
GNDAH20
GNDAH23
GNDAH26
GNDAH29
GNDAH32
GNDAH35
GNDAH5
GNDAH8
GNDAK10
GNDAK13
GNDAK16
GNDAK19
GNDAK22
GNDAK25
GNDAK28
GNDAK31
GNDAK34
GNDAK7
GNDAM12
GNDAM15
GNDAM18
GNDAM21
GNDAM24
GNDAM27
GNDAM30
GNDAM33
GNDAM6
GNDAM9
GNDAP11
GNDAP14
GNDAP17
GNDAP20
GNDAP23
GNDAP26
GNDAP29
GNDAP32
GNDAP35
GNDAP5
8
8
7
7
6
6
5
5
4
4
3
3
2
2
1
1
E E
D D
C C
B B
A A
FPGA 2.5V VCCIOFPGA 1.8V VCCIO
Place 6 vias minimum on each X2Y cap.
Decoupling
FPGA 1.5V VCCIO
FPGA VCCD PLL & VCCPT
S5_VCCINT
S5_VCC_1.5V
S5_VCC_1.5VS5_VCCA_PLL_2.5V
S5_VCCIO_1.5V
S5_VCC_1.5V
S5_VCCIO_1.8V
S5_VCCPD_PGM_2.5V
S5_VCCIO_2.5V
S5_VCCR_GXB S5_VCCT_GXB
S5_VCCR_GXB S5_VCCT_GXB
S5_VCCA_GXB
S5_VCCIO_HSMB
VREF_QDRII_RLD VREF_DDR3
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
34 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
34 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
Title
Size Document Number Rev
Date: Sheet of
C1
DSP Development Kit, Stratix V Edition
B
34 34Tuesday, May 01, 2012
150-0320202-C1 (6XX-44144R)
Altera Corporation, 9330 Scranton Rd #400, San Diego, CA 92121
Copyright (c) 2012, Altera Corporation. All Rights Reserved.
C409
4.7uF
C340
4.7uF
C288
4.7uF
C413
4.7uF
C14
100uF
SCREW2
C119
0.1uF
C287
4.7uF
C356
0.47uF
SCREW6
C216
100uF
C213
0.22uF
C336
4.7uF
C524
100uF
SCREW4
C46
330uF
C355
100uF
C118
100uF
C267
4.7nF
STANDOFF3
C317
4.7uF
C335
4.7uF
C182
22uF
C157
1uF
STANDOFF2
C362
4.7nF
C230
0.01uF
C155
47nF
C363
4.7uF
C231
4.7uF
C15
100uF
C505
1uF
C188
0.1uF
C282
1uF
SCREW3
C422
4.7nF
C377
4.7uF
C106
0.1uF
C380
0.1uF
C285
2.2uF
C480
4.7uF
C482
4.7uF
SPACER1
C341
100uF
C321
4.7nF
C311
0.1uF
C358
4.7uF
C423
4.7nF
C320
4.7uF
C215
0.47uF
C261
22nF
C292
4.7nF
C339
47nF C45
330uF
C360
4.7uF
C506
4.7uF
C424
22nF C440
4.7uF
C357
4.7uF
C381
22uF
C512
100uF
C481
4.7uF
C283
100uF
C293
1uF
C314
4.7uF
C497
0.1uF
C359
4.7uF
C284
0.1uF
C313
4.7uF
C197
0.1uF
SPACER2
C376
4.7uF
C112
1uF
C373
4.7nF
C442
100uF
C241
0.1uF
C260
4.7uF
C319
4.7uF
C153
4.7uF
C361
4.7uF
C372
47nF
C412
4.7nF
C331
4.7uF
C198
4.7uF
C315
4.7uF
C316
4.7uF
C290
4.7uF
C503
0.1uF
C374
22nF
C378
4.7uF
PCB1
C332
0.22uF
C333
4.7uF
C403
0.1uF
C8
330uF
C338
4.7uF
C156
4.7uF
C37
22nF
C13
100uF
C151
10nF
C264
4.7uF
C265
4.7uF
SCREW5
C353
1uF
C318
4.7uF
C242
0.01uF
C411
0.01uF
C441
4.7uF
C334
4.7uF
C425
47nF
C375
0.22uF
STANDOFF4
C240
0.1uF
C289
4.7uF
C502
100uF
C546
0.1uF
C61
100uF
C137
0.1uF
C291
4.7uF
C337
4.7uF
SCREW1
C439
47nF
C117
100uF
C44
47nF
C154
4.7uFC152
22nF
C266
4.7uF
C410
0.1uF
C513
100uF
C116
100uF
C105
0.1uF
C263
4.7uF
STANDOFF1
C504
22nF
C12
100uF
C379
4.7nF
C158
47nF