Workshop - November 2011 - Toulouse
Architecture exploration and optimisation of a flexible signal processing unit
Jean BERTRAND, Jérémie POULY – CNESAxel BONESS, François BERTRAND – CEA LETI
Workshop - November 2011 2
GoalsEvaluate SoCKET tools capacity to support
architecture explorationConstraints
Need to achieve meaningful technical workSpecific tools requiredSmall team involved
Choice of « easy » explorationFor verification of resultsTo ease success
Workshop - November 2011 3
Design under improvement
LEON3FT(master)
RECS 1(slave)
Instr. cache
Datacache
ADC
INTERFACE
…..
…..
ASIC
FPGAAHBctrl
AMBA AHB 32 bits
SubTopGéné(slave)
MainTopGéné
SubTopGéné
ADC ADCADC DACDAC DAC
…..
…..DAC
AHB adp
AHBUART(slave)
I/O CTRL(slave)
ARBITER
DebugSupport Unit
(master)
RECS 1(slave)
RECS 1(slave)
RECS 1(slave)
AHB adp
RECS 1(slave)
AHB adp
RECS 1(slave)
MEMCTRL + EDAC(slave)
PROM SRAM
Bu
s mém
oire 32+
8 bits
MEMCTRL + EDAC(slave)
PROM SRAM
Bu
s mém
oire 32+
8 bits
DEBUG IF SATELLITE IF
VECTOR MAGNETOMETERYOU NAME ITNULL FIELD MAGNETOMETER
Workshop - November 2011 4
Design overviewDesign with large datapath
48 bit endpoint, 104 at mostMultiplier/accumulator/shifter structureMicro-programmableTask schedulingBUT:
Computational performance depend on I/O throughputHENCE :
Good arbiter (also) needed
Workshop - November 2011 5
ConstraintsAs our design prones reconfigurability :
any application is candidateModel
Input Arbiter (to score) Application
Ouput Metrics
Workshop - November 2011 6
SystemC-TLM-TAC needsTo be correctly installed and configured
Some parts are not painlessUsers have to
Master C++Understand SystemC/TLM/TAC hierarchy and
componentsUsers should be seasoned in these fieldsUsers must be confident with the design
Workshop - November 2011 7
TAC & architecture explorationDesign of model is the important stage Data collection is not built-in
We had to implement our specific outputsModel is communication based therefore good
candidate for TLM-TAC modelingModel evolution easy (arbiter switch)Simulation campaign easy with unix scripting
Workshop - November 2011 8
What was scored ?Tough I/O application identified
In two different kind of applicationsThree different arbiters
Round RobinTime slot FIFO
Allows different parameters
Priorized FIFO
Workshop - November 2011 9
Results RECS1 time slot arbiterRECS1 : on hold=f(window size)
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
0 5 10 15 20 25 30 35 40 45 50
Window size
Ra
te
DD time on hold DC time on hold
DD transaction on hold DC transaction on hold
Workshop - November 2011 10
Results RECS2-4 time slot arbiterRECS2 : on hold = f(window size)
0%
10%
20%
30%
40%
50%
60%
70%
80%
90%
100%
0 5 10 15 20 25 30 35 40 45 50
window size
Ra
te
DD time on hold DC time on holdDD transaction on hold DC transaction on hold
Workshop - November 2011 11
Scoring of arbiters% time on hold
0%
2%
4%
6%
8%
10%
12%
14%
16%
RECS1 RECS2 RECS3 RECS4 mean
ex
ec
uti
on
tim
e o
n h
old
Round Robin DC Round Robin DD Time Slot DC Time Slot DD Prio DC Prio DD
Workshop - November 2011 12
Results : analysisTechnical result : priorized FIFO arbiter is the best
Modelisation results easy to obtain
Ease of characterization of several arbiters
Workshop - November 2011 13
SynthesisArchitecture exploration succeededResults were meaningful and relevantWhen TAC API is mastered, development is an easy
processExcellent ratio time taken/risks leveraged
given initial training and seasoningModelisation environment mastering as lengthy ROI
Workshop - November 2011 14
Questions