Download - Using SystemC with XMOS Devices - Ti.uni-
www.xmos.com © XMOS, 2010
Using SystemC with XMOS Devices
16th March 2012David LaceyTechnical Director of Software Tools - XMOS
www.xmos.com © XMOS, 2010
About XMOS Case Study: An Ethernet MAC Speeding up the development model Modelling XMOS device internals Conclusions
This presentation
www.xmos.com © XMOS, 2010
Embedded Microprocessors Designed for real-time “hardware” tasks Multi-threaded, multi-core Each thread of execution has very
predictable execution time WCET can be determined statically Programmed in C and XC XC = C + extensions for parallelism and
fast event handling
What are XMOS devices?
www.xmos.com © XMOS, 2010
XMOS processors are used for tasks traditionally performed in HW
SystemC and XC have similarities Concurrency Explicit channels of communication between
processes Event based specification of behaviour
Users started asking for it
Why SystemC + XMOS?
www.xmos.com © XMOS, 2010
We performed a case study on the implementation of an ethernet MAC
Wanted to provide a system model/testbench in SystemC and explore the development flow down to an implementation on an XMOS device
100MBit ethernet MAC using 16 wire MII protocol
Wanted to model ethernet PHY Wanted a performance model also
Case Study: An Ethernet MAC
www.xmos.com © XMOS, 2010
The System Model
SYSTEM
Packets In Packets Out
Testbench expects system to loop back packets
www.xmos.com © XMOS, 2010
The System Model
MII Phy model written in SystemC
MII PHY
Packets In Packets Out
tx_datatx_validtx_clk
rx_data
rx_validrx_clk
www.xmos.com © XMOS, 2010
The System Model
MII Phy model written in SystemC
MII Link and Loopback written in SystemC (reference model)
MII PHY
Packets In Packets Out
tx_datatx_validtx_clk
rx_data
rx_validrx_clk
MII Link and Loopback
www.xmos.com © XMOS, 2010
The System Model
MII Phy model written in SystemC
XMOS Device implementsMII link and loopbackapplication
MII PHY
Packets In Packets Out
tx_datatx_validtx_clk
rx_data
rx_validrx_clk
XMOS Device
www.xmos.com © XMOS, 2010
XMOS device model is a wrapper for the the XMOS processor simulator
SystemC drives the whole system simulator clocking the XMOS simulator
SystemC simulation reads/writes pin state from XMOS simulator
This co-simulation allows functional and performance modelling of the system
The System Model: Simulation
www.xmos.com © XMOS, 2010
Even with the externals as a black box writing a generic systemC interface took some work
Really wanted a generic model for many different devices
Heavy use of templates required
Modelling an XMOS device
www.xmos.com © XMOS, 2010
The XMOS GPIO are bidirectional For a particular application we want to
model as unidirectional However:
Want to provide a standard XMOS model Need to make direction a parameter of the model
Flexible Pin Usage 1 – Tri-state pins
www.xmos.com © XMOS, 2010
XMOS devices have many single- or multi-bit ports that share the same pins
We want to simulate at the pin level but model at the port level
Again we want a generic model that provides the correct SystemC port interface depending on the application
Flexible Pin Usage 2 – Overlapping ports
www.xmos.com © XMOS, 2010
We ended up having to dynamically create “connector” modules during elaboration
These convert the underlying pin interfaces of the chip model into the higher level multi-bit, unidirectional ports of the application model
Again, required fiddly use of C++ templates
Connectors
www.xmos.com © XMOS, 2010
Connectors
xc::xsim xsi; sc_in< sc_uint<4> > rx_data;
xsi.getcore("stdcore[0]")->implement_port(rx_data,"XS1_PORT_4A");
XMOS Device
Connector
Set of sc_inout_resolved
Single instance of sc_in <sc_uint<4>>
www.xmos.com © XMOS, 2010
The Development Model
SystemC
Part Model
System Model
SystemC
Lower levelPart Model
System Model
Refine
Implementation
Translate
www.xmos.com © XMOS, 2010
The manual steps of refinement and translation really hit the verification flow:
Introduces errors Slow design iteration
Our devices are programmed in C so should be closer to the SystemC model.
Can we reduce the refine and translate chasms?
Reducing the refine/translate chasms
www.xmos.com © XMOS, 2010
Inter-thread communication become special SystemC channels
XMOS ports, timers become SystemC modules
Parallelism is already in SystemC That's it! SystemC-XC is the restriction of SystemC
to just use these constructs for inter-process communication and I/O
SystemC-XC: Modelling XCore internals
www.xmos.com © XMOS, 2010
MII Example: Refinement
void mii_reference_link::rx(void) { ... while (true) {
// wait for valid high wait(rx_valid.posedge_event());
// detect preamble while (data != 0x5) { wait(); data = rx_data.read(); }
// detect sof while (data != 0xD) { wait(); data = rx_data.read(); } // data loop while (rx_valid.read() != 0) { nibble = rx_data.read(); ...
mii_link_xc::rx(void) {... while (true) { // wait for valid high p_rx_valid->input_when(xc::COND_PINSEQ, 1);
// detect preamble p_rx_data->input_when(xc::COND_PINSEQ, Ox5);
// detect sof p_rx_data->input_when(xc::COND_PINSEQ, OxD);
// data loop do { int res; sc_uint<32> data;
p_rx_valid->setcondition(xc::COND_PINSEQ); p_rx_valid->setdata(0); res = select(&p_rx_data, &p_rx_valid); switch (res) { case 0: data = p_rx_data->in(); ...
www.xmos.com © XMOS, 2010
MII Example: Translationmii_link_xc::rx(void) {... while (true) { // wait for valid high p_rx_valid->input_when(xc::COND_PINSEQ, 1);
// detect preamble p_rx_data->input_when(xc::COND_PINSEQ, Ox5);
// detect sof p_rx_data->input_when(xc::COND_PINSEQ, OxD);
// data loop do { int res; sc_uint<32> data;
p_rx_valid->setcondition(xc::COND_PINSEQ); p_rx_valid->setdata(0); res = select(&p_rx_data, &p_rx_valid); switch (res) { case 0: data = p_rx_data->in(); ...
mii_link_rx(void) {... while (true) { // wait for valid high p_rx_valid when pinseq(1) :> int val;
// detect preamble p_rx_data when pinseq(0x5) :> int val; // detect sof p_rx_data when pinseq(0xD) :> int val; // data loop do { int res; Int data;
select { case p_rx_valid when pinseq(0):> int val: … break; case p_rx_data :> data: ...
www.xmos.com © XMOS, 2010
If you refine down to the right subset of systemC...
… translation could be automated. If fact it would be more like software
compilation This could lead to very quick
design/verification iteration
Automatic Translation?
www.xmos.com © XMOS, 2010
Accurate simulation using xsim XTA (Xmos Timing Analyzer) can statically
check XMOS device code XTA annotations can be placed on
compilable systemC code WCET analysis at compile time Possibility of XTA being extended to be
able to state high level performance properties at all modelling levels
Performance Modelling
www.xmos.com © XMOS, 2010
SystemC and XMOS worked pretty well together
Ended up with two use cases: Using SystemC as a system model using co-
simulation with the XMOS device Using SystemC as a model of the XMOS device
logic itself Required good knowledge of C++
Summary