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Semester:Semester: Fall 2011Fall 2011
Revision: 2Revision: 2
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There are many I/O Ports available on the 9S12. One such 8-bit I/O port isport T called PTT. This port, shared with the TIM module (8 timer-channels), isassociated with 8 pins on the 9S12 chip (i.e. parallel port). When TIM is notused, port T can be used for general I/O purposes. Each of the 8 pins can be
individually defined as input (allowing data to flow into the microcontroller) oroutput (allowing data to flow out of the microcontroller).
Register DDRT, located at address $0242, is the 8-bit direction register for
HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
port PTT. Setting a direction register bit to 0 sets the corresponding pin as aninput, and 1 sets the corresponding pin as an output.
Register PTT is located at address $0240. When one reads from this address,the logic levels on the input pins will be read by the CPU. When one writes tothis address, logic levels will be set accordingly on the output pins.
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PT0
PT1
DDRT EQU $0242 / PTT EQU $0240DDRT EQU $0242 / PTT EQU $0240
PT0
PT1
Each bits are independently controlledEach bits are independently controlled
DDRT = $00 DDRT = $FF
PT0
PT1
DDRT = %00001111
DATA
0 Input
1 Output
HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
PT3
PT4
PT5
PT6
PT7
DATAIN PT3
PT4
PT5
PT6
PT7
DATAOUT
PTT PTT
PT3
PT4
PT5
PT6
PT7
DATA
IN
PTT
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
HCS12 I/O Ports Data Sheet Information Sample:HCS12 I/O Ports Data Sheet Information Sample:
EXAMPLE:PTT EQU $0240DDRT EQU $0242MOVB #0, DDRTLDAA PTTSTAA $1500BSET DDRT, #$0FBCLR PTT, #%00001111
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PTT EQU $0240PTT EQU $0240DDRT EQU $0242DDRT EQU $0242
ORG $1000ORG $1000MAIN: BSET DDRT, #$3MAIN: BSET DDRT, #$3
BSET PTT, #%00000001BSET PTT, #%00000001BCLR PTTBCLR PTT #%00000010#%00000010
SIMPLE SIGNAL GENERATORSIMPLE SIGNAL GENERATOR
Generate two out of phase signals on Port T pins PT0 and PT1.
PT0
LOOP: LDAA PTTLOOP: LDAA PTTEORAEORA #%00000011#%00000011STAA PTTSTAA PTTJSR DELAYJSR DELAYBRA LOOPBRA LOOPENDEND
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PT1
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PORTA (8)
PORTB (8)PORTE (8)
PORTH (8)
PORTJ (4)PORT T
Port H:
Interrupts
PORTK (7)
PORTM (8)
PORTP (8)
PORTS (8)
PORTT (8)
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
Table 4.5 Num ber of pins available in each paralle port
Port Nam e No. of Pins Pin Nam e
A
BE
H
J
8
88
8
4
PA7~PA0
PB7~PB0PE7~PE0
PH7~PH0
PJ7~PJ0
MCS912D PARALLEL PORTS
PJ7, PJ6, PJ1, PJ0
M
P
S
T
PAD1, PAD0L
U
V
W
8
8
8
8
168
8
8
8
~
PM7~PM0
PP7~PP0
PS3~PS0
PT7~PT0
PAD15~PAD0PL7~PL0
PU7~PU0
PV7~PV0
PW7~PW0
,
PS7 PS0
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E. Paterno 2009
DD
RR
AAGG
OO
NN
1122
MC9S12DP256
8
AA
CC
CC
EE
SS
SS
PINSPINS
8
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Interfacing with output LEDs
An LED has an Anode and a Cathode terminal.
The anode terminal voltage must be at least 0.6 V above the cathode voltage,(i.e. forward biased mode FB), for the LED turn ON. The voltage dropacross the diode in the FB mode is VF.
In the FB mode, the diode conducts current defined as IF.
HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
.Resistors R1 and R2 are current-limiting resistors (i.e. ID IF )
74HC04
VCC
Figure 4.15 An LED connected to a CM OS inverter through a current -limiting resistor .
Port
pin
(a) Positive direct drive(c) Buffered drive
R1
R2
R 3
VCC
Portpin
Port
pin(b) Inverse direct driveA 1 turns the LED ON
A 0 turns the LED ON
VOH
VOL
IFIFV
F VF
F
OLFCC
F
FOH
I
VVVR
I
VVR
=
=
2
1
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
Interfacing with 7Interfacing with 7--segment displayssegment displays
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
Interfacing with 7Interfacing with 7--segment displayssegment displays
PTT EQU $0240PTT EQU $0240DDRT EQU $0242DDRT EQU $0242ZERO EQU %1 0111111 ; ctl g f e d c b aZERO EQU %1 0111111 ; ctl g f e d c b a
ONE EQU %1 0000110ONE EQU %1 0000110TWO EQU %1 10111011TWO EQU %1 10111011OFF EQU %0 10111011OFF EQU %0 10111011
ORG $1000ORG $1000MOVB #FF, DDRTMOVB #FF, DDRT
PT0 a
PT6 g
LOOP: MOVB #ZERO, PTTLOOP: MOVB #ZERO, PTTJSR DELAY ; WAIT 1S SubroutineJSR DELAY ; WAIT 1S SubroutineMOVB #ONE, PTTMOVB #ONE, PTTJSR DELAYJSR DELAYMOVB #TWO, PTTMOVB #TWO, PTT
JSR DELAYJSR DELAY
MOVB #OFF, PTTMOVB #OFF, PTTJSR DELAYJSR DELAYBRA LOOPBRA LOOPENDEND
CC
1 ON
PT7 ctl
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
Interfacing with Multiplexed 7Interfacing with Multiplexed 7--segment displayssegment displays
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PT0
PT1
PT2
PT3
L4L3L2L1 L4L3L2L1
PTT EQU $0240PTT EQU $0240DDRT EQU $0242DDRT EQU $0242
ORG $1000ORG $1000MOVB #0F, DDRTMOVB #0F, DDRT
LOOP: LDAA PTTLOOP: LDAA PTTLSRALSRALSRALSRALSRALSRALSRALSRA
SIMPLE WINDOW MONITORING SYSTEMSIMPLE WINDOW MONITORING SYSTEM
LED
PANEL
PT4
PT5
PT6
PT7
PTT
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
C
NO
NC
OC
WND1
STAA PTTSTAA PTTBRA LOOPBRA LOOPENDEND
Windows:0 Closed
1
Open
LEDs:0 OFF1 ON
WND1 WND2 WND3 WND4
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DRAGON 12DRAGON 12
E. Paterno - 2009 15
Speaker
IR transceiverSW7
(SW6)
J29
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DRAGON 12 I/ODRAGON 12 I/O
PB7 PB6 PB5 PB4 PB3 PB2 PB1 PB0
!! WELCOME TO THE DRAGON 12 !!!! WELCOME TO THE DRAGON 12 !!
PREPARED BY PROFESSOR PATERNOPREPARED BY PROFESSOR PATERNO
LEDs
7-Segment Displays
2x16 LCD
77--SEGMENT DISPLAYS AND LEDSSEGMENT DISPLAYS AND LEDS
SHARE BUS B. TURN 7SHARE BUS B. TURN 7--SEGMENTSEGMENT
DISPLAYS OFF WHEN USE LEDSDISPLAYS OFF WHEN USE LEDS
AND VICEAND VICE--VERSA!!VERSA!!
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sw2sw2 sw3sw3 sw4sw4 sw5sw5
8 7 6 5 4 3 2 1
Speaker
Push Buttons
Dip SwitchesOPEN/OFF = 1OPEN/OFF = 1
CLOSED/ON = 0CLOSED/ON = 0
SW6 = ResetSW6 = Reset
PLACE DIP SWITCHES IN OFFPLACE DIP SWITCHES IN OFF
POSITION WHEN USING THEPOSITION WHEN USING THE
PUSH BUTTON SWITCHES!!PUSH BUTTON SWITCHES!!
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PORTB REGISTERPORTB REGISTER ADDRESS $0001ADDRESS $0001DDRB REGISTERDDRB REGISTER ADDRESS $0003ADDRESS $0003
PORTJ, BIT1 = PJ1
Active LOW signalActive LOW signal
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NEED A HIGHNEED A HIGH
SIGNAL TO TURNSIGNAL TO TURN
AN LED ONAN LED ON
DRAGON 12 LED CIRCUIT (COMMON CATHODE CONFIGURATION)DRAGON 12 LED CIRCUIT (COMMON CATHODE CONFIGURATION)
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77--SEGMENT DISPLAYSSEGMENT DISPLAYS(PB0 = a PB6 = g)
(Time Multiplexed)
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PP0PP0 PP1PP1
PP2PP2PP3PP3
PORT P bitsPORT P bits
CommonCommon Cathode:Cathode:
PORTPORT PP active LOWactive LOW
PORT BPORT B active HIGHactive HIGH
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Interfacing with Seven-Segment Displays
7-segment displays are used to display decimal digits and a small set ofletters. 16-segment displays allow for a larger set of letters.
The Dragon 12 HCS12 PORT B drives the LEDs and 7-segment directly.
Because the 7-segment displays and LEDS share BUS B on the Dragon12,one needs to turn the 7-segment displays OFF when LEDs are in use
HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
.
Dragon12 provides four multiplexed 7-segment displays. Port P is used toselect which display to currently activate. Port P is fed to a tri-state HEX busdriver buffer.
The microcontroller must send an appropriate value to the output in order togenerate a certain display.
a 7-segment or 16-segment display can be configured as Common Anode or
Common Cathode. 19E. Paterno - 2009
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
a
b
ce
f
g
Decimal
digita b c d e f g
Segments Corresponding Hex Number
01
2
3
10
1
1
11
1
1
11
0
1
10
1
1
10
1
0
10
0
0
00
1
1
$7E$30
$6D
$79
Table 4.7 Decimal to seven-segment decoder
Figure 4.17 circuit Dragon12 demo board
$3F$06
$5B
$4F
C. A C. C
20E. Paterno - 2009
d4
5
6
7
8
9
0
1
1
1
1
1
1
0
0
1
1
1
1
1
1
1
1
1
0
1
1
0
1
1
0
0
1
0
1
0
1
1
1
0
1
1
1
1
1
0
1
1
$33
$5B
$5F
$70
$7F
$7B
$66
$6D
$7D
$07
$7F
$67
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HCS12 PARALLEL I/O PORTSHCS12 PARALLEL I/O PORTS
16-segment Display (Not available onDragon 12)
21E. Paterno - 2009