System On Module iW-RainboW-G24M
Arria 10 SoC Module
www.iwavesystems.com
iW-RainboW-G24M
HIGHLIGHTS
SPECIFICATIONS
iWave’s Arria 10 SoC System on Module is based on the Arria 10 SX family device with F34 package. The module is equipped with 32-bit DDR4 memory support for HPS with optional ECC and 64-bit DDR4 support for FPGA. All the IOs and high speed transceiver blocks will be available on the SOM board to board connector.
APPLICATIONS: Test and measurement equipment, Control and
intelligence equipment, Diagnostic medical imaging equipment, Wireless infrastructure equipment, Compute and storage equipment, Broadcast and distribution equipment.
SOC: Arria10 SoC
Dual Core, Cortex - A9 CPU @ 1.5GHz
SX270 (10AS027) FPGA Fabric
35mm x 35mm F34 Package
Memory:
1GB DDR4 with optional ECC for HPS
1GB SLC NAND Flash for HPS
Optional 64-bit DDR4 for FPGA
QSPI Flash for FPGA (Optional)
Communication:
10/100/100 Ethernet PHY For HPS
USB2.0 transceiver for HPS UTMI
Power Supply:
5V through SOM B2B connectors
Temperature support:
-40°C to +85°C Industrial
Dual 240 Pin Board to Board Connector:
Arria10 SoC HPS IO interfaces:
Gigabit Ethernet x 1 Port
USB 2.0 OTG x 1 Port
SD (4bit) x 1 Port
SPI x 1 Port, I2C x 1 Port
Full Function UART x 1 Port
Console UART, GPIOs – 4 Nos
Arria10 SoC FPGA IO interfaces:
24 high-speed transceivers
76LVDS/152SE FPGA IOs
8LVDS/8SE General purpose clock outputs
7LVDS/7SE General purpose clock inputs
Headers: HPS/FPGA JTAG, FPGA AS headers
OS Support: Linux 4.1.22
Form Factor: 95mm x 75mm
Arria10 SOC & FPGA device compatibility
SX270, SX320, SX480, SX570, Sx660
24 high speed transceivers @ 17.4Gbps
Up to 76LVDS/152SE FPGA IOs
8LVDS/8SE General purpose clock outputs
7LVDS/7SE General purpose clock inputs
64 - Bit DDR4 support for FPGA
Dual 240 Pin Board to Board Connector
Variable IO voltage support
Industrial Grade operation
Gx270, GX320, GX480, GX570, Gx660,
GX900, Gx1150
OS SUPPORT
Linux 4.1.22
Arria 10 SoC SOM - BLOCK DIAGRAM
OPTIONAL KITS/ModulesDELIVERABLES
Arria 10 SoC SOM Arria 10 SoC Development Kit
Board Support PackageUser Manual
CUSTOM DEVELOPMENT
BSP Development/OS PortingCustom SOM/Carrier Development Custom Application/GUI Development Design Review and Support
Ordering the Arria 10 SoC SOM The SOM Module can be ordered online from the iWave Websitehttp://www.iwavesystems.com/webforms
iWave Systems Tech. Pvt. Ltd.,th nd7/B, 29 Main, BTM Layout 2 Stage,
Bangalore-560076, India. Ph:+91-80-26683700, 26786245Email: [email protected]
iWave Japan, Inc.8F-B, Kannai Sumiyoshi Building,3-29, Sumiyoshi-cho, Naka-ku, Yokohama, Kanagawa, Japan.Ph: +81-45-227-7626Email: [email protected]
iW-G
24M
-BR
-R1.2
Note: iWave reserves the right to change these specifications without notice as part of iWave’scontinuous effort to meet the best in breed specification. The registered trademarks are proprietaryof their respective owners.
*Optional items not included in the standard deliverables.
ple SOMs based on ARMNXP, Intel Atom, Marvell and TI Processors.
iWave System has won the confidence of its c
iWave EuropePostbus 61973130 DD VlaardingenThe NetherlandsPh: +31 10 28403383Email: [email protected]
SOM Board to Board
High Speed Conenctor1
(240Pin)
Hard Processor System(Dual ARM® Cortex™- A9)
Arria10 SX/GX
Debug UART
UART (with CTS & RTS)
I2C
GPIOs (Upto 10nos)
USB1
EMAC1
UART0
UART1
I2C1
GPIOs
USB2.0PHY
Ethernet PHY
UTMI
RGMII
SDRAM Controller
(Bank 2J & 2K)
SDMMC
DDR4 (32bit)DDR4 – 1GB(Upgradable)
DDR4 (ECC)
Micro SDConnector
DDR4 ECC (8bit)
SD (4bit)
FPGA AS Header
(Op�onal)
AS Interface
Configura�on Flash
(Op�onal)
High Speed Transceiver (4 Channels)
FPGA
Bank 1D
Bank 1C
Bank 1F
Bank 1E
Ac�ve Serial
High Speed Transceiver (6 Channels)
FPGA IOs (24LVDS/48SE)
FPGA IOs (24LVDS/48SE)Bank 3C
Bank 2A
Bank 3A
Bank 3B
FPGA IOs (46SE)
FPGA IOs (46SE)
High Speed Transceiver (6 Channels)
High Speed Transceiver (6 Channels)
Transceiver PHYTransceiver P
HY
FPG
A IO
sFP
GA
IOs
JTAGJTAG
Note:
• HPS (Hard Processing System) is supported only in Arria10 SoC family (SX) devices.
• All IOs in SOM Board to Board connectors are 1.8V tolerant IOs. Optionally, Bank 2A and Bank 3A supports variable IO level setting(1.8V,1.5V, 1.35V,1.2V).
• Each FPGA IO Bank (2A,3A,3B,3C) which goes to Expansion connectors support two General Purpose Clock Input (1 in 2A) & two General Purpose Clock Output (LVDS/SE).
• Since 3D,3E & 3F banks are available only in some version of Arria10 parts, FPGA DDR4 (64bit) can be supported only in SX480/GX480 or higher.
Power Regulators
Power to Peripherals
DDR4 (64bit) DDR4 RAM(Op�onal)
Bank 3D,3E,3F
NANDNAND -1GB(Op�onal)
NAND
High Speed Transceiver(2 Channels from Bank 1E)
SPISPIM0
SOM
High Speed Conenctor2
(240Pin)
USB OTG
Gigabit Ethernet
FPGA/HPS JTAG Header
FAN Header5V
Power IN (Op�onal)
5V
Board to Board