Download - Semiconductor Processing (front-end) Stuart Muter 617.371.3853 [email protected] 12/02/2002
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Semiconductor Processing
Agenda: An overview of the key steps in semi-conductor processing (how to make one of Stuart’s wafers).
A lot of information is in the packet, we will not be able to cover it all.
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Section A Introduction to Semiconductor Manufacturing
Section B Key Processing Steps
- Deposition
- Etch
- Lithography
- Doping and Anneal
- CMP
Section C Future Trends
Table of Contents
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•Deposition- CVD- PVD- Oxidation
•Etch•Lithography•Doping and Anneal
- Diffusion- Ion Implant- RTP
•CMP
Front End ProcessingKey Steps
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Moore’s Law
Moore’s Law
Source: www.intel.com
Wafer Sizes
Source: Design News
Transistor density doubles every 2 years
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•0.13 micron critical dimension (human hair
diameter is approx. 100 microns).
•7 metal layers
•25 mask steps
•300 - 400 process steps
State of the Art Semi Device
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•300mm wafers
•$2-3 billion cost
•wafer cycle time: 30 -80 days
•WIP: 20 - 40K wafers
•Full material automation
•Cleanroom: Class 10 or 100
•Mini-environment: Class 0.1
State of the Art Fab
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Market Segmentation
Semi and Semi-Equipment Industries
Worldwide Semiconductor Market
Source: WSTS 11/01
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Wafer Fab Equipment Spending
Semi-Equipment Industries
WFE Revenue Forecast by Equipment Segment ($ Millions)
2001 2002 2003
23,654 18,929 26,908 Change (%) -28.6 -20 42.1
5,750 4,999 7,6036,177 4,687 6,3754,920 3,937 5,784789 639 884908 708 987
3,578 2,761 3,48019 28 54
23,654 18,929 26,908Total Process Control Total WFE
Total DepositionTotal Diffusion/RTPTotal Ion ImplantationTotal Process Control
Equipment SegmentWorldwide Fab
Total Lithography/TrackTotal Removal Processes
Source: Gartner Dataquest (July 2002)