Download - sample of methodology of project
-
8/13/2019 sample of methodology of project
1/14
CHAPTER 3
METHODOLOGY
3.1. Methodology overview
The aim of the project is to design defected ground structure (DGS) to reduce the
mutual coupling between microstrip array elements to design miniaturized microstrip
array antenna with very high gain to meet the demand of the application require long
distance communications. This chapter consists of the design methodology used thought
out this work.
3.2. flow chart of design methodology
The implementation of this project includes two parts, software design and
hardware design. The approaches of the project design are represented in the flow chart
in figure 3.1. The software simulation includes the designing of two-element microstrip
array antenna with and without DGS. Simulations will be done in CST Microwave
Studio software.
-
8/13/2019 sample of methodology of project
2/14
2
Figure 3.1Flow chart of antenna design.
-
8/13/2019 sample of methodology of project
3/14
3
3.3. Microstrip Patch Antenna Design
The three important parameters for microstrip antenna design are the resonant
frequency (fo), the dielectric constant (r) of the substrate and its height (h). Selecting
the frequency of operation depend on the application requirement, while the dielectric
constant of the substrate depend on the substrate material. The substrate material
provides mechanical support for the radiating patch elements.
The procedure is as follows.
Step 1:Calculate the width (W) of the patch. For an efficient radiator, a practical width
that leads to good radiation efficiency is given by [8]
wherecis the speed of light in free space which is 3x10 m/s.Step 2: Determine the effective dielectric constant of the microstrip antenna using
formula 2.8.
Step 3: Once wis found, determine the extension of the length Ldue to the fringing
effects, this can be computed by using formula 2.9.
Step 4: Compute the actual length of the patch that can be determined by
3.4. Choosing for Feeding Technique
There are three different feeding techniques for microstrip patch antenna as discussed in
Chapter 2; in this work Microstrip feed line is chosen. Microstrip line feed is a feeding
method where a conducting strip is connected to the patch directly from the edge as
-
8/13/2019 sample of methodology of project
4/14
4
shown in figure 2.3. Therefore, the width of the feed line plays important role in
microstrip antenna design, and it must be computed in a mathematical model.
The characteristic impedance of the microstrip line can be calculated as
( )
* +
or design purpose there is a relation that allows us to compute the ratio of the line width
to the height of the substrate () based on a given characteristic impedance anddielectric constant of the substrate.
[ }]
where
( )
-
8/13/2019 sample of methodology of project
5/14
5
3.5. Impedance matchingThe input impedance of Microstrip patch antenna is a vital parameter in deciding
the amount of input power delivered to the antenna, thus, reducing the coupling effect
of the RF signal to the nearly circuits. The calculation of an exact 50 ohms input
impedance of a Microstrip patch antenna becomes extremely difficult when the antenna
size is drastically small.
At the edges of the patch, the impedance is generally higher than 50 ohm that ranges
from 150 to 300. To avoid impedance mismatch, between the patch and feed line,
there are two methods that can be used for impedance matching microstrip patch
antenna.
3.5.1 Inset Feed
This method of the impedance matching is to extend the microstrip line into the center
of the patch. Since the input impedance is smaller at points away from the edges (e.g.
center of the patch), this is achieved by properly controlling the inset position. Hence
this is an easy feeding scheme, since it provides ease of fabrication and simplicity in
modeling as well as impedance matching. However as the thickness of the dielectric
substrate being used, increases, surface waves and spurious feed radiation also
increases, which hampers the bandwidth of the antenna. The impedance of the patch is
given by
where, G1 and G12 are self and mutual conductances expressed in section 2.3.1.
The impedance of the patch is also related to the electrical dimensions of the patch and
dielectric constant of the substrate, which is given by
( )
-
8/13/2019 sample of methodology of project
6/14
6
The input impedance related to the length of the inset is given by
where y0is the inset length from slot at the feeding edge of patch, L is the length of the
patch. Therefore, this technique can be used effectively to match patch antenna to a 50-
microstrip-line feed.
where is the input impedance at the leading radiating edge of the patch and is the desired input impedance (50 ).3.5.2 Quarter-wave transformers
Sections of quarter-wave transformers can be used to transform from large input
impedance to 50 ohm line, this is shown in figure 2.4. A quarter-wave transformer uses
a section of line of characteristic impedance of long.
To have a matching condition, we want the resonant input impedance of the patch ( )equal to the line impedance (), this can be achieved by using this equation
In microstrip patch antennas, the total input admittance () is real. Therefore, theresonant input impedance is also real, or
-
8/13/2019 sample of methodology of project
7/14
7
3.6 Array Configuration and Design
Theproposed antenna configurationis shown in Fig. 3.4. To visualize mutual coupling
between the elements of the array in figure 3.4, a two element of microstrip antenna
array with separate feed lines was introduced as shown in Fig.3.2. The figure illustrates
the layout of the array that operates at a frequency of 2.4GHz. Dimensions of all the
parameters are tabulated in table 3.1. Each patch is excited on its symmetrical axis by a
50 microstrip with an inset of 11.3 mm to match the feed line to the patch.
Table 3.1 Dimensions of the antenna parameters
Symbol Parameters Values (mm)L Length of the patch 28.9
W Width of the patch 31.0
d Distance between centers of patches 28.13
Y0 Inset feed line 11.3
Wf Width of the microstrip line 3.10
Fig. 3.2 Geometry of two element microstrip antenna array
-
8/13/2019 sample of methodology of project
8/14
8
CST Microwave Studio was used to simulate the E-plane coupled elements in the array.
The E-plane coupled microstrip patch antenna arrays suffer from strong mutual
coupling because of surface waves. Due to the capability of DGS to suppress surface
waves, a two T-shaped DGS placed back to back were inserted between the two antenna
elements in order to reduce the mutual coupling as shown in Fig. 3.3. Dimensions of all
the DGS parameters are given in table 3.2
Fig. 3.3 Geometry of two element microstrip antenna array on a defected ground plane
Table 3.2 Dimensions of the DGS parameters
Symbol Parameters Values (mm)
a DGS head width 4.2
b DGS head length 4.9
c DGS overlap 8.7
d DGS slot length 26.3
x DGS slots separation 10.8
s DGS slot width 2.0
-
8/13/2019 sample of methodology of project
9/14
9
Fig. 3.4 Proposed microstrip antenna array with corporate feed
3.7 DGS Configuration and Response
In this project, a new technique of DGS has been proposed to reduce the mutual
coupling between elements of an antenna array by introducing two T-shaped DGS
placed back to back between elements. The presence of the two slots improves the
isolation between array elements and increases the stop band.
(a)
-
8/13/2019 sample of methodology of project
10/14
10
(b)Figure 1 DGS configuration. (a) Microstrip transmission line with DGS on the ground-
plane. (b) Simulated S-parameters response.
From Fig. 1b, it is observed that DGS exhibits Bandstop response with attenuation pole
at different frequencies depending on the dimensions of the DGS. In this design the
DGS dimensions are optimized by simulation to achieve attenuation pole at design
frequency 2.4 GHz.
The presence of the DGS section operating at below its pole frequency increases the
effective inductance of a microstrip line. The cutoff frequency is mainly dependent on
the etched slot head area in the ground plane. There is also attenuation pole location,
which is due to the etched slot width of the slot. Actually, it is well known that an
attenuation pole can be generated by combination of the inductance and capacitance
elements. Thus, the DGS section is fully described by the etched slot width, length and
head area in case of slots with certain head shape.
3.7.1 Modeling and parameter extractionA parallel LC circuit can represent the equivalent circuit of the DGS as shown from its
response. From the application point of view, the DGS section can serve as replacement
for a parallel LC resonator circuit in many applications. To apply the DGS section to a
-30
-25
-20
-15
-10
-5
0
2 2.2 2.4 2.6 2.8 3
MagnitudeindB
Frequency (GHz)
S11 for d=24 mm
S12 for d=24mm
S11 for d=26 mm
S12 for d=26mm
S11 for d=28 mm
S12 for d=28mm
-
8/13/2019 sample of methodology of project
11/14
11
practical circuit design example, it is necessary to extract the equivalent circuit
parameters.
As an example of the parameter extraction procedure, Fig. 1a shows the geometric
configuration of T-shaped DGS etched on the ground plane of 50 ohm microstrip line
with width WL=3.3mm, FR4 substrate with dielectric constant of 4.4 and thickness of
1.59 mm. Simulated S parameters response of the DGS is shown in Fig 1b. There is an
attenuation pole near 2.4 GHz in the field simulation result. In order to explain the
cutoff and attenuation pole characteristic of the proposed DGS section simultaneously,
the equivalent circuit should exhibit performances of low-pass and band-stop filter at
the same time. Thus, the simple circuit shown in Fig. 3 can explain the phenomenon for
the proposed DGS section. The circuit parameters for the derived equivalent circuit can
be extracted from the simulation result.
The simulation result of the proposed DGS unit section can be matched to the one-pole
Butterworth-type low-pass response. The series reactance value shown in Fig. 3 can be
easily calculated by using the prototype element value of the one-pole Butterworth
response.
Figure 3LC equivalent circuit: (a) equivalent circuit of the DGS circuit, where the
dotted box shows the DGS Section, (b) Butterworth-type one-pole prototype low-pass
filtercircuit.
-
8/13/2019 sample of methodology of project
12/14
12
The prototype element value is given by various references. [14], [15]. The parallel
capacitance value for the given DGS unit dimension can be extracted from the
attenuation pole location, which is a parallel LC resonance frequency and prototype
low-pass filter characteristic by using the following procedures. The reactance value of
the proposed DGS unit can be expressed as follows:
( ) where, 0 is the resonance angular frequency of the parallel LC resonator,which
is corresponding to attenuation pole location in Fig. 1b. The series inductance of the
Butterworth low-pass filter, shown in Fig. 3b, can be derived as follows:
where 'denotes the normalized angular frequency, Z0 denotes the impedance level of
the in/out terminated ports, and is given by the prototype value of the Butterworth-type
low-pass filter. In order to have the low-pass filter characteristics, the equivalent circuit
of proposed DGS unit section, shown in Fig. 3a, should be equal to the prototype low-
pass filter, shown in Fig. 3b, at a certain frequency. The equality at the cutoff frequency
of the low-pass filter is given by the following:
| |
From above equality, the series capacitance of the equivalent circuit, shown in Fig. 5,
can be obtained as follows:
-
8/13/2019 sample of methodology of project
13/14
13
Once the capacitance value of the equivalent circuit is extracted, the series equivalent
inductance for the given DGS unit section can be calculated by the following:
where f0and fc are resonance (attenuation pole) and cutofffrequency which can beobtained from EM simulation results. The characteristics of most of DGS are similar to
dumbbell DGS, so they could be discussed by one-pole Butterworth low-pass filter too.
Furthermore, radiation effects are more or less neglected.DGS unit can be modeledmost efficiently by a parallel R, L, and C resonant circuit connected to transmissionliens at its both sides as shown in Fig. 6. This resistance corresponds to the radiation,
conductor and dielectric losses in the defect. From EM simulations or measurements
for a given DGS, the equivalent R, L, and C values are obtained from the expression in
[27].
Figure 4RLC equivalent circuit for unit DGS
{
|| ( )
-
8/13/2019 sample of methodology of project
14/14
14
The size of DGS is determined by accurate curve-fitting results for equivalent-circuit
elements to correspond exactly to the required inductance. Fig. 3.4 shows the design
process of the DGS section.
Figure 3.4DGS design procedure.