PCSConsidera-onfor50GbEandNG100GbE
AliGhiasi GhiasiQuantumLLC
NGOATHPlenaryMee9ng
Macau(PresentedDuringAdhoconApril6,2016)
March15,2016
50GbEandNG100GbECompatabilityConsidera-ons
q 25GMSAdoeshavea50GbEmodeofopera9onhMp://25gethernet.org– 25GMSAspecifica-onisnotpublicbutthereisapublicoverview
• hDp://25gethernet.org/sites/default/files/25G%20and%2050G%20Specifica-on%20Overview.pdf
– 50GbEisimplementedover2lanesof25Gasillustratedby• hDp://www.ieee802.org/3/50G/public/adhoc/archive/stone_021716_50GE_NGOATH_adhoc-v2.pdf
– IEEE50GbEtosupportlegacyimplementa-onwouldrequireLAUI-2PMAq Transi9onto50G/laneop9csmayhappenfasterthanmigra9ontoASICs
with50GIO– 50GbEorNG100GbEimplementa-onmaytakeadvantageof400GbE
hardwarewhichsupports16x25Gelectricalbut50G/laneor100G/laneop-cs– Tosupportflexiblemigra-onthe50GbEPCSandNG100GbEPCSsshould
supportrespec-vely2and4lanesPMAsq Fullbackwardcompa9bilitycouldbeprovidedbyaPMA-PMAdeviceas
longasthe:– 50GbEPCSsupportsLAUI-1/2– NG100GbEPCSsupportsCAUI-4/2.
A.Ghiasi 2IEEE802.3NGOATHStudyGroup
Op-onI:50GbEandNGOATH100GbEPCS
q Basedon25GPCSlanesasproposed200GbEPCSformat– hDp://www.ieee802.org/3/bs/public/adhoc/logic/feb9_16/gustlin_01_0216_logic.pdf
– 50GbEcanbebasedon1x257bblocks,padisfilledwithfreerunningPRBS9– 100GbEcanbebasedon2x257bblocks,padisfilledwithfreerunningPRBS9
• Toprovidebackwardcompa-bilitywith100GbEperCL82requiremorecomplexPMA-PMAchip
– Implementa-onwillsupportLAUI-2/1andCAUI-4/2
A.Ghiasi 3
Basesfor50GbEPCS
IEEE802.3NGOATHStudyGroup
Basesfor100GbEPCS
Op-onII:Possible50GbEand100GbEPCSFormat
q Basedon5GPCSlanesperCL82– For50GbEusehalfnumberofPCSlanesaswasproposed:
• hDp://www.ieee802.org/3/50G/public/adhoc/archive/gustlin_020316_50GE_NGOATH_adhoc.pdf – Maysupport25GbEMSAimplementa-onwithsimplerPMAchip– Implementa-onwillsupportLAUI-2/1andCAUI-4/2– IfRS-FEC(544,514)isrequiredistherevaluetopreserve5GPCSlaneoversynergy
with.bsPCS?
A.Ghiasi 4
Basesfor50GbEPCS
WithLAUI-2
IEEE802.3NGOATHStudyGroup
Basesfor100GbEPCSwith
CAUI-2
Exis9ng100GbEFEC(528,514)
Op-onIII:Possible50and100GbEPCSFormat
q FollowCL4910GBase-RPCSwithoutanyAM– Noclearadvantage– Nosynergywith100GbE,200GbE,400GbE– WillonlysupportCAUI-1wherethereisnoPMDobjec-veforit– WillnotsupportLAUI-2
q CL49doesnotofferviablePCSsolu9on!
A.Ghiasi 5IEEE802.3NGOATHStudyGroup
Compa-bilityandSynergyInterac-onwithFEC
q Duringthestudygroupneedtoinves9gateideallyacommonFECaddressingall50GbEPMDswithlikelychoices:– RS-FEC(528,514)– RS-FEC(544,514)
q Duringthestudyphaseneedtoinves9gateifRS-FEC(528,514)canmeetNGOATH100GbEPMDsrequirements:– IfRS-FEC(528,514)canmeetNGPMDsrequirementsthenthereisstrongercaseto
preserve5GPCSlanetoprovideeaseofbackwardcompa-bility• Afurthercomplica-onisthefactthatlegacy100GbEPMDusealloftheKR4FECgainunless
CAUI-2canoperateerrorfreesimilartoCAUI-4(1E-15)compa-bilitywithlegacyPMDslikelycannotbepreserved
– IfNG100GbEPMDrequireRS-FEC(544,514)thenpreserving5GPCSlaneisnotasmuchofavalue• AdvantageofKP4FECissynergywithCDAUI-8/CCAUI-4andsimilarlyCAUI-2canoperateat
Pre-FECBERof1E-6• Interfacinglegacy100GbEPMDswithhosthavingCAUI-2interfacelikelywillrequire
termina-ngKR4FECthenini-a-ngKP4FECq 50G/laneCuandop9calPMDsshoulddrivetheFECchoiceandcodinggain
– Bitmuxwouldbepreferablebutmayhaveapenaltyunderbursterror– Symbolmuxadvantageisthatdatacouldcomefromtwologicallaneswithoutpenalty– LAUI-2andCAUI-4requirePMA-PMAmuxwherewithappropriateimplementa-oncan
providefullbackwardcompa-bilitywithoutsacrificingPMDperformanceq Nextwillshowsomeofthepossible50GbEandNGOATHimplementa9ons.A.Ghiasi 6IEEE802.3NGOATHStudyGroup
Possible50GbEImplementa-onsq Thekeytosuppor9nganyexis9ng50GbEorearlyimplementa9onof50GbEistosupportLAUI-2q PMA-PMAdevicecanprovidefullbackwardcompa9bilityaslongasPCSsupportsbreakingtrafficovertwolanes
A.Ghiasi 7
NewSOCwith50GIOKR4orKP4FEC
PMAMux(Bit/SymbolMux)
CommonEnd-EndFECImpliesRS-FEC(528,514)
PMAMux+RS(544,514) DifferentFEC
FEC
50GbEHost 50GbEHost
IEEE802.3NGOATHStudyGroup
DifferentFEC
FEC
CDR
LegacySOCwith25GIOKR4FEC
CDR
CDR
CDR
PMAMux+RS(544,514)
25.78GBdNRZ(FECon)
25.78GBdPAM4(FECon)
26.55GBdPAM4(FECon)
25.78GBdNRZ(FECoff)
26.55GBdPAM4(FECon)
25.78GBdNRZ(FECoff)
CommonEnd-EndFEC
CDR CDR
PMAMux(Bit/Symbol)
CommonEnd-EndFEC
CDR CDR
PMAMux(Bit/Symbol) 26.55GBd
PAM4(FECon)
NewSOCwith25GIOKP4FEC
26.55GBdPAM4(FECon)
26.55GBdPAM4(FECon)
26.55GBdPAM4(FECon)
Legacy100GbEPMDsAssumingSingleKR4FECisSharedwithCAUI-2
q KR4FECwith20PCSlanesoffershighestlevelofbackwardcompa9bilitytoCL82PCSandCL91KR4-FEC
q ArchitectureshownbelowlikelynotbeviableifKR4FECgainisdividedbetweenCAUI-2andlegacy100GbEPMDthatusethefullKR4FECgain– Toovercomethislimita-onCAUI-2wouldhavetooperateerrorfreesimilartoCAUI-4(1E-15).
A.Ghiasi 8
CAUI-4SOCwith25GIORS-FEC
(528,514)
CAUI-2SOCwith50GIORS-FEC
(528,514)
CDR
Legacy100GbEPMDs
100GbEHost 100GbEHost
IEEE802.3NGOATHStudyGroup
CDR+Bit/SymbolMux
CDR
Legacy100GbEPMDs
PMAMux(BitMux)
CDR
25.78GBdPAM4(FECon)
25.78GBdPAM4(FECon)
25.78GBdNRZ(FECon)
25.78GBdNRZ(FECon)
100GbEImplementa-onsofLegacyPMDsifCAUI-2usesKP4FEC
q Duringthestudyphaseneedtobalancethelevelofbackwardcompa9bilitywithoverallsynergy– PMA-PMA+FECdeviceplacedinmoduleoronthelinecardcanprovidebackwardcompa-bility.
A.Ghiasi 9
CAUI-4SOCwith25GIORS-FEC
(528,514)
CDR
Legacy100GbEPMDs100GbEHost 100GbEHost
IEEE802.3NGOATHStudyGroup
NewCAUI-2SOCwith50GIORS-FEC
(544,514)
CDR
Legacy100GbEPMDs
PMAMux(Bit/Symbol)RS(528,514)èRS(544,514)
CDR
26.55GBdPAM4(FECon)
26.55GBdPAM4(FECon)
25.78GBdNRZ(FECon)
25.78GBdNRZ(FECon)
FEC
RS(528,514)èRS(544,514)
FEC
New100GbEPMDsAssumingKP4FECisRequired
q Duringthestudyphaseneedtobalancethelevelofbackwardcompa9bilitywithoverallsynergyq PMA-PMAdevicecanprovidecompa9bility
– FECcaneasilybeintegratedintoPMA-PMAdevicewhichcanbeplacedinmoduleoronthelinecard.
A.Ghiasi 10
CAUI-4SOCwith25GIORS-FEC
(528,514)
New100GbEPMDs
100GbEHost 100GbEHost
IEEE802.3NGOATHStudyGroup
NewCAUI-2SOCwith50GIORS-FEC
(544,514)
26.55GBdNRZ(FECon)
26.55GBdPAM4(FECon)
26.55GBdPAM4(FECon)
25.78GBdNRZ(FECoff)
New100GbEPMDs
26.55GBdNRZ(FECon)
26.55GBdPAM4(FECon)
PMAMux/FEC(Bit/Symbol)
NewCAUI-4SOCwith25GIORS-FEC
(544,514)
CDR
FEC/PMABit/SymbolMuxNew100GbEPMDsF
EC
25.78GBdNRZ(FECoff)
CDR
FEC/PMABit/SymbolMuxNew100GbEPMDsF
EC
CDR
26.55GBdPAM4(FECon)
PMABit/SymbolMux
PMABit/SymbolMux
CDR
CDR
CDR
Summaryq The50GbEPMDlevelofcompa9bilityandsynergyshouldbeleftothestudy
groupq TheNG100GbEandlevelofcompa9bilityandsynergyshouldbeleftothe
studygroupq Easeoffullbackwardcompa9bilityshouldnotcomeatexpenseofsacrificing50
GbEandNG100GbEPMDperformanceasthebackwardcompa9bilitycanalwaysbesolvedwiththePMA-PMAdevice– Specificimplementa-onshouldbelehtothetaskforce– Needtoinves-gateRS-FEC(528,514)and(544,514)aswellashowtoformFEClanes– Current100GbEPMDusesalloftheKR4FECgainasCAUI-4operateserrorfree
(1E-15)• UnlessKR4FEChassufficientFECgaintocoverthelegacyPMDFECgainandprotectCAUI-2
orLAUI-1thecasetostaywithKR4FECfromcompa-bilityperspec-veimplodes– KP4FECisabeDerchoicetoprotectnew50Gb/s/lanePAM4PMDsrequiring
addi-onalFECgainwhichneedstobesharedwithCAUI-2/LAUI-1links.q WithMr.Nowellsta9ngduringadhoccallthatop9onalAUI(i.e.
LAUI-2/50GAUI-2)arenotoutscope– AstheprecedingfiguresshowonlyahertheFECdecisionismadethearchitectural
implementa-onandAUIchoicescanbenarrowed– Specific50Gand100GAUIshouldbelehtobedefinedbythestudygroupwhere
compa-bility,PCS,andFECareallconsidered– IncludingspecificsofAUIorPCSintheobjec-vemayhandcuffus!
A.Ghiasi 11IEEE802.3NGOATHStudyGroup