Download - Memory Interfacing With 8086
-
8/13/2019 Memory Interfacing With 8086
1/14
Memory interfacing with 8086
-
8/13/2019 Memory Interfacing With 8086
2/14
Physical memory organisation
-
8/13/2019 Memory Interfacing With 8086
3/14
-
8/13/2019 Memory Interfacing With 8086
4/14
Semiconductor memories are of two types
RAM(random access memory)
ROM(read only memory)
-
8/13/2019 Memory Interfacing With 8086
5/14
The general procedure of static memory interfacingwith 8086 is described as follows:
1.Arrange the available memory chips so as to obtain
16-bit data bus width.2.The upper 8-bit bank is called odd address bank and
lower 8-bit bank is called even address bank.
3.Connect available address lines of memory chips with
those of microprocessor and also connect read andwrite inputs to corresponding processor controlsignals.
-
8/13/2019 Memory Interfacing With 8086
6/14
Connect 16-bit data bus of the memory bank
with that of the microprocessor 8086.
The remaining address lines of BHE and A0
are used for decoding the required chip select
signals for the odd and even memory banks.
The chip select of memory is derived from the
O/P of the decoding circuit.
-
8/13/2019 Memory Interfacing With 8086
7/14
Problem: Interface two 4K8 EPROMS and two
4K8 RAM chips with 8086.select suitable
maps.
-
8/13/2019 Memory Interfacing With 8086
8/14
-
8/13/2019 Memory Interfacing With 8086
9/14
-
8/13/2019 Memory Interfacing With 8086
10/14
-
8/13/2019 Memory Interfacing With 8086
11/14
Design an interface between 8086 CPU and
two chips of 16K8 EPROM and two chips of
32K8 RAM select the starting address of
EPROM suitably. The RAM address must start
at 00000H.
-
8/13/2019 Memory Interfacing With 8086
12/14
-
8/13/2019 Memory Interfacing With 8086
13/14
-
8/13/2019 Memory Interfacing With 8086
14/14