Design of Reconfigurable Radios for Multimedia Communications

Bhalchandra B. Godbole Shrikant K. Bodhe Dilip S. Aldar K. B. P. College of Engg. Rajarshi Shahu K. B. P. College of Engg.

& Polytechnic, Satara. College of Engg, Pune. & Polytechnic, Satara. bbgodbole@rediffmail.com s_k_bodhe@yahoo.co.in dilip_aldar@rediffmail.com

Abstract This paper explores the design of reconfigurable radios. The results presented here demonstrate how various modulation-demodulation algorithms can be used to provide the flexibility, performance, efficiency and better resource utilization while meeting the speed and error rate constraints set by a particular design. The software radio approach for a physical layer design is presented. We introduce a framework that describes the various considerations, such as data rate, latency, and BER, that must be made in choose an appropriate modulation to improve system performance by 6-10 dB. Finally, we provide a case study demonstrating how this framework might be used for cellular network situations. Index Terms: Wireless Cellular Communication, Multimedia, Software Defined Radio, Digital Modulation, Algorithm, and Performance. 1. Introduction Marconi said in 1932, “It is dangerous to put limits on wireless.” But even Marconi might not have dreamed what has already been achieved and what may happen next in the field of wireless communications. Looking at these unbelievable, extraordinary, and rapid developments, this rapid development will shrink the world into a global information multimedia communication village (GIMCV) by 2020. Software Defined Radio [1] is an evolving technology that can resolve many of the existing problems arising from various incompatible cellular communications standards throughout the world. The phrase “software defined radio” refers to the class of reconfigurable radios in which the physical layer behavior can be significantly altered without the change in the hardware. Using a programmable hardware a reconfigurable radio can adapt to many different standards and provide benefits such as global mobility, multi-functionality, compactness and ease of upgrades [2]. The architecture choice of physical-layer signal processing is a critical design step. It determines the flexibility, modularity, scalability and performance of the final design [1]. Signal processing algorithms can be implemented using variety of digital hardware such as General Purpose Processors (GPPs), Digital Signal Processors (DSPs), Application Specific Integrated Circuits (ASICs) and Field Programmable Gate Arrays (FPGAs) [3]. With the availability of the latest design tools, it’s now possible to model system-level designs in a MATLAB/Simulink graphical environment and to simulate the designs for timing accuracy. This paper explores one such model simulated and tested in Matlab. This paper compares the simulation results with the theoretical results and provides some useful insights using a proof of concept model for a reconfigurable radio design. 1.1 Limitations in current wireless cellular systems There are several limitations in current wireless cellular mobile systems, which include the inability to adjust to interference, available bandwidth, and different networking standard implementations. Because these systems are usually designed for certain channel characteristics, they have difficulty adjusting to different environments. The examples presented below helps illustrate some of these limitations. A node operating in a crowded hall encounters very different noise and interference levels than a small room. Modulation schemes that make efficient use of the available bandwidth should therefore be adjusted to suit these different environments. A node in a crowded hall, for instance, might choose to boost the amount of error correction, while a node in a small room might switch to a modulation technique that encodes more data at the expense of a lower tolerance to noise. In current wireless systems, there is very little flexibility to make such dynamic adjustments. Current networks focus on improving reliability [3], [13], but do not allow physical layer parameters such as transmit power, modulation, error control rate, and symbol transmission rate to be easily modified.

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International Conference on Computational Intelligence and Multimedia Applications 2007

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Another significant problem facing current systems involves interoperability. A wireless device supporting the GSM standard cannot exchange data messages with a CDMA standard. 1.2 How software radio overcomes these limitations There are significant advantages for software radio in cellular mobile system. Rather than choosing transmission parameters that are suited for certain channel conditions, adjusting transmitter power, modulation, and coding can result in more efficient spectrum and energy use. Such flexibility in making adjustments provides a tremendous advantage [1]. Much research in software radio technology has developed from the SpectrumWare project. The project explored use of a software-oriented signal processing approach for wireless communications. A protocol for mobile hosts to coordinate the transition to a different physical layer was developed in [2]. In addition, the design issues of implementing a software-based frequency hopping spread spectrum radio were explored in [15]. The work in [10] explores efficient spectrum usage, and research by [16] examines how varying power based on node densities can be used for large packet radio networks. Finally, the tradeoffs between MAC retransmission and transmit power are studied in [4]. An overview of QAM modulation can be found in many textbooks such as those by Couch [6], Webb [7], and Proakis [8]. As well, a number of digital QAM architectures have been described in literature. A paper by Daneshrad and Samueli [9] describes an ASIC implementation of a digital QAM modem. D’Luna et al. described a DOCIS compliant M-QAM modem [10]. Papers on SDRs have been written by Gun et al. [3] and Cummings and Haruyama [12] discuss the implementation tradeoffs for SDRs implemented in DSPs and FPGAs. Gunn et al. describes implementation tradeoffs for software radio architectures.

We present a discussion of a general design approach for flexible and efficient signal processing algorithms for Reconfigurable Radios in section-II, highlighting some of the common themes of reconfigurability that run throughout this work. We also describe an algorithm for performance improvement in section-III. Section-IV explains experiment and discussion on results and paper concludes in section-V. 2. Designing flexible signal processing algorithm In the design of a signal-processing algorithm, a typical goal is to produce an algorithm that can compute a specific result using some minimum amount of computation. From a systems perspective, however, it is appropriate to design algorithms that can help provide efficiency in the context of the entire communications system. This approach as shown in Figure-1is especially important in the case of systems that will be expected to provide different services in a wide range of operating conditions.

Figure-1. Software Radio Approach for Reconfigurable Radios. Several common themes emerged from this work that have proven useful in producing efficient, flexible algorithms. These themes can be viewed as a general approach to the development of effective signal processing algorithms in a larger communications system. The steps of this approach are: (1) Identify specific modes of flexibility that are useful in providing overall system efficiency. (2) Identify explicit relationships between input and output data samples for each processing function, and (3) Efficiently develop algorithms using the results of (1) and (2) through the removal of unnecessary intermediate processing steps and meet the end-to-end needs of the users. 2.1 Software signal processing

The signal processing functions are computationally intensive and need to be well matched to the properties of the wireless channel, but they are still only part of the processing chain whose overall goal is efficient and reliable communication. Although there has traditionally been a hard partition between the signal processing functionality and the higher layers of the system, that line in beginning to blur as more

QoS Requirement

Channel Conditions

Regulatory limits

Proposed SR System

Modulation

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functionality is moved in to software. This allows us to consider the design of the system as a whole, instead of separate parts. ♦ Adapt to significant changes in the operating environment, ♦ Provide this dynamic functionality thereby allowing the system to recover or conserve its limited

resources, and ♦ Gracefully degrade performance where desired performance is beyond capabilities. 2.2 Performance metrics

In this work, we make some initial steps in the direction of designing a more flexible communications system. We propose a method for choosing a particular modulation. First, the physical layer must be provided with the following information: desired data rate, bit error rate, latency, and power dissipation. This information is then incorporated with the regulatory limits and channel conditions, as shown in Figure1. The next step is to choose a modulation with the bandwidth efficiency that could support the required data rate, R. The latency per packet, τL, for a given modulation is given by

τL= τmod * Npacket + Npacket /R (1) We then use (1) to see if the modulation meets the user imposed latency constraint. If not, then we choose another modulation and start over the process. If the latency is met, then determine the transmit power required. we can determine the minimum transmit power required to meet the probability of error constraint by solving for Ptx.

Pd = Ptx * ( Npacket /R)+ Pprocessor * CLK * Cmod * Npacket (2) The value calculated for Ptx can be used to check that the power constraint of inequality (2) is met. If not, then several options can be considered. The first is to lower transmit power at the cost of causing a higher bit error rate. The second option is to increase data rate at the expense of probability of error. Alternatively, the power constraint can be relaxed. Lastly, a different modulation scheme might be attempted [11]. If there is no scheme that adequately meets the requirements, then a metric for deciding the closest match might be needed. One option, for instance, is to minimize the bit error rate at the expense of the other parameters. 2.3 Assumptions In this framework, the choice of a particular modulation scheme often depends on other characteristics besides their maximum theoretical bandwidth efficiency. Quadrature Amplitude Modulation (QAM), for instance, tends to be more susceptible to amplitude and phase distortion than PSK or FSK [12],[13]. Second, calculating the minimum transmit power based on the required Eb/No is assumed to minimize power dissipation. In addition, the optimal transmit power may actually be to choose an algorithm that delivers a constant, pre-determined amount to the intended receiver [14]. Finally, the distance is assumed to be known by using the received signal strength from a previous transmission exchanged between the nodes. 3. Case study Suppose that the maximum bandwidth available (BW) is 500 kHz, maximum transmit power allowed (Ptx) is 1 watt, noise level (No) equals 2x10-17 W, and the distance between two nodes (dtx) is 500 meters. The user also specifies the maximum tolerable latency (τLuser), maximum power dissipation (Pduser), minimum data rate (Ruser), and the minimum bit error rate (Peuser): Maximum latency (τLuser) < 70 ms per packet Maximum energy consumption (Pduser) < 5.4 mJ per packet Minimum data rate (Ruser) >1 Mbps Minimum BER (Peuser) >10-5 From the available modulation schemes listed in Table 1, we first try choosing BPSK.

Table 1 Set of possible modulations and QoS parameters

Modulation Data Rate Mbps Latency mS

Energy Consumption µJ

BER

BPSK 1 75.9 107.0 1.0*10-5 QPSK 2 56.4 97.3 1.8*10-4

16-QAM 4 31.5 72.5 0.3*10-4 64-QAM 6 25.2 70.1 0.2*10-3

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The maximum data rate that can be supported by particular modulation (assuming the payload comprises of entire packet) can be calculated using (3).

Rmax = Befficiency * BW*( Npacket / Npayload) (3) Since it is 250,000 bps, the modulation can support the required data rate. Rmax = 1bits/s/Hz * 500kHz * 1 *1/2 = 250,000bps The latency constraint in (1) is first checked to see if it meets the user's requirements assuming a 400-byte packet: τL= 8.89µs/bit * 3200bits +3200bits/115,200bps = 80.9 ms/packet Because the user has requested a latency of less than 70 ms, this modulation is not appropriate. The next step is to find another modulation that does meet this constraint. QPSK would be one candidate, since it has a calculated latency of approximately 56.4 ms and maximum data rate of 2 Mbps. For BPSK or QPSK, the approximate Eb/No for a bit error rate of 10-5 based on Figure 2 is 12.5 dB or 17.78 dB. The processor that performs the modulation is assumed to be a Pentium IV 3GHz machine with an average power dissipation of 100 mW. Using (4), the amount of energy consumed would be calculated as follows: Pd = Ptx * ( Npacket /R)+ Pprocessor * CLK * Cmod * Npacket (4)

= 6.07mJ Because this amount is too large for the user's specified requirement, we have several options. The first is to try a different modulation and coding pair, which would mean to restart the entire process. The second option is to attempt to increase the data rate to reduce the amount of energy consumed during transmission. However, increasing the rate from 1 Mbps to 2 Mbps results in a 2.2 dB change. This rate change would drop the error probability from 10-4 to 10-3 as shown in Figure 2. However, even with this rate change, energy consumption is only reduced to 5.51 mJ, which still does not meet the user requirements. The next option is to try to recalculate the minimum transmit power needed for a lower error probability, such as 10-3. The resulting amount would be 25.2 mW, which would result in a total energy consumption of 5.31 mJ. Therefore, the probability of error and/or data rate would need to be sacrificed to reduce the energy consumption.

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Figure 2 BER versus Eb/No for modulation schemes used for simulation.

4. Conclusion In this paper, we have discussed applications for software radio technology in cellular mobile system. We have introduced a framework that demonstrates how a physical layer can be created based on user requirements, channel conditions, and regulatory limits. Finally, we have applied this framework to four modulation schemes to help examine how software radios might improve performance. By using this framework, a more sophisticated radio for handheld devices might be designed. A platform might be constructed that provides a user with the ability to adjust manually the modulation and channel

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coding. This platform can then be used to better understand how the flexibility of software radios influences the performance of various access protocols and routing algorithms. References [1] W.H.W. Tuttlebee “Software Defined Radio Enabling Technologies”, wiley Ed 2002. [2] ] J. Mitola, “Software Radio Architecture: A Mathematical Perspective,” IEEE JSAC, vol. 17, no. 4, April1999. [3] J. Gun et al., “A Low Power DSP Core-Based Software Radio Architecture,” as [2], pp. 574-589, April

1999. [4] E.Del, “ Software Defined Radio Technologies & Services” Springer Ed, Sept, 2000. [5] V. Eklund et al., “IEEE Standard 802.16: A Technical Overview,” IEEE Comm Magazine, pp. 98-107, June 2002. [6] L. Couch, Digital and Analog Communication Systems, Prentice Hall, Upper Saddle River, NJ, 1997. [7] W. Webb and L. Hanzo, Modern Quadrature Amplitude Modulation: Principles and Applications for Fixed and Wireless Communications, Pentech Press Ltd., London, England, 1995. [8] J. Proakis, Digital Communications, McGraw Hill, New York, NY, 2001. [9] B. Daneshrad and H. Samueli, “A 1.6 Mbps Digital-QAM System for DSL Transmission,” IEEE Journal on Selected Areas in Communications, vol. 13, no. 9, pp. 1600-1610, December 1995. [10] L. D’Luna et al., “A Single-Chip Universal Cable Set-Top Box/Modem Transceiver,” IEEE Journal of Solid State Circuits, vol. 34, no. 11, pp. 1647-1659, November 1999. [11] C. Moy, et. al.“A Reconfigurable Radio Case Study: A S/W based Multistandard Transceiver”, proc.VTC Fall 01. [12] M. Cummings and S. Haruyama, “FPGA in the Software Radio,” IEEE Comm Magazine, pp.108-112, Feb. 1999. [13] T. Hentschel et al., “The Digital Front-End of Software Radio Terminals,” IEEE Personal Communications, pp.40-46, August 1999. [14] G. Ahlquist et al., “Error Control Coding in Software Radios: An FPGA Approach,” IEEE Personal Communications, pp. 35-39, August 1999.

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