Download - HP520
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Cover SheetCustom
1 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
REV:0.5
Mobile Yonah uFCPGA with IntelCalistoga_GM+ ICH7-M core logic
Schematics Document
2007-03-20
Compal confidential
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Block DiagramCustom
2 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Power On/Off CKT.
File Name : LA-3491P
LPC BUS
Compal confidential
PCBGA 1466
page 22
H_A#(3..31)
page 29
BANK 0, 1, 2, 3
USB Conn x2
533/667MHz
DMI
DC/DC Interface CKT.
Mobile Yonah/Merom
USB2.0
FSB
Clock GeneratorICS9LP306BGLFT
Power Circuit DC/DC
IDE ODD Connector
PCI BUS
uFCPGA-478 CPU
page 31
DDR2-SO-DIMM X2
page 33
Intel Calistoga MCH
page 4page 4,5,6
RTC CKT.
page 15
DDR2 -400/533/667
mBGA-652
page 34
page 4
page 7,8,9,10,11,12
Intel ICH7-M
Thermal SensorADM1032AR
page 13,14
page 18,19,20,21
Power OK CKT.
page 19
Fan Control
Dual Channel
Touch Pad CONN. Int.KBD
SMSC KBC 1070page 30
page 30page 32
Page 37 3、 8 39 40、 、
PCI-E BUS
page 31
LED
SPI
25LF080A
SPI ROM
page 31
H_D#(0..63)
Volga 2.0
AC-LINK/Azalia
page 22
SATA HDD Connector
PATA Slave
page 25
Mini-Card WLAN
945GM
SATA
page 26CX20549-12
Audio Conexant page 27
MODEM AMOM
page 28
AMP & Audio JackTPA6017A2
CX20548
page 16
CRT
page 17
LVDS Conn
CardBus ControllerCB-1410
page 24
Slot 0page 24
page 23
page 23
82562V 10 /100
RJ45/11 CONN
INTEL LAN
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C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Notes List
3 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
IDSEL #
2
1 0 1 0 0 1 0 0A4
I2C / SMBUS ADDRESSING
C
1 0 1 0 0 0 0 0
D2
CARD BUS
A0
CLOCK GENERATOR (EXT.)
HEX
DDR SO-DIMM 1
D6
ADDRESS
PCI Device ID
DDR SO-DIMM 0
DEVICE
1 1 0 1 0 0 1 0
External PCI DevicesREQ/GNT #
DEVICE
AD22
PIRQ
Voltage Rails Symbol Note :
: means Digital Ground
: means Analog Ground
XDP@ : means just build when XDP function enable. When this time, docking PCI express will not work.CONN@ : means ME parts
LP@ : means just build when Low power clock gen. installNOXDP@ : means just build when XDP function disable.
BATT@ : means need be mounted when 45 level assy or rework stage.45@ : means need be mounted when 45 level assy or rework stage.
Debug@ : means Mini debug card use
ICH7 R1 SA00000V1F0
ICH7 R3 SA00000V1A0
Calistoga 940GML R3 SA000011C10
Calistoga 945GM R3 SA0000059L0
Calistoga 945GM R1 SA0000059A0
Calistoga 940GML R1 SA000011C00
14@ : means need be mounted when 14.1"
IAT50 945GM FF 46147932L01
IAT50 940GML DF 46147932L02
IAT60 945GM FF 46147932L21
IAT60 940GML DF 46147932L22
VIN
OFF
Power Plane
N/AN/A
ON
AC or battery power rail for power circuit+CPU_CORE
+0.9V
S3
+1.5VS
OFF+VCCP
N/A
ON0.9V switched power rail for DDRII Vtt
S0-S1
ON OFF
ON
N/AN/A
OFF
Description
1.05V power rail for Processor I/O and MCH/ICH core power
Adapter power supply (18.5V) N/A
OFFOFF
Core voltage for CPUOFFOFF
S5
1.5V switched power rail for PCI-E interface
B+
OFF2.5V switched power rail for MCH video PLL
5V always on power railON
3.3V always on power rail3.3V switched power rail+3VS
ON*
RTC power ONON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
+1.8V
OFF
OFF
ON
ON
+3VALW
OFF
ON
5V switched power railON
+2.5VS
+RTC_VCC+5VS
ON
ONON OFF
+5VALW
ON
1.8V power rail for DDRII
ON*ON OFF OFF
IAT50 940GML DF 46147932L03 (No WLAN)
IAT60 940GML DF 46147932L23 (No WLAN)
WLAN@ : means need be mounted when have wireless LED FunctionWLAN14@ : means need be mounted when have wireless LED Function and 14"
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_A#28
H_THERMDA
H_FERR#
H_ADSTB#0
H_A#23
H_REQ#2
H_A#31
H_REQ#0
H_A#17
H_BNR#
H_A#29
H_DSTBP#0
H_A#8
H_DEFER#
H_REQ#1
H_A#3
H_RS#0
H_DSTBN#1
H_A#6
XDP_BPM#2
H_BPRI#
H_ADS#
H_A#25
XDP_BPM#3
H_RS#1
H_DSTBP#1
H_A#4
H_IERR#H_HITM#
H_DSTBN#0
H_INTR
H_DSTBN#2
H_A#22
H_A#7
H_REQ#4
XDP_DBRESET#
H_DRDY#
H_A#15H_A#14
H_A20M#
H_DINV#0
H_DSTBP#2
H_DINV#2H_DINV#3
H_DINV#1
H_DSTBN#3
H_DSTBP#3
H_NMI
H_A#30
H_A#27
H_A#18
H_A#10
H_BR0#
H_LOCK#
H_A#11
H_A#21
H_A#26
H_A#13
H_A#9
XDP_BPM#0
H_DPSLP#
H_A#20
H_A#16
H_A#12
H_HIT#
H_ADSTB#1
H_THERMTRIP#
H_DBSY#
H_A#19
H_A#24
H_A#5
H_RS#2
H_RESET#
XDP_BPM#1
H_REQ#3
H_SMI#H_STPCLK#
XDP_TCK
XDP_TRST#XDP_TMS
H_CPUSLP#
XDP_TDOXDP_TDI
H_PWRGOOD
XDP_BPM#5
H_DPRSTP#
H_TRDY#
CLK_CPU_BCLKCLK_CPU_BCLK#
ICH_SMBCLKICH_SMBDATA
H_THERMDA
H_THERMDC
THERM#
ICH_SMBDATA
ICH_SMBCLK
THERM#
H_THERMDC
XDP_BPM#4H_DPWR#
TEST1TEST2
H_D#0H_D#1H_D#2H_D#3
H_D#7H_D#6
H_D#4H_D#5
H_D#11H_D#10
H_D#8H_D#9
H_D#15H_D#14
H_D#12H_D#13
H_D#19H_D#18
H_D#16H_D#17
H_D#23H_D#22
H_D#20H_D#21
H_D#27H_D#26
H_D#24H_D#25
H_D#31H_D#30
H_D#28H_D#29
H_D#35H_D#34
H_D#32H_D#33
H_D#39H_D#38
H_D#36H_D#37
H_D#43H_D#42
H_D#40H_D#41
H_D#47H_D#46
H_D#44H_D#45
H_D#51H_D#50
H_D#48H_D#49
H_D#55H_D#54
H_D#52H_D#53
H_D#59H_D#58
H_D#56H_D#57
H_D#63H_D#62
H_D#60H_D#61
H_INIT#H_IGNNE#
H_PROCHOT#
H_PROCHOT# OCP#
H_DPSLP#
H_DPRSTP#
XDP_HOOK1
XDP_HOOK1
XDP_BPM#3
XDP_DBRESET#_R
XDP_BPM#0XDP_BPM#1
XDP_BPM#2
XDP_PRE
XDP_DBRESET#XDP_DBRESET#_R
XDP_TDI
XDP_TMS
XDP_TCK
XDP_TRST#
XDP_TCK
XDP_TDO
H_RESET#
XDP_TRST#
XDP_TMS
XDP_TDO
XDP_TDI
H_PWRGOOD_R
H_RESET#_R
XDP_BPM#5
CLK_CPU_XDP#CLK_CPU_XDP
XDP_BPM#4XDP_BPM#5
FAN
THERM_SCI#
H_PWRGOOD
ICH_SMBDATA<13,14,15,20,25>ICH_SMBCLK<13,14,15,20,25>
THERM_SCI# <20>
FAN_PWM<30>
H_D#[0..63] <7>
H_A#[3..31]<7>
H_REQ#[0..4]<7>
H_ADSTB#0<7>H_ADSTB#1<7>
CLK_CPU_BCLK#<15>CLK_CPU_BCLK<15>
H_ADS#<7>H_BNR#<7>
H_BR0#<7>
H_DRDY#<7>H_HIT#<7>
H_HITM#<7>
H_BPRI#<7>
H_DEFER#<7>
H_LOCK#<7>H_RESET#<7>
H_RS#[0..2]<7>
H_TRDY#<7>
H_DBSY#<7>H_DPSLP#<19>
H_DPRSTP#<19,40>H_DPWR#<7>
H_CPUSLP#<7>
H_THERMTRIP#<7,19>
H_DINV#0 <7>H_DINV#1 <7>H_DINV#2 <7>H_DINV#3 <7>
H_DSTBN#[0..3] <7>
H_DSTBP#[0..3] <7>
H_A20M# <19>H_FERR# <19>H_IGNNE# <19>H_INIT# <19>H_INTR <19>H_NMI <19>
H_STPCLK# <19>H_SMI# <19>
XDP_DBRESET#<20>
H_PROCHOT#<40>
OCP# <20,30,42>
H_PWRGOOD<19>
CLK_CPU_XDP <15>CLK_CPU_XDP# <15>
+VCCP
+3VS
+3VS
+5VS
+3VS
+VCCP
+VCCP
+3VS
+VCCP+VCCP
+VCCP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Yonah CPU in mFCPGA479
4 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
H_THERMDA, H_THERMDC routing together.Trace width / Spacing = 10 / 10 mil
Thermal Sensor ADM1032AR-2
Address:1001_101
PWM Fan Control circuit
Place R2203 within 200ps (~1") to CPU
Change to same asChimay 4/6
This shall place near CPU
ITP-XDP ConnectorChange value in 5/02
Removed at 5/30.(FollowChimay)
Follow datasheet 12/05
S
GD
Q1AO6402_TSOP63
624
51
R2201 1K_0402_1%
XDP@
1 2
JP3
ACES_85205-0200CONN@
12
U1
ADM1032AR-2_MSOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R2199 54.9_0402_1%@ 1 2
C1455 0.1U_0402_16V7KXDP@
12
ZD1
RLZ5.1B_LL34
@
12
R1256_0402_5%
1 2
R2202 200_0402_1%
XDP@
12
R22030_0402_5%
XDP@
1 2
R1556_0402_5% 1 2
ADDR GROUP
CONTROL
HOST CLK
MISC
DATA GROUP
THERMALDIODE
LEGACY CPU
YONAHJP1A
FOX_PZ47903-2741-42_YONAH
CONN@
A3#J4A4#L4A5#M3A6#K5A7#M1A8#N2A9#J1A10#N3A11#P5A12#P2A13#L1A14#P4A15#P1A16#R1A17#Y2A18#U5A19#R3A20#W6A21#U4A22#Y5A23#U2A24#R4A25#T5A26#T3A27#W3A28#W5A29#Y4A30#W2A31#Y1
REQ0#K3REQ1#H2REQ2#K2REQ3#J3REQ4#L5
ADSTB0#L2ADSTB1#V4
BCLK0A22BCLK1A21
ADS#H1BNR#E2BPRI#G5BR0#F1DEFER#H5DRDY#F21HIT#G6HITM#E4IERR#D20LOCK#H4RESET#B1
RS0#F3RS1#F4RS2#G3TRDY#G2
BPM0#AD4BPM1#AD3BPM2#AD1BPM3#AC4
DBR#C20DBSY#E1DPSLP#B5
DPWR#D24PRDY#AC2PREQ#AC1PROCHOT#D21
PWRGOODD6SLP#D7TCKAC5TDIAA6TDOAB3TEST1C26TEST2D25TMSAB5TRST#AB6
THERMDAA24THERMDCA25THERMTRIP#C7
D0# E22D1# F24D2# E26D3# H22D4# F23D5# G25D6# E25D7# E23D8# K24D9# G24
D10# J24D11# J23D12# H26D13# F26D14# K22D15# H25D16# N22D17# K25D18# P26D19# R23D20# L25D21# L22D22# L23D23# M23D24# P25D25# P22D26# P23D27# T24D28# R24D29# L26D30# T25D31# N24D32# AA23D33# AB24D34# V24D35# V26D36# W25D37# U23D38# U25D39# U22D40# AB25D41# W22D42# Y23D43# AA26D44# Y26D45# Y22D46# AC26D47# AA24D48# AC22D49# AC23D50# AB22D51# AA21D52# AB21D53# AC25D54# AD20D55# AE22D56# AF23D57# AD24D58# AE21D59# AD21D60# AE25D61# AF25D62# AF22D63# AF26
DINV0# J26DINV1# M26DINV2# V23DINV3# AC20
DSTBN0# H23DSTBN1# M24DSTBN2# W24DSTBN3# AD23DSTBP0# G22DSTBP1# N25DSTBP2# Y25DSTBP3# AE24
A20M# A6FERR# A5
IGNNE# C4INIT# B3
LINT0 C6LINT1 B4
STPCLK# D5SMI# A3
DPRSTP#E5
R16 1K_0402_5%@1 2
R20
56_0402_5%@
1 2
R5 54.9_0402_1%1 2
D1
CH751H-40_SC76 2
1
U2
TC7SH00FU_SSOP5
INB1
INA2 O 4
G3
P5
C5
0.1U_0402_16V4Z
1
2
R18
56_0402_5%@
12
EB
C
Q2MMBT3904_SOT23@
2
3 1
R13
10K_0402_5%
12
C2
0.1U_0402_16V4Z1
2
R6 51_0402_1%
1 2
R3 54.9_0402_1%1 2
R2 54.9_0402_1%1 2
R101K_0402_5%@1 2
C4
4.7U_0805_10V4Z
1
2
R14
10K_0402_5%
1 2
R4 54.9_0402_1%1 2
R19
56_0402_5%@
1 2
R7 54.9_0402_1%1 2
C3
2200P_0402_50V7K
1 2
R17 51_0402_5%
12
JP29
SAMTE_BSH-030-01-L-D-ACONN@
GND01OBSFN_A03OBSFN_A15GND27OBSDATA_A09OBSDATA_A111GND413OBSDATA_A215OBSDATA_A317GND619OBSFN_B021OBSFN_B123GND825OBSDATA_B027OBSDATA_B129GND1031OBSDATA_B233OBSDATA_B335GND1237PWRGOOD/HOOK039HOOK141VCC_OBS_AB43HOOK245HOOK347GND1449SDA51SCL53TCK155TCK057GND1659
GND1 2OBSFN_C0 4OBSFN_C1 6
GND3 8OBSDATA_C0 10OBSDATA_C1 12
GND5 14OBSDATA_C2 16OBSDATA_C3 18
GND7 20OBSFN_D0 22OBSFN_D1 24
GND9 26OBSDATA_D0 28OBSDATA_D1 30
GND11 32OBSDATA_D2 34OBSDATA_D3 36
GND13 38ITPCLK/HOOK4 40
ITPCLK#/HOOK5 42VCC_OBS_CD 44
RESET#/HOOK6 46DBR#/HOOK7 48
GND15 50TD0 52
TRST# 54TDI 56
TMS 58GND17 60
R22001K_0402_5%
XDP@
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
COMP3COMP2
H_PSI#
COMP1COMP0
CPU_VID1CPU_VID0
CPU_VID3CPU_VID4
CPU_VID2
CPU_VID5CPU_VID6
CPU_BSEL1CPU_BSEL2
CPU_BSEL0
VSSSENSEVCCSENSE
VSSSENSE
VCCSENSE
H_PSI#<40>
CPU_VID0<40>CPU_VID1<40>CPU_VID2<40>CPU_VID3<40>CPU_VID4<40>CPU_VID5<40>CPU_VID6<40>
CPU_BSEL0<15>CPU_BSEL1<15>CPU_BSEL2<15>
VCCSENSE<40>VSSSENSE<40>
+VCCP
+VCC_CORE
+VCCP
V_CPU_GTLREF
V_CPU_GTLREF
+1.5VS
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Yonah CPU in mFCPGA479
5 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Resistor placed within0.5" of CPU pin.Traceshould be at least 25mils away from anyother toggling signal.
Close to CPU pin AD26within 500mils.
CPU_BSEL CPU_BSEL2 CPU_BSEL1
133
166
0 0
0 1
CPU_BSEL0
1
1
Length match within 25 milsThe trace width 18 mils space7 mils
Close to CPU pinwithin 500mils.
POWER, GROUNG, RESERVED SIGNALS AND NC
YONAH
JP1B
FOX_PZ47903-2741-42_YONAHCONN@
PSI#AE6
GTLREFAD26
VCCSENSEAF7
VCCAB26
VCCAB20VCCAA20VCCAF20VCCAE20VCCAB18VCCAB17VCCAA18VCCAA17VCCAD18VCCAD17VCCAC18VCCAC17VCCAF18VCCAF17
RSVDT22
RSVDV3RSVDB2RSVDC3
VSS AB26VSS AA25VSS AD25VSS AE26VSS AB23VSS AC24VSS AF24VSS AE23VSS AA22VSS AD22VSS AC21VSS AF21VSS AB19VSS AA19VSS AD19VSS AC19VSS AF19VSS AE19VSS AB16VSS AA16VSS AD16VSS AC16VSS AF16VSS AE16VSS AB13VSS AA14VSS AD13VSS AC14VSS AF13VSS AE14VSS AB11VSS AA11VSS AD11VSS AC11VSS AF11VSS AE11VSS AB8VSS AA8VSS AD8VSS AC8VSS AF8VSS AE8VSS AA5VSS AD5VSS AC6VSS AF6VSS AB4VSS AC3VSS AF3VSS AE4VSS AB1VSS AA2VSS AD2VSS AE1VSS B6VSS C5VSS F5VSS E6VSS H6VSS J5VSS M5VSS L6VSS P6VSS R5VSS V5VSS U6VSS Y6VSS A4VSS D4VSS E3VSS H3VSS G4VSS K4VSS L3VSS P3VSS N4VSS T4VSS U3VSS Y3VSS W4VSS D1VSS C2VSS F2VSS G1RSVDB25
VSSSENSEAE7
VCCPK6VCCPJ6VCCPM6VCCPN6VCCPT6VCCPR6VCCPK21VCCPJ21VCCPM21VCCPN21VCCPT21VCCPR21VCCPV21VCCPW21VCCPV6VCCPG21
VID0AD6VID1AF5VID2AE5VID3AF4VID4AE3VID5AF2VID6AE2
BSEL0B22BSEL1B23BSEL2C21
COMP0R26COMP1U26COMP2U1COMP3V1
RSVDC23RSVDC24RSVDAA1RSVDAA4RSVDAB2RSVDAA3RSVDM4RSVDN5RSVDT2
RSVDD2RSVDF6RSVDD3RSVDC1RSVDAF1RSVDD22
VCCE7
R242K_0402_1%
12
R28
54.9
_040
2_1%
12
C6
0.01
U_0
402_
16V7
K
1
2
R25
27.4
_040
2_1%
12
R211K_0402_1%
12
POWER, GROUND
YONAH
JP1C
FOX_PZ47903-2741-42_YONAHCONN@
VCCAE18VCCAE17VCCAB15VCCAA15VCCAD15VCCAC15VCCAF15VCCAE15VCCAB14VCCAA13VCCAD14VCCAC13VCCAF14VCCAE13VCCAB12VCCAA12VCCAD12VCCAC12VCCAF12VCCAE12VCCAB10VCCAB9VCCAA10VCCAA9VCCAD10VCCAD9VCCAC10VCCAC9VCCAF10VCCAF9VCCAE10VCCAE9VCCAB7VCCAA7VCCAD7VCCAC7VCCB20VCCA20VCCF20VCCE20VCCB18VCCB17VCCA18VCCA17VCCD18VCCD17VCCC18VCCC17VCCF18VCCF17VCCE18VCCE17VCCB15VCCA15VCCD15VCCC15VCCF15VCCE15
VSS K1VSS J2VSS M2VSS N1VSS T1VSS R2VSS V2VSS W1VSS A26VSS D26VSS C25VSS F25VSS B24VSS A23VSS D23VSS E24VSS B21VSS C22VSS F22VSS E21VSS B19VSS A19VSS D19VSS C19VSS F19VSS E19VSS B16VSS A16VSS D16VSS C16VSS F16VSS E16VSS B13VSS A14VSS D13VSS C14VSS F13VSS E14VSS B11VSS A11VSS D11VSS C11VSS F11VSS E11VSS B8VSS A8VSS D8VSS C8VSS F8VSS E8VSS G26VSS K26VSS J25VSS M25VSS N26VSS T26VSS R25VSS V25VSS W26VSS H24VSS G23VSS K23VSS L24VSS P24VSS N23VSS T23VSS U24VSS Y24VSS W23VSS H21VSS J22VSS M22VSS L21VSS P21VSS R22VSS V22VSS U21VSS Y21
VCCB14VCCA13VCCD14VCCC13VCCF14VCCE13VCCB12VCCA12VCCD12VCCC12VCCF12VCCE12VCCB10VCCB9VCCA10VCCA9VCCD10VCCD9VCCC10VCCC9VCCF10VCCF9VCCE10VCCE9VCCB7
VCCF7 VCCA7
R27
27.4
_040
2_1%
12
R23100_0402_1%
1 2
R26
54.9
_040
2_1%
12
C7
10U
_080
5_10
V4Z
1
2
R22100_0402_1%
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
+VCCP
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
+VCC_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
CPU Bypass capacitors
6 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Mid Frequence Decoupling
ESR <= 1.5m ohmCapacitor > 1980uF
Place these capacitors on L8(North side,Secondary Layer)
Place these capacitors on L8(Sorth side,Secondary Layer)
Place these capacitors on L8(Sorth side,Secondary Layer)
Place these capacitors on L8(North side,Secondary Layer)
02/26 Change C43 C44 C45 to、 、1.9mm height for PV build shortterm solution
C19
10U_0805_6.3V6M
1
2
+C42
330U_D2E_2.5VM_R7
1
2
C32
10U_0805_6.3V6M
1
2
C24
10U_0805_6.3V6M
1
2
C27
10U_0805_6.3V6M
1
2
C8
10U_0805_6.3V6M
1
2
C22
10U_0805_6.3V6M
1
2
C26
10U_0805_6.3V6M
1
2
C16
10U_0805_6.3V6M
1
2
+C40
330U_D2E_2.5VM_R7
1
2
C52
0.1U_0402_10V6K
1
2
C11
10U_0805_6.3V6M
1
2
C49
0.1U_0402_10V6K
1
2
C35
10U_0805_6.3V6M
1
2
C9
10U_0805_6.3V6M
1
2
+C47
330U_D2E_2.5VM_R9
1
2
C18
10U_0805_6.3V6M
1
2
C36
10U_0805_6.3V6M
1
2
C10
10U_0805_6.3V6M
1
2
C30
10U_0805_6.3V6M
1
2
C51
0.1U_0402_10V6K
1
2
C17
10U_0805_6.3V6M
1
2
C23
10U_0805_6.3V6M
1
2
C14
10U_0805_6.3V6M
1
2
C53
0.1U_0402_10V6K
1
2
C39
10U_0805_6.3V6M
1
2
C33
10U_0805_6.3V6M
1
2
C20
10U_0805_6.3V6M
1
2
+C45
330U_D2E_2.5VM_R7
1
2
C50
0.1U_0402_10V6K
1
2
+C41
330U_D2E_2.5VM_R7@
1
2
C29
10U_0805_6.3V6M
1
2
C15
10U_0805_6.3V6M
1
2
C38
10U_0805_6.3V6M
1
2
C34
10U_0805_6.3V6M
1
2
C13
10U_0805_6.3V6M
1
2
+C44
330U_D2E_2.5VM_R7
1
2
+C43
330U_D2E_2.5VM_R7
1
2
C31
10U_0805_6.3V6M
1
2
C12
10U_0805_6.3V6M
1
2
C37
10U_0805_6.3V6M
1
2
C25
10U_0805_6.3V6M
1
2
C28
10U_0805_6.3V6M
1
2
C21
10U_0805_6.3V6M
1
2
C48
0.1U_0402_10V6K
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A AH_SWNG0
H_VREF
DDR_THERM#
V_DDR_MCH_REF
M_OCDOCMP1
PM_EXTTS#1
H_RS#0
H_ADSTB#1
H_SWNG1
H_XRCOMP
CFG3
DMI_TXP1
H_REQ#0
CFG7
CFG5
DDR_CKE0_DIMMA
M_CLK_DDR3
DMI_RXN2
H_HIT#
H_DSTBP#0
H_REQ#4
H_SWNG0
CFG15
DDR_CKE1_DIMMA
M_OCDOCMP0
DMI_TXN1DMI_TXN0
H_BNR#
H_REQ#2
M_ODT1
DMI_TXP2
H_DSTBP#2
CLK_MCH_3GPLL
CFG13
M_CLK_DDR#0
DMI_RXP2
H_REQ#3
CFG9
H_DINV#2
CLK_MCH_BCLK#
H_REQ#1
H_YSCOMP
MCH_CLKSEL0
DDR_CKE3_DIMMB
H_BPRI#
H_DINV#0
CFG18
CFG4
M_CLK_DDR#1
DMI_RXP1DMI_RXP0
DMI_TXP0
H_CPUSLP#
H_DPWR#
H_ADS#
H_DSTBP#3
H_DSTBN#3
CFG16
DMI_RXN1
M_OCDOCMP0
CLK_MCH_BCLK
PLTRST_R#
CFG19
CFG12
DDR_CS1_DIMMA#
SMRCOMPN
H_DSTBP#1
H_DINV#3
H_RS#2
H_ADSTB#0
CFG17
CFG8
CFG6
DDR_CKE2_DIMMB
DMI_RXN0
H_LOCK#
H_RESET#
M_ODT3
M_OCDOCMP1
M_CLK_DDR#2
DMI_TXP3
DMI_TXN3
H_DBSY#
H_BR0#
H_DSTBN#1H_DSTBN#0
CFG20
V_DDR_MCH_REF
H_DSTBN#2
H_RS#1
H_XSCOMP
CFG10
MCH_CLKSEL2
DDR_CS0_DIMMA#
SMRCOMPP
M_CLK_DDR#3
CFG11
DDR_CS3_DIMMB#
DMI_RXN3
H_HITM#
H_DRDY#
DDR_CS2_DIMMB#
M_ODT2
M_ODT0
H_DEFER#
H_TRDY#
H_DINV#1
H_THERMTRIP#
CFG14
M_CLK_DDR2M_CLK_DDR1M_CLK_DDR0
H_VREF
H_YRCOMP
DMI_TXN2
DMI_RXP3
PM_EXTTS#1
MCH_CLKSEL1
H_D#0H_D#1H_D#2H_D#3H_D#4H_D#5H_D#6H_D#7
H_D#11
H_D#13
H_D#9
H_D#14
H_D#8
H_D#15
H_D#12
H_D#10
H_D#19
H_D#21
H_D#17
H_D#22
H_D#16
H_D#23
H_D#20
H_D#18
H_D#27
H_D#29
H_D#25
H_D#30
H_D#24
H_D#31
H_D#28
H_D#26
H_D#35
H_D#37
H_D#33
H_D#38
H_D#32
H_D#39
H_D#36
H_D#34
H_D#43
H_D#45
H_D#41
H_D#46
H_D#40
H_D#47
H_D#44
H_D#42
H_D#51
H_D#53
H_D#49
H_D#54
H_D#48
H_D#52
H_D#50
H_D#55
H_D#59
H_D#61
H_D#57
H_D#62
H_D#56
H_D#63
H_D#60
H_D#58
H_A#3H_A#4H_A#5H_A#6H_A#7
H_A#11
H_A#8
H_A#10
H_A#12
H_A#9
H_A#13
H_A#15
H_A#17
H_A#14
H_A#21
H_A#18
H_A#20
H_A#22
H_A#19
H_A#26
H_A#23
H_A#25
H_A#27
H_A#24
H_A#31
H_A#28
H_A#30H_A#29
H_A#16
CLK_MCH_REF#CLK_MCH_REF
MCH_SSCDREFCLK#MCH_SSCDREFCLK
GMCH_H32
PWROK
PWROK
CLKREQC#GMCH_H32
PM_BMBUSY#DDR_THERM#
H_SWNG1
CLK_MCH_3GPLL#
H_D#[0..63]<4> H_A#[3..31] <4>
H_REQ#[0..4] <4>
H_ADSTB#1 <4>H_ADSTB#0 <4>
CLK_MCH_BCLK# <15>CLK_MCH_BCLK <15>H_DSTBN#[0..3] <4>
H_DSTBP#[0..3] <4>
H_DINV#0 <4>H_DINV#1 <4>H_DINV#2 <4>H_DINV#3 <4>
H_RESET# <4>H_ADS# <4>H_TRDY# <4>H_DPWR# <4>H_DRDY# <4>H_DEFER# <4>
H_BR0# <4>H_BNR# <4>H_BPRI# <4>H_DBSY# <4>H_CPUSLP# <4>
H_HITM# <4>H_HIT# <4>H_LOCK# <4>
H_RS#[0..2] <4>
DMI_TXN0<20>DMI_TXN1<20>DMI_TXN2<20>DMI_TXN3<20>
DMI_TXP0<20>DMI_TXP1<20>DMI_TXP2<20>DMI_TXP3<20>
DMI_RXN0<20>DMI_RXN1<20>DMI_RXN2<20>DMI_RXN3<20>
DMI_RXP0<20>DMI_RXP1<20>DMI_RXP2<20>DMI_RXP3<20>
M_CLK_DDR0<13>M_CLK_DDR1<13>M_CLK_DDR2<14>M_CLK_DDR3<14>
M_CLK_DDR#0<13>M_CLK_DDR#1<13>M_CLK_DDR#2<14>M_CLK_DDR#3<14>
DDR_CS0_DIMMA#<13>DDR_CS1_DIMMA#<13>DDR_CS2_DIMMB#<14>DDR_CS3_DIMMB#<14>
DDR_CKE0_DIMMA<13>DDR_CKE1_DIMMA<13>DDR_CKE2_DIMMB<14>DDR_CKE3_DIMMB<14>
M_ODT0<13>M_ODT1<13>M_ODT2<14>M_ODT3<14>
PM_BMBUSY#<20>
H_THERMTRIP#<4,19>
PLT_RST#<18,20,22,24,25,30,31>
MCH_ICH_SYNC#<18>
V_DDR_MCH_REF<13,14>
MCH_CLKSEL0 <15>
CFG5 <11>
CFG7 <11>
CFG9 <11>
CFG11 <11>CFG12 <11>CFG13 <11>
MCH_CLKSEL2 <15>MCH_CLKSEL1 <15>
CFG16 <11>
CFG18 <11>CFG19 <11>CFG20 <11>
CLK_MCH_3GPLL <15>
VGATE_INTEL<20,40>PM_POK<20,30>
DPRSLPVR<20,40>
CLKREQC# <15>
CLK_MCH_REF# <15>CLK_MCH_REF <15>
MCH_SSCDREFCLK# <15>MCH_SSCDREFCLK <15>
DDR_THERM#<13,14>
CLK_MCH_3GPLL# <15>
+VCCP
+VCCP+VCCP
+VCCP
+3VS
+1.8V
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (1/6)
7 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Layout Note:H_XRCOMP / H_YRCOMP / H_VREF / H_SWNG0 /H_SWNG1 trace width and spacing is 18/20.
Layout Note:Route as shortas possible
Description at page11.
Stuff R42 & R43 for A1 Calistoga
Layout Note: V_DDR_MCH_REFtrace width andspacing is 20/20.
H_XSCOMP/H_YSCOMP tracewidth and spacing is 5/20.
T5PAD
R33 0_0402_5%1 2
R32
54.9
_040
2_1%
12
R48
100_
0402
_1%
12
R39
10K_0402_5%
12
R42
40.2
_040
2_1%
@
12
C54
0.1U
_040
2_16
V4Z
1
2
R51
200_
0402
_1%
12
R41
100_0402_1%
12
R34 100_0402_1%
12
DM
ID
DR
MU
CFG
PM
CLK
NC
RES
ERVE
D
U3B
CALISTOGA_FCBGA1466~D
DMIRXN0AE35DMIRXN1AF39DMIRXN2AG35DMIRXN3AH39
DMIRXP0AC35DMIRXP1AE39DMIRXP2AF35DMIRXP3AG39
DMITXN0AE37DMITXN1AF41DMITXN2AG37DMITXN3AH41
DMITXP0AC37DMITXP1AE41DMITXP2AF37DMITXP3AG41
SM_CK0AY35SM_CK1AR1SM_CK2AW7SM_CK3AW40
SM_CK0#AW35SM_CK1#AT1SM_CK2#AY7SM_CK3#AY40
SM_OCDCOMP0AL20SM_OCDCOMP1AF10
SM_ODT0BA13SM_ODT1BA12SM_ODT2AY20SM_ODT3AU21
SM_RCOMPNAV9SM_RCOMPPAT9
SM_VREF0AK1SM_VREF1AK41
SM_CKE0AU20SM_CKE1AT20SM_CKE2BA29SM_CKE3AY29
SM_CS0#AW13SM_CS1#AW12SM_CS2#AY21SM_CS3#AW21
CFG16 G18
CFG1 K18CFG2 J18CFG3 F18CFG4 E15CFG5 F15CFG6 E18CFG7 D19CFG8 D16CFG9 G16
CFG10 E16CFG11 D15CFG12 G15CFG13 K15CFG14 C15CFG15 H16
CFG0 K16
CFG17 H15CFG18 J25CFG19 K27CFG20 J26
G_CLKP AG33G_CLKN AF33
D_REF_CLKN A27D_REF_CLKP A26
D_REF_SSCLKN C40D_REF_SSCLKP D41
NC0 A3NC1 A39NC2 A4NC3 A40NC4 AW1NC5 AW41NC6 AY1NC7 BA1NC8 BA2NC9 BA3
NC10 BA39NC11 BA40NC12 BA41NC13 C1NC14 AY41NC15 B2NC16 B41NC17 C41NC18 D1
PM_BMBUSY#G28PM_EXTTS0#F25PM_EXTTS1#H26PM_THERMTRIP#G6PWROKAH33RSTIN#AH34
RESERVED1 T32RESERVED2 R32RESERVED3 F3RESERVED4 F7RESERVED5 AG11RESERVED6 AF11RESERVED7 H7RESERVED8 J19RESERVED9 A41
RESERVED10 A34RESERVED11 D28RESERVED12 D27RESERVED13 A35
ICH_SYNC#K28
CLK_REQ# H32
C55
0.1U
_040
2_16
V4Z
1
2
R31
54.9
_040
2_1%
12
R40
10K_0402_5%@ 12
R37
24.9
_040
2_1%
12
T4PAD
T3PAD
R49
100_
0402
_1%
12
R50
100_
0402
_1%
12
R36 0_0402_5%1 2
R46
221_
0603
_1%
12
C57
0.1U
_040
2_16
V4Z
1
2
R45
100_0402_1%
12
T7PAD
C56
0.1U
_040
2_16
V4Z
1
2
R43
40.2
_040
2_1%
@
12
T1PAD
R29 80.6_0402_1%
1 2
R30 80.6_0402_1%
1 2
R38
24.9
_040
2_1%
12
T2PAD
R35 0_0402_5%@1 2
R47
221_
0603
_1%
12
T8PAD
R44
0_0402_5%1 2
HOST
U3A
CALISTOGA_FCBGA1466~D
HD0#F1HD1#J1HD2#H1HD3#J6HD4#H3HD5#K2HD6#G1HD7#G2HD8#K9HD9#K1HD10#K7HD11#J8HD12#H4HD13#J3HD14#K11HD15#G4HD16#T10HD17#W11HD18#T3HD19#U7HD20#U9HD21#U11HD22#T11HD23#W9HD24#T1HD25#T8HD26#T4HD27#W7HD28#U5HD29#T9HD30#W6HD31#T5HD32#AB7HD33#AA9HD34#W4HD35#W3HD36#Y3HD37#Y7HD38#W5HD39#Y10HD40#AB8HD41#W2HD42#AA4HD43#AA7HD44#AA2HD45#AA6HD46#AA10HD47#Y8HD48#AA1HD49#AB4HD50#AC9HD51#AB11HD52#AC11HD53#AB3HD54#AC2HD55#AD1HD56#AD9HD57#AC1HD58#AD7HD59#AC6HD60#AB5HD61#AD10HD62#AD4HD63#AC8
HVREF1K13HXRCOMPE1HXSCOMPE2HYRCOMPY1HYSCOMPU1HXSWINGE4HYSWINGW1
HA3# H9HA4# C9HA5# E11HA6# G11HA7# F11HA8# G12HA9# F9
HA10# H11HA11# J12HA12# G14HA13# D9HA14# J14HA15# H13HA16# J15HA17# F14HA18# D12HA19# A11HA20# C11HA21# A12HA22# A13HA23# E13HA24# G13HA25# F12HA26# B12HA27# B14HA28# C12HA29# A14HA30# C14HA31# D14
HREQ#0 D8HREQ#1 G8HREQ#2 B8HREQ#3 F8HREQ#4 A8
HADSTB#0 B9HADSTB#1 C13
HRS0# B4HRS1# E6HRS2# D6
HCLKN AG1HCLKP AG2
HDINV#0 J7HDINV#1 W8HDINV#2 U3HDINV#3 AB10
HDSTBN#0 K4HDSTBN#1 T7HDSTBN#2 Y5HDSTBN#3 AC4HDSTBP#0 K3HDSTBP#1 T6HDSTBP#2 AA5HDSTBP#3 AC5
HCPURST# B7HADS# E8
HTRDY# E7HDPWR# J9HDRDY# H8
HDEFER# C3HHITM# D4
HHIT# D3HLOCK# B3
HBREQ0# C7HBNR# C6HBPRI# F6
HDBSY# A7HCPUSLP# E3
HVREF0J13
T6PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_D11
DDR_B_D57
DDR_B_D46
DDR_B_D7
DDR_B_D0
DDR_B_D44
DDR_B_D40
DDR_B_D30
DDR_B_D27
DDR_B_D15
DDR_B_D3
DDR_B_D35
DDR_B_D25
DDR_B_D23
DDR_B_D49
DDR_B_D37
DDR_B_D19
DDR_B_D48DDR_B_D47
DDR_B_D36
DDR_B_D18
DDR_B_D8
DDR_B_D62
DDR_B_D60
DDR_B_D9
DDR_B_D2
DDR_B_D52
DDR_B_D50
DDR_B_D22
DDR_B_D56
DDR_B_D51
DDR_B_D39
DDR_B_D28
DDR_B_D17
DDR_B_D45
DDR_B_D6
DDR_B_D61
DDR_B_D58
DDR_B_D1
DDR_B_D54
DDR_B_D41
DDR_B_D31
DDR_B_D12
DDR_B_D5
DDR_B_D38
DDR_B_D32
DDR_B_D20
DDR_B_D16
DDR_B_D14
DDR_B_D33
DDR_B_D63
DDR_B_D59
DDR_B_D42
DDR_B_D55
DDR_B_D53
DDR_B_D43
DDR_B_D29
DDR_B_D26
DDR_B_D13
DDR_B_D4
DDR_B_BS#2
DDR_B_D34
DDR_B_D24
DDR_B_D21
DDR_B_D10
DDR_B_WE#DDR_B_RAS#
DDR_A_D35
DDR_A_D15DDR_A_D14
DDR_A_D21
DDR_A_BS#2
DDR_A_D28
DDR_A_D11
DDR_A_D7
DDR_A_WE#
DDR_A_D31
DDR_A_D16
DDR_A_D59
DDR_A_D56
DDR_A_D42
DDR_A_D25
DDR_A_D9
DDR_A_D60
DDR_A_D55
DDR_A_D13
DDR_A_D0
DDR_A_D62
DDR_A_D3
DDR_A_D1
DDR_A_D41
DDR_A_D20
DDR_A_D43
DDR_A_D24
DDR_A_CAS#
DDR_A_D54
DDR_A_D52
DDR_A_D33
DDR_A_D12
DDR_A_D19
DDR_A_D46
DDR_A_D23
DDR_A_D18
DDR_A_D63
DDR_A_D34
DDR_A_D26
DDR_A_D22
SA_RCVENIN#SA_RCVENOUT#
SB_RCVENIN#SB_RCVENOUT#
DDR_A_D27
DDR_A_D2
DDR_A_D32
DDR_A_D6
DDR_A_D49
DDR_A_D47
DDR_A_D58
DDR_A_D40
DDR_A_D36
DDR_A_D5
DDR_A_D48
DDR_A_D10
DDR_A_D8
DDR_A_D57
DDR_A_D39
DDR_A_D37
DDR_A_D30
DDR_A_D4
DDR_A_D45
DDR_A_D53
DDR_A_D51
DDR_A_D17
DDR_A_D38
DDR_A_D29
DDR_A_D44
DDR_A_D50
DDR_A_D61
DDR_A_DQS6DDR_B_DQS7
DDR_B_MA9
DDR_A_MA13
DDR_A_MA7
DDR_A_DM1
DDR_A_MA5
DDR_A_DM7
DDR_B_MA0
DDR_A_DQS7
DDR_A_DM5
DDR_B_MA7
DDR_B_DQS#1
DDR_B_DQS0
DDR_B_DM3
DDR_B_DQS1
DDR_B_DM1
DDR_A_BS#0
DDR_A_DQS#6
DDR_B_DQS5
DDR_B_DM0
DDR_A_MA4
DDR_A_MA8
DDR_A_DQS#7
DDR_A_MA10
DDR_A_DQS5
DDR_A_DM2
DDR_A_DQS0
DDR_B_MA2
DDR_B_MA13
DDR_B_DM5
DDR_B_DQS#5
DDR_B_DQS#7
DDR_B_BS#1
DDR_A_DQS#1
DDR_A_MA2
DDR_B_MA4
DDR_A_DQS#5
DDR_B_DM6
DDR_B_DQS4
DDR_A_DQS1
DDR_A_MA9
DDR_A_DQS4
DDR_A_DM0
DDR_A_MA0
DDR_B_MA5
DDR_A_DM4
DDR_A_DQS#2
DDR_A_DQS3
DDR_B_MA3
DDR_A_MA11 DDR_B_MA11
DDR_B_BS#0
DDR_A_DM6
DDR_B_MA6DDR_A_MA6
DDR_B_DQS#4
DDR_B_DQS3
DDR_B_DQS#3
DDR_A_DQS#0
DDR_A_DM3
DDR_A_MA3
DDR_A_MA12
DDR_B_MA8
DDR_A_DQS2
DDR_B_DQS#0
DDR_B_MA10
DDR_B_DM7
DDR_A_MA1
DDR_B_MA12
DDR_B_DQS#2
DDR_B_DM4
DDR_B_DQS#6
DDR_B_MA1
DDR_B_DQS2
DDR_B_DQS6
DDR_B_DM2
DDR_A_DQS#3DDR_A_DQS#4
DDR_A_RAS#DDR_B_CAS#
DDR_A_BS#1DDR_A_BS#0<13>DDR_A_BS#1<13>DDR_A_BS#2<13>
DDR_A_DM[0..7]<13>
DDR_A_DQS[0..7]<13>
DDR_A_DQS#[0..7]<13>
DDR_A_MA[0..13]<13>
DDR_A_CAS#<13>DDR_A_RAS#<13>DDR_A_WE#<13>
DDR_B_BS#0<14>DDR_B_BS#1<14>DDR_B_BS#2<14>
DDR_B_DM[0..7]<14>
DDR_B_DQS[0..7]<14>
DDR_B_DQS#[0..7]<14>
DDR_B_MA[0..13]<14>
DDR_B_CAS#<14>DDR_B_RAS#<14>DDR_B_WE#<14>
DDR_A_D[0..63] <13> DDR_B_D[0..63] <14>
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (2/6)
8 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
DDR SYS MEMORY A
U3D
CALISTOGA_FCBGA1466~D
SA_DQ0 AJ35SA_DQ1 AJ34SA_DQ2 AM31SA_DQ3 AM33SA_DQ4 AJ36SA_DQ5 AK35SA_DQ6 AJ32SA_DQ7 AH31SA_DQ8 AN35SA_DQ9 AP33
SA_DQ10 AR31SA_DQ11 AP31SA_DQ12 AN38SA_DQ13 AM36SA_DQ14 AM34SA_DQ15 AN33SA_DQ16 AK26SA_DQ17 AL27SA_DQ18 AM26SA_DQ19 AN24SA_DQ20 AK28SA_DQ21 AL28SA_DQ22 AM24SA_DQ23 AP26SA_DQ24 AP23SA_DQ25 AL22SA_DQ26 AP21SA_DQ27 AN20SA_DQ28 AL23SA_DQ29 AP24SA_DQ30 AP20SA_DQ31 AT21SA_DQ32 AR12SA_DQ33 AR14SA_DQ34 AP13SA_DQ35 AP12SA_DQ36 AT13SA_DQ37 AT12SA_DQ38 AL14SA_DQ39 AL12SA_DQ40 AK9SA_DQ41 AN7SA_DQ42 AK8SA_DQ43 AK7SA_DQ44 AP9SA_DQ45 AN9SA_DQ46 AT5SA_DQ47 AL5SA_DQ48 AY2SA_DQ49 AW2SA_DQ50 AP1SA_DQ51 AN2SA_DQ52 AV2SA_DQ53 AT3SA_DQ54 AN1SA_DQ55 AL2SA_DQ56 AG7SA_DQ57 AF9SA_DQ58 AG4SA_DQ59 AF6SA_DQ60 AG9SA_DQ61 AH6SA_DQ62 AF4SA_DQ63 AF8
SA_BS0AU12SA_BS1AV14SA_BS2BA20
SA_CAS#AY13SA_RAS#AW14SA_WE#AY14SA_RCVENIN#AK23SA_RCVENOUT#AK24
SA_DM0AJ33SA_DM1AM35SA_DM2AL26SA_DM3AN22SA_DM4AM14SA_DM5AL9SA_DM6AR3SA_DM7AH4
SA_DQS0AK33SA_DQS1AT33SA_DQS2AN28SA_DQS3AM22SA_DQS4AN12SA_DQS5AN8SA_DQS6AP3SA_DQS7AG5
SA_DQS0#AK32SA_DQS1#AU33SA_DQS2#AN27SA_DQS3#AM21SA_DQS4#AM12SA_DQS5#AL8SA_DQS6#AN3SA_DQS7#AH5
SA_MA0AY16SA_MA1AU14SA_MA2AW16SA_MA3BA16SA_MA4BA17SA_MA5AU16SA_MA6AV17SA_MA7AU17SA_MA8AW17SA_MA9AT16SA_MA10AU13SA_MA11AT17SA_MA12AV20SA_MA13AV12
T10 PADT12 PADT11 PAD
T9 PAD
DDR SYS MEMORY B
U3E
CALISTOGA_FCBGA1466~D
SB_DQ0 AK39SB_DQ1 AJ37SB_DQ2 AP39SB_DQ3 AR41SB_DQ4 AJ38SB_DQ5 AK38SB_DQ6 AN41SB_DQ7 AP41SB_DQ8 AT40SB_DQ9 AV41
SB_DQ10 AU38SB_DQ11 AV38SB_DQ12 AP38SB_DQ13 AR40SB_DQ14 AW38SB_DQ15 AY38SB_DQ16 BA38SB_DQ17 AV36SB_DQ18 AR36SB_DQ19 AP36SB_DQ20 BA36SB_DQ21 AU36SB_DQ22 AP35SB_DQ23 AP34SB_DQ24 AY33SB_DQ25 BA33SB_DQ26 AT31SB_DQ27 AU29SB_DQ28 AU31SB_DQ29 AW31SB_DQ30 AV29SB_DQ31 AW29SB_DQ32 AM19SB_DQ33 AL19SB_DQ34 AP14SB_DQ35 AN14SB_DQ36 AN17SB_DQ37 AM16SB_DQ38 AP15SB_DQ39 AL15SB_DQ40 AJ11SB_DQ41 AH10SB_DQ42 AJ9SB_DQ43 AN10SB_DQ44 AK13SB_DQ45 AH11SB_DQ46 AK10SB_DQ47 AJ8SB_DQ48 BA10SB_DQ49 AW10SB_DQ50 BA4SB_DQ51 AW4SB_DQ52 AY10SB_DQ53 AY9SB_DQ54 AW5SB_DQ55 AY5SB_DQ56 AV4SB_DQ57 AR5SB_DQ58 AK4SB_DQ59 AK3SB_DQ60 AT4SB_DQ61 AK5SB_DQ62 AJ5SB_DQ63 AJ3
SB_BS0AT24SB_BS1AV23SB_BS2AY28
SB_CAS#AR24SB_RAS#AU23SB_WE#AR27SB_RCVENIN#AK16SB_RCVENOUT#AK18
SB_DM0AK36SB_DM1AR38SB_DM2AT36SB_DM3BA31SB_DM4AL17SB_DM5AH8SB_DM6BA5SB_DM7AN4
SB_DQS0AM39SB_DQS1AT39SB_DQS2AU35SB_DQS3AR29SB_DQS4AR16SB_DQS5AR10SB_DQS6AR7SB_DQS7AN5
SB_DQS0#AM40SB_DQS1#AU39SB_DQS2#AT35SB_DQS3#AP29SB_DQS4#AP16SB_DQS5#AT10SB_DQS6#AT7SB_DQS7#AP5
SB_MA0AY23SB_MA1AW24SB_MA2AY24SB_MA3AR28SB_MA4AT27SB_MA5AT28SB_MA6AU27SB_MA7AV28SB_MA8AV27SB_MA9AW27SB_MA10AV24SB_MA11BA27SB_MA12AY27SB_MA13AR23
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PEGCOMP
VSYNCHSYNC
CRT_IREF
LIBGENAVDD
LCD_CLKLCD_DAT
BKLT_CTLENABLT
LCD_CLKLCD_DAT
VSYNCHSYNC
LVDSB1+
LVDSB1-
LVDSBC+LVDSBC-
LVDSA0+
LVDSA0-
LVDSAC-LVDSAC+
LVDSA2-
LVDSA2+
LVDSB2+
LVDSB2-
LVDSA1-
LVDSA1+
LVDSB0+
LVDSB0-
ENABLT
COMPSLUMA
CRMA
CRT_SMBCLK<16>CRT_SMBDAT<16>
VSYNC<16>HSYNC<16>
LCD_CLK<17>LCD_DAT<17>
BKLT_CTL<17>ENABLT<17,30>
ENAVDD<17>
LVDSB1+<17>
LVDSB1-<17>
LVDSBC-<17>LVDSBC+<17>
LVDSA0+<17>
LVDSA0-<17>
LVDSAC+<17>LVDSAC-<17>
LVDSA2-<17>
LVDSA2+<17>
LVDSB2-<17>
LVDSB2+<17>
LVDSA1-<17>
LVDSA1+<17>
LVDSB0-<17>
LVDSB0+<17>
CRT_GRN<16>
CRT_BLU<16>
CRT_RED<16>
+1.5VS_PCIE
+3VS
+3VS
+1.5VS
+1.5VS
+1.5VS+1.5VS+1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (3/6)
9 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
PEGCOMP trace widthand spacing is 18/25 mils.
R54 1.5K_0402_1%12
R53
100K_0402_5%
1 2
D2
PACDN042_SOT23~D@
231
R2212 10K_0402_5%1 2
R2173 0_0402_5%
1 2
R5224.9_0402_1%
1 2
LVDS
TV
CR
T
PCI-EXPRESS GRAPHICS
U3C
CALISTOGA_FCBGA1466~D
SDVOCTRL_CLKH28 SDVOCTRL_DATAH27
LA_DATA0B37LA_DATA1B34LA_DATA2A36
LVREFHC33LVREFLC32
TVDAC_AA16TVDAC_BC18TVDAC_CA19
TV_IREFJ20
TV_IRTNAB16TV_IRTNBB18TV_IRTNCB19
DDCCLKC26DDCDATAC25
LA_DATA#0C37LA_DATA#1B35LA_DATA#2A37
LB_DATA0F30LB_DATA1D29LB_DATA2F28
LB_DATA#0G30LB_DATA#1D30LB_DATA#2F29
LA_CLKA32LA_CLK#A33LB_CLKE26LB_CLK#E27
LBKLT_CTLD32LBKLT_ENJ30LCTLA_CLKH30LCTLB_DATAH29LDDC_CLKG26LDDC_DATAG25LVDD_ENF32LIBGB38LVBGC35
VSYNCH23HSYNCG23BLUEE23BLUE#D23GREENC22GREEN#B22REDA21RED#B21
CRT_IREFJ22
EXP_COMPI D40EXP_COMPO D38
EXP_RXN0 F34EXP_RXN1 G38EXP_RXN2 H34EXP_RXN3 J38EXP_RXN4 L34EXP_RXN5 M38EXP_RXN6 N34EXP_RXN7 P38EXP_RXN8 R34EXP_RXN9 T38
EXP_RXN10 V34EXP_RXN11 W38EXP_RXN12 Y34EXP_RXN13 AA38EXP_RXN14 AB34EXP_RXN15 AC38
EXP_RXP0 D34EXP_RXP1 F38EXP_RXP2 G34EXP_RXP3 H38EXP_RXP4 J34EXP_RXP5 L38EXP_RXP6 M34EXP_RXP7 N38EXP_RXP8 P34EXP_RXP9 R38
EXP_RXP10 T34EXP_RXP11 V38EXP_RXP12 W34EXP_RXP13 Y38EXP_RXP14 AA34EXP_RXP15 AB38
EXP_TXN0 F36EXP_TXN1 G40EXP_TXN2 H36EXP_TXN3 J40EXP_TXN4 L36EXP_TXN5 M40EXP_TXN6 N36EXP_TXN7 P40EXP_TXN8 R36EXP_TXN9 T40
EXP_TXN10 V36EXP_TXN11 W40EXP_TXN12 Y36EXP_TXN13 AA40EXP_TXN14 AB36EXP_TXN15 AC40
EXP_TXP0 D36EXP_TXP1 F40EXP_TXP2 G36EXP_TXP3 H40EXP_TXP4 J36EXP_TXP5 L40EXP_TXP6 M36EXP_TXP7 N40EXP_TXP8 P36EXP_TXP9 R40
EXP_TXP10 T36EXP_TXP11 V40EXP_TXP12 W36EXP_TXP13 Y40EXP_TXP14 AA36EXP_TXP15 AB40
TV_DCONSEL1J29TV_DCONSEL0K30
R2172 0_0402_5%
1 2
R2211 10K_0402_5%1 2
R58255_0402_1%
12
R5510K_0402_5%
12
R570_0603_5%
1 2
R2174 0_0402_5%
1 2
R22510_0402_5%
1 2
R5610K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MCH_D2
MCH_A6
MC
H_A
B1
3GPLL
MCH_CRTDAC
+1.5VS
+1.5VS_PCIE
+1.5VS
+1.5VS+1.5VS_3GPLL
+3VS
+1.5VS_MPLL
+1.5VS
+1.5VS_3GPLL
+1.5VS
+VCCP
+1.5VS_MPLL +1.5VS_HPLL
+1.5VS+1.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+2.5VS
+1.5VS_DPLLB+1.5VS_DPLLA
+1.5VS_HPLL
+1.5VS_DPLLA +1.5VS_DPLLB
+1.5VS+1.5VS
+1.5VS_DPLLA +1.5VS_DPLLB
+VCCP
+2.5VS +3VS
+1.5VS
+2.5VS
+1.5VS+1.5VS
+1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (4/6)
10 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
W=40 mils
45mA Max. 45mA Max.
PCI-E/MEM/PSB PLL decoupling
Place close to Pin G41
12/28
+
C64220U_D2_2VM_R9
1
2
C66
10U_0805_6.3V6M
1
2
R70
10_0402_5%@
12
R68
0_0805_5%12
R65
0_0805_5%12
R2224
0_0402_5%
12
C85
0.1U
_040
2_16
V4Z
1
2
D4CH751H-40_SOD323@
12
C79
10U_0805_6.3V6M
1
2
C93
0.22
U_0
603_
10V
7K 1
2
C87
0.1U
_040
2_16
V4Z
1
2
C63
0.1U_0402_16V
4Z
1
2
L1CHB1608U301_0603
12
R600_0805_5%
12
C74
2200
P_0
402_
50V
7K
1
2
R64
0.5_0805_1%1 2
C91
0.22
U_0
603_
10V
7K
1
2
R2221
0_0402_5%
12
L2CHB1608U301_0603@
12
C90
10U_0805_6.3V6M
1
2
R71
10_0402_5%@
12
C75
0.1U
_040
2_16
V4Z
1
2
+
C67
220U
_D2_
2VM
_R9
1
2
+ C61
330U_D
2E_2.5V
M
@
1
2
C80
0.1U
_040
2_16
V4Z
@
1
2
L3BLM11A601S_0603
1 2
C88
10U_0805_6.3V6M
1
2
R2222
0_0402_5%
12
C590.1U_0402_16V4Z
1 2
C84
0.47
U_0
603_
10V
7K 1
2
C86
10U_0805_6.3V6M
1
2
C76
4.7U
_080
5_10
V4Z
1
2
C92
0.1U
_040
2_16
V4Z
1
2
+
C60
330U_D
2E_2.5V
M
1
2
R2225
0_0402_5%
12
C94
0.47
U_0
603_
10V
7K
1
2
R2223
0_0402_5%
12
C78
0.1U
_040
2_16
V4Z
1
2
C89
0.1U
_040
2_16
V4Z
1
2
C58
0.1U
_040
2_16
V4Z
1
2
R590_1206_5%
1 2
C62
0.1U_0402_16V
4Z
1
2
C65
10U_0805_6.3V6M
1
2
C77
2.2U
_080
5_16
V4Z
1
2
P O W E R
U3H
CALISTOGA_FCBGA1466~D
VCC_SYNC H22
VCCTX_LVDS0 B30VCCTX_LVDS1 C30
VCC3G0 AB41VCC3G1 AJ41VCC3G2 L41VCC3G3 N41VCC3G4 R41VCC3G5 V41VCC3G6 Y41
VCCA_3GBG G41VSSA_3GBG H41
VCCA_3GPLL AC33
VCCTX_LVDS2 A30
VCCA_LVDS A38VSSA_LVDS B39
VCCA_MPLL AF2
VCCA_TVBG H20VSSA_TVBG G20
VCCA_TVDACA0 E19VCCA_TVDACA1 F19VCCA_TVDACB0 C20VCCA_TVDACB1 D20VCCA_TVDACC0 E20VCCA_TVDACC1 F20
VCCAUX1 AF31VCCAUX2 AE31VCCAUX3 AC31VCCAUX4 AL30VCCAUX5 AK30VCCAUX6 AJ30VCCAUX7 AH30VCCAUX8 AG30VCCAUX9 AF30
VCCAUX10 AE30VCCAUX11 AD30VCCAUX12 AC30VCCAUX13 AG29VCCAUX14 AF29VCCAUX15 AE29VCCAUX16 AD29VCCAUX17 AC29VCCAUX18 AG28VCCAUX19 AF28VCCAUX20 AE28
VTT0AC14VTT1AB14VTT2W14VTT3V14VTT4T14VTT5R14VTT6P14VTT7N14VTT8M14VTT9L14VTT10AD13VTT11AC13VTT12AB13VTT13AA13VTT14Y13VTT15W13VTT16V13VTT17U13VTT18T13VTT19R13VTT20N13VTT21M13VTT22L13VTT23AB12VTT24AA12VTT25Y12VTT26W12VTT27V12VTT28U12VTT29T12VTT30R12VTT31P12VTT32N12VTT33M12VTT34L12VTT35R11VTT36P11VTT37N11VTT38M11VTT39R10VTT40P10VTT41N10VTT42M10VTT43P9VTT44N9VTT45M9VTT46R8VTT47P8VTT48N8VTT49M8VTT50P7VTT51N7VTT52M7VTT53R6VTT54P6VTT55M6VTT56A6VTT57R5
VTT59N5VTT60M5VTT61P4VTT62N4VTT63M4VTT64R3VTT65P3VTT66N3VTT67M3VTT68R2VTT69P2VTT70M2VTT71D2VTT72AB1VTT73R1VTT74P1VTT75N1VTT76M1
VCCA_CRTDAC0 E21VCCA_CRTDAC1 F21VSSA_CRTDAC2 G21
VCCA_DPLLA B26VCCA_DPLLB C39
VCCA_HPLL AF1
VCCD_HMPLL0 AH1VCCD_HMPLL1 AH2
VCCD_LVDS0 A28VCCD_LVDS1 B28VCCD_LVDS2 C28
VCCD_TVDAC D21VCCDQ_TVDAC H19
VCCHV0 A23VCCHV1 B23 VCCHV2 B25
VCCAUX21 AH22VCCAUX22 AJ21VCCAUX23 AH21VCCAUX24 AJ20VCCAUX25 AH20VCCAUX26 AH19VCCAUX27 P19VCCAUX28 P16VCCAUX29 AH15VCCAUX30 P15VCCAUX31 AH14
VCCAUX32AG14VCCAUX33AF14VCCAUX34AE14VCCAUX35Y14VCCAUX36AF13VCCAUX37AE13VCCAUX38AF12VCCAUX39AE12VCCAUX40AD12
VCCAUX0 AK31
VTT58P5
D3CH751H-40_SOD323@
12
R67
0_0805_5%12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCCSM_LF1VCCSM_LF2
VCCSM_LF5VCCSM_LF4
CFG18<7>
CFG13<7>
CFG19<7>
CFG16<7>
CFG9<7>
CFG20<7>
CFG11<7>
CFG12<7>
CFG5<7>
CFG7<7>
+VCCP+1.5VS+VCCP
+1.8V+VCCP
+1.8V
+3VS
+1.8V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (5/6)
11 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Place near pin BA15
Place near pin BA23
Place near pin AT41 & AM41
Place near pin AV1 & AJ1
CFG[13:12]
1 = PCIE/SDVO are operatingsimu.
CFG7
CFG19
(Default)
CFG20
0 = DMI x 2
CFG18
CFG[19:18] have internal pull down
*
Strap Pin Table
*
10 = All Z Mode Enabled
0 = Reserved
(Default)
1 = Normal Operation
CFG5
SDVO_CTRLDATA
*
1 = DMI Lane Reversal Enable
(Default)
*
1 = Dynamic ODT Enabled (Default)
*
(Default)
00 = Reserved
1 = 1.5V
**
1 = DMI x 4
CFG[3:17] have internal pull up
0 = No SDVO Device Present
(Default)
*
*
(Default)
(Default)
0 = Normal Operation
(Default)
0 = Only PCIE or SDVO isoperational.
0 = Dynamic ODT Disabled
(PCIE/SDVO select)
01 = XOR Mode Enabled
001 = 533MT/s FSB
CFG16
0 = 1.05V
011 = 667MT/s FSB
0 = Lane Reversal Enable CFG9
1 = SDVO Device Present
CFG[2:0]
1 = Mobile Yonah CPU
11 = Normal Operation
CFG11
0 = Calistoga
1 = Reserved
*(Acc ord ing to In te l Napa Schemat i c Check l i s t & CRB Rev1 .301 document 2 .2Kohm pul l -down res i s torr e q u e s t )
R78 2.2K_0402_5%@1 2C114
10U_0805_6.3V6M
1
2
P O W E R
U3G
CALISTOGA_FCBGA1466~D
VCC0AA33VCC1W33VCC2P33VCC3N33VCC4L33VCC5J33VCC6AA32VCC7Y32VCC8W32VCC9V32VCC10P32VCC11N32VCC12M32VCC13L32VCC14J32VCC15AA31VCC16W31VCC17V31VCC18T31VCC19R31VCC20P31VCC21N31VCC22M31VCC23AA30VCC24Y30VCC25W30VCC26V30VCC27U30VCC28T30VCC29R30VCC30P30VCC31N30VCC32M30VCC33L30VCC34AA29VCC35Y29VCC36W29VCC37V29VCC38U29VCC39R29VCC40P29VCC41M29VCC42L29VCC43AB28VCC44AA28VCC45Y28
VCC_SM5 AY34VCC_SM6 AW34VCC_SM7 AV34VCC_SM8 AU34VCC_SM9 AT34
VCC_SM10 AR34VCC_SM11 BA30VCC_SM12 AY30VCC_SM13 AW30VCC_SM14 AV30VCC_SM15 AU30VCC_SM16 AT30VCC_SM17 AR30VCC_SM18 AP30VCC_SM19 AN30VCC_SM20 AM30VCC_SM21 AM29VCC_SM22 AL29VCC_SM23 AK29VCC_SM24 AJ29VCC_SM25 AH29VCC_SM26 AJ28VCC_SM27 AH28VCC_SM28 AJ27VCC_SM29 AH27VCC_SM30 BA26VCC_SM31 AY26VCC_SM32 AW26VCC_SM33 AV26VCC_SM34 AU26VCC_SM35 AT26VCC_SM36 AR26VCC_SM37 AJ26VCC_SM38 AH26VCC_SM39 AJ25VCC_SM40 AH25VCC_SM41 AJ24VCC_SM42 AH24VCC_SM43 BA23VCC_SM44 AJ23VCC_SM45 BA22VCC_SM46 AY22VCC_SM47 AW22VCC_SM48 AV22VCC_SM49 AU22VCC_SM50 AT22VCC_SM51 AR22VCC_SM52 AP22VCC_SM53 AK22VCC_SM54 AJ22VCC_SM55 AK21VCC_SM56 AK20VCC_SM57 BA19VCC_SM58 AY19VCC_SM59 AW19VCC_SM60 AV19VCC_SM61 AU19VCC_SM62 AT19VCC_SM63 AR19VCC_SM64 AP19VCC_SM65 AK19VCC_SM66 AJ19VCC_SM67 AJ18VCC_SM68 AJ17VCC_SM69 AH17VCC_SM70 AJ16VCC_SM71 AH16VCC_SM72 BA15
VCC_SM3 AU40VCC_SM4 BA34
VCC_SM73 AY15VCC_SM74 AW15VCC_SM75 AV15VCC_SM76 AU15VCC_SM77 AT15VCC_SM78 AR15VCC_SM79 AJ15VCC_SM80 AJ14VCC_SM81 AJ13VCC_SM82 AH13VCC_SM83 AK12VCC_SM84 AJ12VCC_SM85 AH12VCC_SM86 AG12VCC_SM87 AK11VCC_SM88 BA8VCC_SM89 AY8VCC_SM90 AW8VCC_SM91 AV8VCC_SM92 AT8VCC_SM93 AR8VCC_SM94 AP8VCC_SM95 BA6VCC_SM96 AY6VCC_SM97 AW6VCC_SM98 AV6VCC_SM99 AT6
VCC_SM1 AT41VCC_SM0 AU41
VCC_SM2 AM41
VCC46V28VCC47U28VCC48T28VCC49R28VCC50P28VCC51N28VCC52M28VCC53L28VCC54P27VCC55N27VCC56M27VCC57L27VCC58P26VCC59N26VCC60L26VCC61N25VCC62M25VCC63L25VCC64P24VCC65N24VCC66M24VCC67AB23VCC68AA23VCC69Y23VCC70P23VCC71N23VCC72M23VCC73L23VCC74AC22VCC75AB22VCC76Y22VCC77W22VCC78P22VCC79N22VCC80M22VCC81L22VCC82AC21VCC83AA21VCC84W21VCC85N21VCC86M21VCC87L21VCC88AC20VCC89AB20VCC90Y20VCC91W20VCC92P20VCC93N20VCC94M20VCC95L20VCC96AB19VCC97AA19VCC98Y19VCC99N19
C11
60.
47U
_060
3_10
V7K
1
2
C11
80.
47U
_060
3_10
V7K
1
2
C11
10.
47U
_060
3_10
V7K
1
2
+ C112
220U_D2_4VM@
1
2
C97
0.47
U_0
603_
10V7
K
1
2
C99
0.22
U_0
603_
10V7
K
1
2
C10
2
0.1U
_040
2_16
V4Z
1
2 C10
3
0.1U
_040
2_16
V4Z
1
2
C10
10.
22U
_060
3_10
V7K
1
2
+
C10
922
0U_D
2_2V
M_R
9
1
2
R80 1K_0402_5%@1 2
C11
70.
47U
_060
3_10
V7K
1
2
R79 1K_0402_5%@ 1 2
C98
0.47
U_0
603_
10V7
K
1
2
+C115
330U
_D2E
_2.5
VM_R
9
@
1
2
C106
10U_0805_6.3V6M
1
2
C10
4
0.1U
_040
2_16
V4Z
1
2
R77 2.2K_0402_5%@ 1 2
C10
5
0.1U
_040
2_16
V4Z
1
2
R73 2.2K_0402_5%@1 2
C10
00.
22U
_060
3_10
V7K
1
2
C113
10U_0805_6.3V6M
1
2
R75 2.2K_0402_5%@1 2
P O
W E
R
U3F
CALISTOGA_FCBGA1466~D
VCC_NCTF1AC27VCC_NCTF2AB27VCC_NCTF3AA27VCC_NCTF4Y27VCC_NCTF5W27VCC_NCTF6V27VCC_NCTF7U27
VCCAUX_NCTF52 Y15
VCC_NCTF9R27VCC_NCTF10AD26VCC_NCTF11AC26VCC_NCTF12AB26VCC_NCTF13AA26VCC_NCTF14Y26VCC_NCTF15W26VCC_NCTF16V26VCC_NCTF17U26VCC_NCTF18T26VCC_NCTF19R26VCC_NCTF20AD25VCC_NCTF21AC25VCC_NCTF22AB25VCC_NCTF23AA25VCC_NCTF24Y25VCC_NCTF25W25
VCCAUX_NCTF53 W15
VCC_NCTF27U25VCC_NCTF28T25VCC_NCTF29R25VCC_NCTF30AD24VCC_NCTF31AC24VCC_NCTF32AB24VCC_NCTF33AA24VCC_NCTF34Y24VCC_NCTF35W24VCC_NCTF36V24
VCCAUX_NCTF54 V15
VCC_NCTF38T24VCC_NCTF39R24VCC_NCTF40AD23VCC_NCTF41V23VCC_NCTF42U23VCC_NCTF43T23VCC_NCTF44R23VCC_NCTF45AD22VCC_NCTF46V22VCC_NCTF47U22VCC_NCTF48T22VCC_NCTF49R22VCC_NCTF50AD21VCC_NCTF51V21VCC_NCTF52U21VCC_NCTF53T21VCC_NCTF54R21VCC_NCTF55AD20VCC_NCTF56V20VCC_NCTF57U20VCC_NCTF58T20
VCCAUX_NCTF55 U15
VCC_NCTF60AD19VCC_NCTF61V19VCC_NCTF62U19VCC_NCTF63T19VCC_NCTF64AD18VCC_NCTF65AC18VCC_NCTF66AB18VCC_NCTF67AA18VCC_NCTF68Y18VCC_NCTF69W18VCC_NCTF70V18VCC_NCTF71U18VCC_NCTF72T18
VCC_NCTF0AD27 VCCAUX_NCTF0 AG27VCCAUX_NCTF1 AF27VCCAUX_NCTF2 AG26VCCAUX_NCTF3 AF26VCCAUX_NCTF4 AG25VCCAUX_NCTF5 AF25VCCAUX_NCTF6 AG24VCCAUX_NCTF7 AF24VCCAUX_NCTF8 AG23VCCAUX_NCTF9 AF23
VCCAUX_NCTF10 AG22VCCAUX_NCTF11 AF22VCCAUX_NCTF12 AG21VCCAUX_NCTF13 AF21VCCAUX_NCTF14 AG20VCCAUX_NCTF15 AF20VCCAUX_NCTF16 AG19VCCAUX_NCTF17 AF19VCCAUX_NCTF18 R19VCCAUX_NCTF19 AG18VCCAUX_NCTF20 AF18VCCAUX_NCTF21 R18VCCAUX_NCTF22 AG17VCCAUX_NCTF23 AF17VCCAUX_NCTF24 AE17VCCAUX_NCTF25 AD17VCCAUX_NCTF26 AB17VCCAUX_NCTF27 AA17VCCAUX_NCTF28 W17VCCAUX_NCTF29 V17VCCAUX_NCTF30 T17VCCAUX_NCTF31 R17VCCAUX_NCTF32 AG16VCCAUX_NCTF33 AF16VCCAUX_NCTF34 AE16VCCAUX_NCTF35 AD16VCCAUX_NCTF36 AC16VCCAUX_NCTF37 AB16VCCAUX_NCTF38 AA16VCCAUX_NCTF39 Y16VCCAUX_NCTF40 W16VCCAUX_NCTF41 V16VCCAUX_NCTF42 U16VCCAUX_NCTF43 T16VCCAUX_NCTF44 R16VCCAUX_NCTF45 AG15VCCAUX_NCTF46 AF15VCCAUX_NCTF47 AE15VCCAUX_NCTF48 AD15VCCAUX_NCTF49 AC15VCCAUX_NCTF50 AB15
VSS_NCTF0 AE27
VCCAUX_NCTF51 AA15
VSS_NCTF1 AE26
VCC_NCTF59R20
VCCAUX_NCTF56 T15
VSS_NCTF2 AE25VSS_NCTF3 AE24VSS_NCTF4 AE23VSS_NCTF5 AE22VSS_NCTF6 AE21VSS_NCTF7 AE20VSS_NCTF8 AE19VSS_NCTF9 AE18
VSS_NCTF10 AC17VSS_NCTF11 Y17VSS_NCTF12 U17
VCC_NCTF26V25
VCCAUX_NCTF57 R15
VCC_NCTF37U24
VCC_NCTF8T27
VCC100M19VCC101L19VCC102N18VCC103M18VCC104L18VCC105P17VCC106N17VCC107M17VCC108N16VCC109M16VCC110L16
VCC_SM100 AR6VCC_SM101 AP6VCC_SM102 AN6VCC_SM103 AL6VCC_SM104 AK6VCC_SM105 AJ6VCC_SM106 AV1VCC_SM107 AJ1
C107
10U_0805_6.3V6M
1
2
R76 2.2K_0402_5%@1 2
R72 2.2K_0402_5%@1 2
R74 2.2K_0402_5%@1 2
R81 1K_0402_5%@1 2
+C11
0
330U
_D2E
_2.5
VM_R
9
@
1
2
C10
81U
_060
3_10
V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Calistoga (6/6)
12 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
P O W E R
U3I
CALISTOGA_FCBGA1466~D
VSS0AC41VSS1AA41VSS2W41VSS3T41VSS4P41VSS5M41VSS6J41VSS7F41VSS8AV40VSS9AP40VSS10AN40VSS11AK40
VSS13AH40VSS14AG40VSS15AF40VSS16AE40VSS17B40VSS18AY39VSS19AW39
VSS21AR39VSS22AN39
VSS24AC39VSS25AB39VSS26AA39VSS27Y39VSS28W39VSS29V39VSS30T39VSS31R39VSS32P39VSS33N39VSS34M39VSS35L39VSS36J39VSS37H39
VSS20AV39
VSS23AJ39
VSS12AJ40
VSS38G39
VSS40D39VSS41AT38VSS42AM38VSS43AH38VSS44AG38VSS45AF38VSS46AE38VSS47C38VSS48AK37VSS49AH37VSS50AB37VSS51AA37VSS52Y37VSS53W37VSS54V37VSS55T37VSS56R37VSS57P37VSS58N37VSS59M37VSS60L37VSS61J37VSS62H37VSS63G37VSS64F37VSS65D37VSS66AY36VSS67AW36VSS68AN36VSS69AH36VSS70AG36VSS71AF36VSS72AE36VSS73AC36VSS74C36VSS75B36VSS76BA35VSS77AV35VSS78AR35VSS79AH35VSS80AB35VSS81AA35VSS82Y35VSS83W35VSS84V35VSS85T35VSS86R35VSS87P35VSS88N35VSS89M35VSS90L35VSS91J35VSS92H35VSS93G35VSS94F35VSS95D35VSS96AN34VSS97AK34VSS98AG34VSS99AF34
VSS39F39
VSS100 AE34VSS101 AC34VSS102 C34VSS103 AW33VSS104 AV33VSS105 AR33VSS106 AE33VSS107 AB33VSS108 Y33VSS109 V33VSS110 T33VSS111 R33VSS112 M33VSS113 H33VSS114 G33VSS115 F33VSS116 D33VSS117 B33VSS118 AH32VSS119 AG32VSS120 AF32VSS121 AE32VSS122 AC32VSS123 AB32VSS124 G32VSS125 B32VSS126 AY31VSS127 AV31VSS128 AN31VSS129 AJ31VSS130 AG31VSS131 AB31VSS132 Y31VSS133 AB30VSS134 E30VSS135 AT29VSS136 AN29VSS137 AB29VSS138 T29VSS139 N29VSS140 K29VSS141 G29VSS142 E29VSS143 C29VSS144 B29VSS145 A29VSS146 BA28VSS147 AW28VSS148 AU28VSS149 AP28VSS150 AM28VSS151 AD28VSS152 AC28VSS153 W28VSS154 J28VSS155 E28VSS156 AP27VSS157 AM27VSS158 AK27VSS159 J27VSS160 G27VSS161 F27VSS162 C27VSS163 B27VSS164 AN26VSS165 M26VSS166 K26VSS167 F26VSS168 D26VSS169 AK25VSS170 P25VSS171 K25VSS172 H25VSS173 E25VSS174 D25VSS175 A25VSS176 BA24VSS177 AU24VSS178 AL24VSS179 AW23VSS180 AT23VSS181 AN23VSS182 AM23VSS183 AH23VSS184 AC23VSS185 W23VSS186 K23VSS187 J23VSS188 F23VSS189 C23VSS190 AA22VSS191 K22VSS192 G22VSS193 F22VSS194 E22VSS195 D22VSS196 A22VSS197 BA21VSS198 AV21VSS199 AR21
P O W E R
U3J
CALISTOGA_FCBGA1466~D
VSS200AN21VSS201AL21VSS202AB21VSS203Y21VSS204P21VSS205K21VSS206J21VSS207H21VSS208C21VSS209AW20VSS210AR20VSS211AM20VSS212AA20VSS213K20VSS214B20VSS215A20VSS216AN19VSS217AC19VSS218W19VSS219K19VSS220G19VSS221C19VSS222AH18VSS223P18VSS224H18VSS225D18VSS226A18VSS227AY17VSS228AR17VSS229AP17VSS230AM17VSS231AK17VSS232AV16VSS233AN16VSS234AL16VSS235J16VSS236F16VSS237C16VSS238AN15VSS239AM15VSS240AK15VSS241N15VSS242M15VSS243L15VSS244B15VSS245A15VSS246BA14VSS247AT14VSS248AK14VSS249AD14VSS250AA14VSS251U14VSS252K14VSS253H14VSS254E14VSS255AV13VSS256AR13VSS257AN13VSS258AM13VSS259AL13VSS260AG13VSS261P13VSS262F13
VSS266AC12VSS267K12VSS268H12VSS269E12VSS270AD11VSS271AA11VSS272Y11VSS273J11VSS274D11VSS275B11VSS276AV10VSS277AP10VSS278AL10VSS279AJ10
VSS265D13VSS264B13VSS263AY12
VSS285 AW9VSS286 AR9VSS287 AH9VSS288 AB9VSS289 Y9VSS290 R9VSS292 G9VSS291 E9VSS293 A9VSS294 AG8VSS295 AD8VSS296 AA8VSS297 U8VSS298 K8VSS299 C8VSS300 BA7VSS301 AV7VSS302 AP7VSS303 AL7VSS304 AJ7VSS305 AH7VSS306 AF7VSS307 AC7VSS308 R7VSS309 G7VSS310 D7VSS311 AG6VSS312 AD6VSS313 AB6VSS314 Y6
VSS317 K6VSS318 H6VSS319 B6VSS320 AV5VSS321 AF5VSS322 AD5VSS323 AY4VSS324 AR4VSS325 AP4VSS326 AL4VSS327 AJ4VSS328 Y4VSS329 U4VSS330 R4VSS331 J4VSS332 F4VSS333 C4VSS334 AY3VSS335 AW3VSS336 AV3VSS337 AL3
VSS341 AD3
VSS345 AT2VSS346 AR2VSS347 AP2VSS348 AK2
VSS351 AB2VSS352 Y2VSS353 U2VSS354 T2VSS355 N2VSS356 J2VSS357 H2
VSS359 C2VSS360 AL1
VSS358 F2
VSS349 AJ2VSS350 AD2
VSS344 G3VSS343 AA3VSS342 AC3
VSS340 AF3
VSS338 AH3
VSS280 AG10VSS281 AC10VSS282 W10VSS283 U10VSS284 BA9
VSS315 U6VSS316 N6
VSS339 AG3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_A_MA11
V_DDR_MCH_REF
DDR_CKE1_DIMMA
M_CLK_DDR0
M_CLK_DDR1
M_CLK_DDR#0
M_CLK_DDR#1
DDR_CKE1_DIMMA
DDR_CS0_DIMMA#
ICH_SMBCLK
DDR_A_MA1
DDR_A_MA10
DDR_A_MA3
DDR_A_MA9 DDR_A_MA7DDR_A_MA12
DDR_A_MA5
DDR_A_WE#
DDR_A_D8
DDR_A_D3DDR_A_D2
DDR_A_D17DDR_A_D21
DDR_A_D30DDR_A_D27
DDR_A_DQS1
DDR_A_DQS0
DDR_A_DQS2
DDR_A_DM3
DDR_A_DM1
DDR_A_DM2
DDR_A_DM0
DDR_A_DQS4
DDR_A_DQS6
DDR_A_DQS7
ICH_SMBDATA
DDR_CKE0_DIMMA
DDR_A_MA8
DDR_CS1_DIMMA#
DDR_A_MA11
DDR_A_MA2DDR_A_MA0
DDR_A_MA4
DDR_A_MA6
DDR_A_CAS#
DDR_A_BS#1DDR_A_RAS#
DDR_A_D15
DDR_A_D20
DDR_A_D9
DDR_A_D16
DDR_A_D28
DDR_A_D26DDR_A_D31
DDR_A_D37DDR_A_D36
DDR_A_D39
DDR_A_D29
DDR_A_D34
DDR_A_D49DDR_A_D48
DDR_A_D54
DDR_A_DM6
DDR_A_DM4
DDR_A_DM5
DDR_A_DM7
DDR_A_MA13
DDR_A_DQS5
DDR_A_BS#0
DDR_A_BS#2
DDR_A_DQS#0
DDR_A_DQS#1
DDR_A_DQS#2
DDR_A_DQS3DDR_A_DQS#3
DDR_A_DQS#4
DDR_A_DQS#5
DDR_A_DQS#6
DDR_A_DQS#7
DDR_A_MA0
DDR_A_MA4
DDR_A_BS#2
DDR_A_BS#1
DDR_A_MA6
DDR_A_MA9
DDR_CKE0_DIMMA
DDR_A_MA2
DDR_A_MA12
DDR_A_MA5
DDR_A_MA1
DDR_A_CAS#
DDR_A_RAS#
DDR_A_BS#0
DDR_A_MA8
DDR_A_MA3
DDR_A_MA10
DDR_CS0_DIMMA#
M_ODT1DDR_CS1_DIMMA#
M_ODT1
DDR_A_WE#
M_ODT0DDR_A_MA13
DDR_A_MA7
M_ODT0
DDR_A_D59DDR_A_D58
DDR_A_D63DDR_A_D62
DDR_A_D60DDR_A_D57
DDR_A_D56DDR_A_D61
DDR_A_D50DDR_A_D51DDR_A_D55
DDR_A_D52DDR_A_D53
DDR_A_D42DDR_A_D43
DDR_A_D47DDR_A_D46
DDR_A_D41DDR_A_D45
DDR_A_D40DDR_A_D44
DDR_A_D38DDR_A_D33
DDR_A_D35DDR_A_D32
DDR_A_D25DDR_A_D24
DDR_A_D22DDR_A_D19 DDR_A_D23
DDR_A_D18
DDR_A_D13DDR_A_D12
DDR_A_D0DDR_A_D4
DDR_A_D14
DDR_A_D7DDR_A_D1
DDR_A_D5DDR_A_D6
DDR_A_D11DDR_A_D10
DDR_A_DQS#[0..7]<8>
DDR_A_DQS[0..7]<8>
DDR_A_D[0..63]<8>
DDR_A_DM[0..7]<8>
DDR_A_MA[0..13]<8>
DDR_CKE0_DIMMA<7>
DDR_A_BS#2<8>
DDR_A_BS#0<8>DDR_A_WE#<8>
DDR_A_CAS#<8>
M_ODT1<7>
DDR_CS1_DIMMA#<7>
M_CLK_DDR0 <7>M_CLK_DDR#0 <7>
DDR_CKE1_DIMMA <7>
DDR_A_BS#1 <8>DDR_A_RAS# <8>DDR_CS0_DIMMA# <7>
M_CLK_DDR#1 <7>
M_ODT0 <7>
V_DDR_MCH_REF <7,14>
ICH_SMBDATA<4,14,15,20,25>ICH_SMBCLK<4,14,15,20,25>
M_CLK_DDR1 <7>
DDR_THERM# <7,14>
+1.8V
+0.9V
+3VS
+1.8V
+1.8V
+0.9V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
DDRII-SODIMM SLOT1
13 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Layout Note:Place these resistorclosely JP34,alltrace length Max=1.5"
Layout Note:Place near JP34
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
REVERSESO-DIMM A
BOT side
C143
0.1U_0402_16V4Z
1
2
C125
2.2U_0805_16V4Z
1
2
R83
10K_
0402
_5%
12
C121
2.2U_0805_16V4Z
1
2
RP6 56_0404_4P2R_5%1423
C133
0.1U_0402_16V4Z
1
2
RP10 56_0404_4P2R_5%1423
RP11
56_0404_4P2R_5%
1 42 3
C140
0.1U_0402_16V4Z
1
2
C129
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C123
2.2U_0805_16V4Z
1
2
C120
0.1U_0402_16V4Z
1
2
C131
0.1U_0402_16V4Z
1
2
RP12 56_0404_4P2R_5%1423
RP1
56_0404_4P2R_5%
1 42 3
RP3
56_0404_4P2R_5%
1 42 3
C135
0.1U_0402_16V4Z
1
2
R82
10K_
0402
_5%
12
C119
2.2U_0805_16V4Z
1
2
RP7
56_0404_4P2R_5%
1 42 3
C127
0.1U_0402_16V4Z
1
2
C141
0.1U_0402_16V4Z
1
2 C142
0.1U_0402_16V4Z
1
2
RP4 56_0404_4P2R_5%1423
C136
0.1U_0402_16V4Z
1
2
JP4
FOX_ASOA426-M4R-TRCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
RP5
56_0404_4P2R_5%
1 42 3
C128
0.1U_0402_16V4Z
1
2
C134
0.1U_0402_16V4Z
1
2 C137
0.1U_0402_16V4Z
1
2C132
0.1U_0402_16V4Z
1
2C130
0.1U_0402_16V4Z
1
2 C138
0.1U_0402_16V4Z
1
2
C122
2.2U_0805_16V4Z
1
2
RP8 56_0404_4P2R_5%1423
RP2 56_0404_4P2R_5%1423
C126
0.1U_0402_16V4Z
1
2
RP13 56_0404_4P2R_5%1423
C124
2.2U_0805_16V4Z
1
2
RP9
56_0404_4P2R_5%
1 42 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
DDR_B_MA1
DDR_B_BS#0
DDR_B_CAS#
DDR_B_MA0
DDR_B_RAS#
DDR_B_MA3
DDR_B_MA10
DDR_B_BS#2
DDR_CS2_DIMMB#
DDR_B_BS#1
DDR_CKE2_DIMMB
DDR_CKE3_DIMMB
DDR_B_MA4
DDR_B_MA7
DDR_B_MA9
DDR_B_MA2
DDR_B_MA11
DDR_B_MA5
DDR_B_MA12
DDR_B_MA6
DDR_B_MA8
M_ODT3DDR_CS3_DIMMB# M_ODT2
DDR_B_MA13
DDR_B_WE#
DDR_B_DQS#4
DDR_B_D14
DDR_B_DQS4
DDR_B_BS#2
DDR_B_D57
DDR_B_MA2
DDR_CKE2_DIMMB
DDR_B_D8
DDR_B_D1
DDR_B_DM3
ICH_SMBDATA
DDR_B_D52
DDR_B_D45
DDR_B_MA3
DDR_B_D37
DDR_B_D59
DDR_B_D40
DDR_B_D6
DDR_B_MA7
DDR_B_D13
DDR_B_D5
DDR_B_D61
DDR_B_DQS#0
DDR_CS3_DIMMB#
M_ODT3
DDR_B_MA11
DDR_B_D46
DDR_B_WE#
DDR_B_D2
DDR_B_D11
DDR_B_MA10
DDR_B_D55
DDR_B_D35
DDR_B_D41
DDR_B_DQS5
M_ODT2
DDR_B_DQS2
DDR_B_DQS#7
DDR_B_MA6
DDR_B_D9
DDR_B_D44
DDR_B_D63
DDR_B_DM7
DDR_B_BS#0
DDR_B_MA5
DDR_B_D56
DDR_B_D4
DDR_B_DQS#3
DDR_B_D10
DDR_B_D12
DDR_B_D22
DDR_B_D48
DDR_B_D36
DDR_B_DQS7
DDR_B_D42
DDR_B_D33
DDR_CKE3_DIMMB
DDR_B_DQS0
DDR_B_D43
DDR_B_MA1
DDR_B_MA8
DDR_B_DQS#2
DDR_B_DQS#5
DDR_B_MA12
DDR_B_DQS3
DDR_B_RAS#
DDR_B_MA4
DDR_B_DM5
DDR_B_D34
ICH_SMBCLK
DDR_B_D47
DDR_B_D7
DDR_B_MA13
DDR_B_D32
DDR_B_DQS1
DDR_B_BS#1
DDR_B_D62
DDR_B_DQS#6
DDR_B_D54
DDR_B_DM4
DDR_B_DQS6
DDR_B_DQS#1
DDR_B_D49
DDR_B_MA9
DDR_B_MA0
DDR_B_D3
DDR_B_D15
DDR_B_CAS#
DDR_B_D23
DDR_CS2_DIMMB#
DDR_B_DM0
DDR_B_DM1
DDR_B_D0
V_DDR_MCH_REF
DDR_B_DM6
DDR_B_D60
DDR_B_D58
DDR_B_D53
DDR_B_DM2
DDR_B_D50DDR_B_D51
DDR_B_D39DDR_B_D38
DDR_B_D31DDR_B_D30
DDR_B_D27DDR_B_D29
DDR_B_D25DDR_B_D24
DDR_B_D28DDR_B_D26
DDR_B_D19DDR_B_D18
DDR_B_D20DDR_B_D16DDR_B_D21DDR_B_D17
M_CLK_DDR2M_CLK_DDR#2
M_CLK_DDR3M_CLK_DDR#3
DDR_B_DQS#[0..7]<8>
DDR_B_DQS[0..7]<8>
DDR_B_D[0..63]<8>
DDR_B_MA[0..13]<8>
DDR_B_DM[0..7]<8>
DDR_CKE3_DIMMB <7>
DDR_CS2_DIMMB# <7>
V_DDR_MCH_REF <7,13>
ICH_SMBCLK<4,13,15,20,25>ICH_SMBDATA<4,13,15,20,25>
DDR_B_WE#<8>
DDR_B_BS#1 <8>DDR_B_RAS# <8>
DDR_B_CAS#<8>
M_ODT3<7>
DDR_CKE2_DIMMB<7>
DDR_CS3_DIMMB#<7>
DDR_B_BS#2<8>
DDR_B_BS#0<8>
M_ODT2 <7>
M_CLK_DDR2 <7>M_CLK_DDR#2 <7>
M_CLK_DDR3 <7>M_CLK_DDR#3 <7>
DDR_THERM# <7,13>
+0.9V
+1.8V
+3VS+3VS
+1.8V
+1.8V
+0.9V
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
DDRII-SODIMM SLOT2
14 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
SO-DIMM BSTANDARD
Bottom side
Layout Note:Place near JP34
Layout Note:Place one cap close to every 2 pullup resistors terminated to +0.9V
Layout Note:Place these resistorclosely JP10,alltrace length Max=1.5"
RP20
56_0404_4P2R_5%
1 42 3
C166
0.1U_0402_16V4Z
1
2
C152
0.1U_0402_16V4Z
1
2
C161
0.1U_0402_16V4Z
1
2
R84
10K_0402_5%
1 2
JP5
FOX_ASOA426-M2RN-7F CONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SA0 198SA1 200
GND203 GND 204
C145
0.1U_0402_16V4Z
1
2
C167
0.1U_0402_16V4Z
1
2
RP18
56_0404_4P2R_5%
1 42 3
C168
0.1U_0402_16V4Z
1
2
C146
2.2U_0805_16V4Z
1
2
RP24
56_0404_4P2R_5%
1 42 3
RP26
56_0404_4P2R_5%
1423
C144
2.2U_0805_16V4Z
1
2
RP22
56_0404_4P2R_5%
1 42 3
C156
0.1U_0402_16V4Z
1
2
RP16
56_0404_4P2R_5%
1 42 3
C150
2.2U_0805_16V4Z
1
2
RP25 56_0404_4P2R_5%1423
RP15 56_0404_4P2R_5%1423
C163
0.1U_0402_16V4Z
1
2
RP21 56_0404_4P2R_5%1423
C165
0.1U_0402_16V4Z
1
2C160
0.1U_0402_16V4Z
1
2C157
0.1U_0402_16V4Z
1
2
C153
0.1U_0402_16V4Z
1
2
RP17 56_0404_4P2R_5%1423
C155
0.1U_0402_16V4Z
1
2 C162
0.1U_0402_16V4Z
1
2
C147
2.2U_0805_16V4Z
1
2
C158
0.1U_0402_16V4Z
1
2
R85
10K_0402_5%
12
C148
2.2U_0805_16V4Z
1
2
C154
0.1U_0402_16V4Z
1
2
RP23 56_0404_4P2R_5%1423
C151
0.1U_0402_16V4Z
1
2
RP14
56_0404_4P2R_5%
1 42 3
C159
0.1U_0402_16V4Z
1
2
RP19 56_0404_4P2R_5%1423
C149
2.2U_0805_16V4Z
1
2
C164
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
H_STP_CPU#
CLK_PCI_ICH PCI_ICH
H_STP_PCI#
CLKREF1
CLK_XTAL_IN
CLK_XTAL_OUT
FSB
FSA
PCIE_SATA
PCIE_SATA# CLK_PCIE_SATA#
CLK_PCIE_SATA
PCI_ICH
CLK_ENABLE#
CLK_ENABLE#
PCI_MINI
CLK_14M_ICH
PCI_EC
CK_VDD_48
CK_VDD_REF
CLK_14M_KBC
CLKREF1
CK_VDD_48
CK_VDD_REF
CLKIREF
MCH_3GPLL
MCH_3GPLL#
CLK_MCH_3GPLL
CLK_MCH_3GPLL#
ICH_SMBDATA
ICH_SMBCLK
FSB
CLK_PCIE_ICH#
CLK_PCIE_ICH
CPU_XDP
CPU_XDP#
CLKIREF
PCIE_ICH
PCIE_ICH#
CLK_48M_ICH
CLK_DEBUG_PORT PCI_MINI
FSA
PCI_EC
MCH_REF#
MCH_REF
CLK_MCH_REF#
CLK_MCH_REF
MCH_SSCDREFCLK#
MCH_SSCDREFCLKSSCDREFCLK
SSCDREFCLK#
CLK_48M_ICH
CLK_14M_ICH
CLK_PCI_ICH
CLK_14M_KBC
CLK_PCI_EC
CLKREF0
PCI_CBSCLK_33M_CBS
PCI_LPCCLK_33M_LPC
CLKREQC#
CLK_CPU_XDP#
CLK_CPU_XDP
CLK_DEBUG_PORT
CLK_33M_LPC
CLK_33M_CBS
PCI_CLK3
CLK_MCH_BCLK#
CLK_MCH_BCLK
MCH_BCLK#
MCH_BCLK
CPU_BCLK#
CLK_CPU_BCLK
CLK_CPU_BCLK#
CPU_BCLK
CLK_PCIE_MCARD
CLK_PCIE_MCARD#PCIE_MCARD#
PCIE_MCARD
CLKREQD#
CLKREQD#
CLKREQC#
CPU_BSEL2<5>MCH_CLKSEL2 <7>
CPU_BSEL1<5>
MCH_CLKSEL1 <7>
CPU_BSEL0<5>
MCH_CLKSEL0 <7> CLK_48M_ICH<20>
H_STP_PCI#<20>H_STP_CPU#<20>
CLK_PCI_ICH<18>
ICH_SMBDATA<4,13,14,20,25>
ICH_SMBCLK<4,13,14,20,25> CLK_PCIE_ICH <20>
CLK_PCIE_ICH# <20>
CLK_DEBUG_PORT<25>
CLK_PCI_EC<30>
CLK_14M_KBC<30>
CLK_14M_ICH<20>
CLK_ENABLE#<40>
CLK_PCIE_SATA <19>
CLK_PCIE_SATA# <19>
CLK_MCH_3GPLL <7>
CLK_MCH_3GPLL# <7>
CLKREQC# <7>CLK_MCH_REF#<7>
CLK_MCH_REF<7>
MCH_SSCDREFCLK <7>
MCH_SSCDREFCLK# <7>
CLK_33M_CBS<24>
CLK_33M_LPC<31>
CLK_CPU_XDP# <4>
CLK_CPU_XDP <4>
CLK_MCH_BCLK <7>
CLK_MCH_BCLK# <7>
CLK_CPU_BCLK# <4>
CLK_CPU_BCLK <4>
CLK_PCIE_MCARD <25>
CLK_PCIE_MCARD# <25>
CLKREQD# <25>
+3VS
+3VS
+CK_VDD_DP
+CK_VDD_DP
+3VS
+CK_VDD_DP
+3VS
+CK_VDD_MAIN2
+CK_VDD_MAIN1
+3VS
+VCCP
+VCCP
+VCCP
+3VS
+3VS +3VS
+CK_VDD_MAIN1
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Clock generator
15 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Place crystal within500 mils of CK410
Routing the trace at least 10mil
LCD(Low)/SRC(High) clock select
High:Pin18/19 = 100MHzLow:Pin18/19 = 96MHz Low:Pin44/45 = CPUCLK2_ITP
High:Pin44/45 = CLKREQ
Pin44/45 function select
CLK_Ra
CLK_Rb
CLK_Rc
CLK_Rd
CLK_Re
CLK_Rf
NOXDP@ : means just build when XDP function disable.
XDP@ : means just build when XDP function enable.When this time, docking PCI express will not work.
CLK_Rc
Stuff
CLK_Rf
CLK_Ra
CLK_Re
CLK_Re
Stuff
CLK_Ra
FSB Frequency Selet:
No Stuff
CLK_Rb
No Stuff
533MHzCLK_Rf
CLK_Rc
CLK_Re
CLK_Rd
CLK_Ra
CLK_Rd
CLK_RcCPU Driven
No Stuff
CLK_Rb
Stuff
CLK_Rd
CLK_Rb
667MHz
*(Default)
1
1000
CLKSEL1
100
0
PCIMHz
133
0
Table : ICS954306
SRCMHz
33.3
CPUMHzCLKSEL2
33.31
FSLACLKSEL0
166
FSLC
1
FSLB
**
Place close to U4
Place near U4Place these componentsnear each pin within 40mils.
Must fine tune12/08
12/05 ICS recommend
CLK_Rf
12/25
12/25
12/25
T32PAD
R142
10K_0402_5%@
12
C1855P_0402_50V8C@
12
R119 33_0402_5%
12
R123 24_0402_5%
1 2
C178
0.1U_0402_16V4Z
1
2
R134 24_0402_5%1 2
Y114.31818MHZ_16P
12
R146
10K_0402_5%@
12
R112
1K_0402_5%
12
R87 0_0805_5%
1 2
R998.2K_0402_5%
12
R1330_0402_5%
1 2
R98 24_0402_5%
1 2
R102 24_0402_5%
1 2
R135 24_0402_5%1 2
C186 33P_0402_50V8J
12
R1301K_0402_5%
1 2
R1030_0402_5%
1 2
C1754.7P_0402_50V8C@
12
C1720.01U_0402_16V7K
1
2
R1001K_0402_5%
1 2
C1744.7P_0402_50V8C@
12
C1804.7P_0402_50V8C@
12
J1NO SHORT PADS
12
R126 10K_0402_5%NOXDP@12
C182
0.1U_0402_16V4Z
1
2
R125
1K_0402_5%
12
R104 33_0402_5%
12
R115 24_0402_5%1 2
R136
0_0402_5%
@
12
R92 0_0402_5%LP@1 2
C170
10U_0805_10V4Z
1
2
R2171 33_0402_5%
12
R1180_0402_5%
1 2
C190
0.1U_0402_16V4Z@
1
2
R147
10K_0402_5%@
12
R892.2_0805_1%
1 2
R22270_0402_5%NOXDP@
12
R86 0_0805_5%
1 2
R140 24_0402_5%
1 2
R11733_0402_5%DEBUG@
12
R113 24_0402_5%1 2
R144
10K_0402_5%
12
R120
0_0402_5%
@
12
R94 0_0402_5%LP@1 2
R108 24_0402_5%1 2
C1730.01U_0402_16V7K
1
2
R9756_0402_5%@
12
C1764.7P_0402_50V8C@
12
C1695P_0402_50V8C@
12
C1911000P_0402_50V4Z@
1 2
R1298.2K_0402_5%
12
R2206 24_0402_5%XDP@1 2
R12724_0402_5% 12
C14574.7P_0402_50V8C@
12
R88
1_0805_1%1 2
R13124_0402_5% 12
C14611000P_0402_50V4Z@
1 2
C14564.7P_0402_50V8C@
12
R105
1K_0402_5%
12
R1161K_0402_5%
1 2
C184
0.1U_0402_16V4Z
1
2
R96 24_0402_5%
1 2
C189
0.1U_0402_16V4Z
1
2
T33PAD
C179
0.1U_0402_16V4Z
1
2
R95 24_0402_5%
1 2
R106 24_0402_5%1 2
R121 33_0402_5%
12
R1280_0402_5%
NOXDP@12
C187 33P_0402_50V8J
12
C1710.01U_0402_16V7K
1
2
C177
10U_0805_10V4Z
1
2
R143
10K_0402_5%
12
R141 24_0402_5%
1 2
R122 10K_0402_5%@12
R124 24_0402_5%
1 2
C188
0.1U_0402_16V4Z
1
2
R114 33_0402_5%
12
R107 910_0402_1%
* Internal Pull-Up Resistor** Internal Pull-Down Resistor
U4
ICS9LP306_TSSOP64
*SEL_PCI1/PCICLK31
**SEL_SATA1/PCICLK42
**SEL_SATA2/PCICLK53
GND4
VDDPCI5
PCI/SRC_STOP#8
PCICLK66
**SEL_LCDCLK#/PCICLK_F17
FSLA/USB_48MHz11
SATACLKT 28
DOTT_96MHz13
VDD4810
Vtt_PwrGd#/PD9
SRCCLKC3 27
SRCCLKT3 26
SATACLKC 29
GND17
GND12
SRCCLKC1 21
SRCCLKT1 20
LCDCLK_SSC/SRCCLKC0 19
LCDCLK_SST/SRCCLKT0 18
SRCCLKT2 22
CPUCLKC0 51
CPU_STOP#61
REF0/PCICLK160
FSLC/TEST_SEL/REF159
VDDREF55
VDDCPU50
VDD16
FSLB/TEST_MODE15
DOTC_96MHz14
X2 56
X1 57
SCLK53
CPUCLKT0 52
*REQ_SEL/PCICLK262
*CLKREQB# 63
*CLKREQA# 64
GNDSRC40
SATA1/SRCCLKC4 31
SATA1/SRCCLKT4 30
SDATA54
CPUCLKT1 49
CPUCLKC1 48
VDDSRC24
GNDSRC25
GNDCPU47
SRCCLKC2 23
IREF46
*CPUCLKT2_ITP/CLKREQC# 45
*CPUCLKC2_ITP/CLKREQD# 44
SRCCLKT8 43
SRCCLKC8 42
GNDSATA32
VDDSRC41
GND58
SRCCLKT7 39
SRCCLKC7 38
SRCCLKT6 37
SRCCLKC6 36
SATA2/SRCCLKT5 35
SATA2/SRCCLKC5 34
VDDSATA33
R11133_0402_5%
12
R2226 10K_0402_5%NOXDP@12
R101 33_0402_5%
12
R930_0402_5%@
12
C181
10U_0805_10V4Z
1
2
C183
0.1U_0402_16V4Z
1
2
R90
0_0805_5%1 2
R220910K_0402_5%
12
C1469
0.1U_0402_16V4Z
1
2
R1133 24_0402_5%XDP@1 2
R145
300_0402_5%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SMBCLK
SMBDAT CRT_SMBDAT
CRT_SMBCLK
SMBCLK
SMBDAT
CRT_RED
CRT_HSYNCRFL
CRTL_G
CRT_VSYNCRFL
CRTL_B
CRTL_R
HSYNC
CRT_BLU
CRT_GRN
VSYNC
CRT_RED<9>
CRT_GRN<9>
CRT_BLU<9>
HSYNC<9>
VSYNC<9>
CRT_SMBCLK <9>
CRT_SMBDAT <9>
CRT_VCC
+5VS
+2.5VS
+5VS
+5VS CRT_VCC
+3VS
+3VSR_CRT_VCC
+5VS +5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
CRT Connector
16 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
CRT CONNECTOR
12/26
C1482 close to U6,C1483 close to JP6
0119 HSYNC VSYN、 C refernece +5VS
C2010.1U_0402_16V4Z
1
2
L8
FBMA-L11-160808-800LMT_06031 2
D9
DAN217_SC59@
231
C202
10P_0402_50V8J
1
2
C198
22P_0402_50V8J
1
2
U5
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
R156
4.7K_0402_5%
C203
10P_0402_50V8J
1
2
R153
2.2K_0402_5%
12
C199
22P_0402_50V8J
1
2
D5
DAN217_SC59
@
2 31
G
D S
Q42N7002_SOT23
2
1 3
R152 0_0402_5%12
C200
22P_0402_50V8J
1
2
D8
DAN217_SC59@
231
R15075_0402_1%
12
L5 BK2125LL121_08051 2
C196
10P_0402_50V8J
1
2
C195
10P_0402_50V8J
1
2
R154
2.2K_0402_5%
12
R151 0_0402_5%12
C2050.1U_0402_16V4Z
1
2
C14
830.
1U_0
402_
16V4
Z1
2
C14
820.
1U_0
402_
16V4
Z
1
2
D10
RB411D_SOT23
2 1
C197
10P_0402_50V8J
1
2
C206
220P_0402_25V8K
1
2
D6
DAN217_SC59
@
2 31
F1
1A_6VDC_MINISMDC110
21
R14875_0402_1%
12
C207
220P_0402_25V8K
1
2
L4 BK2125LL121_08051 2
L7
FBMA-L11-160808-800LMT_06031 2
R155
4.7K_0402_5%
D7
DAN217_SC59
@
2 31
L6 BK2125LL121_08051 2
JP6
SUYIN_070912FR015S207CR
611
17
1228
1339
144
1015
5
1617
G
D S
Q32N7002_SOT23
2
1 3
U6
74AHCT1G125GW_SOT353-5
A2 Y 4OE#
1
G3
P5
R14975_0402_1%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LVDSA2-LVDSA2+
LVDSA0-LVDSA0+
LVDSA1-LVDSA1+
INVTPWMDISPLAYOFF#DAC_BRIG
LVDSAC-LVDSAC+
LVDSB0-LVDSB0+
LVDSBC-LVDSBC+
LVDSB1-LVDSB1+
LVDSB2-LVDSB2+
LCD_CLKLCD_DAT
DAC_BRIG
DISPLAYOFF#
INVTPWM
ENAVDD<9>LVDSA2- <9>
LVDSA0+ <9>
LVDSA2+ <9>
LVDSA0- <9>
LVDSA1- <9>LVDSA1+ <9>
LVDSAC- <9>LVDSAC+ <9>
LVDSB0+<9>LVDSB0-<9>
LVDSBC+<9>LVDSBC-<9>
LVDSB1+<9>LVDSB1-<9>
LVDSB2+<9>LVDSB2-<9>
BKLT_CTL<9>
INV_PWM<30>
LCD_CLK <9>LCD_DAT <9>
LID_SW#<30,32>
DISPLAYOFF# <30>ENABLT<9,30>
+5VALW
+LCDVDD+3VS+LCDVDD
+LCDVDD
INVPWR_B+B+
+3VS
INVPWR_B+
+LCDVDD
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
LCD CONN.
17 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
LVDS CONN
11/21
LVDS connector
LCD/PANEL BD. CONN.
12/28
L9 0_0805_5%
1 2
C21
768
0P_0
402_
50V7
K
12
R157
100_0402_5%
12
C211
4.7U_0805_10V4Z
1
2
C2104.7U_0805_10V4Z
1
2
JP7
ACES_88107-4000GCONN@
13579111315171921232527293133353739
2468
10121416182022242628303234363840
R21891.8K_0603_1%
G
D
S
Q62N7002_SOT23
2
13
R2247100K_0402_5%
12
C209
0.1U_0402_16V4Z
1
2
C212
0.047U_0402_16V7K
R1633.3K_0402_5%
12
R15847K_0402_5%
12
C208
0.1U_0402_16V4Z
1
2
U29
TC7SH08FU_SSOP5
@
B1
A2 Y 4
P5
G3
R166
0_0402_5%
@1 2
L10
FBMA-L11-201209-221LMA30T_0805
@1 2
R162 100K_0402_5%@12
G
D S
Q5SI2301BDS_SOT23 2
1 3
R161
0_0402_5%
1 2
R21901K_0402_1%
12
C21
668
0P_0
402_
50V7
K
12
U7
NC7SZ14M5X_SOT23-5@
A2
G3
Y 4
P5
C21
468
0P_0
402_
50V7
K
12
R160
0_0402_5%
@1 2
C213
0.1U_0402_16V4Z1
2
R159
47K_0402_5%
1 2
C21
568
0P_0
402_
50V7
K
1
2
G
D
S
Q7
2N7002LT1G_SOT23
2
13
C21
868
0P_0
402_
50V7
K
@
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CLK_PCI_ICH
PCI_SERR#
PCI_DEVSEL#PCI_PCIRST#
PCI_CBE#0
PCI_PERR#
PCI_PIRQG#PCI_PIRQB#
PCI_STOP#
PCI_CBE#1
PCI_CBE#3
PCI_PIRQF#PCI_PIRQC#
PCI_REQ2#
PCI_PIRQE#
PCI_FRAME#
PCI_PLOCK#
PCI_IRDY#
PCI_CBE#2
PCI_REQ1#
PCI_REQ0#
PCI_PIRQD#
PCI_PIRQA#
PCI_PAR
PCI_TRDY#
PCI_PIRQH#
PCI_PLTRST#CLK_PCI_ICH
PCI_AD0PCI_AD1PCI_AD2PCI_AD3PCI_AD4PCI_AD5
PCI_AD7PCI_AD6
PCI_AD8PCI_AD9
PCI_AD11PCI_AD10
PCI_AD14PCI_AD15
PCI_AD13PCI_AD12
PCI_AD16PCI_AD17
PCI_AD19PCI_AD18
PCI_AD22PCI_AD23
PCI_AD21PCI_AD20
PCI_AD25PCI_AD24
PCI_AD28PCI_AD29
PCI_AD31PCI_AD30
PCI_AD26PCI_AD27
PCI_TRDY#
PCI_DEVSEL#
PCI_STOP#
PCI_FRAME#
PCI_IRDY#
PCI_PLOCK#
PCI_SERR#
PCI_PERR#
PCI_PIRQC#
PCI_PIRQA#
PCI_PIRQB#
PCI_PIRQD#
PCI_PIRQH#
PCI_PIRQG#
PCI_PIRQF#
PCI_PIRQE#
PCI_REQ0#
PCI_REQ2#
PCI_REQ5#
PCI_REQ1#
PCI_GNT2#
PCI_REQ4#
PCI_REQ3#
PCI_PCIRST#
PCI_PLTRST#
PCI_REQ5#
PCI_REQ3#
PCI_REQ4#
PCI_RST#
PLT_RST#
GNT5#
GNT5#
ICH_GPIO48
ICH_GPIO48
PCI_AD[0..31]<24>
PCI_PIRQC#<24>
PCI_CBE#0 <24>PCI_CBE#1 <24>PCI_CBE#2 <24>PCI_CBE#3 <24>
PCI_IRDY# <24>PCI_PAR <24>
PCI_DEVSEL# <24>PCI_PERR# <24>
PCI_STOP# <24>PCI_TRDY# <24>PCI_FRAME# <24>
CLK_PCI_ICH <15>
PCI_SERR# <24,30>
PCI_RST# <24>
PLT_RST# <7,20,22,24,25,30,31>
PCI_GNT2# <24>PCI_REQ2# <24>
MCH_ICH_SYNC# <7>
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
ICH7-M(1/4)
18 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Place closely pin A9
Boot BIOS destination
The pad must be placed on PCB easilycontact space for BIOS team setting.
LPC@
SPI@ (Default)
PCI@
GNT5# GNT4#
0 1
1 0
1 1
GNT5# and GNT4# have internal pull high 20K
Change to RP before SI phase
12/27
C219
8.2P_0402_50V@
1
2
R168 8.2K_0402_5%
1 2
R170 8.2K_0402_5%
1 2
R180 8.2K_0402_5%
1 2
R190 8.2K_0402_5%
1 2
R185 8.2K_0402_5%
1 2
R178 8.2K_0402_5%
1 2
R2228 8.2K_0402_5%
1 2
R167 8.2K_0402_5%
1 2
R186 8.2K_0402_5%
1 2
R187 8.2K_0402_5%
1 2
R189 8.2K_0402_5%
1 2
R12901K_0402_5%
12
U31
TC7SH08FU_SSOP5
@
B1
A2 Y 4
P5
G3
R171 8.2K_0402_5%
1 2
R172 8.2K_0402_5%
1 2
R176 8.2K_0402_5%
1 2
R1770_0402_5%
12
R182 8.2K_0402_5%
1 2Interrupt I/F
PCI
MISC
U8B
ICH7_BGA652~D
FRAME# F16
GPIO17 / GNT5# D8
TRDY# F14STOP# F15
GPIO2 / PIRQE# G8GPIO3 / PIRQF# F7GPIO4 / PIRQG# F8GPIO5 / PIRQH# G7
C/BE0# B15C/BE1# C12C/BE2# D12C/BE3# C15
IRDY# A7PAR E10
PCIRST# B18DEVSEL# A12
PERR# C9PLOCK# E11
SERR# B10
PIRQC#C5
RSVD[4]AH4
PIRQA#A3
RSVD[5]AD9
RSVD[2]AD5RSVD[3]AG4
PIRQB#B4
PIRQD#B5
RSVD[1]AE5
REQ0# D7GNT0# E7REQ1# C16GNT1# D16REQ2# C17GNT2# D17REQ3# E13GNT3# F13
REQ4# / GPIO22 A13GNT4# / GPIO48 A14GPIO1 / REQ5# C8
AD0E18AD1C18AD2A16AD3F18AD4E16AD5A18AD6E17AD7A17AD8A15AD9C14AD10E14AD11D14AD12B12AD13C13AD14G15AD15G13AD16E12AD17C11AD18D11AD19A11AD20A10AD21F11AD22F10AD23E9AD24D9AD25B9AD26A8AD27A6AD28C7AD29B6AD30E6AD31D6
RSVD[6] AE9RSVD[7] AG8RSVD[8] AH8RSVD[9] F21
MCH_SYNC# AH20
PLTRST# C26PCICLK A9
PME# B19
R169 8.2K_0402_5%
1 2
R173 8.2K_0402_5%
1 2
R181 8.2K_0402_5%
1 2
R175 8.2K_0402_5%
1 2
R183 8.2K_0402_5%
1 2
R188 8.2K_0402_5%
1 2
R179 8.2K_0402_5%
1 2
R191
10_0402_5%@
12
R174 8.2K_0402_5%
1 2
U30
TC7SH08FU_SSOP5
@
B1
A2 Y 4
P5
G3
R1840_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PD_DREQ
H_A20M#
H_INIT#
H_IGNNE#
H_INTR
H_NMI
PD_D9
PD_D2
PD_D15
PD_D0
PD_IOR#
DPRSLP#
LPC_FRAME#
PD_A1
PD_D14
PD_A2
PD_IOW#
PD_D6
PD_A0
PD_D13
PD_D10
PD_D8
PD_D1
PD_D7
PD_D4
LPC_AD3
PD_D12
PD_D3
THRMTRIP_ICH#
PD_D5
LPC_AD0
PD_D11
PD_DACK#
PD_CS#1
SM_INTRUDER#
H_CPUSLP_R#
H_PWRGOOD
H_SMI#
LPC_AD2
PD_CS#3
LPC_AD1
ICH_INTVRMEN
PD_IRQPD_IORDY
ICH_RTCX2
ICH_INTVRMEN
RTC_R
H_FERR#
GATEA20
KB_RST#
ICH_RTCX1
CLK_PCIE_SATA#CLK_PCIE_SATA
SATA_RXN0_CSATA_RXP0_C
SATA_TXP0_CSATA_TXN0_C
H_STPCLK#
DPSLP#
ICH_RTCRST#
PD_IORDYPD_IRQ
PD_D[0..15]
AC97RST#
AC97_SYNC
AC97_SDIN0
AC97_SDOUT
EEP_CSEEP_SKEEP_DOUTEEP_DIN
LAN_RXD0LAN_RXD1LAN_RXD2
LAN_TXD0LAN_TXD1LAN_TXD2
LAN_RSTSYNC
LAN_JCLK
LAN_TXD2LAN_TXD1LAN_TXD0
AC97_BITCLK
AC97_BITCLK
LPC_AD[0..3] <25,30,31>
H_A20M# <4>
H_DPRSTP# <4,40>H_DPSLP# <4>
H_FERR# <4>
H_PWRGOOD <4>
H_IGNNE# <4>
H_INIT# <4>H_INTR <4>
H_SMI# <4>H_NMI <4>
H_STPCLK# <4>
GATEA20 <30>
KB_RST# <30>
H_THERMTRIP# <4,7>
LPC_FRAME# <25,30,31>
CLK_PCIE_SATA#<15>CLK_PCIE_SATA<15>
PD_DACK#<22>PD_IOW#<22>PD_IOR#<22>
PD_IORDY<22>PD_IRQ<22>
PD_DREQ <22>
PD_D[0..15] <22>
SATA_RXP0_C<22>SATA_TXN0_C<22>SATA_TXP0_C<22>
ACZ_SDOUT<26>
ACZ_SDIN0<26>
ACZ_SYNC<26>ACZ_BITCLK<26>
ACZ_RST#<26>
SATA_RXN0_C<22>
PD_A0 <22>PD_A1 <22>PD_A2 <22>
PD_CS#1 <22>PD_CS#3 <22>
LAN_RXD0<23>LAN_RXD1<23>LAN_RXD2<23>
LAN_TXD0<23>LAN_TXD1<23>
LAN_RSTSYNC<23>
LAN_JCLK<23>
LAN_TXD2<23>
+VCCP
+RTCVCC
+RTCVCC
+VCCP
+RTCVCC
+3VS
+3VS
+RTCVCC+3VL
+3VALW
+3VS
+3VS
+3VALW+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
ICH7-M(2/4)
19 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
W=20mils
Place close to ICH7
EMI
W=20mils
-+
11/21
LPCRQ0# Delete(For SIO Request pin) 11/20
FWH_INIT# Delete 11/20
Change to LAN power plane 12/11
12/26
12/26
R2230
0_0402_5%
12
R212
0_0402_5%@
12
R194
1M_0402_5%
1 2
C14
49
33P
_040
2_50
V8J
1
2
C225
1U_0603_10V4Z
1
2
D11
DAN202U_SC70
2
31
R211
332K_0402_1%
12
RTC
LAN
SATA
AC-97/AZALIA
LPC
CPU
IDE
U8A
ICH7_BGA652~D
RTXC1AB1RTCX2AB2
RTCRST#AA3
INTVRMENW4INTRUDER#Y5
EE_CSW1EE_SHCLKY1EE_DOUTY2EE_DINW3
LAN_CLKV3
LAN_RSTSYNCU3
LAN_RXD0U5LAN_RXD1V4LAN_RXD2T5
LAN_TXD0U7LAN_TXD1V6LAN_TXD2V7
ACZ_BCLKU1ACZ_SYNCR6
ACZ_RST#R5
ACZ_SDIN0T2ACZ_SDIN1T3ACZ_SDIN2T1
ACZ_SDOUTT4
SATALED#AF18
SATA0RXNAF3SATA0RXPAE3SATA0TXNAG2SATA0TXPAH2
SATA2RXNAF7SATA2RXPAE7SATA2TXNAG6SATA2TXPAH6
SATA_CLKNAF1SATA_CLKPAE1
SATARBIASNAH10SATARBIASPAG10
IORDYAG16IDEIRQAH16DDACK#AF16DIOW#AH15DIOR#AF15
LAD0 AA6LAD1 AB5LAD2 AC4LAD3 Y6
LDRQ0# AC3LDRQ1# / GPIO23 AA5
LFRAME# AB3
A20GATE AE22A20M# AH28
CPUSLP# AG27
TP1 / DPRSTP# AF24TP2 / DPSLP# AH25
FERR# AG26
GPIO49 / CPUPWRGD AG24
IGNNE# AG22INIT3_3V# AG21
INIT# AF22INTR AF25
RCIN# AG23
SMI# AF23NMI AH24
STPCLK# AH22
THERMTRIP# AF26
DA0 AH17DA1 AE17DA2 AF17
DCS1# AE16DCS3# AD16
DD0 AB15DD1 AE14DD2 AG13DD3 AF13DD4 AD14DD5 AC13DD6 AD12DD7 AC12DD8 AE12DD9 AF12
DD10 AB13DD11 AC14DD12 AF14DD13 AH13DD14 AH14DD15 AC15
DDREQ AE15
R196 0_0402_5% 12
R2141K_0402_5%
1 2
C223
0.1U_0402_16V4Z
1
2
R2213 10K_0402_5%12
R192
10M_0402_5%
12
R221033_0402_5%1 2
R21
95
33_0
402_
5%
12
R210
332K_0402_1%@
12
R198 56_0402_5%
12
C22115P_0402_50V8J
1 2
JP8
SUYIN_060003FA002TX00NL~D
+1 - 2
C22410P_0402_25V8K@
1
2
R2088.2K_0402_5% 12
R200 10K_0402_5% 12
R213
100_0402_5%
1 2
R22310_0402_5%
@
12
U10
AT93C46-10SI-2.7_SO8
CS 1SK 2DI 3
DO 4
VCC8NC7NC6GND5
C2221U_0603_10V4Z 1 2
R195 10K_0402_5% 12
R204 24.9_0402_1% 1 2
ZZZ1
PCB_MB_rev01
R20133_0402_5%
12
R205 33_0402_5%
1 2
T15PAD
R202
56_0402_5%
12
Y2
32.768KHZ_12.5P_MC-146
14
23
R2074.7K_0402_5% 12
JOPEN1
SHORT PADS
1 2
R21
97
33_0
402_
5%
12
BATT1
CR2032 RTC BATTERYBATT@
R209
24.9_0402_1%
1 2
C220
15P_0402_50V8J1 2
R21
96
33_0
402_
5%
12
R19910_0402_5%@
12
C14
48
33P
_040
2_50
V8J
1
2
R203 0_0402_5% 12
R197 0_0402_5% 12
C14
47
33P
_040
2_50
V8J
1
2
R19320K_0402_5%
1 2
T16PAD
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LINKALERT#
OCP#
THERM_SCI#
SIRQ
PM_CLKRUN#
THERM_SCI#
CLK_48M_ICH
PM_BMBUSY#
CLK_14M_ICH
H_STP_CPU#
PWROK_ICH7
SLP_S3#XDP_DBRESET#
CLK_48M_ICH
CLK_14M_ICHICH_RI#
SIRQ
SLP_S5#OCP#
PM_CLKRUN#
SB_SPKR
LINKALERT#
H_STP_PCI#
ICH_SMLINK0ICH_SMLINK1
DPRSLPVR
ON/OFFBTN#
PM_POK
ICH_SUSCLK
DPRSLPVR
DMI_TXN3
DMI_TXN0
USBRBIAS
DMI_TXP1
USB_OC#2
USB_OC#4
DMI_TXP2
USB_OC#3
DMI_TXN1
DMI_RXN1
USB_OC#1
DMI_TXP3
DMI_RXP1
DMI_RXN3
CLK_PCIE_ICH
DMI_RXN2
DMI_RXN0
DMI_TXP0
DMI_RXP3
CLK_PCIE_ICH#
DMI_TXN2
DMI_RXP0
DMI_RXP2
USB20_N1USB20_P1
ICH_LOW_BAT#
DMI_IRCOMP
LPC_PD#
PM_RSMRST#
SLP_S4#
USB_OC#0
RUNSCI_EC#
USB_OC#5
XMIT_OFF#
SPI_CS#SPI_CLK
ICH_SMBCLK ICH_SMB_CLK
ICH_SMB_DATAICH_SMBDATA
ICH_SMB_DATAICH_SMBCLKICH_SMBDATA
ICH_SMB_CLK
XDP_DBRESET# PWROK_ICH7
USB_OC#6USB_OC#7
SPI_CS#
SPI_SI
SPI_SO
USB20_N0USB20_P0
USB_OC#0
USB_OC#1
ICH_PCIE_WAKE#
SPI_SO
LID_OUT#LID_OUT#
SPI_SI
PCIE_C_TXP2
PCIE_RXN2PCIE_RXP2PCIE_C_TXN2
LAN_RST_R#
LAN_RST_R#
USB_OC#1USB_OC#3
USB_OC#5USB_OC#0
USB_OC#4USB_OC#2
USB_OC#6USB_OC#7
PM_CLKRUN#<24,30>
H_STP_PCI#<15>H_STP_CPU#<15>
PM_BMBUSY#<7>
SIRQ<24,30>THERM_SCI#<4>
SLP_S3# <30,33,39>
SLP_S5# <33,38>
DPRSLPVR <7,40>
DMI_RXN0 <7>DMI_RXP0 <7>DMI_TXN0 <7>DMI_TXP0 <7>
DMI_RXN1 <7>DMI_RXP1 <7>DMI_TXN1 <7>DMI_TXP1 <7>
DMI_RXN2 <7>DMI_RXP2 <7>DMI_TXN2 <7>DMI_TXP2 <7>
DMI_RXN3 <7>DMI_RXP3 <7>DMI_TXN3 <7>DMI_TXP3 <7>
CLK_PCIE_ICH# <15>CLK_PCIE_ICH <15>
PM_RSMRST# <24,30>
ON/OFFBTN# <32>
CLK_48M_ICH <15>CLK_14M_ICH <15>
USB20_N1 <29>USB20_P1 <29>
LOW_BAT# <30>
XDP_DBRESET#<4>
OCP#<4,30,42>
LPC_PD#<30>
SLP_S4# <38>
RUNSCI_EC#<30>XMIT_OFF# <25,31>
SPI_CS#<31>SPI_CLK<31>
ICH_SMBCLK<4,13,14,15,25>
ICH_SMBDATA<4,13,14,15,25>
VGATE_INTEL<7,40>
PM_POK<7,30>
SB_SPKR<26>
USB20_N0 <29>USB20_P0 <29>
USB_OC# <29>
ICH_PCIE_WAKE#<25>
SPI_SO<31>SPI_SI<31>
LID_OUT# <30>
PCIE_TXP2<25>
PCIE_RXN2<25>PCIE_RXP2<25>PCIE_TXN2<25>
PLT_RST# <7,18,22,24,25,30,31>
LAN_RST# <30>
+3VALW
+3VS
+3VALW
+1.5VS
+3VALW
+3VL
+3VALW
+3VALW
+3VS
+3VS
+3VALW
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
ICH7-M(3/4)
20 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Place closely pin B2 Place closely pin AC1
Within 500 mils
Within 500 mils
R246 should be placedless than 100 mils from U8
R232 need be removed when ICH7M ES2 samples used,but need be stuffed when ICH7M ES1 samples used.
R249,R250 and R251 shouldbe placed close to U8.
R217,R218 change from 2.2Kohm to10Kohm when Q23,Q24,R206,R204 stuffed.
12/05 Change to +3VS
12/26
12/26
12/26
R2220_0402_5%
@1 2
R217
4.7K_0402_5%
T19PADT18PAD
R244 0_0402_5%@1 2
G
DS
Q10RHU002N06_SOT323
2
13
R215
10_0402_5%@
12
R24110K_0402_5% 1 2
R2311K_0402_5% 1 2
R2232 0_0402_5% 1 2
R24647_0402_5%
1 2
RP34
10K_1206_8P4R_5%
1 82 73 64 5
R24210K_0402_5% 1 2
R223 100_0402_5%
1 2
C227
4.7P_0402_50V8C@
1
2
R245 24.9_0402_1%
1 2
C226
4.7P_0402_50V8C@
1
2
R2358.2K_0402_5%
1 2
R23410K_0402_5% 1 2
RP33
10K_1206_8P4R_5%
1 82 73 64 5
PCI-EXPRESS
DIRECT MEDIA INTERFACE
USB
SPI
U8D
ICH7_BGA652~D
SPI_CLKR2SPI_CS#P6SPI_ARBP1
SPI_MOSIP5SPI_MISOP2
DMI0RXN V26DMI0RXP V25DMI0TXN U28DMI0TXP U27
DMI1RXN Y26DMI1RXP Y25DMI1TXN W28DMI1TXP W27
DMI2RXN AB26DMI2RXP AB25DMI2TXN AA28DMI2TXP AA27
DMI3RXN AD25DMI3RXP AD24DMI3TXN AC28DMI3TXP AC27
DMI_CLKN AE28DMI_CLKP AE27
DMI_ZCOMP C25DMI_IRCOMP D25
PERn1F26PERp1F25PETn1E28PETp1E27
PERn2H26PERp2H25PETn2G28PETp2G27
PERn3K26PERp3K25PETn3J28PETp3J27
PERn4M26PERp4M25PETn4L28PETp4L27
PERn5P26PERp5P25PETn5N28PETp5N27
PERn6T25PERp6T24PETn6R28PETp6R27
OC0#D3OC1#C4OC2#D5OC3#D4OC4#E5OC5# / GPIO29C3OC6# / GPIO30A2OC7# / GPIO31B3
USBP0N F1USBP0P F2USBP1N G4USBP1P G3USBP2N H1USBP2P H2USBP3N J4USBP3P J3USBP4N K1USBP4P K2USBP5N L4USBP5P L5USBP6N M1USBP6P M2USBP7N N4USBP7P N3
USBRBIAS# D2USBRBIAS D1
R251 10K_0402_5%1 2
R220
10K_0402_5%
12
R250 10K_0402_5%1 2
R23010K_0402_5%@1 2
C2290.1U_0402_16V4ZWLAN@ 12
T21 PAD
T20 PAD
R232100K_0402_5%@
12
C2280.1U_0402_16V4ZWLAN@ 12
R2233 0_0402_5%@1 2
R221947_0402_5%
1 2
T22
PAD
R226
8.2K_0402_5%
1 2
R22710K_0402_5%
1 2
R219
10K_0402_5%
12
R22910K_0402_5%
12
G
DS
Q11RHU002N06_SOT3232
13
R243 0_0402_5%@1 2
R248 22.6_0402_1% 1 2
R23710K_0402_5% 1 2
SATA
POWER MGT
SYS
SMB
GPIO
Clocks
GPIO
GPIO
U8C
ICH7_BGA652~D
RI#A28
SPKRA19
SYS_RST#A22 SUS_STAT#A27
GPIO0 / BM_BUSY#AB18
GPIO26A21
GPIO27B21GPIO28E23
GPIO32 / CLKRUN#AG18
GPIO33 / AZ_DOCK_EN#AC19GPIO34 / AZ_DOCK_RST#U2
VRMPWRGDAD22
GPIO11 / SMBALERT#B23
SUSCLK C20
SLP_S3# B24SLP_S4# D23SLP_S5# F22
PWROK AA4
GPIO16 / DPRSLPVR AC22
TP0 / BATLOW# C21
PWRBTN# C23
LAN_RST# C19
RSMRST# Y4
GPIO21 / SATA0GP AF19GPIO19 / SATA1GP AH18GPIO36 / SATA2GP AH19GPIO37 / SATA3GP AE19
CLK14 AC1CLK48 B2
GPIO9 E20GPIO10 A20GPIO12 F19GPIO13 E19GPIO14 R4GPIO15 E22GPIO24 R3GPIO25 D20
GPIO35 / SATAREQ# AD21GPIO38 AD20GPIO39 AE20
SMBCLKC22SMBDATAB22LINKALERT#A26SMLINK0B25SMLINK1A25
GPIO18 / STPPCI#AC20GPIO20 / STPCPU#AF21
WAKE#F20SERIRQAH21THRM#AF20
GPIO6AC21GPIO7AC18GPIO8E21
D12
CH751H-40_SC76
2 1
R249 10K_0402_5%1 2
R240 0_0402_5%@1 2
T17 PAD
R218
4.7K_0402_5%
R216
10_0402_5%@
12
R239 0_0402_5%1 2
R233 10K_0402_5%
1 2
R23810K_0402_5% 1 2
R224
2.2K_0402_5%
12
R2210_0402_5%
@1 2
R2288.2K_0402_5%
12
R225
2.2K_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_V5REF_SUS
ICH_V5REF_RUN
ICH_V5REF_RUN
ICH_V5REF_SUS
ICH_AA2ICH_Y7
ICH_K7
ICH_C28ICH_G20
+1.5VS_DMIPLL
VCCSUSHDA
VCCSUSHDA
VCCLAN3_3
+3VALW
+VCCP
+3VS
+1.5VS
+RTCVCC
+1.5VS
+1.5VS
+3VS+5VS
+3VALW+5VALW
+3VS
+1.5VS
+1.5VS
+3VS
+3VS
+3VALW
+3VALW
+1.5VS
+VCCP
+1.5VS
+1.5VS_DMIPLL+1.5VS_DMIPLLR
+3VS
+1.5VS
+3VS
+3VALW
+3VS
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
ICH7-M(4/4)
21 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Place closely pinD28,T28,AD28.
Place closely pin AG28 within 100mlis.
Place closely pin AG5.
Place closely pin AG9.
Change 150uF to 220uF 12/04
12/25
12/25
T25PAD
R2235 0_0402_5% 1 2
C25
20.
1U_0
402_
16V4
Z
1
2
U8F
ICH7_BGA652~D
V5REF[1]G10
V5REF[2]AD17
V5REF_SusF6
Vcc1_5_B[1]AA22Vcc1_5_B[2]AA23Vcc1_5_B[3]AB22Vcc1_5_B[4]AB23Vcc1_5_B[5]AC23Vcc1_5_B[6]AC24Vcc1_5_B[7]AC25Vcc1_5_B[8]AC26Vcc1_5_B[9]AD26Vcc1_5_B[10]AD27Vcc1_5_B[11]AD28Vcc1_5_B[12]D26Vcc1_5_B[13]D27Vcc1_5_B[14]D28Vcc1_5_B[15]E24Vcc1_5_B[16]E25Vcc1_5_B[17]E26Vcc1_5_B[18]F23Vcc1_5_B[19]F24Vcc1_5_B[20]G22Vcc1_5_B[21]G23Vcc1_5_B[22]H22Vcc1_5_B[23]H23Vcc1_5_B[24]J22Vcc1_5_B[25]J23Vcc1_5_B[26]K22Vcc1_5_B[27]K23Vcc1_5_B[28]L22Vcc1_5_B[29]L23Vcc1_5_B[30]M22Vcc1_5_B[31]M23Vcc1_5_B[32]N22Vcc1_5_B[33]N23Vcc1_5_B[34]P22Vcc1_5_B[35]P23Vcc1_5_B[36]R22Vcc1_5_B[37]R23Vcc1_5_B[38]R24Vcc1_5_B[39]R25
Vcc1_5_B[41]T22Vcc1_5_B[42]T23Vcc1_5_B[43]T26Vcc1_5_B[44]T27Vcc1_5_B[45]T28Vcc1_5_B[46]U22Vcc1_5_B[47]U23Vcc1_5_B[48]V22Vcc1_5_B[49]V23Vcc1_5_B[50]W22
Vcc1_5_B[52]Y22Vcc1_5_B[53]Y23
Vcc1_5_B[51]W23
Vcc1_5_B[40]R26
Vcc3_3[1]B27
VccDMIPLLAG28
VccSATAPLLAD2
Vcc3_3[2]AH11
Vcc1_05[1] L11Vcc1_05[2] L12Vcc1_05[3] L14Vcc1_05[4] L16
Vcc1_05[6] L18Vcc1_05[5] L17
Vcc1_05[7] M11Vcc1_05[8] M18Vcc1_05[9] P11
Vcc1_05[10] P18Vcc1_05[11] T11Vcc1_05[12] T18Vcc1_05[13] U11Vcc1_05[14] U18Vcc1_05[15] V11Vcc1_05[16] V12Vcc1_05[17] V14Vcc1_05[18] V16Vcc1_05[19] V17Vcc1_05[20] V18
Vcc3_3 / VccHDA U6
VccSus3_3/VccSusHDA R7
V_CPU_IO[1] AE23V_CPU_IO[2] AE26V_CPU_IO[3] AH26
Vcc3_3[3] AA7Vcc3_3[4] AB12Vcc3_3[5] AB20Vcc3_3[6] AC16Vcc3_3[7] AD13Vcc3_3[8] AD18Vcc3_3[9] AG12
Vcc3_3[10] AG15Vcc3_3[11] AG19
Vcc3_3[12] A5
Vcc3_3[14] B16Vcc3_3[15] B7Vcc3_3[16] C10
Vcc3_3[13] B13
Vcc3_3[17] D15Vcc3_3[18] F9Vcc3_3[19] G11Vcc3_3[20] G12
VccRTC W5
VccSus3_3[1] P7
VccSus3_3[2] A24
VccSus3_3[4] D19VccSus3_3[5] D22VccSus3_3[6] G19
VccSus3_3[3] C24
VccSus3_3[7] K3VccSus3_3[8] K4VccSus3_3[9] K5
VccSus3_3[10] K6VccSus3_3[11] L1
Vcc1_5_A[19] AB17Vcc1_5_A[20] AC17
Vcc1_5_A[21] T7Vcc1_5_A[22] F17Vcc1_5_A[23] G17
Vcc1_5_A[24] AB8Vcc1_5_A[25] AC8
VccSus1_05[1] K7
Vcc1_5_A[1]AB7Vcc1_5_A[2]AC6Vcc1_5_A[3]AC7Vcc1_5_A[4]AD6Vcc1_5_A[5]AE6Vcc1_5_A[6]AF5Vcc1_5_A[7]AF6Vcc1_5_A[8]AG5Vcc1_5_A[9]AH5
Vcc1_5_A[10]AB10Vcc1_5_A[11]AB9Vcc1_5_A[12]AC10Vcc1_5_A[13]AD10Vcc1_5_A[14]AE10Vcc1_5_A[15]AF10Vcc1_5_A[16]AF9Vcc1_5_A[17]AG9Vcc1_5_A[18]AH9
VccSus3_3[19]E3
VccUSBPLLC1
VccSus1_05/VccLAN1_05[1]AA2VccSus1_05/VccLAN1_05[2]Y7
VccSus3_3/VccLAN3_3[1]V5VccSus3_3/VccLAN3_3[2]V1VccSus3_3/VccLAN3_3[3]W2VccSus3_3/VccLAN3_3[4]W7
Vcc3_3[21] G16
VccSus3_3[12] L2VccSus3_3[13] L3VccSus3_3[14] L6VccSus3_3[15] L7VccSus3_3[16] M6VccSus3_3[17] M7VccSus3_3[18] N7
VccSus1_05[2] C28VccSus1_05[3] G20
Vcc1_5_A[26] A1Vcc1_5_A[27] H6Vcc1_5_A[28] H7Vcc1_5_A[29] J6Vcc1_5_A[30] J7
C264
0.1U_0402_16V4Z
1
2
C241
0.1U_0402_16V4Z
1 2
C263
0.1U_0402_16V4Z
1
2
C243
0.1U_0402_16V4Z
1
2
C261 0.1U_0402_16V4Z
1 2
+ C231
330U_D2E_2.5VM_R9@
1
2
C245
0.1U_0402_16V4Z
1
2
R254
0.5_0805_1%
1 2
D13
CH751H-40_SC76
21
C25
610
U_0
805_
10V4
Z
1
2
C235
0.1U_0402_16V4Z
1
2
C26
00.
1U_0
402_
16V4
Z
1
2
C237
0.1U_0402_16V4Z
1
2
R255
0_0805_5%
1 2
D14
CH751H-40_SC76
21
C239
0.1U_0402_16V4Z
@1
2
C232
1U_0603_10V4Z
1
2
C24
70.
1U_0
402_
16V4
Z
1
2
R22370_0402_5% @ 12
C2420.1U_0402_16V4Z
1 2
C233
0.1U_0402_16V4Z
1
2
C238
0.1U_0402_16V4Z
1
2
C254
0.1U_0402_16V4Z
1
2
T24PAD
T27 PAD
C258
0.1U_0402_16V4Z
1
2
+
C230
220U_D2_2VM_R9
1
2
C25
9
0.1U
_040
2_16
V4Z
1
2
R2234 0_0402_5%@1 2
C24
80.
1U_0
402_
16V4
Z
1
2
C236
0.1U_0402_16V4Z
1
2
U8E
ICH7_BGA652~D
VSS[0]A4VSS[1]A23VSS[2]B1VSS[3]B8VSS[4]B11VSS[5]B14VSS[6]B17VSS[7]B20VSS[8]B26VSS[9]B28VSS[10]C2VSS[11]C6VSS[12]C27VSS[13]D10VSS[14]D13VSS[15]D18VSS[16]D21VSS[17]D24VSS[18]E1VSS[19]E2VSS[21]E4VSS[22]E8VSS[23]E15VSS[24]F3VSS[25]F4VSS[26]F5VSS[27]F12VSS[28]F27VSS[29]F28VSS[30]G1VSS[31]G2VSS[32]G5VSS[33]G6VSS[34]G9VSS[35]G14VSS[36]G18VSS[37]G21VSS[38]G24VSS[39]G25VSS[40]G26VSS[41]H3VSS[42]H4VSS[43]H5VSS[44]H24VSS[45]H27VSS[46]H28VSS[47]J1VSS[48]J2VSS[49]J5VSS[50]J24VSS[51]J25VSS[52]J26VSS[53]K24VSS[54]K27VSS[55]K28VSS[56]L13VSS[57]L15VSS[58]L24VSS[59]L25VSS[60]L26VSS[61]M3VSS[62]M4VSS[63]M5VSS[64]M12VSS[65]M13VSS[66]M14VSS[67]M15VSS[68]M16VSS[69]M17VSS[70]M24VSS[71]M27VSS[72]M28VSS[73]N1VSS[74]N2VSS[75]N5VSS[76]N6VSS[77]N11VSS[78]N12VSS[79]N13VSS[80]N14VSS[81]N15VSS[82]N16VSS[83]N17VSS[84]N18VSS[85]N24VSS[86]N25VSS[87]N26VSS[88]P3VSS[89]P4VSS[90]P12VSS[91]P13VSS[92]P14VSS[93]P15VSS[94]P16VSS[95]P17VSS[96]P24VSS[97]P27
VSS[98] P28VSS[99] R1
VSS[100] R11VSS[101] R12VSS[102] R13VSS[103] R14VSS[104] R15VSS[105] R16VSS[106] R17VSS[107] R18VSS[108] T6VSS[109] T12VSS[110] T13VSS[111] T14VSS[112] T15VSS[113] T16VSS[114] T17VSS[115] U4VSS[116] U12VSS[117] U13VSS[118] U14VSS[119] U15VSS[120] U16VSS[121] U17VSS[122] U24VSS[123] U25VSS[124] U26VSS[125] V2VSS[126] V13VSS[127] V15VSS[128] V24VSS[129] V27VSS[130] V28VSS[131] W6VSS[132] W24VSS[133] W25VSS[134] W26VSS[135] Y3VSS[136] Y24VSS[137] Y27VSS[138] Y28VSS[139] AA1VSS[140] AA24VSS[141] AA25VSS[142] AA26VSS[143] AB4VSS[144] AB6VSS[145] AB11VSS[146] AB14VSS[147] AB16VSS[148] AB19VSS[149] AB21VSS[150] AB24VSS[151] AB27VSS[152] AB28VSS[153] AC2VSS[154] AC5VSS[155] AC9VSS[156] AC11VSS[157] AD1VSS[158] AD3VSS[159] AD4VSS[160] AD7VSS[161] AD8VSS[162] AD11VSS[163] AD15VSS[164] AD19VSS[165] AD23VSS[166] AE2VSS[167] AE4VSS[168] AE8VSS[169] AE11VSS[170] AE13VSS[171] AE18VSS[172] AE21VSS[173] AE24VSS[174] AE25VSS[175] AF2VSS[176] AF4VSS[177] AF8VSS[178] AF11VSS[179] AF27VSS[180] AF28VSS[181] AG1VSS[182] AG3VSS[183] AG7VSS[184] AG11VSS[185] AG14VSS[186] AG17VSS[187] AG20VSS[188] AG25VSS[189] AH1VSS[190] AH3VSS[191] AH7VSS[192] AH12VSS[193] AH23VSS[194] AH27
R253
10_0402_5%
12
C24
60.
1U_0
402_
16V4
Z
1
2
C266
0.1U_0402_16V4Z
1
2
C25
70.
01U
_040
2_16
V7K
1
2
R252
100_0402_5%
12
+
C23
422
0U_D
2_2V
M_R
9
1
2
C249
0.1U_0402_16V4Z
1
2
T23PAD
T26 PADC265
0.1U_0402_16V4Z
1
2
R22360_0402_5% 12
C240
0.1U_0402_16V4Z
1
2
C262
1U_0603_10V4Z
1
2
C2444.7U_0805_10V4Z
1 2
C25
30.
1U_0
402_
16V4
Z
1
2
C255
0.1U_0402_16V4Z
1
2
C251
0.1U_0402_16V4Z
1
2
C250
0.1U_0402_16V4Z
1
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SATA_TXN0
SATA_TXP0_C SATA_TXP0
SATA_RXP0
SATA_RXN0
SATA_RXP0_C
SATA_RXN0_C
PD_A2
PD_DREQ
PD_D[0..15]
PD_CS#3
PD_IOR#
PD_DACK#
PDIAG#
PD_D14PD_D15
PD_D13
PD_D10
PD_D12PD_D11
PD_D9PD_D8
PD_CS#1
PLT_RST#
PD_A0PD_A1PD_IRQ
PD_IOW#PD_IORDY
PRI_CSEL
PD_D6PD_D7
PD_D4PD_D5
PD_D3PD_D2
PD_D0PD_D1
IDE_ACT#
IDE_ACT#
SATA_TXN0_C
SATA_TXN0
SATA_RXN0
SATA_TXP0
SATA_RXP0
PD_A2 <19>
PD_IOR# <19>
PD_CS#3 <19>
PD_D[0..15] <19>
PD_DACK# <19>
PD_DREQ <19>
PD_IORDY<19>PD_IOW#<19>
PD_IRQ<19>PD_A1<19>PD_A0<19>
PD_CS#1<19>
PLT_RST#<7,18,20,24,25,30,31>
SATA_RXN0_C<19>
SATA_TXN0_C<19>
SATA_RXP0_C<19>
SATA_TXP0_C<19>
+5VS
+5VS
+5VS
+5VS
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
HDD & ODD
22 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Near ICH7(U26) side.
Near Device(JP45) side.
SATA CONN
CD-ROM Connector
11/21
Placea caps. near ODD CONN.
11/21
12/26
C269
10U
_080
5_10
V4Z
1
2C272 3900P_0402_50V7K1 2
C270
0.1U
_040
2_16
V4Z
1
2
JP9
OCTEK_HDD-22SC1G_44P_RVCONN@
GND 1A+ 2A- 3
GND 4B- 5B+ 6
GND 7
V33 8V33 9V33 10
GND 11GND 12GND 13
V5 14V5 15V5 16
GND 17Reserved 18
GND 19V12 20V12 21V12 22
+C1450
330U
_D2E
_2.5
VM_R
9
@
1
2
R259
10K_0402_5%
1 2
C267 3900P_0402_50V7K1 2
R257100K_0402_5%
1 2
C145410U_0805_10V4Z
1
2
C273 3900P_0402_50V7K1 2
JP10
OCTEK_CDR-50TA1
1 23 45 67 89 1011 1213 1415 1617 1819 2021 2223 2425 2627 2829 3031 3233 3435 3637 3839 4041 4243 4445 4647 4849 50G
ND
53G
ND
54
C1452
1U_0603_10V4Z
1
2
C2740.1U_0402_16V4Z
12
R256 33_0402_5%12
R258470_0402_5%
12
C268 3900P_0402_50V7K1 2
C1453
10U_0805_10V4Z
1
2
C271
0.1U
_040
2_16
V4Z
1
2
C1451
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
RDP
MDO0-MDO0+
MDO1+MDO1-
MDO1+
MDO1-
MDO0+
MDO0-
RDNRDP
TDNTDP
MCT1
MCT0 RJ45_GND
TIP
LAN_RXD2LAN_RXD1LAN_RXD0 RDN
RDP
TDN
TDP
RDN
RINGTIP
RING
LAN1_XO
LAN1_XI
TDN
RDN
TDP
RDP
LAN_RXD0LAN_RXD1LAN_RXD2
LAN_RSTSYNC
LAN_TXD0LAN_TXD1LAN_TXD2
+3V_LAN
ACTLED#
ACTLED#LINK_LED100#
LINK_LED100#
LANJCLK LAN_JCLK
LAN_RXD2 <19>LAN_RXD1 <19>LAN_RXD0 <19>LAN_RSTSYNC <19>
LAN_TXD2 <19>LAN_TXD1 <19>LAN_TXD0 <19>
LAN_JCLK <19>
+3VALW
+3VALW
+3VS
+3VS
+3VLAN
+3VLAN
+3VS
+3VALW
+3VLAN
+3VLAN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
82562EZ LANCustom
23 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
close to U13
RJ11
RJ45close to U12chip(Intel rule)close to U12chip(Intel rule)
Don't Support wake on LAN R267 R268、Support wake on LAN R263,R269
8/18 for EMI
15 mil
12/28
02/07 Follow 82562GT design guide
R261110_0402_1%@
12
C27
7
33P_
0402
_50V
8J
1
2
R270 47_0402_5%12
R262110_0402_1%
12
C14
710.
1U_0
402_
16V4
Z 1
2
JP11
SUYIN_100073FR012S100ZLCONN@
PR1-2
PR1+1
PR2+3
PR3+4
PR3-5
PR2-6
PR4+7
PR4-8
Green LED+9
Green LED-10
Amber LED+11
Amber LED-12
SHLD1 13
SHLD2 14
SHLD4 16
SHLD3 15
R22070_0603_5%
1 2
C28
30.
1U_0
402_
16V4
Z
@
1
2
C14
720.
1U_0
402_
16V4
Z 1
2
JP13
ACES_85205-0200CONN@
12
C294470P_1808_3KV
1
2
R269300_0603_5%
@
1 2
C14
770.
1U_0
402_
16V4
Z 1
2
C279
22P_0402_50V8J
1 2
R263300_0603_5%
@
1 2
C27833P_0402_50V8J
1
2
C28
40.
1U_0
402_
16V4
Z 1
2
R26633_0402_5%
12
U13
NS0013_16P
RD+1 RD-2 CT3
CT6 TD+7 TD-8 TX- 9TX+ 10CT 11
CT 14RX- 15RX+ 16
R22540_0603_5%
12
C14
740.
1U_0
402_
16V4
Z 1
2 R22080_0603_5%
1 2
RJ11 CABLE@
R267300_0603_5%1 2
R26
4
33_0
402_
5%
12
R27375_0402_5%
12
C27
6
33P_
0402
_50V
8J
1
2
C14
7010
U_0
805_
6.3V
4Z
1
2 C14
730.
1U_0
402_
16V4
Z 1
2
C14
5968
0P_0
402_
50V7
K
12
R277 200_0402_5%1 2
Y325MHZ_20P_1BG25000CK1A
12
C281
68P_0402_50V8K
1 2
C293470P_1808_3KV
1
2
U12
82562GT_SSOP48
VCC1
VCCA2
RBIAS10 4
RBIAS100 5
VCCA27VCCT9
TDP 10TDN 11
VCCT12VCCT14
RDP 15RDN 16
VCCT17
VCCR19VCCR23
VCC25
TOUT 26
LILED# 27
SPDLED# 31ACTLED# 32
JRXD0 34JRXD1 35
VCCP36
JRXD2 37
JCLK 39
VCCP40
JRSTSYNC 42
JTXD0 43JTXD1 44JTXD2 45
X1 46
X2 47
ISOL_TI28ISOL_TCK30ISOL_EXEC29TESTEN21
ADV1041
VSS8VSS13VSS18VSS24VSS48VSSP33VSSP38VSSA3VSSA26VSSR20VSSR22
R274 649_0402_1%1 2
C14
760.
1U_0
402_
16V4
Z 1
2
C14
750.
1U_0
402_
16V4
Z 1
2
JP12
FOX_JM74613-P2002-7F~DCONN@
1122
GND13GND24
L20FBMA-L11-160808-601LMT 0603
@12
R275 619_0402_1%1 2
R26
5
33_0
402_
5%
1
2
R268300_0603_5%1 2
R27275_0402_5%
12
L11FBMA-L11-160808-601LMT 0603
12
R2710_0402_5%@
12
C282
1000P_1206_2KV7K
12
C14
58
680P
_040
2_50
V7K
12
C280
22P_0402_50V8J
1 2
C14
7810
U_0
805_
6.3V
4Z
1
2
C275
68P_0402_50V8K
12
R260110_0402_1%
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
S1_A23PCI_AD31
PCI_AD29PCI_AD30
PCI_AD5
PCI_AD0
PCI_AD17
PCI_AD21
PCI_AD18
PCI_AD28
PCI_AD7
PCI_AD19
PCI_AD8PCI_AD9
PCI_AD25
PCI_AD27
PCI_AD3PCI_AD2
PCI_AD22
PCI_AD26
PCI_AD24
PCI_AD12
PCI_AD14PCI_AD13
PCI_AD23
PCI_AD20
PCI_AD16
PCI_AD10PCI_AD11
PCI_AD6
PCI_AD15
PCI_AD1
PCI_AD4
VCCD1#
VPPD1
VCCD0#
VPPD0
PCI_AD[0..31]
S1_D8
PCI_AD22
S1_D3S1_D4S1_D11
S1_D12S1_D5
S1_D6S1_D13
S1_A11
S1_A10S1_CE2#
S1_D7
S1_IORD#
S1_D15
S1_A6
S1_IOWR#S1_A17
S1_A9
S1_A24S1_A7S1_A25
S1_A3S1_A2
S1_A4S1_A5
S1_A0S1_D0
S1_A1
S1_D9S1_D1
S1_OE#
VCCD1#VCCD0#VPPD1VPPD0
S1_WP
S1_REG#
S1_A8S1_CE1#
S1_A12
S1_RST
S1_A15S1_A22
S1_A23
S1_A21
S1_A14S1_WAIT#
S1_A20
S1_A16
S1_INPACK#S1_WE#
S1_A13
S1_BVD1S1_WP
S1_RDY#
S1_A19
S1_CD2#
S1_BVD2
S1_VS2S1_CD1#
S1_VS1
CLK_33M_CBS
S1_D2S1_A18S1_D14
CLK_33M_CBS
S1_D10
PCI_CBE1#
PCI_CBE3#PCI_CBE2#
PCI_CBE0#
S1_D14
S1_D5
S1_A6
S1_A12
S1_A3S1_WAIT#
S1_BVD1
S1_WE#
S1_BVD2
S1_A13
S1_VS2
S1_D0
S1_A4
S1_D4
S1_A1
S1_A8
S1_INPACK#
S1_D15
S1_A19
S1_A24
S1_D6
S1_VS1
S1_A9
S1_A15
S1_CE2#
S1_D3
S1_A16
S1_A20
S1_IORD#
S1_A21
S1_A10
S1_A23
S1_A25
S1_A17
S1_D9
S1_A7
S1_OE#
S1_A18
S1_CE1#
S1_CD2#
S1_D13
S1_CD1#
S1_IOWR#S1_A11
S1_A5
S1_D11
S1_RST
S1_D7
S1_D1S1_D2
S1_A2
S1_RDY#
S1_D10
S1_A22
S1_D12
S1_WP
S1_REG#
S1_A14
S1_A0S1_D8
PLT_RST#
PM_RSMRST#
CLK_33M_CBS<15>
PM_CLKRUN#<20,30>
SIRQ<20,30>
PCI_GNT2#<18>
CBS_SPK# <26>
PCI_AD[0..31]<18>
PCI_TRDY#<18>PCI_DEVSEL#<18>
PCI_PAR<18>
PCI_STOP#<18>
PCI_FRAME#<18>PCI_IRDY#<18>
PCI_PIRQC#<18>
PCI_SERR#<18,30>
PCI_RST#<18>
PCI_PERR#<18>
PCI_REQ2#<18>
PCI_CBE#1<18>
PCI_CBE#3<18>PCI_CBE#2<18>
PCI_CBE#0<18>
PLT_RST#<7,18,20,22,25,30,31>
PM_RSMRST#<20,30>
S1_VCC
S1_VPP+5V_CB
S1_VCC
S1_VPP
+3V_CB
+3V_CB
S1_VCC
S1_VCC
+3V_CB
S1_VCC
+3V_CB
S1_VCCS1_VPP
S1_VCCS1_VPP
+5VALW +5VALW +5VALW +5VALW +5VALW +5VALW
+3V_CB
+5VS
+5V_CB
+3VS
+3VALW
+5VALW
Title
Size Document Number Rev
Date: Sheet o f
0.5
CardBus CTRL CB714
24 47Tuesday, March 20, 2007
Compal Electronics, Inc.
LA-3491PDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
AND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
Change to DAU00 PCI Devices ID
Cardbus ---->AD22
6/02
6/02
12/05 Follow IAT00 EMI Request
Don't Support wake on LAN L12, L13Support wake on LAN L?, L?
12/27
C2994.7U_1206_25VFZ
1
2
C30
268
0P_0
402_
50V7
K1
2
C310
1000P_0402_50V7K
1
2
JP14
FOX_WZ21131-G2-P4_LTCONN@
GND1S1_D32S1_D43S1_D54S1_D65S1_D76S1_CE1#7S1_A108S1_OE#9S1_A1110S1_A911S1_A812S1_A1313S1_A1414S1_WE#15S1_RDY#16S1_VCC17S1_VPP18S1_A1619S1_A1520S1_A1221S1_A722S1_A623S1_A524S1_A425S1_A326S1_A227S1_A128S1_A029S1_D030S1_D131S1_D232S1_WP33GND34GND69GND71GND73GND75GND77GND79GND81GND83
GND 35S1_CD1# 36
S1_D11 37S1_D12 38S1_D13 39S1_D14 40S1_D15 41
S1_CE2# 42S1_VS1 43
S1_IORD# 44S1_IOWR# 45
S1_A17 46S1_A18 47S1_A19 48S1_A20 49S1_A21 50
S1_VCC 51S1_VPP 52S1_A22 53S1_A23 54S1_A24 55S1_A25 56S1_VS2 57S1_RST 58
S1_WAIT# 59S1_INPACK# 60
S1_REG# 61S1_BVD2 62S1_BVD1 63
S1_D8 64S1_D9 65
S1_D10 66S1_CD2# 67
GND 68GND 70GND 72GND 74GND 76GND 78GND 80GND 82GND 84
C297
0.1U_0402_16V7K1
2
C3111000P_0402_50V7K
1
2
R280 22K_04021 2
C306
680P_0402_50V7K
1 2
C14
680.
047U
_040
2_16
V4Z
1
2
C14
650.
01U
_040
2_16
V7K
C3050.1U_0402_16V7K
1
2
C3010.1U_0402_16V7K
1
2
C2980.1U_0402_16V7K
1
2
R282 33_0402_5%1 2
U14
CP-2211_SSOP16
VCCD0 1VCCD1 2
3.3V33.3V4
5V55V6
GN
D7
OC 8
12V9
VPP 10
VCC 11VCC 12VCC 13
VPPD1 14VPPD0 15
SHD
N16
PQFP 14422.2 X 22.2 X 1.60
U15
CB1410_LQFP144
REQ#1GNT#2
AD313AD304AD295
GN
D1
6
AD287AD278AD269AD2510AD2411
C/BE3#12
IDSEL13
VCC
714
AD2315AD2216AD2117
VCC
P118
AD2019
RST#20
PCLK21
GN
D2
22
AD1923AD1824AD1725AD1626
C/BE2#27
FRAME#28IRDY#29
VCC
630
TRDY#31DEVSEL#32STOP#33PERR#34SERR#35PAR36
C/BE1#37
AD1538AD1439AD1340AD1241
GN
D3
42
AD1143
VCC
P044
AD1045AD946AD847
C/BE0#48
AD749
VCC
550
AD651AD552AD453AD354AD255AD156AD057
GN
D4
58
RI_OUT#/PME#59
MFUNC060MFUNC161
SPKOUT 62
VCC
I63
MFUNC264MFUNC365
VCC/GRST#66
MFUNC467MFUNC568MFUNC669
SUSPEND#70
VPPD
071
VPPD
172
VC
CD
0#73
VC
CD
1#74
CCD1#/CD1# 75
CAD0/D3 76
CAD2/D11 77
GN
D5
78
CAD1/D4 79
CAD4/D12 80CAD3/D5 81
CAD6/D13 82CAD5/D6 83
RS
VD
/D14
84
CAD7/D7 85
VCC
486
CAD8/D15 87
CC/BE0#/CE1# 88
CAD9/A10 89
VCC
SK1
90
CAD10/CE2# 91CAD11/OE# 92
CAD13/IORD# 93
GN
D6
94
CAD12/A11 95
CAD15/IOWR# 96CAD14/A9 97
CAD16/A17 98
CC/BE1#/A8 99
RSV
D/A
1810
0
CPAR/A13 101
VCC
310
2
CBLOCK#/A19 103
CPERR#/A14 104CSTOP#/A20 105
CGNT#/WE# 106
CDEVSEL#/A21 107
CCLK/A16 108
CTRDY#/A22 109CIRDY#/A15 110CFRAME#/A23 111
CC/BE2#/A12 112
CAD17/A24 113
GN
D7
114
CAD18/A7 115CAD19/A25 116
CVS2/VS2# 117
CAD20/A6 118
CRST#/RESET 119
CAD21/A5 120CAD22/A4 121
VCC
212
2
CREQ#/INPACK# 123
CAD23/A3 124
CC/BE3#/REG# 125VC
CSK
012
6
CAD24/A2 127CAD25/A1 128CAD26/A0 129
GN
D8
130
CVS1/VS1# 131
CINT#/READY 132
CSERR#/WAIT# 133
CAUDIO/BVD2 134
CSTSCHG/BVD1 135CCLKRUN#/WP 136
CCD2#/CD2# 137
VCC
113
8
CAD27/D0 139CAD28/D8 140CAD29/D1 141CAD30/D9 142
RSV
D/D
214
3
CAD31/D10 144
R284 100_0402_5%1 2
C3080.1U_0402_16V7K
1
2
C2954.7U_0805_10V4Z
1
2
R2250 0_0402_5%@1 2
C3000.1U_0402_16V4Z
1
2
L21
0_0805_5%
@1 2
R28147K_0402_5%
12
C14
660.
01U
_040
2_16
V7K
L22
0_0805_5%
@1 2
C14
640.
01U
_040
2_16
V7K
C14
670.
047U
_040
2_16
V4Z
1
2
C30710U_1206_16V4Z
1
2
C14
630.
01U
_040
2_16
V7K
C304
0.1U_0402_16V7K
1
2
R287 0_0402_5%1 2
R279 22K_04021 2
C30
34.
7U_0
805_
10V4
Z
1
2
R283 43K_0402_5%
C309
15P_0402_50V8J
@1
2
R27810K_0603_1%
12
C2960.1U_0402_16V7K
1
2
L13
0_0805_5%
1 2
R28510_0402_5%@
12
L12
0_0805_5%
1 2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_TXN2
XMIT_OFF#
CLK_PCIE_MCARD
PCIE_TXP2
CLK_PCIE_MCARD#
ICH_PCIE_WAKE#
CLKREQD#_MC
PCIE_C_RXP2PCIE_C_RXN2PCIE_RXN2
PCIE_RXP2
LPC_AD0
LPC_AD3LPC_AD2
PLT_RST#
LPC_AD1CLK_PCIE_MCARD<15>CLK_PCIE_MCARD#<15>
PLT_RST# <7,18,20,22,24,30,31>
ICH_SMBCLK <4,13,14,15,20>ICH_SMBDATA <4,13,14,15,20>PCIE_TXN2<20>
PCIE_TXP2<20>
WL_LED# <31,32>
CLKREQD#<15>
PCIE_RXP2<20>PCIE_RXN2<20>
LPC_AD[0..3] <19,30,31>
LPC_FRAME# <19,30,31>
CLK_DEBUG_PORT<15>
ICH_PCIE_WAKE#<20>
XMIT_OFF# <20,31>
STB_LED#<30,31,32>NUM_LED#<30,31>CAPS_LED#<30,31>
WL_LED_EC# <30>
+3VS +1.5VS
+1.5VS +3V_MINI
+3VALW
+3VALW
+3VS
+3VL
+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
Mini-Card
25 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Mini-Express Card---WLAN
Mini Card STANDOFF
12/25
12/26
12/26
02/26 Add R2270 for WL_LED_EC# PU
02/26 Add R2271 for use EC detect WLAN active
R299 0_0402_5%DEBUG@1 2
R293
0_0402_5%DEBUG@
1 2
C317
0.1U_0402_16V4ZWLAN@
1
2
R300 0_0402_5%DEBUG@1 2
H28HOLEA
1
R290
0_0402_5%DEBUG@
1 2R289
0_0402_5%DEBUG@
1 2
R2271 0_0402_5%WLAN@
1 2
C316
4.7U_0805_10V4ZWLAN@
1
2
R2880_0402_5%
WLAN@ 1 2
C313
4.7U_0805_10V4ZWLAN@
1
2
R2263 0_0402_5%@ 1 2
R302 0_0402_5%DEBUG@1 2
R294 0_0402_5%DEBUG@1 2
JP15
MOLEX 67910-0002 52P CONN@
11 2 233 4 455 6 677 8 899 10 101111 12 121313 14 141515 16 161717 18 181919 20 202121 22 222323 24 242525 26 262727 28 282929 30 303131 32 323333 34 343535 36 363737 38 383939 40 404141 42 424343 44 444545 46 464747 48 484949 50 505151 52 52
GND153 GND2 54
L14
FBMA-L11-201209-102LMA10TWLAN@
1 2
R297 0_0402_5%WLAN@
1 2
C315
0.1U_0402_16V4ZWLAN@
1
2
R301 0_0402_5%DEBUG@1 2
C312
0.1U_0402_16V4ZWLAN@
1
2
H27HOLEA
1
C314
0.01U_0402_16V7KWLAN@
1
2
R295 0_0402_5%WLAN@1 2
R291
0_0402_5%DEBUG@
1 2R292
0_0402_5%DEBUG@
1 2
R2270
10K_0402_5%WLAN@12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
ACZ_BITCLKEAPD#
RCOSC
VREF_LOVC_REFA
SENSE
VREF_HI
LINEOUT_LLINEOUT_R
PORT_A_RPORT_A_L
DIBP_C
DIBN_C
MONO_INR
MONO_IN MONO_IN1 MONO_INR
MIC_INLMIC_INR
HP_SENSE <28>
LINE_OUTL <28>
DIB_N<27>
LINE_OUTR <28>
DIB_P<27>HP_L <28>
EAPD#<28,30>
HP_R <28>
ACZ_SYNC<19>ACZ_SDIN0<19>
ACZ_BITCLK<19>
ACZ_SDOUT<19>
ACZ_RST#<19>
MIC_SENSE <28>
GNDA <28>
CBS_SPK#<24>
SB_SPKR<20>
MIC_L <28>MIC_R <28>
+3VS +VDDA_CODEC
DVDD_20549
AVDD_20549
AVDD_20549
DVDD_20549
+5VS +VDDA_CODEC
+VDDA_CODEC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
CODEC CX20468-31
Custom
26 47Tuesday, March 20, 2007
2006/10/26 2006/07/26
08/ 10
08/ 10
08/ 1008/ 10
AUDIO CODEC
For Vista
In order for the modem wake on ring feature to function,the CODEC must be powered by a rail that is notremoved when the system is in standby.
DIGITAL ANALOG
GNDAGND
CODEC POWER
11/30 Change to +5VS
2/09 Fine tune PC Beep,Delete R310
03/10 Delete CBS de-pop circuit
03/20 Add CBS de-pop circuit,Change Q43 from FET to BJT
R317
560_0402_5%
1 2
R322 5.11K_0402_5%12
U16
APE8805A-33Y5P_SOT23-5
VIN1
GND2
SHDN#3 BP 4
OUT 5
R332 0_1206_5%@1 2
C
BE
Q43
2SC2411K_SOT23
1
2
3
R327 237K_0402_1%12
R32010K_0402_5%@
12
R314 2.2K_0402_5%1 2
R311
560_0402_5%
1 2
R330 0_0402_5%@1 2
C326
1U_0603_10V4Z
12
R325
100_0402_5%@
12
R331 0_1206_5%1 2
C332
100P_0402_25V8K@
1
2
C1479
0.1U
_040
2_16
V4Z 1
2
C335
1U_0402_6.3V6K
1
2
L16
0_0603_5%
1 2
R324 0_0402_5%@1 2
R316 33_0402_5%
R321 5.11K_0402_5%12
C319
0.1U_0402_16V4Z
1
2
R307
10K_0402_1%
12
C323
0.1U_0402_16V4Z
1
2
C331
1U_0603_10V4Z
12
C327
1U_0603_10V4Z
12
D15
RB751V_SOD323
21
R326 0_0402_5%1 2
R310
10K_0402_5%
@1 2
C333
1U_0402_6.3V6K
1 2
C3251U_0402_6.3V6K
1
2
C329 10U_0805_10V4Z
1 2
C324
0.1U_0402_16V4Z
1
2
R315 2.2K_0402_5%1 2
R318 0_0402_5%12
R333 0_1206_5%1 2
C318 0.1U_0402_16V4Z
1 2
R329 0_0402_5%@1 2
R308
10K_0402_1%
12
R328 0_0402_5%@1 2
C
BE
Q15
2SC2411K_SOT23
1
2
3
C322
1U_0402_6.3V6K
1
2L150_0603_5%
1 2
L17 0_0603_5%
1 2
C32
80.
1U_0
402_
16V4
Z@
1
2
C330 10U_0805_10V4Z
1 2
R309 20K_0402_5%1 2
C321
1U_0603_10V4Z
12
R334 0_1206_5%@1 2
C3200.1U_0402_16V4Z
1
2
R323 20K_0402_5%1 2
R2256
1K_0402_5%
12
R319 0_0402_5%12
CX20549-12Z_LQFP48_9X9
U17
VDD
IO3
SDO4
BIT_CLK5
DVS
S6
SDI7
DVD
D8
SYNC9
RESET#10
SENSE 13
PORT-B_BIAS_L 14PORT-B_BIAS_R 15
AVD
D_2
020
MIC_L 21MIC_R 22
PORT-B_L 23PORT-B_R 24
AVSS
_25
25
VREF_HI 26VREF_LO 27VC_REFA 28
PORT-A_BIAS_L 33PORT-A_BIAS_R 34
LINEOUT_L 35LINEOUT_R 36
NC_11
AVD
DH
P37
PORT-A_L 38PORT-A_R 39
AVSS
HP
40
VSSI
O_4
646
EAPD47
SPDIF48
NC_22
AVD
D_3
131
PCBEEP11
AVSS
_12
12
NC_1616
MIC_BIAS_L 29MIC_BIAS_R 30
AVSS
_32
32
CD_L 17CD_GND 18
CD_R 19
RCOSC41
VSSI
O_4
242
DIBP44
DIBN43
DVD
DM
45
C334
100P_0402_25V8K@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BRIDGE_CC
DVdd
RX1_1
RING_1
QBASEEIF
TXO
DIBP
DIBN
TAC1_TIP TIP_1
PWR+
DIBN_HSDIBP_HS
RXI
VC
_LS
D
RAC1
TAC1
BRIDGE_CC2
RAC1_RING
TXF
EIC
DIB_N<26>DIB_P<26>
GND
AGND_LSD
AGND_LSD
AVdd
GND
GND
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
AGND_LSD
GND
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
AMOM-CX20548
27 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
DescriptionInitial Release April 26, 2005
DateREV
Revision History
0
R810 and C810 must be placed near pin 6 (RXI) and there should be no vias on the(RXI)net.
2
470 pF470 pF
3
Note: MC8 and MC9 can be optionallypopulated here or behind the RJ-11connector.
Changed MC8 and MC9 pads. No schematic changes. PCB updated to -005.
Added MR11 and MR12. PCB updated to -007.
November 3, 2005
November 18, 2005
Omit
Optional
CX20548
4.01
4
AVL update only.
January 3, 2006
April 20, 2006
1
Added MR13. PCB updated to -009.
August 18, 2005No changes to schematic. PCB updated to -003. Updated footprints and corrected via spacing errors.
MJ2 CONN@
12
MQ3MMBTA42
MC9 @MC8 @
MC10 0.01uF
cap_0603_001uf
ML1@
1
4
2
3
MC30.1uFcap_0402_01uf
MR113.01res_0402_301
MC7
@M
RV
1
MQ4MMBTA42
MC13
150pFCAP_0402_150PF
MBR1MMBD3004S
MU1
GPIO 13
TEST12
EIC 11
VC
3
RAC 4
TAC 5
RXI 6
TXF 7
TXO 8
EIO 10
EIF 9
AVDD2
DIBP14
PWR15
DIBN16
DVDD1
EP
17
MR5280RES_1206_280
MC647pFCAP_0402_47PF
MQ1MMBTA42
MR3 6.81M
MC50.1uFcap_0402_01uf
MR2
237K
MR41105%
MBR2MMBD3004S MJ1
@12
MC11 0.1uFcap_0402_01uf
MR8565%RES_0603_56
@
MC1 0.047uF100.0VMC12
150pFCAP_0402_150PF
MC20.1uFcap_0402_01uf
MJ3@12
MQ2MMBTA42
MR13 100
RES_0402_100
MR79.1res_1206_91
<BOM Structure>
MFB2
5335R13-005
MR1 6.81M
res_0805_681m
MR6280RES_1206_280
MJ4
@
12
MT1
MODEM-SMAR1
2 3
4
MJ5
@
12
MR123.01res_0402_301
MR9280RES_1206_280
MR10280RES_1206_280
MC40.1uFcap_0402_01uf
MFB1
5335R13-005
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
HP_R
HP_SENSE
INTSPK_CL+
INTSPK_CR+
PR
PL
SPKR+
SPKR+
SPKR-
SPKR-
MIC_L
MIC_R
MIC_SENSE
HP_L
LINE_C_OUTR
A_SDA_SD
A_SD
HP_SENSE<26>
HP_R<26>
HP_L<26>
LINE_OUTL<26>
MIC_R<26>
MIC_L<26>
MIC_SENSE<26>
EAPD#<26,30>
A_SD#<30>
LINE_OUTR<26>
+5VS+5VAMP
+5VS
+3VALW
+3VALW
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
AMP and Audio Jack
Custom
28 47Tuesday, March 20, 2007
2006/10/26 2006/07/26
08/ 09
HP OUT
MIC IN08/ 10
08/ 09
Keep 10 mil width
10 dB
09/03
02/07 Change to 1K Ohm
02/07 Change to 60 Ohm 0603
02/14 Change to AGND
02/14 Change to AGND
02/26 add HP de-pop circuit
U18
TPA6017A2_TSSOP20
GN
D4
1G
ND
311
GN
D2
13G
ND
120
VD
D16
PV
DD
115
RIN-17
BYPASS 10
NC 12
LOUT- 8
LOUT+ 4
ROUT- 14
ROUT+ 18
RIN+7
LIN-5
LIN+9
GAIN0 2
GAIN1 3
PV
DD
26
SHUTDOWN19TH
ER
MA
L P
AD
21
D17SM05_SOT23@
231
R343
60_0603_1%
1 2 R344
0_0402_5%
1 2
L18FBM-11-160808-601-T_0603
1 2
JP16
ACES_85205-0200CONN@
12
C14840.1U_0402_16V4Z
@1
2
C337
0.1U_0402_16V4Z
1
2
JP17
FOX_JA6333L-B3S0-7F~NCONN@
12
3
4
5
6 78910
C3471U_0603_10V4Z
1
2
G
D
S
Q16
2N7002LT1G_SOT23@
2
13
L19FBM-11-160808-601-T_0603
1 2
G
D
S
Q44
2N7002_SOT23
2
13
C33
947
P_0
402_
50V
8J
@
1
2
+
C349
100U_6.3V_M
1 2
R339100K_0402_5%
12
JP18
FOX_JA6333L-B3S0-7F~NCONN@
12
3
4
5
6 78910
C344 0.47U_0603_16V7K 1 2
C345 0.47U_0603_16V7K 1 2
R2255 0_0402_5%12
R337100K_0402_5%@
12
G
D
S
Q45
2N7002_SOT23
2
13
R3350_1206_5%
1 2
R22641K_0402_5%
12
C35147P_0402_50V8J
C341 0.47U_0603_16V7K 1 2
C34647P_0402_50V8J1
2
+
C350
100U_6.3V_M
1 2
D18SM05_SOT23@
231
R346
1K_0402_5%
12
D16
SM05_SOT23@
231
R336100K_0402_5%
12
C352
47P_0402_50V8J
C33610U_0805_10V4Z
1
2
R22651K_0402_5%
12
R2198 0_0402_5%@12
U33
NC7SZ04P5X_SC70-5A2 Y 4
G3
P5
R340 10K_0402_5%@1 2
R3420_0402_5%
1 2
R345
1K_0402_5%
12
C338
0.1U_0402_16V4Z
1
2
R341
60_0603_1%
1 2
R338100K_0402_5%
@
12
D35
CH751H-40_SC76
@2 1
C3420.47U_0603_16V7K
1 2
R22690_0402_5%
12
C34
847
P_0
402_
50V
8J
1
2
C34
047
P_0
402_
50V
8J
@
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
USB20_P1<20>USB20_N1<20>
USB20_N0<20>USB20_P0<20>
SLP_S5<33,38> USB_OC# <20>
+USB_VCCA
+USB_VCCA
+5VALW
+USB_VCCA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
USB Connector
29 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
14" USB Port
For ESD
U19
G528_SO8
GND1IN2
FLG 5OUT 6
OUT 8
IN3EN#4
OUT 7
+
C35
810
0U_6
.3V_
M
1
2
C36510P_0402_50V8J@
1
2
D21PSOT24C_SOT23@
231
C36610P_0402_50V8J@
1
2
C35710P_0402_50V8J@
1
2
C35610P_0402_50V8J@
1
2
JP21
SUYIN_020173MR004G552ZRCONN@
VCC1D-2D+3GND4
GND15GND26
C354
0.1U_0402_16V4Z
1
2
C360
1000P_0402_50V7K
1
2
JP20
SUYIN_020173MR004G552ZRCONN@
VCC1D-2D+3GND4
GND15GND26
+
C35
310
0U_6
.3V_
M
@
1
2
D19PSOT24C_SOT23@
231
C355
1000P_0402_50V7K
1
2
C368 0.1U_0402_16V4Z
12
C359
0.1U_0402_16V4Z
1
2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
EA#
LPCPD#
FWP#
LPCPD#
MODE
TP_CLK
TP_DATA
PS2_CLKKBD_DATAKBD_CLK
PS2_DATA
FWP#
PGM
PGM
FWP# PM_POK
TEST
KSI6
KSI4KSI5
KSI7
SMB_EC_CK1SMB_EC_DA1
VCC1_PWRGD
CAPS_LED#
CLK_14M_KBC
EC_GPIO13
RUNSCI_EC#
KSI3KSI2
KSI0
KSO14
KBD_CLKKBD_DATA
RUNSCI_EC#
SIRQPM_CLKRUN#
PS2_DATA
TP_CLK
FWP#
TEST
LPC_AD0
LPC_AD3
CLK_PCI_EC
CLK_PCI_EC
MODE
EC_GPIO13
PLT_RST#LPC_FRAME#
LPC_AD2
PS2_CLK
32K_CLK
C RY2
LPC_AD1
KBC_PWR_ON
TP_DATA
C RY1
KSO13
KSO14
KSO12
KSO10KSO15
KSO6KSO3
KSO11
KSI0
KSO7
KSO2
KSO5
KSO4
KSO8
KSI3
KSO1
KSI6
KSI2
KSI1
KSI4
KSO0
KSO9
KSI7
KSI5
KSO8
KSO4
KSO6
KSI6
KSI3
KSO12
KSO5
KSI5
KSO9
KSI4
KSO7
KSI7
KSO10
KSI2
KSO11
KSI1
KSI1
KSO13
KSO2
KSI2
KSO4
KSO8
KSO15KSO10
KSI5
KSO3
KSO11
KSO5
KSO0
KSI4
KSO1
KSO7
KSI0
KSO14
KSI7
KSI3
KSO6
KSO12
KSI6
KSI1
KSO9
KSI0
KSO13
ADP_EN
CAPS_LED#
EC_GPIO8
PCI_SERR#
CLK_14M_KBC
SLP_S3#
VCC1_PWRGD
ON/OFFBTN_KBC#
STB_LED#
PM_RSMRST#
EA#
PGM
NUM_LED#
PWR_GD
AMBER_BATLED#
KSO15
BATCON
A20M
PM_POK
SMB_EC_CK1
EC_GPIO9
THM_MAIN#
32K_CLK
SMB_EC_DA1
LOW_BAT#
AB1B_DATAAB1B_CLK
AB1B_DATAAB1B_CLK
CHGCTRLFAN_PWMINV_PWM
GREEN_BATLED#
EC_GPIO9EC_GPIO8
VCC1_PWRGD
KBRST#LAN_RST#
LID_SW#
STB_LED#NUM_LED#
KSO6
KSO13
KSO3KSO12
KSO0
KSO3
KSO1KSO2
KSO5KSO0
KSO1
KSO9
KSO2KSO4KSO7KSO8
KSO14KSO11KSO10KSO15
EC_WL_LED#
EC_GPIO8
32K_CLK
EC_GPIO19
EC_GPIO19
EC_GPIO9
SIRQ<20,24>
LPC_AD3<19,25,31>
LPC_AD0<19,25,31>
LPC_AD2<19,25,31>LPC_AD1<19,25,31>
LPC_PD#<20>
LPC_FRAME#<19,25,31>
PM_CLKRUN#<20,24>
CLK_PCI_EC<15>
TP_CLK<32>TP_DATA<32>
KB_RST# <19>
PLT_RST#<7,18,20,22,24,25,31>
GATEA20 <19>
RUNSCI_EC#<20>
KBC_PWR_ON <37>
ADP_PRES <36,37,42>
EAPD# <26,28>
A_SD# <28>
VCC1_PWRGD <31,34>
PCI_SERR# <18,24>
STB_LED# <25,31,32>
SMB_EC_DA1 <41>
NUM_LED# <25,31>
PM_RSMRST# <20,24>
PM_POK <7,20>PWR_GD <33,34,40,42>
SLP_S3# <20,33,39>
LOW_BAT# <20>
CAPS_LED# <25,31>
BATCON <36>
AMBER_BATLED# <31>
ON/OFFBTN_KBC# <32>
SMB_EC_CK1 <41>
THM_MAIN# <41>
CLK_14M_KBC <15>
CHGCTRL <36>FAN_PWM <4>INV_PWM <17>
GREEN_BATLED# <31>
LID_SW# <17,32>
DISPLAYOFF# <17>
4C#_6C8C <42>LID_OUT# <20>
WL_BTN# <31,32>
LAN_RST# <20>
ENABLT <9,17>
OCP# <4,20,42>
EC_WL_LED# <31>
WL_LED_EC# <25>
+3VS
+5VS
+3VL
+3VS
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VL
+3VS
+3VL
+3VL
+3VL
+RTCVCC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
LPC47N1021
30 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
AGND FILTER
1. For normal operation:Un-install R377,R379
2. For KBC internal ROM flash:Install R377,R379
Pin3 250 : KSO12/OUT8/KBRST
Pin34 250 -- LPCPD#
Pin49 250 -- Reset Out
Pin52 250 -- XOSEL
Pin56 250 -- PGMPin58 250 -- 32KHz_OUT
Pin82 250 -- nFWP
Pin91 250 -- nDMS_LED
For KBC debugging used.
Pin57 250 -- MODEPin1 250 -- TEST Pin ( NC !! )
Pin83 250 -- nEA ( pull up !! )
R62 250@
Note: R94 must be removed whenR1354 stuff and R87 remove.
EMI Add
R129R128
R62R78R131
1021@R127250@
R977
INT_KBD CONN.
INT_KBD CONN.
Place under KB areaBIOS debug port
02/07 Delete KSI PU,1070 had internal PU
02/07 Reserve VCC0 to +3VL, Add R2267 to GND
02/07 Delete THM_MAIN# double PU
2/08 Delete NUM_LED# Double PU
02/14 Reserve R2268 for OCP#
02/27 Add PD resister
02/26 Reserve KSO PU resistor
03/10 Add Keyboard scan input PU resistor
03/10 BOM deleteR2273 R2274(SM、 SCleakage issue)
03/19 Reserve VCC0 to +RTCVCC
JP22
ACES_85201-0602CONN@
123456
C373
4.7U_0805_10V4Z
1
2
C369
0.1U_0402_16V4Z
1
2RP30
10K_1206_8P4R_5%
1 82 73 64 5
R222010K_0402_5%
12
CP5
100P_1206_8P4C_50V8@
234 5
6781
R2245 10_0402_5%1 2
R361
10K_0402_5%
1 2
C371
0.1U_0402_16V4Z
1
2
R22754.7K_0402_5%@
12
R364 0_0402_5%1 2
C374
0.1U_0402_16V4Z
1
2
R22744.7K_0402_5%@
12
R366 300_0402_5%1 2
R22660_0402_5%@
12
R381
1K_0402_5%@12
D24
CH751H-40_SC7621
R365
10_0402_5%
@1 2
R363
10_0402_5%@
12
R376 100K_0402_5%1 2C38018P_0402_50V8J 1
2
RP37
10K_1206_8P4R_5%@
1 82 73 64 5
R360
10K_0402_5%
1 2
R2253
10K_0402_5%1 2
R374 100K_0402_5%1 2
R377
1K_0402_5%@
1 2
R380
1K_0402_5%@12
CP4
100P_1206_8P4C_50V8@
234 5
6781
R367 0_0402_5%@1 2
RP29
10K_1206_8P4R_5%
1 82 73 64 5
CP6
100P_1206_8P4C_50V8@
234 5
6781
C372
0.1U_0402_16V4Z
1
2
CP1
100P_1206_8P4C_50V8@
234 5
6781
R22734.7K_0402_5%@
12
R22764.7K_0402_5%@
12
R372
10K_0402_5%@
1 2
C377
4.7U_0805_10V4Z
1
2
C38118P_0402_50V8J1
2
RP35
10K_1206_8P4R_5%@
1 82 73 64 5
CP3
100P_1206_8P4C_50V8@
234 5
6781
C378
10P_0402_25V8K
@1 2
R2240 0_0402_5% 1 2
JP24
ACES_85201-2405CONN@
123456789101112131415161718192021222324
R3702M_0402_5%@
1 2
C370
0.1U_0402_16V4Z
1
2
R35910K_0402_5%
12
C382
1U_0603_10V4Z
@
1
2
RP36
10K_1206_8P4R_5%@
1 82 73 64 5
D22
CH751H-40_SC76
21
R382
1K_0402_5%12
RP32
4.7K_1206_8P4R_5%
1 82 73 64 5
R22670_0402_5%
12
RP31
10K_1206_8P4R_5%
1 82 73 64 5
R353
10K_0402_5%
12
R2239 0_0402_5% 1 2
D23
CH751H-40_SC76
2 1
JP23
ACES_85201-0602CONN@
123456
R2268 0_0402_5%1 2
R355
10K_0402_5%
1 2
General Purpose I/O InterfaceK
eyboard/Mouse Interface
LPCBus
Power Mgmt/SIRQ
Miscellaneous
Access Bus Interface
SMSC_1070_TQFP-128P
KBC1070_VTQFP128
U20
AGN
D72
KSO021KSO120KSO219KSO318KSO417KSO516KSO613KSO712KSO810KSO99KSO108KSO117KSO12/GPIO00/KBRST6KSO13/GPIO185
KSI029KSI128KSI227KSI326KSI425KSI524KSI623KSI722
IMCLK35IMDAT36KCLK38KDAT40EMCLK41EMDAT42
CLKRUN#55SER_IRQ57PCI_CLK54EC_SCI#76
LAD[3]51LAD[2]50LAD[1]48LAD[0]46
LFRAME#52LRESET#53LPCPD#/GPIO2345
XTAL170XTAL271
VCC
114
TEST PIN 69
VSS
11VS
S37
VSS
47VS
S56
VSS
104
VSS
82VS
S11
7
VCC
139
VCC
158
VCC
184
VCC
110
6
VCC
111
9
VCC
249
OUT0 124OUT1/IRQ8# 125
OUT7/SMI# 123OUT8/KBRST 122OUT9/PWM2 121
OUT10/PWM0 120OUT11/PWM1 118
GPIO02 79GPIO03 80
GPIO04/KSO14 81GPIO05/KSO15 83
GPIO07/PWM3 85GPIO08/RXD 86GPIO09/TXD 87
GPIO11/AB2A_DATA 88GPIO12/AB2A_CLK 89
GPIO13/AB2B_DATA 90GPIO14/AB2B_CLK 91
GPIO15/FAN_TACH1 92GPIO16/FAN_TACH2 101
GPIO17/A20M 102
GPIO20/PS2CLK 103GPIO21/PS2DAT 105
AB1A_DATA 111AB1A_CLK 112
AB1B_DATA 109AB1B_CLK 110
PGM Strap/GPIO25 73
GPIO01 107
EA Strap#/GPIO26/KSO17 108CLOCKI 59
32KHZ_OUT/GPIO22 75RESET_OUT#/GPIO06 60
PWRGD 78VCC1_PWRGD 77
24MHZ_OUT/GPIO19/WINDMON 61
GPIO24/KSO16 4GPIO27 74
DMS_LED#/GPIO10 116BAT_LED# 113
PWR_LED#/8051TX 115FDD_LED#/8051RX 114
NC
1N
C2
NC
3N
C30
NC
31N
C32
NC
33N
C34
NC
43N
C44
NC
62N
C63
NC
64N
C65
NC
66N
C67
NC
94N
C95
NC
96N
C97
NC
127
NC
128
CAP
15
GPI
O28
93G
PIO
2998
GPI
O30
99G
PIO
3110
0G
PIO
3212
6
VCC068
R379
1K_0402_5%
1 2
C146010U_0805_10V4Z
1
2
R371
120K_0402_5%
12
R2246 0_0402_5%1 2
R2238 0_0402_5% WLAN@1 2
C375
0.1U_0402_16V4Z
1
2C14460.1U_0402_16V4Z
1
2
Y4
32.768KHZ_12.5P_Q13MC30610018
OU
T4
IN1
NC
3
NC
2
R375
1K_0402_5%@
1 2
C379
10P_0402_25V8K@1
2
R378 0_0402_5%@
1 2
R357100K_0402_5%1 2
J4
NO SHORT PADS
1 2
R354
10K_0402_5%
1 2
R362 0_0402_5%1 2
R22770_0402_5%@
12
RP38
10K_1206_8P4R_5%@
1 82 73 64 5
C376
0.1U_0402_16V4Z
1
2
R369
10K_0402_5%
@1 2
C384
0.1U_0402_16V4Z
1 2
CP2
100P_1206_8P4C_50V8@
234 5
6781
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
CAPS_LED#
STB_LED#
GREEN_BATLED#
AMBER_BATLED#
SPI_HOLD#
SPI_SI
NUM_LED#
NUM_LED#
SPI_CLKSPI_CS#
SPI_SOSPI_SO_L
SPI_CS#
SPI_HOLD#
SPI_WP#
SPI_SI
SPI_WP#
SPI_CLK
SPI_HOLD#
SPI_SO
XMIT_OFF#
WL_BTN#
GREEN_BATLED#<30>
AMBER_BATLED#<30>
PLT_RST#<7,18,20,22,24,25,30>
LPC_AD0<19,25,30>LPC_AD1<19,25,30>LPC_AD2<19,25,30>LPC_AD3<19,25,30>
VCC1_PWRGD<30,34>
CAPS_LED#<25,30>NUM_LED#<25,30>
LPC_FRAME#<19,25,30>
CLK_33M_LPC<15>
STB_LED#<25,30,32>
SPI_CLK<20>
SPI_SI<20>
SPI_CS#<20>
SPI_SO <20>
XMIT_OFF#<20,25>
WL_BTN#<30,32>
WL_LED# <25,32>
EC_WL_LED# <30>
+3VS
+3VALW
+3VL +3VL
+3VS
B+
+3VL
+3VALW
+3VALW
+3VALW+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
BIOS ROM/PS2/LED/SW
31 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
BLUE
CAP LED
GREEN
POWER LED
GREEN
Charge LED
GREENAMBER
Battery LED
Wireless LED
WL ON/OFF
Add in 7/24.
LPC Debug PortChange from +3VL to +3VS. 6/9
Removed +3VS. 6/13
Connect pin3 & 23together and pin 24to GND in 6/29.
BIOS ROM
R1291 place cloe to U66
If use System SPI ROM, R2217 should be placed If use LPC DebugPort , R2217 should be delete, and R2216 must pull high
02/06 change Battery LED to +3VL
02/06 change XMIT_OFF#
XMIT_OFF#
0 1
1 0
LED
02/26 Add R2272 for ECoutput and driver WLAN LED
*WLAN LED Control noteWLAN have 3 ways control , the table listcomponet must be stuff
R2270 R22、 71 R2272、
12 R388�BQ47
R2263
EC control
XMIT_OFF#
WLAN Card
3
JP27
ACES_87216-2404_24PCONN@
Ground1LPC_PCI_CLK2Ground3LPC_FRAME#4+V3S5LPC_RESET#6+V3S7LPC_AD08LPC_AD19LPC_AD210LPC_AD311VCC_3VA12PWR_LED#13CAPS_LED#14NUM_LED#15VCC1_PWRGD16SPI_CLK17SPI_CS#18SPI_SI19SPI_SO20SPI_HOLD#21Reserved22Reserved23Reserved24
G
D
S
Q47RHU002N06_SOT323@2
13
U21
SST25LF080A_SO8-200mil
S1
VCC8
Q 2
HOLD7
VSS 4
D5
C6
W3
R390200_0402_5%
12
R22161K_0402_5%
@
12
C385
0.1U_0402_16V4Z
1
2
R38327_0402_5%WLAN14@1
2
R73510K_0402_5%
WLAN14@
R389
200_0402_5%
1 2
R386
47_0402_5%1 2
R74
1
100K
_040
2_5%1
2
R392200_0402_5%14@
12
R384
3.3K_0402_5%1 2
D2817-21SYGC/S530-E1/TR8_GRN
14@
21
R388100K_0402_5%
@
12
SW11BT002-01210_4P
WLAN14@
3
2
1
4
5 6
D34SF10402ML080C_0402@
1
2
R385
3.3K_0402_5%1 2
R391200_0402_5%
12
D25S LED HT-170NBQA 0805 BLUE
WLAN14@
21
D26
17-21SYGC/S530-E1/TR8_GRN
21
R2217
0_0402_5%1 2
R2272
0_0402_5%1 2
D27
19-22UYSYGC/S530-A2/TR8_ G/Y
21
34
ON/OFFBTN#
ON/OFFBTN_KBC#
ON/OFF#
ON/OFF#
LID_SW#
TP_DATATP_CLK
LID_SW# LID_SW#_R
ON/OFF#STB_LED#WL_LED#WL_BTN#
LID_SW#
ON/OFFBTN# <20>
ON/OFFBTN_KBC# <30>
TP_CLK <30>TP_DATA <30>
LID_SW#<17,30>
STB_LED#<25,30,31>
WL_BTN#<30,31>WL_LED#<25,31>
+3VALW
+3VL
+3VL
+3VL+5VS
+3VALW+3VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
ON_OFF/LID/TP
32 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Power button
LID_SW
EMI
T/P Board
POWER SWITCH
12/25
2/16 Co lay for 14" assembly issue
R396
100K_0402_5%1 2
C389100P_0603_50V8J
@
1
2
JP26
ACES_85201-0805_8PCONN@
12345678
D30PSOT24C_SOT23@
231
C387
1U_0603_10V4Z
1
2 C390100P_0603_50V8J
@
1
2
D29SF10402ML080C_0402@
1
2
R397 1K_0402_5%1 2
R395
100K_0402_5%
1 2
D31CH751H-40_SOD323
1 2
R394
100K_0402_5%
12
SW2
SPPB530600_4P
@
1
4
3
2
C388
1U_0603_10V4Z
1
2
JP25
ACES_87151-06051CONN@
654321
U22ASN74LVC14APWLE_TSSOP14
O 2I1
P14
G7
C386
0.1U_0402_16V4Z
1
2
SW31BT002-01210_4P
14@
3
2
1
4
5 6
G
D
S
Q21RHU002N06_SOT323
21
3
R393
100K_0402_5%
12
SW4
SPPB530600_4P
14@
1
4
3
2
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
SLP_S3#
RUNON
SLP_S5
SLP_S5#
SLP_S3
SLP_S3 SLP_S3 SLP_S3
SLP_S3
RUNON
SLP_S3SLP_S5SLP_S5
SLP_S3
SLP_S3#<20,30,39>
SLP_S5#<20,38>
SLP_S5<29,38>
PWR_GD <30,34,40,42>
SLP_S3<38>
+3VL
+2.5VS
+5VS+5VALW
+5VALW
+3VS+5VS
+3VS+3VALW
+0.9V +1.5VS+1.8V
B+
+1.8V
+VCCP+VCC_CORE
+1.5VS
+VCCP +1.5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
DC/DC Circuits
33 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
Discharge circuit
+5VALW to +5VS Transfer +3VALW to +3VS Transfer
J5
SHORT PADS1
2
C403
0.01U_0402_25V7Z
1
2
G
D
SQ28RHU002N06_SOT323
2
13
R399
330K_0402_5%
12
R398
100K_0402_5%
12
R401
470_0402_5%
12
C395
0.1U_0402_16V4Z
1 2
R404
470_0402_5%
12
R400
100K_0402_5%
12
C398
10U_0805_10V4Z
1
2
G
D
SQ24RHU002N06_SOT323
2
13
R408
470_0402_5%
12
G
D
SQ26RHU002N06_SOT323
2
13
C396
0.1U_0402_16V4Z
1 2
R407
470_0402_5%
12
C402
10U_0805_10V4Z
1
2
C400
10U_0805_10V4Z
1
2
G
D
SQ31RHU002N06_SOT323
2
13
R4100_0402_5%
1 2
R403
470_0402_5%
12
G
D
SQ30RHU002N06_SOT323
2
13
U24
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
C399
0.1U_0402_16V4Z
1
2
C394
0.1U_0402_16V4Z
1 2
R409 0_0402_5%@1 2
G
D
SQ22RHU002N06_SOT323
2
13
C397
10U_0805_10V4Z
1
2
G
D
SQ29RHU002N06_SOT323
2
13
C401
0.1U_0402_16V4Z
1
2
R406
470_0402_5%
12
R402
470_0402_5%1
2
G
D
S
Q25RHU002N06_SOT323
2
13
G
D
SQ23RHU002N06_SOT323
2
13
U25
AO4422_SO8
S 1S 2S 3G 4
D8D7D6D5
PWR_GDVCC1_PWRGD
VCC1_PWRGD <30,31>
PWR_GD <30,33,40,42>
VCCP_POK<39>
VCCP_ON <39>
+1.5VS +2.5VS+2.5VS
+3VL
+3VL
+3VL
+5VS
+3VS
+3VS +3VL+3VL
+3VL
+3VL
+3VS+VCCP
+3VS
+3VL
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
POK CKT
34 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
12/27
12/27
12/27
02/07 Reserve RESET IC U32 for VCC1_PWRGD
C406
0.1U_0402_16V4Z
1
2
H2HOLEA
1
H4HOLEA
1
R420
1K_0402_5%
12
G
D
SQ35RHU002N06_SOT323
2
13
H18HOLEA
1
CF8
1
R417
10K_0402_5%
@
12
H16HOLEA
1
CF6
1
CF5
1
C
BE
Q37
PMST3904_SOT323
1
2
3
CF7
1
CF4
1
H23HOLEA
1
EB
CQ41MMBT3904_SOT23
2
31
CF2
1
H17HOLEA
1
R419
560K_0402_5%
12
R422
330_0402_5%
12
U22D
SN74LVC14APWLE_TSSOP14
O 8I9
P14
G7
R418
180K_0402_5%
12
J6
SHORT PADS
1 2
C
BE
Q38
PMST3904_SOT323
1
2
3U32
TCM809TENB_SOT23-3
@
VDD1
GN
D2
RESET# 3
CF9
1
FM51
H15HOLEA
1
R415
47K_0402_5%1 2
H14HOLEA
1
H19HOLEA
1
G
D
SQ33RHU002N06_SOT323
2
13C404
0.1U_0402_16V4Z
1
2
R2241
1K_0402_5% 1
2
H8HOLEA
1
EB
CQ40MMBT3904_SOT23
2
31
H26HOLEA
1
CF1
1
R421
330_0402_5%
12
FM61
H5HOLEA
1
R414
10K_0402_5%
12
U22C
SN74LVC14APWLE_TSSOP14
O 6I5
P14
G7
U22F
SN74LVC14APWLE_TSSOP14
O 12I13
P14
G7
FM21
D32CH751H-40_SOD323
1 2
FM41
U22E
SN74LVC14APWLE_TSSOP14
O 10I11
P14
G7
H25HOLEA
1
R413
330_0402_5%
12
H7HOLEA
1
H21HOLEA
1
H3HOLEA
1
H20HOLEA
1
CF10
1
U22B
SN74LVC14APWLE_TSSOP14
O 4I3
P14
G7
G
D
SQ36RHU002N06_SOT323
21
3
R2242
330_0402_5%
12 R416
100K_0402_5%
12
R22430_0402_5%@1 2
H6HOLEA
1
R2244
10K_0402_5%
12
FM31
H1HOLEA
1
C407
0.1U_0402_16V4Z
1
2
C405
0.1U_0402_16V4Z
1
2
H9HOLEA
1
G
D
SQ42RHU002N06_SOT323
2
13
H24HOLEA
1
CF3
1
FM11
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
ADPIN
VIN
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491PCustom
35 47Tuesday, March 20, 2007
2006/10/26 2006/07/26
DC CONN
1
2
3
4
PCN1SINGATRON_2DC_S736I201
1
2
3
4
5 6
PC31000P_0402_50V7K
12
PC2100P_0402_50V8J
12 P
C4
100P
_040
2_50
V8J
1
2PR315K_0402_5%
12
PL1SMB3025500YA_2P
1 2
PC
510
00P
_040
2_50
V7K
1
2
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SE_CHG+SE_CHG-
CHGCTRL
SE_ConPWR-
ADP_PRES
ADP_PRES
ADP_PRES
CHG_B+
LX_CHG
DH_CHG
ADP_PRES
SE_ConPWR+
ADP_PRES
ADP_PRES <30,37,42>
Batt_Det <41>
CHGCTRL
BATCON <30>
VIN P4
BATT
VIN
BATT
BQ24703VREF+3VLP
VIN
P2
BATTB+
1.24VREF
VIN
P2
P2
+3VLP
+3VALW
+3VLP
+3VL
+3VL+3VL
+3VL
P5
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateCharger
Custom
Tuesday, March 20, 2007
Compal Electronics, Inc.
4736
CV=16.8V (4/8 CELLS LI-ION) =12.6V (6 CELLS LI-ION)CC=1.54A (4 CELLS LI-ION) =3A (6/8 CELLS LI-ION)
3.2V
"Lo": 4/8 CELLS LI-ION"Hi": 6 CELLS LI-ION
PC
214.
7U_0
805_
10V
6K
12
PR
30
133K
_060
3_1%
12
PC
191U
_060
3_6.
3V6M
12
PR35@75K_0402_1%
12
PR2560.015_2512_1%
1 2
PR248
1K_0402_5%
1 2
PR39
@15K_0402_1%
12
PR15617.4K_0603_0.1%
12
PR38
60.4K_0402_1%
1 2
PC
1510
U_1
206_
25V
6M
12
G
D
S PQ34RHU002N06_SOT323-3
2
13
PR15
3K_0402_5%
1 2
PC111U_0603_6.3V6M
1 2
PC
2522
P_0
402_
50V
8J1
2
PR6
47K_0402_5%
1 2
EC31QS04PD5
12
PR332.15K_0402_1%
1 2
PR15547K_0402_5%
12
PC
121U
_080
5_25
V4Z
12
PC
174.
7U_0
805_
6.3V
6K
12
PC18
0.1U_0402_16V7K
1 2
PR14150K_0402_5%
12
PR12100_0402_1%
12
PC157
1000P_0402_50V7K
1 2
PU1
BQ24703_QFN28
ENABLE5ACSEL28ALARM19SRSET2ACSET3
IBAT13VREF4
ACN8ACP9ACDET26
ACPRES27 VHSP 20
GND 17BATDEP 1BATSET 6
BATDRV# 24BATP 12SRN 15SRP 16PWM# 21
COMP7
VCC 22
VS 18
ACDRV# 25
NC4 23NC3 14NC110
NC211
GND 29
PR
2810
0K_0
402_
5%
12
G
D
S
PQ33
RHU002N06_SOT323-3
2
13
PQ3FDS4435BZ_SO8
165
78
2
4
3
PU18
74LVC1G86GW_SOT353-5
A2
B1 G3
Y 4
P5
PR
34
10K
_060
3_0.
1%
12
PR
2013
7K_0
402_
1%
12
PC
168
@10
U_0
805_
6.3V
6M1
2
PR153100K_0402_5%
12
PU3
LMV431ACM5X_SOT23-5
NC 2
REF4
NC 1
CATHODE 3
ANODE5
PR
250
470K
_040
2_5%
12
G
D
S
PQ45
RHU002N06_SOT323-3
2
13
PR2910K_0402_1%
12
PR2511K_0402_5%
1 2
PR7200K_0402_5%
12
PR90.015_2512_1%
1 2
PC
23@
100P
_040
2_50
V8J
12
PR190.015_2512_1%
1 2PL3
16UH_SIL104R-160PF_3.6A_30%
1 2
PR31@0_0402_5%
12
PR11100_0402_1%
12
PR
2432
.4K
_040
2_1%
12
PR3747K_0603_0.1%
1
2
PR3210K_0603_0.1%
12
PR
233K
_040
2_1%
12
PQ5
DTA144EUA_SC70-3
2
13
PR27604K_0603_0.1%
12
PC
2447
0P_0
402_
50V7
K
12
PR1047K_0402_1%
1 2
PR
249
470K
_040
2_5%
12
PU19
SN74LVC1G14DCKR_SC70-5
A2 Y 4
P5
NC
1
G3
PR160_0402_5%
12
PR17
191K_0402_1%
1 2
PD3RLZ16B_LL34 2
1
PQ6DTC115EUA_SC70-3
2
13
PC
8
0.1U
_060
3_16
V7K
12
G
D
SPQ31RHU002N06_SOT323-3
2
13
G
D
S PQ8RHU002N06_SOT323-3
2
13
PU17
SN74LVC1G14DCKR_SC70-5
A2 Y 4
P5
NC
1
G3
PD18
RLS4148_LLDS2
12
PU2A
LM393DG_SO8
+3
-2 O 1
P8
G4
PC
747
P_0
402_
50V
8J
12
PC
910
U_1
206_
25V
6M
12
PC1070.1U_0603_25V7K
1 2
PL2FBM-L11-322513-151LMAT_1210
1 2
PR154100K_0402_5%
12
PR
60
47_1
206_
5%
12
PR
2110
0K_0
402_
1%
12
PC
131U
_060
3_10
V6K
12
PR26
1M_0402_5%
1 2
PR130_0402_5%
12
G
D
S
PQ10RHU002N06_SOT323-3
2
13
PR
223K
_040
2_1%
12
PR18100K_0402_5%
12
PQ9FDS4435BZ_SO8
165 7 8
2
4
3
PQ4FDS4435BZ_SO8
1 65
78
2
4
3
PQ2FDS4435BZ_SO8
1 65
78
2
4
3
G
D
S
PQ32RHU002N06_SOT323-3
2
13
PR25150_0402_1%
12
PC
144.
7U_1
206_
25V
6K
12
PR3610K_0402_5%
12
PR547K_0402_5%
12
PC
220.
047U
_040
2_16
V7K
12
PC20150P_0402_50V8J
12
PD6
RLZ4.3B_LL34
12
PC
104.
7U_1
206_
25V
6K
12
PC
158
0.04
7U_0
402_
16V
7K
12
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
BST_5V_B
DH_3.3V
DH_5V_B
LX_3.3V
BST_5V
LX_5V
DH_5V
BST_3.3V
DL_5V
DH_3.3V_B
DL_3.3V
2VREF_1999
2VREF_1999
MAINPWON
BST_3.3V_B
ADP_PRES <30,36,42>
MAINPWON <41>
KBC_PWR_ON <30>
LX_5V<42>
B++
+3VALWP
VL
+5VALWP
VL B++
B++
B++
2VREF_1999
+3VLPVL
VL
B+
2VREF_1999
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date3.3VALWP / 5VALWP
Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
4737
G
D
S PQ15RHU002N06_SOT323-3
2
13
PR
580_
0402
_5%
12P
C37
0.1U
_060
3_25
V7K
12
PR51
@0_0402_5%1 2
PR450_0402_5%
12
PR
540_
0402
_5%
12
PC
3122
00P
_040
2_50
V7K
12
PR430_0402_5%
12
SP8K10S-FD5_SO8
PQ12
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PC
390.
22U
_060
3_10
V7K
12
+PC38220U_6.3VM_R15
1
2
PL610U_LF919AS-100M-P3_4.5A_20%
12
PC270.1U_0603_50V4Z
1 2
PU4
MAX8734AEEI+_QSOP28
LX515DL519
BST514
DH516
OUT521FB59
SHDN#6ON54
GN
D23
ILIM5 11
DH3 26
LX3 27
TON
13
DL3 24
OUT3 22
FB3 7PGOOD 2SKIP#12
ON33
REF8
PR
O#
10V
CC
17
V+
20
ILIM3 5
BST3 28
LDO
325
LD05
18
N.C.1
PC
404.
7U_0
805_
10V
4Z
1
2
PC
2822
00P
_040
2_50
V7K
12
PR53@10K_0402_5%
1 2
PR
48@
499K
_040
2_1%
12
PR500_0402_5%
1 2
PC
341U
_080
5_16
V7K
12
PR
5247
K_0
402_
5%
12
PR
244
300K
_040
2_5%
12
PR400_0402_5%
1 2
G
D
S PQ14RHU002N06_SOT323-3
2
13
PR56
499K_0603_1%
12
PC300.1U_0603_16V7K
12
PC410.047U_0603_16V7K
12
PR420_0402_5%
12
PR
4147
_040
2_5%
12
PD7CHP202UPT_SOT323-3
231
G
D
S
PQ13
RHU002N06_SOT323-3
2
13
PC260.1U_0603_50V4Z
1 2
PR
460_
0402
_5%
12
PL4FBM-L11-322513-151LMAT_1210
12
PC
33
0.1U
_060
3_50
V4Z
1
2
PC
354.
7U_0
805_
10V
4Z
1
2
PC
324.
7U_1
206_
25V
6K
12
PC
2910
U_1
206_
25V
6M
12
PR
55@
3.57
K_0
402_
1%
12
PR
47@
499K
_040
2_1%
12
PR440_0402_5%
12
SP8K10S-FD5_SO8
PQ11
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
+
PC36
150U
_D2_
6.3V
M
1
2
PL510U_LF919AS-100M-P3_4.5A_20%
12
PR59100K_0402_5%
12
PR
49@
10.2
K_0
402_
1%
12
PR570_0402_5%
12
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
BOOT1_1.8V
BO
OT_
1.8V
LX_1.8V
1.8V_B+
LG_1.8V
UG_1.8VSLP_S5#<20,33>
SLP_S4#<20>
SLP_S3<33>
SLP_S5<29,33>
+5VALWB+
+1.8VP
+5VALW
+3VS
+2.5VSP
+1.8V
+0.9VP
+1.8V
+1.5VSP
+VCCP
+1.5VS
+1.8VP
+1.05V_VCCP
+0.9VP +0.9V
+2.5VSP +2.5VS+5VALWP
+3VALW
+5VALW
+3VALWP+3VLP +3VL
B+ P5
Title
Size Document Number R ev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P 0.5
1.8VP/0.9VSP/2.5VSP
38 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
(500mA,40mils ,Via NO.= 1)
(6A,240mils ,Via NO.=12)
(7A,280mils ,Via NO.= 14)
(4A,160mils ,Via NO.=8)
(500mA,40mils ,Via NO.= 1)
(2A,80mils ,Via NO.= 4)
(4.5A,180mils ,Via NO.= 9)
(3A,120mils ,Via NO.= 6)(100mA,20mils ,Via NO.= 1)
PR2460_0402_5%
1 2
PR159470K_0402_5%
12
PC
514.
7U_0
805_
6.3V
6K 1
2
PJP2
PAD-OPEN 3x3m
1 2
PR1581M_0402_5%
12
PC
460.
1U_0
402_
16V
7K
12
PL7
3.3UH_PCMC063T-3R3MN_6A_20%
1 2
PR163
27K_0603_0.1%1 2
PJP4
PAD-OPEN 4x4m
1 2
PC
4322
00P
_040
2_50
V7K
12PC116
680P_0402_50V7K
1
2
PC
56@
10U
_080
5_10
V4Z1
2
G
D
S
PQ18RHU002N06_SOT323-3
2
13
PR16410K_0603_0.1%
12
PR162
16.9K_0402_1%
1 2
PC12333P_0402_50V8J
1 2
PR255@0_0402_5%
1 2PJP3
PAD-OPEN 4x4m
1 2
PU11
SC411MLTRT_MLPQ16_4X4
FB3
PGD4
VOUT1
VCCA2
NC
5
VS
SA
6
VDDP 9
BS
T13
DH 12
PG
ND
7
DL
8
LX 11
ILIM 10
NC
14
EN
/PS
V15
TON
16
TP17
PR245100K_0402_5%
12
PR
157
10_0
402_
5%
12
PC1221U_0603_10V6K
12
PC
580.
1U_0
402_
16V
7K
12
PJP5
PAD-OPEN 4x4m
1 2
PR741K_0402_1%
12
PR750_0402_5%
1 2
PJP7
PAD-OPEN 3x3m
1 2
PR247@0_0402_5%
1 2
PR161
0_0402_5%1 2
PJP1
PAD-OPEN 4x4m
1 2
PD14
1SS355_SOD323-2
21
PU6APL5508-25DC-TRL_SOT89-3
IN2
GND
1
OUT 3
PC159@680P_0603_50V7K
12
PC5910U_1206_6.3V7K
12
PC
4410
U_1
206_
25V
6M
12
PJP9
PAD-OPEN 4x4m
1 2
PJP8
PAD-OPEN 2x2m
2 1
PC
501U
_060
3_10
V6K
1
2
PC1190.1U_0402_16V7K
1 2
+
PC
4222
0U_V
_4V
M_R
25M1
2
[email protected]_1206_5%
12
PL15FBMA-L11-322513-151LMA50T_1210
12
PC1181000P_0402_50V7K
1
2
[email protected]_0402_16V7K
12
PR260@150_1206_5%
12
PC120@2200P_0402_25V7K
12
PC1211U_0603_10V6K
12
PC
450.
1U_0
402_
16V
7K
12
PU7
G2992F1U_SO8
VOUT4
NC 5GND2
VREF3
VIN1 VCNTL 6
NC 7
NC 8
TP 9
PC571U_0603_16V6K
12
PR731K_0402_1%
12
PC5510U_0805_10V4Z
12
PQ16FDS8884_SO8
365 7 8
2
4
1
PQ17FDS6690AS_NL_SO8
365 7 8
2
4
1
PJP6
PAD-OPEN 4x4m
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
LX_1.05V
UG1_1.05V
LG_1.5V
UG_1.5V
BST_1.5V
LG_1.05V
SLP_S3#
BST_1.05V
UG_1.05V
LX_1.5V
UG1_1.5V
SLP_S3#<20,30,33>
VCCP_POK <34>
VCCP_ON <34>
B+++
+1.5VSP
B+
+1.05V_VCCP
+5VALWP
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
0.5
1.05VSP/1.5VSPCustom
39 47Tuesday, March 20, 2007
2006/10/26
12/29
12/29PR170
0_0402_5%
1 2
PC644.7U_1206_25V6K
12
PR17810K_0402_5%
12
PQ20FDS8884_SO8
365 7 8
2
4
1
PR1740_0402_5%
1 2
PL10
3.3UH_SIQB74-3R3RF_4.8A_30%
12
PC124
0.1U_0603_25V7K
12
PL92.2UH_PCMC063T-2R2MN_8A_20%
1 2
PR171
0_0402_5%
1 2
PR16775K_0402_1%
1 2
PR16829.4K_0402_1%
1 2
PQ35FDS6690AS_NL_SO8
365 7 8
2
4
1
PC1284.7U_0805_10V6K
12
PC
6210
U_1
206_
25V
6M
12
PR16573.2K_0402_1%
1 2
PC
63@
2200
P_0
402_
50V
7K1
2
PR17615K_0402_1%
1 2
PR1793.3_0402_5%
12
+
PC
7122
0U_6
.3V
M_R
15
1
2
PR180@0_0402_5%1 2
PC
61@
2200
P_0
402_
50V
7K
12
PL8FBMA-L11-322513-151LMA50T_1210
1 2
PR1730_0402_5%
1 2
[email protected]_0603_25V7K
12
PC129@1000P_0402_50V7K
12
PR1690_0402_5%
12
PR16675K_0402_1%
1 2
SP8K10S FD5 2N SOP8
PQ19
D22 G2 8
G13D1/S2/K 5
D21D1/S2/K 7
S1/A4 D1/S2/K 6
PC744.7U_0805_6.3V6K
12
PU12
TPS51124RGER_QFN24_4x4
GN
D3
TON
SE
L4
VO
11
VFB
12
VFB
25
VO
26
EN28
DR VL1 19
TRIP
117
V5F
ILT
15
VBST1 22
V5I
N16
TRIP
214
DR VL212
LL211
PGOOD27
DR VH210 DR VH1 21
EN1 23
LL1 20
PG
ND
118
VBST29
PGOOD1 24
PG
ND
213
P PAD25
PC1271U_0603_10V6K
12
+
PC
7322
0U_6
.3V
M_R
15
1
2
PC1260.1U_0402_16V7K
12
PR17718K_0402_1%
12
PC724.7U_0805_6.3V6K
12
PR1750_0402_5%
1 2
PC125
0.1U_0603_25V7K
1 2
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
VCC
POUT
DL1
_CP
U
DH11_CPULX1_CPU
BST1_CPU
BSTM1 CPU
DL1_CPU+VCC_CORE
FB1_CPU
CC1_CPU
DL2
_CP
U
DH2_CPU
BST2_CPU
LX2_CPU
DL2_CPU
CSP2_CPU
CSN2_CPU
VSSSENSEB
STM
2 C
PU
VCCSENSE
CSP1_CPU
CSN1_CPU
DPRSLPVR<7,20>
CPU_VID5<5>
CPU_VID3<5>
CPU_VID6<5>
CPU_VID1<5>
CPU_VID4<5>
CPU_VID0<5>
CPU_VID2<5>
H_DPRSTP#<4,19>
H_PSI#<5>
PWR_GD<30,33,34,42>
CLK_ENABLE#<15>
VGATE_INTEL<7,20>
H_PROCHOT#<4>
VSSSENSE<5>
VCCSENSE <5>
+3VS
+5VS CPU_B+ B+
+VCC_CORE
CPU_B+
Title
Size Document Number R ev
Date: Sheet o f
0.5
+CPU_CORE
Custom
40 47Tuesday, March 20, 2007
Compal Electronics, Inc.
NTC
NTC
NTC
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIAL
DEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&D
12/29
PC
131
0.01
U_0
402_
25V
7K
12
PR189 0_0402_5%
12
PR198 0_0402_5%
1 2
PR187 2.2_0402_5%
1 2
PC
136
1U_0
603_
16V
6K
12
PR185 0_0402_5%
12
PQ
41FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR200 @3K_0603_1%1 2
PR18313K_0402_5%
12
PR210 0_0402_5%
1 2
PC1400.22U_0603_16V7K
1 2
PH2@470KB_0402_5%_ERTJ0EV474J
12
PR213100_0402_5%
12
PQ
40FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR194 71.5K_0402_1%
12
PC
160
680P
_060
3_50
V7K
12
PC
162
1000
P_0
402_
50V
7K
12
PH3
10KB_0603_5%_ERTJ1VR103J
1 2
PR208 0_0402_5%
1 2
PR20920K_0402_1%
1 2
PU13
MAX8770GTL+_TQFN40
FB 12
CSP2 14
GND 18
CCV9
CCI 10REF11
CSP1 17
CSN2 15
CSN1 16
CLKEN1
BST2 20
GNDS 13
DPRSTP40
D233
D132
D031 BST1 30
Vcc19
TIME7
THRM6
VRHOT5
POUT4
PSI3
PWRGD2
TON 8
PGND2 23
VDD 25
DL2 24
DL1 26
DH2 21
PGND1 27
D637
D435
D536
D334
LX2 22
LX1 28
DH1 29
DPRSLPVR39
SHDN38
TP41
PL17
0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
PC
137
0.22
U_0
603_
16V
7K
12
PR215 10K_0402_5%
1 2
PR196 499_0402_1%
1 2
PR197 0_0402_5%
1 2
PR190 0_0402_5%
12
PH4
10KB_0603_5%_ERTJ1VR103J
1 2PC
161
680P
_060
3_50
V7K
12
PC
145
0.22
U_0
603_
16V
7K
12
PC
132
10U
_120
6_25
V6M
12
PR207@3K_0603_1%
1 2
PC
147
10U
_120
6_25
V6M
12
+
PC
130
47U
25V
M 6
.3X
6 E
SR
0.44
CE
-LX
1
2
PQ
38FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PR2110_0402_5%
1 2
PR
253
4.7_
1206
_5%
12
PR214 @0_0402_5%1 2
PR212@10K_0402_5%
12
PR203 100_0402_5%
1 2
PC1490.1U_0402_16V7K1
2
PR206@3K_0603_1%
1 2
PC138 470P_0402_50V8J
1 2
PR
182
200K
_040
2_5%
12
PQ39SI4684DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PC
146
10U
_120
6_25
V6M
12
PR216 2.2_0402_5%
1 2
PL18
0.36UH_PCMC104T-R36MN1R17_30A_20%
1 2
PR1953.48K_0402_1%
1 2
PC
134
2200
P_0
402_
50V
7K
12
PR
201
0_04
02_5
%
12
PC141 @0.022U_0402_16V7K1 2
PR192 0_0402_5%
12
PC
133
10U
_120
6_25
V6M
12
PR
254
4.7_
1206
_5%
12
PC142
4700P_0402_25V7K
12
PC
148
2200
P_0
402_
50V
7K
12
PR1912.1K_0603_1%
12
PC
144
1000
P_0
402_
50V
7K
12
PC139 0.22U_0603_16V7K
1 2
PR193 0_0402_5%
12
PC143470P_0402_50V8J
1 2
PR2172.1K_0603_1%
12
PR188 0_0402_5%
12
PR2051.91K_0402_1%
12
PR18110_0402_5%
12
PR184 0_0402_5%
12
PR202 3.65K_0402_1%
1 2
PR186 0_0402_5%
12
PR2183.48K_0402_1%
1 2
PQ36SI4684DY-T1-E3_SO8
S1
S2
S3
G4
D8
D7
D6
D5
PQ
37FD
S66
76A
S_S
O8
S1
S2
S3
G4
D8
D7
D6
D5
PC135
2.2U_0603_6.3V6K
12
PC150 0.22U_0603_16V7K
1 2
PR2042K_0402_1%
12
PL16FBM-L11-322513-151LMAT_1210
12
A
A
B
B
C
C
D
D
1 1
2 2
3 3
4 4
SMB_EC_CK1
SMB_EC_DA1
EC_SMCEC_SMD
SMB_EC_CK1 <30>
SMB_EC_DA1 <30>
THM_MAIN# <30>
MAINPWON <37>
Batt_Det <36>
VMB BATT
+5VS
+5VS
+3VL
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
LA-3491P
BATTERY CONNCustom
41 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
CPU
Recovery at 47 +-3 degree C
PH1 under CPU botten side :CPU thermal protection at 90 +-3 degree C
PC1091000P_0402_50V7K
12
G
D
S
PQ29RHU002N06_SOT323-3
2
13
PR14147K_0402_1%
1 2
[email protected]_SOT23-3
231
PC1080.22U_0603_10V7K
12
PU2B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR136
@1K_0402_5%12
PR145150K_0402_1%
12
PC1051000P_0402_50V7K
12
PR140100_0402_5%
12
PD10 @SM05_SOT23
2
31
PR137210K_0402_1%
1 2
PR1442.55K_0603_1%
12
PR14610K_0402_5%
12
PR139100_0402_5%
12
PH110K_TH11-3H103FT_0603_1%
12
PL14
HCB4532KF-800T90_1812
1 2
PR1381K_0402_5%
12
PR14215K_0603_1%
1 2
PC1060.01U_0402_50V4Z
12
PR143150K_0402_1%
1 2
PCN2
TYCO_C-1746706_6P
BATT+ 6
TS 2
SMD 5
GND 1
SMC 4RES 3
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PWR_GD <30,33,34,40>
LX_5V <37>
OCP# <4,20,30>
ADP_PRES<30,36,37>
4C#_6C8C <30>
+5VS
B+
+3VS
P5
+5VS
+5VS
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered DateADP_OCP
Custom
42 47Tuesday, March 20, 2007
2006/10/26 2006/07/26Compal Electronics, Inc.
PR223330K_0402_5%
12
PU14A
LM358ADR_SO8
+ 3
- 201
P8
G4
PR
232
2K_0
402_
5%
12
PR
237
110_
0603
_1%
12
PR
235
7.32
K_0
402_
1%12
EB
CPQ44@MMBT3904W_SOT323-3
2
31
PR231
0_0402_5%
1 2
PU15B
LM393DG_SO8
+5
-6 O 7
P8
G4
PR233604K_0603_1%
1 2
PR228100K_0603_0.5%
1 2
PR224
10K_0402_5%
12
PR
258
1M_0
402_
5%
12
PR220133K_0402_1%
12
PC
154
0.02
7U_0
402_
16V
7K
12
PR238
0_0402_5%
1 2
PD17
@CH751H-40PT_SOD323-221
PD15
CH751H-40PT_SOD323-2
21
PR22910_0402_5%
12
PC
155
2.2U
_060
3_6.
3V6K
12
G
D
S
PQ47RHU002N06_SOT323-3
2
13
PU16
LMV431ACM5X_SOT23-5<BOM Structure>
NC 2
REF4
NC 1
CATHODE 3
ANODE5
PC
156
3900
P_0
402_
50V
7K
1
2
G
D
S
PQ43RHU002N06_SOT323-3
2
13
PR
257
6.98
K_0
402_
1%
12
PR
225
0_04
02_5
%
12
C
BEPQ42
MMBT3906_SOT23-3 1
2
3
PR
241
3.9K
_040
2_5%
12
PR22710K_0402_1%
1 2
PR221
100K_0402_5%
1 2
PC
153
1U_0
805_
50V
4Z
12
PR2400_0402_5%
12
PR242@124K_0402_1%1 2
PU15A
LM393DG_SO8
+3
-2 O 1
P8
G4
PR
234
80.6
K_0
402_
1%
12
PR2363.9K_0402_5%
12
PU14B
LM358ADR_SO8
+5
-6 0 7
P8
G4
PC1520.22U_0603_16V7K
1 2
PR
230
0_04
02_5
%
12
PR22210K_0402_5%
12
PC
151
1U_0
805_
16V
7K
12
PD16
CH751H-40PT_SOD323-2
21
PR
259
1M_0
402_
5%
12
PR226
6.81K_0402_1%
1 2
PR
239
470K
_040
2_5%
12
G
D
S
PQ46RHU002N06_SOT323-3
2
13
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
Title
Size Document Number Rev
Date: Sheet o f
0.5
HW PIR (1)Custom
43 47Tuesday, March 20, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 3
Reason for change PG# Modify List PhaseItem
HW section
1
Date
5
7
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
2
3
4
6
8
9
10
11
12
13
14
Reserve Disable TV-out power plane resistor Page 10Add R2221 R2、 222 R2223 R2224 R2225 for Disable、 、 、TV-out power plane 01/02 DB2
R2211 R2212、 Change to 10k follow datasheet Page 9 Change R2211 R2212 to 10K_0402_5%、 01/02 DB2
Disable TV-out follow datasheet Page 9
Add resistor to +1.5VS power
TVDAC_A(R2172) TVDAC_B(R2173) TVDAC_C(R2174)、 、 、
TV_IREF(R57)�BTVIRTNA TVIRTNB TVIRTNC(R2251)、 、
01/02 DB2
Change CPU and NB BCLK follow heavenly2.0 Page 15 CPU --->CPUCLKT0/C0
NB --->CPUCLKT1/C1
01/02 DB2
Change Mini card CLK From SRC3 to SRC7 Page 15 Change to SRC7 01/02 DB2
CRT connector PCB footprint error Page 16Change JP6 PCB Footprint form
SUYIN_070912FR015S207CR_15P to ALLTO_C10510-115A5-L_15P01/02 DB2
+ENAVDD add a 100k Pull low follow datasheet Page 17 Add R2247 to GND 01/02 DB2
LCDVDD enable timing Page 17 Change R159 to 47k C213 to 0.1u、 01/02 DB2
Change AND gate that one gate one chip Page 18 Change U28(4 in 1) to U30 U31、 01/02 DB2
Reserve EE PROM power plane +3VS Page 19Reserve R2230 for don't support wake up LAN
Reserve R2231 for support wake up LAN01/02 DB2
Add R2213 and verify need or not? Page 19 Add R2213 01/02 DB2
Change PCIE from port 1 to port 2 follow caymusPage 20
Change MINI Card PCIE from Port 1to Port2 01/02 DB2
Reserve LAN_RST# that can fine tune from ECPage 20
Reserve R2233 for fine tune LAN_RST# timing 01/02 DB2
Change R to RP , keep original design Page 20 Change to RP33 RP34、 01/02 DB2
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Page 21
Page 21
Reserve +3VS power plane for don't support wake up LANIf R2237 --->support wake up LAN
If R2236 --->Don't support wake up LAN01/02 DB2
Reserve +3VALW power plane to verify HDA codecIf R2234 --->AC97 codec
If R2235 --->HD Codec01/02 DB2
Reserve +3VALW power plane support wake up LAN Page 23If L11 --->Don't support wake up LAN
If L20 --->Support wake up LAN01/02 DB2
Reserve +3VALW power plane support wake up LAN Page 24If L12 L13、 --->Don't support wake up LAN
If L21 L2、 2 --->Support wake up LAN01/02 DB2
Page 25
Page 30
Reserve 0 ohm resistor for SMSC1070 Page 30 Reserve R2238 R2239 R2240、 、01/02 DB2
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Title
Size Document Number Rev
Date: Sheet o f
0.5
HW PIR (2)Custom
44 47Tuesday, March 20, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 2 of 3
Reason for change PG# Modify List PhaseItem
HW section
20
Date
24
26
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
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Page 31 Delete Q20 01/02 DB2Wireless LED design issue
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Change POK circuit form PGOOD to VCCP_ON Page 34 Add R2244 Q42, and reserve R2243、 01/02 DB2
LID_SW# add 10k pull high Page 30 Add R2253 for LID_SW# pull high 01/16 SI
Change use EAPD# to control Amp Shutdown Page 28 Reserve R2198 and add R2252 pull high 01/16 SI
Change Battery LED power from +3VALW to +3VL Page 31 Change Battery LED power from +3VALW to +3VL 02/06 PV
XMIT_OFF# control error Page 31 Delete Q46 02/06 PV
Delete KSI PU, 1070 had internal PU Page 30 Delete RP29 RP30、 02/07 PV
Reserve SMSC 1070 VCC0 to +3VL,Add R2267 to GND Page 30 Reserve R2266 to +3VL,Add R2267 to GND 02/07 PV
Change Codec Mix Resistor from 20k to 1k Page 28 Change R2264 R2265 to 1K、 02/07 PV
Change LAN82562GT RBIAS resistor to 649 ohm Page 23 Change R274 to 649 ohm 02/07 PV
Page 34 Reserve RESET IC U32 for VCC1_PWRGD 02/07 PVReserve RESET IC for VCC1_PWRGD
THM_MAIN# Double pull high Page 30 Delete R356 02/07 PV
Page 26Fine tune PC Beep BOM delete R310 02/09 PV
Change Hp series resistor to 60 ohm 0603 Page 28 Change R341 R343 to 60 ohm 0603、 02/14 PV
Reserve OCP# to EC GPIO29(pin 98) Page 30 Reserve R2268 to EC GPIO29(pin98) 02/14 PV
HP MIC E、 SD Diode change to AGND Page 28 HP MIC E、 SD Diode change to AGND 02/14 PV
Page 28 HP de pop when boot Add inverter to prevent HP pop noise 02/26 PV
C43 C44、 C45 impact ME parts、 Page 06Change CPU core decoupling capacitor height limit1.9mm for short term solution(SGA19331D00) 02/26 PV
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Page 30
02/26 Add R2270 for WL_LED_EC# PU
02/26 Add R2271 for use EC detect WLAN activeWLAN LED use XMIT_OFF# have error beheive
02/26 Add R2272 for EC output and driver WLAN LEDPage 31
02/26 PV
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Title
Size Document Number Rev
Date: Sheet o f
0.5
HW PIR (3)Custom
45 47Tuesday, March 20, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 3 of 3
Reason for change PG# Modify List PhaseItem
HW section
39
Date
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
Page 30 02/27 PVSMSC leakage current issue Reserve R2273 R2274 R2275 R2276 EC dummy pin 、 、 、
40 Reserve KSO PU resistor prevent SMSC chip issue Page 30 Reserve RP35 RP36 RP37 RP38 for SMSC KSO 、 、 、 02/27 PV
41 BOM change (Delete CBS de-pop circuit) Page 26 BOM delete C1479 R2256、 Q43、 03/10 MV
42 BOM add Keyboard matrix error issue Page 30 BOM Add Keyboard scan input PU resistor RP29 RP30、 03/10 MV
43 BOM delete (SMSC leakage issue fail) Page 30 BOM Delete R2273 R2274、 03/10 MV
44 03/19 MVReserve +RTCVCC for SMSC VCC0 Page 30 Add R2277
MV03/19BOM add C1479 R2256、 、Q43Page 2645 Add CBS SPK depop circuit , change Q43 from FET to BJT
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Title
Size Document Number Rev
Date: Sheet o f
0.5
PWR PIRCustom
46 47Tuesday, March 20, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify List PhaseItem
Power section
1
Date
5
7
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
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The PR172 changes to HW side 39 Remove PR172 2006/12/29 DB2
Change the +1.05V_VCCP power sequence 39 Remove PR180 2006/12/29 DB2
The +1.05V_VCCP dynamic range is over spec. Change PL9 from 3.3UH to 2.2UH39 2007/01/03 DB2
2007/01/03Adjust +1.5VSP voltage range 39 Change PR165 from 75K_ohm to 73.2K_ohm DB2
Change the PD18 diode
Change the +3VALWP output capacitor.
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Change PD18 from 1SS355 to RLS4148 2007/01/16 SI
Change PC38 from 150U_D2_6.3VM to 220U_6.3V_R15 2007/01/16 SI
Change the +0.9VP output capacitor. Change PC59 from 22U to 10U
Change the +1.05V_VCCP output capacitor.
Change the +1.5VSP output capacitor.
Change the +1.5VSP choke size.
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Change PC71 from 220U_V_4VM_R25M to 220U_6.3V_R15
Change PL11 from 3.3UH_PCMC063T-3R3MN_6A_20% to 3.3UH_SIQB74-3R3RF_4.8A_30%
Change PC73 from 220U_6.3VM_R15 to 220U_6.3V_R15
2007/01/16
2007/01/16
2007/01/16
2007/01/16
SI
SI
SI
SI
Change PD14 diode
Adjust PU3 operation current
Change PC25 capacitor.
Change the +1.5VSP power sequence
PV
PV
PV
Change PD14 from CH751H-40PT to 1SS35538
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Change PR38 from 75K_ohm to 60.4K_ohm
Change PC25 form .022U to 22P
1. Change PR178 form 0_ohm to 10K_ohm2. Add PC126 0.1U
PV
2007/02/05
2007/02/05
2007/02/05
2007/02/05
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Title
Size Document Number Rev
Date: Sheet o f
0.5
PWR PIRCustom
47 47Tuesday, March 20, 2007
Compal Electronics, Inc.
Version change list (P.I.R. List) Page 1 of 1
Reason for change PG# Modify List PhaseItem
Power section
15
Date
MAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINS
16
Add CPU CORE snubber circuit 40 1. add PR253, PR254 4.7_ohm2. add PC160, PC161 680P 2007/02/05 PV
Change PC155 capacitor. Change PC155 form 0.1U to 2.2U42
17 for EMI 40 Change PR187, PR216 form 0_ohm to 2.2_ohm
2007/02/05
2007/02/08
PV
PV
18 Remove PR187 and PR219. 40 Remove PR187 and PR219. 2007/02/09 PV
19 Add PR60 36 2007/03/13 MVAdd PR60 47_ohm