Download - fpga discription
-
8/20/2019 fpga discription
1/12
A feld-programmable gate array (FPGA) is an integrated circuit designed to be
confgured by a customer or a designer ater manuacturing – hence "feld-
programmable".
Field Programmable Gate Arrays (FPGAs) are semiconductor deices that are
based around a matri! o confgurable logic blocs (#$%s) connected ia
programmable interconnects. FPGAs can be reprogrammed to desired application
or unctionality re&uirements ater manuacturing.
FPGAs are programmable semiconductor deices that are based around a
matri! o #onfgurable $ogic %locs (#$%s) connected through programmable
interconnects. As opposed to Application 'pecifc ntegrated #ircuits (A'#s)
*here the deice is custom built or the particular design FPGAs can be
programmed to the desired application or unctionality re&uirements. Although
+ne-,ime Programmable (+,P) FPGAs are aailable the dominant type are
'A-based *hich can be reprogrammed as the design eoles.
FPGAs allo* designers to change their designs ery late in the design cycle–
een ater the end product has been manuactured and deployed in the feld. n
addition /ilin! FPGAs allo* or feld upgrades to be completed remotely
eliminating the costs associated *ith re-designing or manually updating
electronic systems.
http://www.xilinx.com/fpga/asic.htmhttp://www.xilinx.com/fpga/asic.htm
-
8/20/2019 fpga discription
2/12
FPGA Block Structure
/ilin! FPGAs
Xilinx offers the broadest lineup of FPGAs providing advance features, low-power, high-
performance, and high value for any FPGA design. elow is an overview of Xilinx leading
FPGA families.
Features Artix™-7 Kintex™-7 Virtex®-7Spartan®
-6Virtex-6
$ogic #ells 012333 453333 0333333 123333 673333
%locA 18b 84b 75b 4.5b 85b
9'P 'lices 643 1:03 8733 153 0317
9'P
Perormance
(symmetric
F)
:83GA#' 0542GA#' 2882GA#' 143GA#'041:GA#
'
,ransceier
#ount17 80 :7 5 60
,ransceier'peed 7.7Gb;s 10.2Gb;s 05.32Gb;s 8.0Gb;s 11.15Gb;s
http://www.xilinx.com/products/silicon-devices/fpga/artix-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/kintex-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/virtex-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/virtex-6/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/artix-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/kintex-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/virtex-7/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/spartan-6/index.htmhttp://www.xilinx.com/products/silicon-devices/fpga/virtex-6/index.htm
-
8/20/2019 fpga discription
3/12
,otal
,ransceier
%and*idth (ull
duple!)
011Gb;s 533Gb;s 0654Gb;s 23Gb;s 287Gb;s
emorynterace
(998)
1377b;s 1577b;s 1577b;s 533b;s 1377b;s
P#
nterace!4 Gen0 Gen0!5 Gen8!5 Gen1!1 Gen0!5
Analog i!ed
'ignal
(A');/A9#
>es >es >es - >es
#onfgurationAes >es - >es
?ie* all FPGAs rom /ilin!
FPGA Applications
!ue to their programmable nature, FPGAs are an ideal fit for many different mar"ets. As the
industry leader, Xilinx provides comprehensive solutions consisting of FPGA devices,
advanced software, and configurable, ready-to-use #P cores for mar"et and applications such
as$
By Market By Technoo!y
Aerospace and 9eense ndustrial Audio
Automotie edical 'ecurity
%roadcast Bireless #ommunications ?ideo and maging
#onsumer
-
8/20/2019 fpga discription
4/12
FPGA Solutions and Services
%he design environment and supporting resources are a critical components of the FPGA
design environment, as they allow for completing your design &uic"ly and accurately. Xilinx
offers the industry's most comprehensive solution, consisting of$
"esource #escription
%oards and Dits /ilin! deelopment its proide out-o-the bo! design solutions
that help ealuate and architect your design. /ilin! also oEers
,argeted 9esign Platorms *hich comprise ully integrated and
tested hard*are sot*are and P and application rame*or
along *ith the appropriate design enironment.
9ocumentation Cundreds o application notes data sheets and reerence
designs are aailable to proide you *ith the technical support
you need to start your design.
ntellectual
Property
/ilin! and its partners oEer hundreds o ree and or-purchase
intellectual property (P) erifed and guaranteed to meet timing
parameters thus speeding up your design cycle and allo*ing
you to ocus on the alue add components o the design instead
o standards conormance.
'ot*are and
9esign ,ools
An integrated suite o sot*are tools proide a seamless start-to-
end design o* rom design entry to confguration
(programming the FPGA). +ptional add-on sot*are tools are
aailable or your adanced designs to enable eatures such ascustom oorplanning and uni&ue in-chip erifcation using
#hip'cope@ Pro sot*are.
,raining /ilin! hands-on training programs proide you the oundational
no*ledge necessary to begin designing right a*ay. ,hese
programs target both engineers ne* to FPGA technology and
e!perienced engineers deeloping comple! connectiity digital
signal processing or embedded solutions.
,itanium
9edicated
-
8/20/2019 fpga discription
5/12
A feld-programmable gate array (FPGA) is an integrated circuit (#) that can beprogrammed in the feld ater manuacture. FPGAs are similar in principle to buthae astly *ider potential application than programmable read-only memory(P+) chips. FPGAs are used by engineers in the design o specialiHed #s thatcan later be produced hard-*ired in large &uantities or distribution to computermanuacturers and end users. Iltimately FPGAs might allo* computer users totailor microprocessors to meet their o*n indiidual needs
Altera FPGAs are ideal or a *ide ariety o applications rom high-olumeapplications to state-o-the-art products.
-
8/20/2019 fpga discription
6/12
7A8, not flash, meaning that once they lose power they lose their configuration. %hey must
be configured every time power is applied.
%hat is not as bad as it seems as there are flash chips you can use that will automatically
configure the stored bit file on power up. %here are also some development boards which
don't re&uire a programmer at all and will configure the FPGA at startup.
2ith FPGAs you have control over the hardware.
The Possibilities
2ith a typical microprocessor, you have dedicated pins for specific features. For example
there will be only two pins on some microprocessors that are used as a serial port. #f you want
more than one serial port, or you want to use some other pins, your only solution besides
getting a different chip is to use software to emulate a serial port. %hat wor"s fine except you
are wasting valuable processor time with the very basic tas" of sending out bits. #f you wantto emulate more than one port then you end up using all your processor time.
2ith an FPGA you are able to create the actual circuit, so it is up to you to decide what pins
the serial port connects to. %hat also means you can create as many serial ports as you want.
%he only limitations you really have are the number of physical #9/ pins and the sie of the
FPGA.
:ust li"e microcontrollers that have a set amount of memory for your program, FPGAs can
only emulate a circuit so large.
/ne of the very interesting things about FPGAs is that while you are designing the hardware,
you can design the hardware to be a processor that you then can write software for0 #n fact,
companies that design digital circuits, li"e #ntel or n6idia, often use FPGAs to prototype their
chips before creating them.
http://in!athworksco!/solutions/fp"a#
desi"n/solutionsht!l
FPGA and ASIC Desi"n with HDL Coder and HDL
$erifier
For FPGA and A(#1 designs, you can use 4!5 1oder; and 4!5 6erifier; to specify and
explore functional behavior, generate 4!5 code for implementation, and continuously test
and verify your design through cosimulation with 4!5 simulators or FPGA-in-the-loop.
http://in.mathworks.com/solutions/fpga-design/solutions.htmlhttp://in.mathworks.com/solutions/fpga-design/solutions.htmlhttp://in.mathworks.com/products/hdl-coder/http://in.mathworks.com/products/hdl-verifier/http://in.mathworks.com/solutions/fpga-design/solutions.htmlhttp://in.mathworks.com/solutions/fpga-design/solutions.htmlhttp://in.mathworks.com/products/hdl-coder/http://in.mathworks.com/products/hdl-verifier/
-
8/20/2019 fpga discription
7/12
httpJ;;in.math*ors.com;images;responsie;supporting;solutions;pga-
design;pga-asic-design.sg
Generate $#% &o'e (ro) MAT%AB an' Si)uink
*ou can generate synthesiable 4!5 code for FPGA and A(#1 implementations in a fewsteps$
• odel your algorithm including fnite-state machines and datapathelements using A,$A%= and 'imulin=.
• +ptimiHe models to meet speed-area-po*er obecties or FPGA or A'#design using methods such as resource sharing (olding) and distributedpipelining.
• Generate C9$ code using C9$ #oder.
• Prototype on FPGAs and automate C9$ erifcation using C9$ ?erifer.
Generate $#% &o'e (ro) MAT%AB
-
8/20/2019 fpga discription
8/12
82J35
%argeting 8A%5A Algorithms to FPGAs
8A%5A to FPGA using 4!5 1oder log
Generate $#% &o'e (ro) Si)uink
*ou can use 4!5 1oder to generate 64!5 and 6erilog code from (imulin" and (tateflow>.
2ith (imulin", you can model your algorithm using a library of more than ?@@ bloc"s. %his
library provides complex functions, such as the 6iterbi decoder, FF%, 1#1 filters, and F#7
filters, for modeling signal processing and communications systems and generating 4!5
code. *ou can use 4!5 1oder for #P core generation targeting Altera and Xilinx FPGAs and
(o1 FPGAs.
http://in.mathworks.com/videos/targeting-matlab-algorithms-to-fpgas-81968.html?type=shadow&shadow_version=lightboxhttp://in.mathworks.com/videos/targeting-matlab-algorithms-to-fpgas-81968.html?type=shadow&shadow_version=lightboxhttp://blogs.mathworks.com/loren/2013/04/11/matlab-to-fpga-using-hdl-codertm/http://blogs.mathworks.com/loren/2013/04/11/matlab-to-fpga-using-hdl-codertm/http://in.mathworks.com/products/stateflow/http://in.mathworks.com/products/stateflow/http://in.mathworks.com/discovery/ip-core-generation.htmlhttp://in.mathworks.com/videos/targeting-matlab-algorithms-to-fpgas-81968.html?type=shadow&shadow_version=lightboxhttp://in.mathworks.com/videos/targeting-matlab-algorithms-to-fpgas-81968.html?type=shadow&shadow_version=lightboxhttp://blogs.mathworks.com/loren/2013/04/11/matlab-to-fpga-using-hdl-codertm/http://in.mathworks.com/products/stateflow/http://in.mathworks.com/discovery/ip-core-generation.html
-
8/20/2019 fpga discription
9/12
1J22
4!5 1oder /verview
Prototype on FPGAs
, Xilinx>, and
other FPGA vendors. %his capability helps you &uic"ly prototype your design on FPGA
hardware. %he 2or"flow Advisor in 4!5 1oder integrates with Xilinx #(+> and Altera
uartus> ## design suites to automatically program your FPGAs from within 8A%5A and
(imulin".
*ou can use 4!5 1oder to prototype your algorithm on a variety of Xilinx and Altera FPGA
development boards. Additionally, you can use target-independent 4!5 code to program
FPGA devices from vendors li"e 8icrosemi> or 5attice (emiconductor >.
26J12
-
8/20/2019 fpga discription
10/12
Auto)ate $#% Veri*cation
*ou can reuse your 8A%5A and (imulin" test bench to verify your 4!5 code using co
simulation and FPGA-in-the-loop functionality provided by 4!5 6erifier.
2hen used with 4!5 6erifier, 4!5 1oder automatically generates co simulation and FPGA-
in-the-loop models to accelerate the wor"flow for FPGA or A(#1 design verification. %his
approach eliminates the need to manually transfer test vectors and helps identify errors earlier
in the A(#1 design process.
1J23
4!5 6erifier /verview
http://in.mathworks.com/videos/hdl-verifier-overview-62493.html?type=shadow&shadow_version=lightboxhttp://in.mathworks.com/videos/hdl-verifier-overview-62493.html?type=shadow&shadow_version=lightboxhttp://in.mathworks.com/videos/hdl-verifier-overview-62493.html?type=shadow&shadow_version=lightboxhttp://in.mathworks.com/videos/hdl-verifier-overview-62493.html?type=shadow&shadow_version=lightbox
-
8/20/2019 fpga discription
11/12
4arris Accelerates 6erification of (ignal Processing FPGAs
-
8/20/2019 fpga discription
12/12
reuse" and0or archiving! This improves communication bet.een multi-team design environments
.hich can have several sources for a single pro/ect!