Transcript
Page 1: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

EuCardWP10.6 – LLRF at FLASH

Development of Fast ADC Card for the LLRF System

Samer Bou Habib

Page 2: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Agenda

● Main goal and applications● Function in LLRF● Hardware● System concept● Measurement Result● Future plans

Page 3: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Main goal and Applications

● Fast ADC testing for LLRF● Applications

– Direct Sampling (IQ detection)– Digital phase detection– Amplitude detection

Page 4: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

LLRF at FLASH

Page 5: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

LLRF system with DWCs

Timing

to LO

8 x cavityMaster Oscillator

A & F

PS

klystron RF power transmition

Down-converters

ADC

LO

ADC

LO

ADC

LO

ADC

LO8 x

ADC

LO

ADC

LO

ADC

LO

ADC

LO8 x

ADC

LO

ADC

LO

ADC

LO

ADC

LO8 x

8x forward and reflected power

8x transmitted

Digital/analog feedback controller

DSP/FPGA

DAC

DAC

Vector modulator

Page 6: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

LLRF system with Fast ADCs

Timing

DSP/FPGA

PS

DAC

DAC

Master Oscillatorklystron RF power transmition

8 x cavity

Digital/analog feedback controller

A & F

Vector modulator

8x forward and reflected power

ADC

ADC

8 x

ADC

ADC

8 x

ADC

ADC

8 x

8x transmitted

Page 7: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Benefits

● Replacing DWCs and data-analyzing boards with single design Lower cost Removing problems with DWCs (non-

linearities and drifts)

● Eliminating complex LO generation

Page 8: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Hardware

● Actual– 2 x ATCA board

● 12-bit 500 MSPS 2.3 GHz BW● 14-bit 400 MSPS 1.4 GHz BW

● Future– uTCA Version– Amplitude detector for ADCM– Optical signals phase measurement

Page 9: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

System Concept for Actual Hardware

FPGA (IQ detection,

Pre-processing)

Trigger

Diagnostics

ADCADCADC

8 x

ADCADCADCADCADC

DopasowanieDopasowanieDopasowanieDopasowanieDopasowanieDopasowanieDopasowanieMatching

Pamiec SRAM

Pamiec SRAM

Pamiec SRAMSRAM

1.3 GHz Signal

Reference clock Clock synthesis and distribution

USER

ATCA

External Interfaces

Processor daughter board

Page 10: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

PCB

Page 11: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Measurement Result

● Amplitude stability ~2e-4

0 1 2 3 4 5 6 7

x 104

0.0834

0.0834

0.0834

0.0834

0.0834

0.0835

0.0835

0 1 2 3 4 5 6 7

x 104

-80

-60

-40

-20

0

20

40

RF input

CLK reference

To PC

● IQ detection

Page 12: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Future Plans

● Finish tests for the ATCA boards● Test performance and effect on

FLASH● Prepare boards for the new

standards (uTCA) / future applications

Page 13: EuCard WP10.6 – LLRF  at  FLASH

EuCARD-SRF Annual Review, IPN Orsay, 4-5.05.201

Thank you for your attention

[email protected]


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