EMB308EMB308
Developing a Windows CE Developing a Windows CE 5.0 OAL 5.0 OAL
Mark Plagge – Lead Program ManagerMark Plagge – Lead Program ManagerGreg Prier – BSP Test LeadGreg Prier – BSP Test LeadWindows CE Core OS TeamWindows CE Core OS TeamMicrosoft CorporationMicrosoft Corporation
MManagementanagementTToolsools
CCommunicationsommunications& & MMessagingessaging
Device Update Agent
Software Update Services
Live Communications Server
Exchange Server
Internet Security and Acceleration Server
Speech Server
Image Update
LLocation ocation SServiceservices
MMultimediaultimedia
MapPoint
DirectX
Windows Media
Visual Studio 2005DDevelopment evelopment TToolsools
MFC 8.0, ATL 8.0
Win32NNativeative
MManagedanaged
SServer erver SSideide
LLightweightightweight
RRelationalelationalSQL Server 2005 Express EditionEDB
DDa
taata
PPro
gra
mm
ing
ro
gra
mm
ing
MM
od
el
od
el
DDevice evice BBuilding uilding TToolsools
HHardware/ardware/DDriversrivers
Windows XP DDK
Windows Embedded Studio
Platform Builder
OEM/IHV SuppliedBSP
(ARM, SH4, MIPS)OEM Hardware and Standard Drivers
Standard PC Hardware and Drivers
SQL Server 2005SQL Server 2005 Mobile Edition
ASP.NET Mobile Controls ASP.NET
.NET Compact Framework .NET Framework
Microsoft Operations Manager
Systems Management Server
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
Windows CE 5.0 BSPsWindows CE 5.0 BSPsWindows CE 5.0 BSPs/CSPsWindows CE 5.0 BSPs/CSPs
FamilyFamily BSP/CSPBSP/CSP KernelKernel
ARMARM
Intel Mainstone IIIntel Mainstone II ARMV4IARMV4I
Samsung SMDK-2410Samsung SMDK-2410 ARMV4IARMV4I
CSP Only - Intel Xscale LubbockCSP Only - Intel Xscale Lubbock ARMV4IARMV4I
MIPSMIPS
AMD DBAu1000AMD DBAu1000 MIPSIIMIPSII
AMD DBAu1100AMD DBAu1100 MIPSIIMIPSII
AMD DBAu1500AMD DBAu1500 MIPSIIMIPSII
NEC Solution Gear2 Vr4131NEC Solution Gear2 Vr4131 MIPSII (MIPS16)MIPSII (MIPS16)
NEC Solution Gear2 Vr5500NEC Solution Gear2 Vr5500 MIPSII & II_PF, MIPSIV & IV_FPMIPSII & II_PF, MIPSIV & IV_FP
Broadcom VoIP Reference Broadcom VoIP Reference MIPSIIMIPSII
SHSH SH4 AspenSH4 Aspen SH4SH4
x86x86
x86 (CEPC)x86 (CEPC) x86x86
x86 Emulatorx86 Emulator x86x86
GeodeGeode x86x86
Intel Assabet and Lubbock (use Mainstone II)Intel Assabet and Lubbock (use Mainstone II)
ARM Integrator (use Samsung SMDK2410)ARM Integrator (use Samsung SMDK2410)
SH3 Keywest (deprecated)SH3 Keywest (deprecated)
BSPs NO LONGER BSPs NO LONGER SUPPORTEDSUPPORTED
Windows CE 5.0 KernelsWindows CE 5.0 Kernels
Kernels & OS builds in 4.2 = 9Kernels & OS builds in 4.2 = 9ARMV4, ARMV4I, ARMV4, ARMV4I, ARMV4TARMV4T
MIPSIIBMIPSIIB/16, MIPSII, MIPSII_FP, MIPSIV, MIPSIV_FP/16, MIPSII, MIPSII_FP, MIPSIV, MIPSIV_FP
SH3, SH4SH3, SH4
x86x86
Kernels & OS builds in 5.0 = 7Kernels & OS builds in 5.0 = 7ARMV4I, ARMV4I, ARMV4ARMV4
MIPSII, MIPSII_FP, MIPSIV, MIPSIV_FPMIPSII, MIPSII_FP, MIPSIV, MIPSIV_FP
SH4, SH4, SH3SH3
x86x86
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
BSP Development ProcessBSP Development Process
Test Hardware,Test Hardware,Rom MonitorRom Monitor
Develop Develop Boot LoaderBoot Loader
Clone Reference Clone Reference BSPBSP
Power Power ManagementManagement
Develop OAL Develop OAL (Minimal Kernel)(Minimal Kernel)
Add Add Device DriversDevice Drivers
Package Package (CEC/MSI)(CEC/MSI)
Boot Loader ArchitectureBoot Loader Architecture
A typical development boot loaderA typical development boot loader
blcommonblcommon
OEM codeOEM code
ebooteboot
……
NE
200N
E200
00 RT
L813
RT
L813
99 DP
83815D
P83815
bootpartbootpart
flash FMDflash FMD
EDBG driversEDBG drivers
Bootloader ArchitectureBootloader Architecture
Blcommon – generic boot loader frameworkBlcommon – generic boot loader framework
OEM code – general board init and extensionsOEM code – general board init and extensions
Eboot – Ethernet functions (UDP, DHCP, TFTP)Eboot – Ethernet functions (UDP, DHCP, TFTP)
EDBG drivers – Ethernet driversEDBG drivers – Ethernet drivers3Com 3C90x, AMD AM79C97x, CS8900A, NS 3Com 3C90x, AMD AM79C97x, CS8900A, NS DP83815, NE2000, RealTek RTL8139, SMSC9000 & DP83815, NE2000, RealTek RTL8139, SMSC9000 & SMSC100SMSC100
Bootpart – storage partition managementBootpart – storage partition management
FMD – flash management driverFMD – flash management driverSamsung/Sandisk (NAND), Intel StrataFlash (NOR)Samsung/Sandisk (NAND), Intel StrataFlash (NOR)
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
Windows CE 5.0 BSPsWindows CE 5.0 BSPs
Reduce OS “bring-up” time on OEM hardwareReduce OS “bring-up” time on OEM hardware
Avoid changing the "public" OAL interfaceAvoid changing the "public" OAL interface
Provide production features (power management, performance Provide production features (power management, performance optimizations, IOCTLs, etc.)optimizations, IOCTLs, etc.)
Maximize code re-use (and testing)Maximize code re-use (and testing)
Provide a consistent OAL architecture that can be easily Provide a consistent OAL architecture that can be easily extended/customizedextended/customized
Increase BSP coverage in-the-boxIncrease BSP coverage in-the-boxOne BSP for each supported CPU One BSP for each supported CPU
Integrate BSPs into the IDE CatalogIntegrate BSPs into the IDE Catalog
Integrate BSPs into the Platform WizardIntegrate BSPs into the Platform Wizard
Enable third parties to create BSPs easilyEnable third parties to create BSPs easilyShip CSP drivers for many CPUs and SOCsShip CSP drivers for many CPUs and SOCs
PB Tools - BSP Wizard and IDE toolsPB Tools - BSP Wizard and IDE tools
Enables faster, easier porting to OEM devicesEnables faster, easier porting to OEM devices
PQOAL DesignPQOAL Design
Collection of OAL software libraries organized by CPU architecture (or Collection of OAL software libraries organized by CPU architecture (or model) and by OAL “function”model) and by OAL “function”
Common Code Directory StructureCommon Code Directory Structure
BSP configuration files are located in a single location (platform\<BSP>\BSP configuration files are located in a single location (platform\<BSP>\src\inc)src\inc)
Chip/set Support Package (CSP) drivers share include files that define Chip/set Support Package (CSP) drivers share include files that define hardware registers and layouthardware registers and layout
RTCRTCC
ache
Cach
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ibrary
Lib
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Inte
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t In
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Lib
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Lib
raryL
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Startu
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Startu
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Lib
raryL
ibrary
RT
CR
TC
Lib
raryL
ibrary
KIT
LK
ITL
Lib
raryL
ibrary
OS
Tim
erO
S T
imer
Lib
raryL
ibrary
TimersTimers CachesCaches SerialSerialportport
EthernetEthernetportport
USBUSBportport
OALOAL
KernelKernel
HardwareHardware
Directory Structure ExampleDirectory Structure Example
platform\common\srcplatform\common\src
incinc
ARMARM
commoncommon
cachecache
memorymemory
ARM720TARM720T
ARM920TARM920T
IntelIntel
SamsungSamsung S3C2410S3C2410
inc inc
interruptinterrupt
powerpower
RTCRTC
startupstartup
timertimer
MIPS, SHx, x86MIPS, SHx, x86
commoncommon
platform\<BSP_name>platform\<BSP_name>
cesysgencesysgen
filesfiles
intltrnsintltrns
04090409
… …
srcsrc
bootloaderbootloader
kernelkernel
OALOAL
kernkern
kernkitlkernkitl
kernkitlprofkernkitlprof
incinc
commoncommon
debugdebug
driversdrivers PCMCIAPCMCIA
Common code directoryCommon code directory BSP code directoryBSP code directory
BSP Configuration FilesBSP Configuration Files
BSP configuration files are located in a single BSP configuration files are located in a single location (platform\<BSP>\src\inc)location (platform\<BSP>\src\inc)
Simplifies porting/customization workSimplifies porting/customization work
Consistent file naming schemeConsistent file naming schemeargs.h – bootloader-OAL shared memory structureargs.h – bootloader-OAL shared memory structure
bsp.h – master bsp include filebsp.h – master bsp include file
bsp_base_regs.h – board-level address definitionsbsp_base_regs.h – board-level address definitions
bsp_cfg.h – general BSP configs (device name, clock bsp_cfg.h – general BSP configs (device name, clock settings,…)settings,…)
image_cfg.h – memory layout address definitionsimage_cfg.h – memory layout address definitions
ioctl_cfg.h – definitions used by BSP IOCTL routinesioctl_cfg.h – definitions used by BSP IOCTL routines
ioctl_tab.h – IOCTL function tableioctl_tab.h – IOCTL function table
kitl_cfg.h – KITL transport name/device/driver tablekitl_cfg.h – KITL transport name/device/driver table
oemaddrtab_cfg.inc – (ARM/x86) VA-PA mapping tableoemaddrtab_cfg.inc – (ARM/x86) VA-PA mapping table
Shared DesignShared Design
Chip/set Support Package (CSP) drivers will share include files Chip/set Support Package (CSP) drivers will share include files that define hardware registers and layoutthat define hardware registers and layout
public\common\oak\csp\arm\samsung\s3c2410x\inc:public\common\oak\csp\arm\samsung\s3c2410x\inc:
s3c2410x.hs3c2410x.h
s3c2410x.incs3c2410x.inc
s3c2410x_adc.hs3c2410x_adc.h
s3c2410x_base_regs.hs3c2410x_base_regs.h
s3c2410x_base_regs.incs3c2410x_base_regs.inc
s3c2410x_clkpwr.hs3c2410x_clkpwr.h
s3c2410x_dma.hs3c2410x_dma.h
s3c2410x_iicbus.hs3c2410x_iicbus.h
s3c2410x_iisbus.hs3c2410x_iisbus.h
s3c2410x_intr.hs3c2410x_intr.h
s3c2410x_ioport.hs3c2410x_ioport.h
s3c2410x_lcd.hs3c2410x_lcd.h
s3c2410x_memctrl.hs3c2410x_memctrl.h
s3c2410x_nand.hs3c2410x_nand.h
s3c2410x_pwm.hs3c2410x_pwm.h
s3c2410x_rtc.hs3c2410x_rtc.h
s3c2410x_sdi.hs3c2410x_sdi.h
s3c2410x_spi.hs3c2410x_spi.h
s3c2410x_uart.hs3c2410x_uart.h
s3c2410x_usbd.hs3c2410x_usbd.h
s3c2410x_wdog.hs3c2410x_wdog.h
Creating A BSPCreating A BSP
BSP wizardBSP wizardIDE Tool to clone BSP or create a BSP definition IDE Tool to clone BSP or create a BSP definition
Can add/remove drivers to a BSP definitionCan add/remove drivers to a BSP definition
Export wizardExport wizardIDE Tool to export feature components from the IDE Catalog to IDE Tool to export feature components from the IDE Catalog to other PB usersother PB users
Creates a MS Windows Installer (MSI) fileCreates a MS Windows Installer (MSI) file
CEC editorCEC editorIDE Tool to create and/or edit .CEC filesIDE Tool to create and/or edit .CEC files
A .CEC file defines the properties of an object/component in the A .CEC file defines the properties of an object/component in the IDE catalog IDE catalog
No more .bsp filesNo more .bsp files
Two methods to create a BSPTwo methods to create a BSPUse the command line methodUse the command line method
Use the BSP Wizard Use the BSP Wizard
Both methods rely on cloning a sample BSP Both methods rely on cloning a sample BSP
Creating An OALCreating An OAL
Create directory for OAL code in the BSPCreate directory for OAL code in the BSPplatform\<BSPname>\kernel\oalplatform\<BSPname>\kernel\oal
Add <dirname> to “dirs” file to build OAL with BSPAdd <dirname> to “dirs” file to build OAL with BSP
Required OAL functionsRequired OAL functionsStartupStartup
Debug serialDebug serial
OEMInitOEMInit
System timerSystem timer
Interrupt processingInterrupt processing
Kernel input/output, KITLKernel input/output, KITL
Optional OAL functions (Platform Dependent)Optional OAL functions (Platform Dependent)Real-time clock and timerReal-time clock and timer
Parallel port I/O codeParallel port I/O code
Ethernet port debugEthernet port debug
More information in PB docsMore information in PB docs““How-to Create an OEM adaptation layer”How-to Create an OEM adaptation layer”
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
CE 5.0 Boot SequenceCE 5.0 Boot Sequence
Boot loader startup sequenceBoot loader startup sequence
Startup()Startup()
EbootMain()EbootMain()
BootloaderMain()BootloaderMain()
OEMDebugInit()OEMDebugInit()
OEMPlatformInit()OEMPlatformInit()
OEMPreDownload()OEMPreDownload()
Download OccursDownload Occurs
OEMLaunch()OEMLaunch()
Kernel startup sequenceKernel startup sequence
Startup(Startup())
KernelStart()KernelStart()
ARMInit()ARMInit()
OEMInitDebugSerial()OEMInitDebugSerial()
OEMInit()OEMInit()
KernelInit()KernelInit()
HeapInit()HeapInit()
InitMemoryPool()InitMemoryPool()
ProcInit()ProcInit()
SchedInit()SchedInit()
FirstSchedule()FirstSchedule()
SystemStartupFunc()SystemStartupFunc()
IOCTL_HAL_POSTINITIOCTL_HAL_POSTINIT
Required OAL FunctionsRequired OAL Functions
StartupStartup
Debug SerialDebug Serial
OEMInitOEMInit
System TimerSystem Timer
Interrupt ProcessingInterrupt Processing
Kernel Input/OutputKernel Input/Output
Example: Custom Kernel IOCTLExample: Custom Kernel IOCTL
KITLKITL
StartUpStartUp
First function called when target device bootsFirst function called when target device boots
Purpose is to initialize CPU to known state and Purpose is to initialize CPU to known state and to call the kernel initialization function to call the kernel initialization function (KernelInitialize for x86 and KernelStart on all (KernelInitialize for x86 and KernelStart on all other platforms)other platforms)
ARM ARM exampleexample
LEAF_ENTRY StartUp . . .; Initialize CPU to a known state; Set up OEMAddressTable for KernelStart . . .bl KernelStart . . .; KernelStart should never return
LEAF_ENTRY StartUp . . .; Initialize CPU to a known state; Set up OEMAddressTable for KernelStart . . .bl KernelStart . . .; KernelStart should never return
Debug SerialDebug Serial
OEMInitDebugSerial()OEMInitDebugSerial()Configures Speed, Parity, Stop bit length Configures Speed, Parity, Stop bit length
OEMReadDebugByte()OEMReadDebugByte()Retrieves a byte from the debug monitor Retrieves a byte from the debug monitor port port
OEMWriteDebugByte()OEMWriteDebugByte()Outputs a byte to the debug monitor port Outputs a byte to the debug monitor port
OEMWriteDebugString()OEMWriteDebugString()Writes a string to the debug monitor port Writes a string to the debug monitor port
OEMInit OEMInit
Required task is to set up hardware Required task is to set up hardware and register interrupt for the and register interrupt for the system ticksystem tick
ISRs and HookInterruptISRs and HookInterrupt
Setting Up the Interrupt MapSetting Up the Interrupt MapDefine a mapping of Interrupt IDsDefine a mapping of Interrupt IDs
Mapping can be dynamic at driver load timeMapping can be dynamic at driver load time
Interrupt IDs’ are returned by the ISRs to Interrupt IDs’ are returned by the ISRs to the kernel and are used to link an the kernel and are used to link an incoming IRQ with a software IST incoming IRQ with a software IST
OEMInit: An Example OEMInit: An Example
Void OEMInit() { SetUpInterruptMap(); PCIInitBusInfo(); InitDebugEther(); OEMParallelPortInit() InitPICs(); InitClock(); if (MainMemoryEndAddress == CEPC_EXTRA_RAM_START) { MainMemoryEndAddress += IsDRAM(MainMemoryEndAddress, CEPC_EXTRA_RAM_SIZE); } pKDIoControl = OEMKDIoControl;}
Void OEMInit() { SetUpInterruptMap(); PCIInitBusInfo(); InitDebugEther(); OEMParallelPortInit() InitPICs(); InitClock(); if (MainMemoryEndAddress == CEPC_EXTRA_RAM_START) { MainMemoryEndAddress += IsDRAM(MainMemoryEndAddress, CEPC_EXTRA_RAM_SIZE); } pKDIoControl = OEMKDIoControl;}
Interrupt ProcessingInterrupt Processing
OEMInterruptEnable()OEMInterruptEnable()Performs hardware operations necessary to allow Performs hardware operations necessary to allow a device to generate the specified interrupta device to generate the specified interrupt
IncludesIncludesSetting a hardware priority for the deviceSetting a hardware priority for the device
Setting a hardware interrupt enable portSetting a hardware interrupt enable port
Clearing any pending interrupt conditions from the Clearing any pending interrupt conditions from the device device
OEMInterruptDisable()OEMInterruptDisable()Disables the specified hardware interrupt Disables the specified hardware interrupt
OEMInterruptDone()OEMInterruptDone()Unmasked and reenables of interrupt processingUnmasked and reenables of interrupt processing
Interrupt ProcessingInterrupt Processing
OEMGetInterrupt()OEMGetInterrupt()Used by the any device wanting and IRQ. Example Used by the any device wanting and IRQ. Example PCI bus PCI bus
OEMRequestSysIntr()OEMRequestSysIntr()Used in the OEMIoControl routine to implement Used in the OEMIoControl routine to implement IOCTL_HAL_TRANSLATE_IRQ and IOCTL_HAL_TRANSLATE_IRQ and IOCTL_HAL_REQUEST_SYSINTR IOCTL_HAL_REQUEST_SYSINTR
OEMTranslateIrq()OEMTranslateIrq()Used by the main ISR to translate a non-shareable Used by the main ISR to translate a non-shareable IRQ into a SYSINTRIRQ into a SYSINTR
OEMTranslateSysIntr()OEMTranslateSysIntr()Translates a SYSINTR to its corresponding IRQ Translates a SYSINTR to its corresponding IRQ
System TimerSystem Timer
Make sure the system timer interrupt is Make sure the system timer interrupt is registered with the ISRregistered with the ISR
Program the system timer to generate Program the system timer to generate an interrupt every 1ms an interrupt every 1ms
Can also support variable tickCan also support variable tick
In the system timer ISR, update the In the system timer ISR, update the global system tick counter CurMSec global system tick counter CurMSec and CurTicks. If reschedule time is and CurTicks. If reschedule time is expired then return SYSINTR_Resched expired then return SYSINTR_Resched else SYSINTR_NOPelse SYSINTR_NOP
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
Kernel LibrariesKernel Libraries
LibraryLibrary DescriptionDescriptionkern.exekern.exe kernkitl.exekernkitl.exe kernkitlprof.exekernkitlprof.exe
basickernelbasickernel
kernel w/ dbg kernel w/ dbg supptsuppt
kernel w/ kernel w/ profiling supptprofiling suppt
Nk.libNk.lib Microprocessor-specific Microprocessor-specific Kernel code that MS suppliesKernel code that MS supplies XX XX
Hal.libHal.lib OAL that you implement for OAL that you implement for target HWtarget HW XX XX XX
NkProf.libNkProf.lib Profile version of the MS Profile version of the MS Kernel codeKernel code XX
KITL.libKITL.lib Kernel Independent Kernel Independent Transport Layer (KITL) Transport Layer (KITL) debugging servicesdebugging services XX XX
SMC9000SMC9000 Sample Ethernet debugging Sample Ethernet debugging driver. Must have for KITL driver. Must have for KITL supptsuppt XX XX XX
FullLibcFullLibc Microsoft C Run-Time LibraryMicrosoft C Run-Time Library XX XX XX
Kernel Input/OutputKernel Input/Output
OEMIoControl is called by the kernel when a device driver or OEMIoControl is called by the kernel when a device driver or application program calls the KernelIoControl function application program calls the KernelIoControl function
Extend the Ethernet Debugging InterfaceExtend the Ethernet Debugging Interface
BOOL OEMIoControl(. . .) { switch (dwIoControlCode) { case IOCTL_HAL_SET_DEVICE_INFO : case IOCTL_HAL_REBOOT: . . . default: return FALSE; } return TRUE;}
BOOL OEMIoControl(. . .) { switch (dwIoControlCode) { case IOCTL_HAL_SET_DEVICE_INFO : case IOCTL_HAL_REBOOT: . . . default: return FALSE; } return TRUE;}
Example: Custom Example: Custom Kernel IOCTLKernel IOCTL
#define IOCTL_MY_CONTROL1 \ CTL_CODE(FILE_DEVICE_HAL, 2048, METHOD_NEITHER, FILE_ANY_ACCESS)BOOL OEMIoControl(. . .) { switch (dwIoControlCode) { case IOCTL_MY_CONTROL1: . . . }RetCode = KernelIoControl( IOCTL_MY_CONTROL1 , . . . );
#define IOCTL_MY_CONTROL1 \ CTL_CODE(FILE_DEVICE_HAL, 2048, METHOD_NEITHER, FILE_ANY_ACCESS)BOOL OEMIoControl(. . .) { switch (dwIoControlCode) { case IOCTL_MY_CONTROL1: . . . }RetCode = KernelIoControl( IOCTL_MY_CONTROL1 , . . . );
KITLKITLKernel Independent Transport LayerKernel Independent Transport Layer
Designed to provide an easy Designed to provide an easy way for you to support any way for you to support any debug service debug service
OEM Function to implement OEM Function to implement is OEMKitlINitis OEMKitlINit
Including the KITL support Including the KITL support in the operating in the operating system imagesystem image
Vmini not always necessary. Vmini not always necessary. EDBG driver can talk directly EDBG driver can talk directly to desktopto desktop
Passive KITL also availablePassive KITL also available
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
Optional OAL FunctionsOptional OAL Functions
Real-time Clock and TimerReal-time Clock and Timer
OEMGetExtensionDRAM()OEMGetExtensionDRAM()
Real-time Clock And TimerReal-time Clock And Timer
OEMGetRealTime()OEMGetRealTime()Called by the kernel to get the time from the real-Called by the kernel to get the time from the real-time clocktime clock
OEMSetRealTime() OEMSetRealTime() Sets the real time clock Sets the real time clock
OEMSetAlarmTime()OEMSetAlarmTime()Sets the alarm timeSets the alarm time
OEMQueryPerformanceCounter()OEMQueryPerformanceCounter()Retrieves the current value of the high-resolution Retrieves the current value of the high-resolution performance counter, if one exists performance counter, if one exists
OEMQueryPerformanceFrequency()OEMQueryPerformanceFrequency()Retrieves the frequency of the high-resolution Retrieves the frequency of the high-resolution performance counter, if one existsperformance counter, if one exists
OEMGetExtensionDRAM()OEMGetExtensionDRAM()
pNKEnumExtensionDRAM AND pNKEnumExtensionDRAM AND OEMEnumExtensionDRAMOEMEnumExtensionDRAM
Example 2Example 2 Extended Extended 4MB DRAM 4MB DRAM available at available at 0x818000000x81800000
Example 1Example 1 No extension No extension DRAM DRAM availableavailable
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{ return FALSE; // no extension DRAM}
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{ *lpMemStart = 0x81800000; *lpMemLen = 0x00400000; // 4MB return TRUE;}
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{ return FALSE; // no extension DRAM}
BOOL OEMGetExtensionDRAM(LPDWORD lpMemStart, LPDWORD lpMemLen)
{ *lpMemStart = 0x81800000; *lpMemLen = 0x00400000; // 4MB return TRUE;}
Building OAL and KernelBuilding OAL and KernelNo longer necessary to SYSGEN OAL librariesNo longer necessary to SYSGEN OAL librariesShared OAL code is built just before the BSP directory (platform\Shared OAL code is built just before the BSP directory (platform\common)common)BSP kernel (kern.exe) BSP kernel (kern.exe) sourcessources file: file:TARGETLIBS= \TARGETLIBS= \ $(_COMMONOAKROOT)\lib\$(_CPUDEPPATH)\nk.lib \$(_COMMONOAKROOT)\lib\$(_CPUDEPPATH)\nk.lib \ $(_TARGETPLATROOT)\lib\$(_CPUDEPPATH)\oal.lib \$(_TARGETPLATROOT)\lib\$(_CPUDEPPATH)\oal.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_startup_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_startup_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_abort_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_abort_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_cache_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_cache_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_memory_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_memory_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_io_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_io_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_intr_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_intr_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_timer_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_timer_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_rtc_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_rtc_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_ioctl_s3c2410x.lib \$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_ioctl_s3c2410x.lib \ $(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_other.lib \$(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_other.lib \ $(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_log.lib \$(_PLATCOMMONLIB)\$(_CPUDEPPATH)\oal_log.lib \ $(_COMMONOAKROOT)\lib\$(_CPUINDPATH)\ddk_io.lib \$(_COMMONOAKROOT)\lib\$(_CPUINDPATH)\ddk_io.lib \ $(_COMMONOAKROOT)\lib\$(_CPUDEPPATH)\kitl.lib \$(_COMMONOAKROOT)\lib\$(_CPUDEPPATH)\kitl.lib \ $(_COMMONOAKROOT)\lib\$(_CPUINDPATH)\fulllibc.lib \$(_COMMONOAKROOT)\lib\$(_CPUINDPATH)\fulllibc.lib \ $(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_ethdrv_cs8900a.lib$(_PLATCOMMONLIB)\$(_CPUINDPATH)\oal_ethdrv_cs8900a.lib
OAL Power OAL Power Management Functions Management Functions
OAL Power Management FunctionsOAL Power Management FunctionsOEMIdle – Puts the CPU in reduced power modeOEMIdle – Puts the CPU in reduced power mode
OEMPowerOff – Puts the CPU in suspend modeOEMPowerOff – Puts the CPU in suspend mode
Device Drivers Power Management FunctionsDevice Drivers Power Management Functionsxxx_PowerDown, xxx_PowerUp for stream xxx_PowerDown, xxx_PowerUp for stream interface driversinterface drivers
Device-specific functions for other driversDevice-specific functions for other drivers
SetInterruptEventSetInterruptEvent
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
OAL TestsOAL Tests
Available in CE 5.0Available in CE 5.0Timers/Clock supportTimers/Clock support
CachesCaches
IOCTLsIOCTLs
Future TestsFuture TestsInterruptsInterrupts
Memory ConfigurationMemory Configuration
KITL and VMINIKITL and VMINI
BootloaderBootloader
Etc.Etc.
Test HarnessTest Harness
CETK testsCETK tests
Can also be run from the standard shellCan also be run from the standard shell
OAL Test RequirementsOAL Test RequirementsBooting TinykernBooting Tinykern
KITL connection KITL connection
OAL Timer TestsOAL Timer Tests
Three clocks: GTC, RTC, and QPCThree clocks: GTC, RTC, and QPC
The Test currently checksThe Test currently checksResolutionResolution
Always increasing (except rollover)Always increasing (except rollover)
Clock driftClock drift
Compares results against thresholdsCompares results against thresholds
Cache TestingCache Testing
Currently verify correctness, Currently verify correctness, not performancenot performance
Read and write different patterns into Read and write different patterns into the cache, exercising the cache, exercising boundary conditionsboundary conditions
Allow the tester to confirm the Allow the tester to confirm the cache parameterscache parameters
IOCTL TestingIOCTL Testing
Confirm that an errant call won’t crash Confirm that an errant call won’t crash the kernelthe kernel
IOCTL_HAL_GET_DEVICEIDIOCTL_HAL_GET_DEVICEID
IOCTL_HAL_GET_UUIDIOCTL_HAL_GET_UUID
More to comeMore to come
More InformationMore Information
PB docsPB docs
Source codeSource code
LabLabTesting the Windows CE 5.0 OALTesting the Windows CE 5.0 OAL
Thursday 11:15 – 12:30Thursday 11:15 – 12:30
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
While at MEDC 2005…While at MEDC 2005…Fill outFill out an evaluation for this session an evaluation for this session
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Tools & ResourcesTools & Resources
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ToolsTools
BuildBuild DevelopDevelop
AgendaAgenda
Windows CE 5.0 BSPs and KernelsWindows CE 5.0 BSPs and KernelsDevelopment ProcessDevelopment ProcessOALOAL
Architecture and DesignArchitecture and DesignBoot Sequence and Required OAL FunctionsBoot Sequence and Required OAL FunctionsKernel and KITLKernel and KITLOptional OAL FunctionsOptional OAL FunctionsBuilding Building Power ManagementPower ManagementOAL Testing – Greg PrierOAL Testing – Greg Prier
MEDC Call to ActionMEDC Call to ActionQuestions?Questions?Additional InformationAdditional Information
Best Practices/RecommendationsBest Practices/Recommendations
Questions?Questions?
OAL Best PracticesOAL Best Practices
Enable KITLEnable KITLKernel Independent Transport LayerKernel Independent Transport Layer
Provides easy way to support any debug service Provides easy way to support any debug service
Include KITL support in the OS imageInclude KITL support in the OS image
Enable Kernel Tracker (CELOG)Enable Kernel Tracker (CELOG)CELog is the Event Tracking engine that’s loaded into CELog is the Event Tracking engine that’s loaded into the Kernelthe Kernel
PB ships a standard CELOG DLLPB ships a standard CELOG DLL
To enable event tracking, call LoadKernelLibrary with To enable event tracking, call LoadKernelLibrary with celog.dllcelog.dll
Enable Ethernet sharing if single port(VMINI)Enable Ethernet sharing if single port(VMINI)public\common\oak\drivers\ethdbg\vbridgepublic\common\oak\drivers\ethdbg\vbridge
public\common\oak\drivers\ethdbg\vmini public\common\oak\drivers\ethdbg\vmini
OAL Best PracticesOAL Best Practices
Implement PM Functions Implement PM Functions OEMIdleOEMIdle: Puts CPU in reduced power mode: Puts CPU in reduced power mode
OEMPowerOffOEMPowerOff: Puts CPU in suspend mode: Puts CPU in suspend mode
xxxxxx_PowerDown_PowerDown, , xxxxxx_PowerUp_PowerUp for stream for stream interface driversinterface drivers
Implement unique device ID for DRM useImplement unique device ID for DRM useImplement IOCTL_HAL_GET_UUID Implement IOCTL_HAL_GET_UUID
ID based upon an OEM-defined device ID based upon an OEM-defined device hardware identifier hardware identifier
OAL Best PracticesOAL Best Practices
Reuse the BSP code provided in CE 5.0Reuse the BSP code provided in CE 5.0If the %_WINCEROOT%\Platform\Common If the %_WINCEROOT%\Platform\Common implementation does not meet your needs, only implementation does not meet your needs, only copy the library that you need to replacecopy the library that you need to replace
Reduce environment variable useReduce environment variable useCreate a different BSP directory for each variation Create a different BSP directory for each variation instead of creating just one BSP directoryinstead of creating just one BSP directory
Follow the layout and naming scheme for Follow the layout and naming scheme for directories and files so that code can be directories and files so that code can be located more easily located more easily
OAL Best Practices (Security)OAL Best Practices (Security)
Review your BSP codeReview your BSP code
Validate your inputs to make sure that you are only using Validate your inputs to make sure that you are only using valid datavalid data
Make sure that the pointer being provided as data input is not NULL. Make sure that the pointer being provided as data input is not NULL. If you know what the data format should look like, make sure that you If you know what the data format should look like, make sure that you validate the data and not use it if the format is wrongvalidate the data and not use it if the format is wrong
Validate the arguments for the IOCTLsValidate the arguments for the IOCTLsAvoid implementing code in the IOCTL that could potentially open Avoid implementing code in the IOCTL that could potentially open your system to attacks; Always review your IOCTL code for your system to attacks; Always review your IOCTL code for security concernssecurity concerns
Catch poorly written DMA drivers that use or overuse the Catch poorly written DMA drivers that use or overuse the FlushDCache or OEMCacheRangeFlush functions FlushDCache or OEMCacheRangeFlush functions
Overuse of these two functions in OEM calls or application calls can Overuse of these two functions in OEM calls or application calls can slow down the systemslow down the system
Test your images before releasing themTest your images before releasing them
Make sure that you remove code used only for development Make sure that you remove code used only for development purposes from your final code or productpurposes from your final code or product
Shared InterruptsShared InterruptsIssue/Concern Issue/Concern – Providing a single mask for more than one interrupt may results in missed – Providing a single mask for more than one interrupt may results in missed interrupts.interrupts.
Recommendation Recommendation – Provide a mask for each interrupt as close to the interrupts as possible.– Provide a mask for each interrupt as close to the interrupts as possible.
Issue/ConcernIssue/Concern – Mixing edge and level triggering on shared interrupts may result in missed – Mixing edge and level triggering on shared interrupts may result in missed interrupts.interrupts.
RecommendationRecommendation – Don’t mix edge and level triggering on shared interrupts. – Don’t mix edge and level triggering on shared interrupts.
Int 1Int 1
Int 2Int 2X
Int 1Int 1
Int 2Int 2 X
X
X = Interrupt Mask= Interrupt Mask
Int 1Int 1
Int 2Int 2
X = Interrupt Mask= Interrupt Mask
LX
X
Int 1Int 1
Int 2Int 2
X
X
Int 1Int 1
Int 2Int 2
X
XL
L
GIISR.dllGIISR.dll
OAL ISROAL ISRInt #1Int #1
Int #nInt #n
Shared InterruptsShared Interrupts wavedev.dllwavedev.dll
UHCI.dllUHCI.dll
UART.dllUART.dllX
X
X
Generic Installable ISR. Generic Installable ISR. Common code keeps track Common code keeps track of all interrupt devices of all interrupt devices associated with IRQassociated with IRQ
Put highest Put highest priority and most priority and most often interrupts often interrupts at topat top
Drivers must Drivers must register register Address and Address and Mask to Mask to GIISR.dllGIISR.dll
Installable ISR HandlerInstallable ISR Handler
RecommendationRecommendationUse GIISR.dll when sharing interrupts to keep ISR in OAL Use GIISR.dll when sharing interrupts to keep ISR in OAL simple, which will avoid confusion when simple, which will avoid confusion when adding/deleting/changing interruptsadding/deleting/changing interrupts
GIISR.dll allows drivers to be plugged in dynamicallyGIISR.dll allows drivers to be plugged in dynamically
** Current Macallan plans are to support up to 64 ** Current Macallan plans are to support up to 64 Total SYSINTR; TBD on the number of those to be Total SYSINTR; TBD on the number of those to be user SYSINTRuser SYSINTR
UART2.dllUART2.dll
UART3.dllUART3.dll
UART1.dllUART1.dllX
X
X
ISRISRSYSINTRSYSINTRISTISTSharingSharing
SYSINTR DesignSYSINTR Design
Issue/ConcernIssue/ConcernWindows CE provides for 16 reserved and 24 user SYSINTR; As Windows CE provides for 16 reserved and 24 user SYSINTR; As SOC’s (for example) become more and more prevalent, the need for SOC’s (for example) become more and more prevalent, the need for more than 24 user SYSINTR is neededmore than 24 user SYSINTR is needed
RecommendationRecommendationUse IST sharing to minimize the number of SYSINTR needed by Use IST sharing to minimize the number of SYSINTR needed by the designthe design
CPUCPU Host BridgeHost Bridge
DeviceDevice
PCI BusPCI Bus
RAMRAM
DMADMA
IOCTL_HAL_REBOOTIOCTL_HAL_REBOOT
RecommendationRecommendationImplement IOCTL_HAL_REBOOT to be able to reset all board logic; Make sure Implement IOCTL_HAL_REBOOT to be able to reset all board logic; Make sure board level reset reinitializes to boot time stateboard level reset reinitializes to boot time state
This IOCTL supports a warm boot of the target device; A request to perform a This IOCTL supports a warm boot of the target device; A request to perform a warm boot is made by calling the OEMIoControl function with warm boot is made by calling the OEMIoControl function with IOCTL_HAL_REBOOTIOCTL_HAL_REBOOT
If a device calls for a reboot and it uses DMA, IOCTL_HAL_REBOOT takes care of If a device calls for a reboot and it uses DMA, IOCTL_HAL_REBOOT takes care of memory issues to make sure that RAM doesn’t continue to be updated through DMA memory issues to make sure that RAM doesn’t continue to be updated through DMA from the devicefrom the device
CPUCPUHost BridgeHost Bridge
DeviceDevice
PCI BusPCI Bus
RAMRAM
Aperture RegistersAperture Registers
PCI Host Bridge Aperture RegistersPCI Host Bridge Aperture Registers
Issue/ConcernIssue/ConcernThere is typically not enough space in the memory aperture There is typically not enough space in the memory aperture range in the host bridgerange in the host bridge
RecommendationRecommendationUse PCI cards with a suitable amount of memory for the for Use PCI cards with a suitable amount of memory for the for the system selectedthe system selected
Example – Perm3 requires 128kb of PCI memory from the PCI Example – Perm3 requires 128kb of PCI memory from the PCI bus. Some PCI busses on have 128kb of memory; This bus. Some PCI busses on have 128kb of memory; This starves all other PCI devicesstarves all other PCI devices
CPUCPU
PCI/PCMCIAPCI/PCMCIABridgeBridge
PCI BusPCI Bus
RAMRAM
LCDLCD Host BridgeHost Bridge
802.11b802.11b
PCI Bus Mastering (DMA)PCI Bus Mastering (DMA)
Issue/ConcernIssue/ConcernThere are typically issues in the way that the PCI bus arbitrates There are typically issues in the way that the PCI bus arbitrates devices that are on the bus; Poor arbitration design can lead to devices that are on the bus; Poor arbitration design can lead to starving other devices, system resources, or hanging the devicestarving other devices, system resources, or hanging the device
RecommendationRecommendationUse proper bus arbitration to allow other devices to use system Use proper bus arbitration to allow other devices to use system resources when neededresources when needed
Example – PCMCIA 802.11b card owning the bus too long can Example – PCMCIA 802.11b card owning the bus too long can lead to starving of the LCD because the 802.11b card is taking lead to starving of the LCD because the 802.11b card is taking up all CPU timeup all CPU time
CPUCPU
Host BridgeHost BridgeDeviceDevice
PCI BusPCI Bus
RAMRAM
DMADMA
DMA Routines in CEDDKDMA Routines in CEDDKRecommendationRecommendation
Utilize the CEDDK DMA Routines. CEDDK is an essential tool for creating Utilize the CEDDK DMA Routines. CEDDK is an essential tool for creating platform independent device driversplatform independent device drivers
Abstraction of Bus ArchitecturesAbstraction of Bus Architectures
Abstraction of I/O mechanismsAbstraction of I/O mechanisms
Abstraction of DMA buffer allocationAbstraction of DMA buffer allocationHalTranslateSystemAddress()HalTranslateSystemAddress()
Translates a system wide address to a bus relative addressTranslates a system wide address to a bus relative address
Default implementation is a 1:1 mapping on PCI onlyDefault implementation is a 1:1 mapping on PCI only
Assumes PCI buses all have access to full RAM space via host bridgeAssumes PCI buses all have access to full RAM space via host bridge
HalAllocateCommonBuffer()HalAllocateCommonBuffer()
Allocates a buffer of contiguous physical memory for DMA usageAllocates a buffer of contiguous physical memory for DMA usage
Does NOT allocate DMA channelsDoes NOT allocate DMA channels
CEDDK does not provide any abstraction for DMA controllers at this pointCEDDK does not provide any abstraction for DMA controllers at this point
HalFreeCommonBuffer()HalFreeCommonBuffer()
Releases a buffer allocated with HalAllocateCommonBuffer()Releases a buffer allocated with HalAllocateCommonBuffer()
Normally only used when the driver is unloadingNormally only used when the driver is unloading
CPUCPU
PCI/PCMCIAPCI/PCMCIABridgeBridge
PCI BusPCI Bus
Host BridgeHost Bridge
DeviceDevice
Byte Enable LinesByte Enable Lines
DeviceDevice
CPU Byte Enable LinesCPU Byte Enable Lines
Issue/ConcernIssue/ConcernVariable width transfer bus needs to enable byte lines on Variable width transfer bus needs to enable byte lines on reads and writes; Current designs only provide for bytes reads and writes; Current designs only provide for bytes lanes on writes, which will cause problems with destructive lanes on writes, which will cause problems with destructive read operationsread operations
RecommendationRecommendationEnable byte lines on buses with variable width transfers for Enable byte lines on buses with variable width transfers for reads and writesreads and writes
Multiple Hardware TimersMultiple Hardware Timers
Issue/ConcernIssue/ConcernSystem that provide a single timer for multiple System that provide a single timer for multiple functions can lead to clock error issuesfunctions can lead to clock error issues
RecommendationRecommendationProvide a single timer that is used for the system Provide a single timer that is used for the system 1ms TIC.1ms TIC.
Provide additional timers for profilers and other Provide additional timers for profilers and other OS, Bus, Multimedia needs OS, Bus, Multimedia needs
Fixed interval timers should be avoided in mobile Fixed interval timers should be avoided in mobile battery-powered systems as there is no way for battery-powered systems as there is no way for the kernel to conserve power with OEMIdlethe kernel to conserve power with OEMIdle
Peripheral DevicesPeripheral Devices
RecommendationsRecommendationsUSB Function controller should be able perform disconnect USB Function controller should be able perform disconnect signal and then connect signal either by reset or by program; signal and then connect signal either by reset or by program; If these signals are not connected, Windows XP may not be If these signals are not connected, Windows XP may not be able to determine what state the device is in and ignore the able to determine what state the device is in and ignore the device during device initialization or suspend/resume; USB device during device initialization or suspend/resume; USB cable may need to be physically disconnect and reconnected cable may need to be physically disconnect and reconnected to resolveto resolve
Ethernet MAC – Provide a default MAC address for all Ethernet MAC – Provide a default MAC address for all peripheral devices and make sure that they all have unique peripheral devices and make sure that they all have unique subnet addresses; MAC addresses located in flash can be subnet addresses; MAC addresses located in flash can be erased; We recommend locating the MAC address in a read erased; We recommend locating the MAC address in a read only locationonly location
Ethernet MAC – Provide DMA support in Ethernet ControllersEthernet MAC – Provide DMA support in Ethernet Controllers
OEMAddressTableOEMAddressTableIssue/ConcernIssue/Concern
Set up the OEMAddressTable efficiently Set up the OEMAddressTable efficiently
RecommendationRecommendationDon’t overlap AddressDon’t overlap Address
Make sure most commonly used components at top of listMake sure most commonly used components at top of list
Make sure design is consistent with config.bibMake sure design is consistent with config.bib
he data must be declared in a READONLY section and there must be at least one non-zero he data must be declared in a READONLY section and there must be at least one non-zero entry for the structure to be valid entry for the structure to be valid
For x86 platforms, the first entry must identify RAM, and it must start at 0x80000000 For x86 platforms, the first entry must identify RAM, and it must start at 0x80000000
For ARM platforms, 0x80000000 can be mapped to anything For ARM platforms, 0x80000000 can be mapped to anything
The Size must be a multiple of 4MB for x86 platforms and a multiple of 1MB for ARM; The The Size must be a multiple of 4MB for x86 platforms and a multiple of 1MB for ARM; The last entry of the table must be zeroed. You can leave holes between ranges but you cannot last entry of the table must be zeroed. You can leave holes between ranges but you cannot have overlapping rangeshave overlapping ranges
The only valid virtual memory mapping range is from 0x80000000 to 0x9FFFFFFF; For The only valid virtual memory mapping range is from 0x80000000 to 0x9FFFFFFF; For every entry created in the table, the kernel creates two virtual address ranges; One exists every entry created in the table, the kernel creates two virtual address ranges; One exists in the virtual address range from 0x80000000 to 0x9FFFFFFF and is memory that has in the virtual address range from 0x80000000 to 0x9FFFFFFF and is memory that has caching and buffering enabled; The second exists in the virtual address range from caching and buffering enabled; The second exists in the virtual address range from 0xA0000000 to 0xBFFFFFFF and has caching and buffering disabled0xA0000000 to 0xBFFFFFFF and has caching and buffering disabled
Any memory that is not mapped at boot time cannot be directly accessed by an interrupt Any memory that is not mapped at boot time cannot be directly accessed by an interrupt service routine (ISR) without first calling CreateStaticMapping to map the addressservice routine (ISR) without first calling CreateStaticMapping to map the address
OEMCacheRangeFlushOEMCacheRangeFlush
RecommendationRecommendationImplement OEMCacheRangeFlush correctly and efficientlyImplement OEMCacheRangeFlush correctly and efficiently
Use pre-configured OEMCacheRangeFlush styleUse pre-configured OEMCacheRangeFlush style
OEMCacheRangeFlush replaces calls to FlushDCache, FlushICache, OEMCacheRangeFlush replaces calls to FlushDCache, FlushICache, and TLBClear in Windows CE .NET 4.2 and later.and TLBClear in Windows CE .NET 4.2 and later.
If you are implementing this function you should perform TLB If you are implementing this function you should perform TLB flushes at the end of the function. For example, if flushes at the end of the function. For example, if dwFlags==(CACHE_SYNC_DISCARD|CACHE_SYNC_FLUSH_TLB, the dwFlags==(CACHE_SYNC_DISCARD|CACHE_SYNC_FLUSH_TLB, the cache discard operation is usually performed before the TLB flushcache discard operation is usually performed before the TLB flush
Some of the CSP routines reference global variables containing Some of the CSP routines reference global variables containing cache and TLB size information; Your platform must resolve these cache and TLB size information; Your platform must resolve these variables. You can further optimize such CSP implementations by variables. You can further optimize such CSP implementations by hard-coding variables in a private implementation of hard-coding variables in a private implementation of OEMCacheRangeFlush in your platform; If you want to modify or OEMCacheRangeFlush in your platform; If you want to modify or override CSP implementations of caching code, you must put the override CSP implementations of caching code, you must put the relevant source files in the Kernel\Buildexe directory and modify relevant source files in the Kernel\Buildexe directory and modify each of the source files in its subdirectories to build the fileeach of the source files in its subdirectories to build the file
© 2005 Microsoft Corporation. All rights reserved.This presentation is for informational purposes only. Microsoft makes no warranties, express or implied, in this summary.