![Page 1: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/1.jpg)
• Design a 4-bit ALU that implements the following set of operations with only the following components (assume 2’s complement number representation, no need to implement overflow circuit)
– 1-bit Full-Adders (FA)
– 2-input AND/OR/XOR gates
– Inverters
– 2:1 MUX
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
0
1
0
1
0
1
0
Add
Subtract
Increment
Decrement
Multiply by 2
Divide by 2
Function Name
Bitwise-AND
Bitwise-OR
A + B
A – B
A + 1
A – 1
A * 2
A / 2
F =
A AND B
A OR B
M2 M1 M0
![Page 2: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/2.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
![Page 3: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/3.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
![Page 4: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/4.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
A * 2 = left-shift
e.g. 3 * 2 = “011” * 2 = “110” = 6
A / 2 = right-shift
e.g. 3 / 2 = “011” / 2 = “001” = 1
0 1
MUX
Fi
M2
0 1
MUX M1
![Page 5: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/5.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
A * 2 = left-shift
e.g. 3 * 2 = “011” * 2 = “110” = 6
A / 2 = right-shift
e.g. 3 / 2 = “011” / 2 = “001” = 1
![Page 6: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/6.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
![Page 7: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/7.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
![Page 8: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/8.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
![Page 9: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/9.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
![Page 10: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/10.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
0 1
MUX M1
Bi M0
![Page 11: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/11.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
0 1
MUX M1
Bi M0
![Page 12: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/12.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
0 1
MUX M1
Bi M0
M0
![Page 13: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/13.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
0 1
MUX M1
Bi M0
M0
![Page 14: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/14.jpg)
M2
0
0
0
0
1
1
0
0
M1 M0
1
0
1
0
Add
Subtract
Increment
Decrement
Function Name
A + B
A – B
A + 1
A – 1
F =
1
1
1
1
1
1
0
0 1
0
1
0
Multiply by 2
Divide by 2
Bitwise-AND
Bitwise-OR
A * 2
A / 2
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
Bi
NOT(Bi)
“0”
“1”
C0
0
1
1
0
0 1
MUX M1
Bi M0
M0
M1 M0
C0
![Page 15: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/15.jpg)
M2
0
0
0
0
M1 M0 Function Name F =
1
1
1
1
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
0 1
MUX M1
Bi M0
M0
M1 M0
C0
![Page 16: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/16.jpg)
M2
0
0
0
0
M1 M0 Function Name F =
1
1
1
1
1
1 1
0 Bitwise-AND
Bitwise-OR
A AND B
A OR B
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
0 1
MUX M1
Bi M0
M0
M1 M0
C0
![Page 17: Design a 4-bit ALU that implements the following set of complement …cseweb.ucsd.edu/classes/fa11/cse140-a/Datapath Example.pdf · 2011-12-03 · •Design a 4-bit ALU that implements](https://reader033.vdocuments.mx/reader033/viewer/2022042110/5e8b88f6be084c7d3d637557/html5/thumbnails/17.jpg)
M2
0
0
0
0
M1 M0 Function Name F =
1
1
1
1
0 1 Divide by 2 A / 2
0 1
MUX
Fi
M2
0 1
MUX M1
0 1
MUX M0
Ai-1 Ai+1
0 1
MUX
Ai Bi
M0
Ai Bi
FA Ci Ci+1
Ai
0 1
MUX M1
Bi M0
M0
M1 M0
C0
1 0 0 Multiply by 2 A * 2