Download - CSFB Annual Technology Conference
CSFB Annual Technology ConferenceDecember 2, 2004
Safe Harbor Statement
Under the Private Securities Litigation Reform Act of 1995:
Except for historical information, the matters discussed in this presentation that may be considered forward-looking statements
may be subject to certain risks and uncertainties that could cause the actual results to differ materially from those projected, including uncertainties in
the market, pricing, competition, procurement and manufacturingefficiencies, and other risks detailed from time to
time in the Company’s SEC reports. The Company assumes no obligation to update the information in this presentation.
What is a Photomask?
Photomasks, or reticles, are a critical enabling technology in the fabrication of high performance semiconductors
Photomask demand is being accelerated by:• New design activity• Rapidly changing IC performance requirements• Shorter IC life cycles• Increased outsourcing & industry consolidation
IC designers incorporate sub 180 nanometer technologies into their products at a faster rate
Photomask Technology is Critical to Supporting Wafer Lithography ...Advanced wafer lithography strategies put photomasks into critical path
• Wafer lithography drives semiconductor fab strategy
High-end photomasks are essential in resolving shrinking features
• As well as being critical to maximizing the performance of maturing technologies
Advanced photomasks drive favorable investment returns
• Photomasks enhanced with phase shift or OPC reduce the cost of high performance chips and extend the life of installed lithography tools
Technology, economics
and time-to-market
forces are driving
global semiconductor
companies to become
increasingly more
selective in choosing
strategic suppliers
Increased willingness to release 180nm node designs
130nm transition proceeding steadily
Cross over to 90nm for leading-edge customers is starting
Pricing stable
Today’s Business Environment
Mask Cost only Represents 8% of Development Cost
Wafers1%
Boards2% Masks
8%
Software28%
Apps3%
Test Engineering
7%
Product Engineering
12%
I/O Design5%
Logic Design34%
But it is a critical enabling technology.
Source: Synopsys, Altera, 90nm development
The only way to bring the development cost down is to have all involved work together.
Key Global Objectives
Differentiate from competitors through core values – TECHNOLOGY, SERVICE, SPEED & COST
Consolidate high-end market share gains• 130nm – aggressive market penetration• 90nm – accelerate PoR quals to match customer transitions
NTL Mix & Match capability offers local (regional) support and faster cycle times matching into foundry processes
Relentless improvement in global manufacturing efficiency and intensified focus on profitability
Improve prototype efficiency – reduce cycle times• Extensive use of proprietary automation – CyberMask™ & MaskPilot™• Integrating the Lithography Plane
Key Regional ObjectivesAsia:
Expand foundry penetration in Korea, Taiwan & Singapore• Provide seamless support for customers in Europe, Japan and North America
Expand presence in China
Europe:Leverage strategic position at Crolles Alliance
• One of two mask suppliers• Leverage early role in supporting 65nm process development
Working with IMEC on 193nm Immersion
North America:Accelerate 90nm penetrationLeverage 65nm manufacturing line and early learning cycles
• PLAB is only US merchant with 65nm capability operating today!
Technology Overview
Immersion Lithography-What does it mean for masks?
Immersion lithography enables improved feature resolution of sub-wavelength features on the wafer
• Requires using a fluid (water) to increase the numerical aperture of a lens to a factor greater than 1
• Highest numerical aperture today is about 0.85
Initial use of immersion will temporarily lighten the burden placed on enhanced masks
Node shrinks and transition to next node then accelerate the need for enhanced masks for ultra critical and critical levels beginning with 65nm designs
Lithography Technology Landscape
Extension of 193nm assured with Immersion• Replacing 157nm for 45nm and 32nm nodes
Design complexity creating opportunities to proactively address Yield , Time-to-Market and Cost
• All data intensive systems need to be fully integrated with highlevels of automation
• Joint development arrangements critical to early learning cycle success
Emerging Nanotechnology applications built on lithographic processes open new markets
• Leveraging ways to apply core competencies in patterning, quartzetch, modeling/simulation
Corporate Technology as a Differentiator…
Masks are pivotal to the Design-to-Silicon realization flow• Need to compensate for process margin eroding effects throughout
the process from layout to wafer build
Customers increasingly rely on mask suppliers to define the best Reticle Enhancement Technology (RET) solution
Immersion is an opportunity to apply RET integration models through 2009 and beyond
Rapid assessment of RET options enables cost effective Design-to-Silicon cycles
• Materials playing a larger role
Vector Tool Write Time ImpactD
esig
nV
ecto
r
Model-Based OPCRule-Based OPCNo OPC
12 Shots 27 Shots2 Shots
Impact of Model-Based OPC
Nominal design is shaded.OPC version is fractured into rectangles.Up to 10× increase in shape count when OPC applied.Several hundred billion geometries on mask at 100 nm node.
Corporate Technology Group-A Photronics Competitive Advantage
90nm process transferred to manufacturing ahead of volume ramp/demand curve for this node
Accelerating 65nm programs with customer focused RET implementation
Initiated advanced 45nm and 32nm research for 193nm immersion lithography
Modeling/Simulation, Rapid Prototyping, and Process Integration programs support the Integrated Lithography Plane strategy
What Is the Lithography Plane?
High K1 Environment
LogicalDesign
Design Capture
Simulation/Emulation
Synthesis
Physical Design
Place & Route
Verification, Extraction and Analysis
ResolutionEnhancement
Mask
Data Fracture
Mask write
Defect Inspect
Repair
Wafer ImageFormation
IlluminationStrategy
Resist
Etch
Logical Design
Design Capture
Simulation/Emulation
Synthesis
Physical Design
Place & Route
Verification, Extraction and Analysis
ResolutionEnhancement
Mask
Data Fracture
Mask write
Defect Inspect
Repair
Wafer ImageFormation
IlluminationStrategy
Resist
Etch
LogicalDesign
PhysicalDesign Mask
WaferImage
Formation
Integrating for Low K1 Environment
•Eliminate “throw over the wall” mentality
•Increase communication between vested interests •Eliminate the silos
Low K1 Environment Increases Feedback Need
LogicalDesign
PhysicalDesign Mask
WaferImage
Formation
Tested Devices
Financial Overview
Photronics Financial Highlights
Strategically scaled infrastructure• Intense focus on profitability across all levels of the organization
Benefit from technology driven demand
Multiple sources of margin leverage• Improving mix shift & stable pricing• Global presence
Increased global market share
Improved liquidity• $288 million working capital
Leverage, Leverage, Leverage
$0.0
$20.0
$40.0
$60.0
$80.0
$100.0
$120.0
Q4-02 Q1-03 Q2-03 Q3-03 Q4-03 Q1-04 Q2-04 Q3-040%5%10%15%20%25%30%35%40%
Quarterly Revenue $M % High End (180nm & below)
Quarterly Revenue & High-End Mix
Operating Income..Most Recent Quarters(excludes consolidation & restructuring charges)
-$5.0
$0.0
$5.0
$10.0
$15.0
$20.0
Jan-02 Apr-02 Jul-02 Oct-02 Jan-03 Apr-03 Jul-03 Oct-03 Jan-04 Apr-04 Jul-04
$103.1
$103.7
Improving Liquidity Solid Financial Position
$ in millionsAugust 1,
2004Fiscal YearEnded 2003
Total Assets $865$882
Long Term Debt $368$356
Equity $308$330
Cash and Short Term Investments $250 $232
Working Capital $288 $258
Current Ratio 4.6:1 4.2:1
YTD 04August 1, 2004
Cash Flow$ in millions
Fiscal YearEnded 2003
Operations $83$ 81
Capital Expenditures (47)(53)
Free Cash Flow 3628
Net Repayment of Debt (87)(14)
Other, Net 64
Increase in Cash and Investments $100 $18
Net Issuance of Convertible Debt - 145
Free Cash Flow – Rolling Four Quarters
-$30
-$20
-$10
$0
$10
$20
$30
$40
$50
$60
$70
Apr-02 Jul-02 Oct-02 Jan-03 Apr-03 Jul-03 Oct-03 Jan-04 Apr-04 Jul-04
$3
$36
$ 63
Goal
Photronics…Strategically Positioned
Leverage global & knowledge infrastructure• Critical in differentiating suppliers at 130nm & 90nm• Emerging Nanotechnology applications (Microfluidics, photonics,
diffractive optics)
Commercialize 65nm & 45nm technology by establishing PLAB as the supplier with the Process of Record
Integrating the Lithography Plane is a crucial element in all activities below 90nm
Maintain profitability!
CSFB Annual Technology ConferenceDecember 2, 2004