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CHAPTER 6
ADAPTIVE AND FIXED RATE BIT-LOADING WITH
AWGN AND IMPULSE NOISE FOR A POWER LINE
WITH INDUCTIVE LOADS
6.1 Introduction
In the previous chapter the channel capacity was computed by adaptive bit-
loading over all tones by considering the SNR profile of different power line
topologies with AWGN noise and impulse noise that is predominant over power lines.
The sources of impulse noise were also discussed. In this chapter the effects of loads
connected to the bridge taps are discussed. The combined effect of impulse noise and
inductive loads are analysed, and observed that it has a significant impact on the SNR
as the numbers of taps are increased. A solution that sufficiently improves the SNR
is suggested and demonstrated in this chapter.
The electrical appliances that share the same power line network generate
noises which are stationary, cyclo-stationary or impulsive. Among the three,
impulsive noise is the main source of interference which causes signal distortions
leading to bit errors during data transmission. Impulsive noise occurs due to the
transients in the switching characteristics of the power switches, power supplies and
domestic appliances. In certain devices such as refrigerator and electric heating
appliances, the switching transitions are also activated by internal thermostatic
control. This switching action of the loads could change the network transfer
functions and consequently the impedance characteristics, which is the cause of low
transmission rates. In this chapter we present an analysis for this impedance mismatch
by connecting conjugate impedance. SNR and thereby the channel capacity is
improved by providing a conjugate impedance.
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Further with impulse noise, the combined effect of impedance mismatch and
impulse noise on the channel characteristics�are analysed. For one inductively loaded
BT, the combined effect of noise and impedance mismatch reduces the channel
capacity, and if the number of BTs is increased the SNR decreases to such an extent
that the channel capacity is zero. In such cases a three part strategic procedure is
described to restore the rates in such channels. A fixed rate margin adaptive procedure
is described wherein a fixed rate less than the maximum capacity is sustained in the
line. Further, apart from signal PSD enhancement a crucial step of providing closely
matching impedance is also discussed.
The effect of inductive loads on the power line characteristics is discussed in
the section 6.2.1, the issue of SNR reduction with the inductive load is addressed with
matched impedances in the section 6.2.2. The effect of inductive load and impulse
noise on the power line characteristics for the test cases shown in fig.3.11 is addressed
the section 6.3 followed by results and an analysis with a procedure to mitigate the
effects of SNR reduction.
6.2 Effect of Inductive Loads and Input Impedance on the Channel
Characteristics
Power lines with open BTs were analyzed in the previous chapters. Residential
loads like fan, refrigerator, mixer etc are connected to the BTs. These loads are
inductive in nature. Once these inductive loads are connected, the look-in impedance
of the network changes. Hence there will be impedance mismatch, which causes
change in the transfer function of the network. Appropriate impedance matching is
initiated by switching in the input impedance to maximize the power transfer or
minimize reflections from the load. This aspect is discussed in the next section.
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6.2.1 Bridge Taps with Inductive Load
An indoor power line is composed of a main propagation path or the straight
line section and several distributed branches or the bridge taps (BT). BTs can be
either open or connected to the load as discussed in chapter 3.�Each path has its own
transmission matrix. So the indoor power line can be seen as a cascade of various
two-port networks [16] for straight line section and the distribution line. The ABCD
parameters for generic uniform transmission line are given by the equation 3.21. The
transmission matrix for the distribution branch or BT in general is given by the
equation 3.24.
‘ZR’ is the load impedance defined in the equation 3.30, where most of the
loads connected to the bridge taps inside the building are inductive. Inductive load is
given by ‘ZR =r+j�L’, where typical measured impedance of the fan is, r=0.1 and
L=600mH. In chapter 3, the transfer function for the test cases shown in the figure
3.11 (fig.6.1) has been simulated and presented. The figure 3.11 (fig.6.1) is shown
below for convenience. The simulation results for the test cases in fig.3.11 (fig.6.1)
have been presented for both cases, open BT and BTs connected to the inductive
loads.
It is observed from simulation results in the figure 3.13 - 3.22 (chapter 3) that
there is more attenuation and deeper notches with the inductive loads connected to the
bridge taps. This is due to frequency tuned load presented by the inductance. In such
cases if the impulse noise (discussed in the chapter 5) is added to AWGN the SNR
reduces to such an extent that there will not be any bit loading. Under such conditions
channel capacity becomes zero.
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Figure 6.1: Indoor power line network topologies
(Figure 3.11 is reproduced here for convenience)
6.2.2 Matching Impedance
As mentioned in the previous section the degradation in the channel
characteristics of power line networks connected to the residential inductive loads is
due to mismatch of impedance in source, line and the load. Generally a transmission
line connecting the source and load together must have the same impedance: Z load =
Z*line, where Z line is the characteristic impedance of the transmission line seen at load.
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Under such conditions there will be no mismatch and consequently no signal
degradation. But there will be mismatch due to varying input impedance of power line
network in the residential building due to different inductive loads being switched in
and out of power line network. Maximum transfer of power from the generator to the
load takes place when the load is conjugate matched to the generator. Complex
conjugate matching is used when maximum power transfer is required as shown in the
figure 6.2
Figure 6.2: Conjugate matching of a transmission line
This maximum transfer of power could be achieved by providing a set of
matching conjugate impedance in the modem through a hybrid circuit which is an
electrical bridge. Usually modems are coupled to line through a bridge, and a
simplified equivalent circuit for hybrid or electrical bridge is shown in the figure 6.3.
Figure 6.3: Hybrid or electrical bridge
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An electrical bridge connects the transmit line driver, the receive preamplifier,
and the line transformer. The transmitting path (between C & D) and the receiving
path (between A & B) are connected at two diagonal ports, while the power line
network is used as one of these branches through the coupling transformer. The four
branches of the electrical bridge are R1, R2 the impedance seen by the power line
network through the transformer and the line driver output impedance, Z i or Z in the
equivalent power line network impedance and Zb the balance impedance or the
conjugate impedance. A set of impedances which are approximately complex
conjugate of ‘Z in’ look-in impedances shown in the table 6.1 is connected ‘Z b’ arm of
the bridge circuit which will be selected to balance the bridge. The balance condition
occurs when the signal loss from the transmitting path to the receiving path becomes
infinity. A balance condition of this hybrid bridge is reached when equation 6.1 is
satisfied,
B\�h�B\ � B¤�F�B¤ (6.1)
The look-in impedance of the test cases considered in the figure 3.11 (fig.6.1)
is obtained from the equations 6.2 and the values are tabulated in the table 6.1.
Complex conjugate of the look-in impedance provides the impedance matching and
improves the channel capacity.
From the two-port network model of power line as shown in figure 3.2(chapter
3), the input impedance will be a function of the impedance of the loop and of the
load. The look-in impedance is obtained from the ABCD parameters of the
transmission matrix. The input impedance is given by
���2g � 3h5h � ¥Bj�¦§Bj�Y (6.2)
For open tap, I2=0 and ZR=0, hence
�2g � �Y (6.3)
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For the BT connected to the inductive load ZR, the look-in impedance of the network
is given by the equation (6.2). The following table gives the look-in impedance of the
test loops shown in the figure 3.11 (fig.6.1) for open and loaded conditions.
Table 6.1: Look-in impedance of the test loops.
Test Loop
Zin with open BT
Zin with BT connected to
load
ZR=r+2�L,
Fig.3.11 single tap at
550mts
49.4454 +28.0626i 249.1600+�197.3500i
Fig. 3.11 single tap at
50mts
49.5674 +27.4415i 56.5840+�285.8200i
Fig.3.11 two taps at
200mts & 400mts
49.4689 +27.5652i 14.8576 +14.9138i
Fig.3.11 five taps each
after 100mts
49.5381 +26.9234i 6.0352 + 7.1315i
Fig.3.11 ten taps each
after 100mts
70.7306 + 7.3335i 5.3039 +31.9277i
As seen in the above table, the look-in impedance of the power line network
changes once the load is connected to the network. Hence a set of conjugate
impedances approximately in this range is provided in the balancing arm of the
electrical bridge as shown in the figure 6.3 to make the transfer function nearly
resistive.
6.3 Channel Capacity in the Presence of Periodic Impulsive Noise
and Inductive Load
Significant number of the bridge taps inside the house is the cause for
additional attenuation in power cables. Unlike telephone lines there are no standard
test cases for indoor power lines. Test loops very close to the practical conditions are
considered as shown in Figure 3.11 (fig.6.1). The frequency dependent transfer
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functions are computed using the method described in chapter 3 in the section 3.2.4.
Which is as follows,
1. Compute the transmission matrices ‘Tm’ and ‘Td’ from the equations 3.25 &
3.28 as explained in chapter 3 respectively for 14AWG Power cable for the test
loops shown in figure 3.11 (fig.6.1), with open bridge taps, viz ZL = Infinity.
2. Repeat the same as in step 1 with ZL=r + j�L above with an inductive load of
600mH and r=0.1 that is typical in fans and machines inside a house. For
inductive loads, Zin_tap in the distribution matrix (equation 3.28 (Td)) is given
by the equation 3.34(chapter 3).
3. Obtain the transfer function H (f) for cases 1(open) and 2(loaded) by the
equation 3.31(chapter 3).
Further, for computing the channel capacity, the transmit signal Power
Spectral Density up to 30 MHz as per the VDSL2 standard G993.2 [12] is employed.
Energy and bits in every tone are allocated adaptively according to the channel
characteristics. While the channel characteristics may be obtained from the transfer
function, whereas the SNR computation needs knowledge of noise profiles. The SNR
at the receiver may be computed from the received signal power and impulse noise
PSD as explained in chapter 5 using equation 5.2, with the difference in H (f) for
inductive loads as in the equation 3.34 in chapter 3.
The transfer function has a huge variation with the inductive load compared to
open BT as shown in the figure 3.12 through 3.19 in chapter 3, which has a
concurrent effect on SNR and channel capacity. The tone loading is obtained from
these SNRs using a modified version of Shannon’s theorem given by the equation 4.2,
here in this chapter, with a difference in H (f) for inductive loads and impulse noise.
With the DMT symbol rate at 4000 symbols/sec as for DSL the total channel
capacity can now be obtained by summing the bits loaded in each sub-channel
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considering the usable tones in the up-stream and down-stream transmitted signal
PSD. Channel capacity is given by equation 4.3 in chapter 4.
6.4 Fixed Rate Tone-loading
The adaptive bit rate or the channel capacity obtained in the previous section
is the maximum channel capacity. The channel capacity a function of the frequency
dependent SNR. Where SNR depends on the line topology, loads connected to the
bridge tap and the impulse noise. However in all operating cases it is preferred to fix
the rate depending on the requirement and ensure that the rate is met in the line. In
this thesis two algorithms are developed for the fixed rate bit-loading.
The maximum capacity of the channel is calculated by the standard water filling
algorithm.�The two algorithms for the fixed rate tone-loading is explained below
�
• In the algorithm ‘A’, the SNR is reduced by 3dB in each iteration until the
fixed rate requirement is met. Here each iteration includes water filling
algorithm. The number of iterations is more.
• In the algorithm ‘B’ the bits in each tone is loaded according to the required
rate by
| "�¢¡����=¨�©�¢��=�8���¢©=�8�ª=���¨¢=�� � �=«���=���¨¢=� . �v ��0 �8���¢¡����=¨�©�¢��=�¨¡� =��¬¨ª0 �©¨��=���¨ ¨��¢ �
H¢�¢¨����0 �8���¢¡����¨���¢©=�¢��=¡ I
������In this algorithm the resultant rate is obtained in one iteration, where the tones are
loaded with the appropriate bits according to the required rate.
Comparing both the algorithms, as seen in table 5 in the section 6.5.4 rate obtained
from algorithm B is near to the required rate. The number of iteration is less compared
to algorithm A.
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6.5 Simulation Results and Analysis
The SNR and bit-loading profile for upstream and downstream with impulse noise
and inductive load is obtained for the test loops shown in the figure 3.11 (fig.6.1) of
chapter 3.
Simulation conditions are discussed in the next section, followed by
simulation results for all the test cases with load and impulse noise. Simulation results
are presented by increasing the transmit signal PSD and by connecting the conjugate
impedance as solutions for decreasing SNR with inductive load and noise. Channel
capacity for the test cases under load and noise conditions are presented and discussed
in the last section along with fixed rate bit loading.
6.5.1 Simulation conditions
The SNR as explained above in the section 6.2 is obtained for the test loops in
the figure 3.11 (fig.6.1) by considering the signal PSD shown in the figure 4.2 & 4.3
for upstream and downstream respectively as specified for VDSL2 in ITU 993.2,
noise of -140dBm/Hz and impulse noise as discussed in the section 5.2.1 and the
channel transfer function H(f) as per the chapter 3. Bit-loading profile for upstream
and downstream as explained in the section 4.2.2 is obtained for the test loops by
considering the SNR profile and � = (9.8+6) dB and considering the band plan shown
in figure 4.5(fig.6.4) which is reproduced here for convenience. As seen in the band
plan there are different frequency bands allocated for the upstream and downstream.
Hence the bits are loaded accordingly in the upstream band by considering the SNR at
that tone, and bits are not loaded in the other frequency bands as specified in ITU
993.2. Similarly bits are loaded in the downstream band and zero bits are loaded in
the other frequency bands.
US0 DS1 US1 DS2 US2 DS3 US3
Figure 6.4: Band plan for VDSL
(Figure 4.5 is reproduced here for convenience)
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6.5.2 Simulation Results
The SNR in dB and bit-loading profile for upstream and downstream with
impulse noise and effect of inductive load is obtained for the test loops shown in the
figure 3.11 (fig.6.1) and are presented below
Test loop2: Line with BT at the rear end with impulse noise & inductive load
As observed and discussed in chapter 3, attenuation in H(f) is extremely high
(-20dB without load & -100dB with load), when the bridge taps are connected to the
load due to impedance mismatch compared to open BT. Hence the SNR as shown in
fig. 6.5 also becomes negative, which further reduces with addition of impulse noise.
The bit loading with this SNR is shown in fig.6.8. Since the SNR is negative, no bits
are loaded in any tone.
As shown in fig.6.6, bit loading for loop2 with load connected to single BT the
bits are loaded in few tones. Channel capacity comparatively has reduced as
compared to open BT. One of the methods to improve the tone loading is through
increasing the transmit signal PSD by 10dB. This does not create any problem in
PLC, unlike in telephone cable bundles. Bits loaded is increased and hence the
channel capacity which is shown in the fig. 6.7 and recorded in table 6.3 for US.
Figure 6.5: US SNR of loop 2 with inductive load and
with impulse noise PSD
0 1000 2000 3000 4000 5000 6000 7000-250
-200
-150
-100
-50
0
50
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
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Figure 6.6: Upstream bit-loading in loop2 with load
Figure 6.7: Upstream bit-loading in loop2 with load & with increased signal
PSD
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
8
9
10
tones
bit p
attern
for uplo
adin
g
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
8
9
10
tones
bit p
attern
for uplo
adin
g
700 800 900 1000 1100 1200 1300
0
0.5
1
1.5
2
2.5
3
tones
2100 2200 2300 2400 2500 2600 2700 2800 2900
0
0.5
1
1.5
2
tones
�
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Figure 6.8: Upstream bit-loading in loop2 with load & impulse noise
SNR with impulse noise and load connected to BT reduces as shown in
figure.6.5. One more method to boost the SNR is connect the conjugate imedance as
discussed in the section 6.2.2. the improvement in the SNR with conjugate impedance
is seen in figure.6.9 and hence the improvement in bitloading is seen in the figure.6.9.
The improvement in the channel capacity with conjugate impedance and with addition
of one more band in the VDSL2 band plan is tabulated in the table 6.5 & 6.6 for US
and DS respectively.
Figure 6.9: US SNR of loop 2 with conjugate impedance
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
attern
for uplo
adin
g
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
Tones
SN
R &
Sig
nal PSD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
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Figure 6.10: Upstream bit-loading in loop2 with load & impulse noise
and conjugate
As discussed for upstream, even in downstream the resonance effect of the
bridge tap degrades the SNR, which gets further reduced due to the addition of
impulse noise as seen in figure 6.11. The bridge tap has an effect on the SNR in down
stream due to the change in attenuation profile. Using the bit loading profiles the
channel capacity is computed only with load, which is reduced compared to open BT.
One method of improving the SNR and hence the channel capacity is by increasing
the signal PSD by 10dB. The improvement in channel capacity is observed in
figure.6.13. The other method suggested to improve SNR when BTs are conected to
the load and also with impulse noise is to connect conjugate impedance and match
the impedance for maximum power transfer. Hence the improvement in SNR is
obseved in figure.6.15. also the channel capacity is improved as seen in figure.6.16
and capacities are recorded in table 6.4 for DS.
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
35
40
45
tones
bit p
att
ern
for
uplo
adin
g
1900 2000 2100 2200 2300 2400 2500 2600 2700 2800 2900
10
15
20
25
30
35
40
tones
700 800 900 1000 1100 1200 1300 1400
10
12
14
16
18
20
tones
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Figure 6.11: DS SNR of loop 2 with inductive load and
with impulse noise PSD
Figure 6.12: Downstream bit-loading in loop2 with load
0 1000 2000 3000 4000 5000 6000 7000-200
-150
-100
-50
0
50
100
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise & inductive load
singnal PSD
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
16
18
tones
bit p
att
ern
for
dow
nlo
adin
g
100 200 300 400 500 600 700 800 900 10000
2
4
6
8
10
12
14
16
tones
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Figure 6.13: Downstream bit-loading in loop2 with load & with
increased signal PSD
Figure 6.14: Downstream bit-loading in loop2 with load &
impulse noise
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
16
18
tones
bit p
att
ern
for
dow
nlo
adin
g
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
8
tones
bit p
att
ern
for
dow
nlo
adin
g
100 200 300 400 500 600
0
1
2
3
4
5
6
7
tones
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Figure 6.15: DS SNR of loop 2 with conjugate
Figure 6.16: Downstream bit-loading in loop2 with load & impulse
noise and conjugate
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise & inductive load
singnal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
tones
bit p
att
ern
for
dow
nlo
adin
g
1200 1300 1400 1500 1600 1700 1800 1900 2000 2100
4
6
8
10
12
14
tones
100 200 300 400 500 600 700 800 900
12
14
16
18
20
22
24
26
28
tones
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Test loop3: Line with BT at the front end with impulse noise & inductive load
The same discussion holds good as discussed for test loop 2, since the effect
of single bridge tap in the front end with same length of bridge tap is almost same as
the BT at the rear end, since the length of the tap is same.
Figure 6.17: US SNR of loop 3 with inductive load and with�impulse noise
PSD
Figure 6.18: Upstream bit-loading in loop3 with load
0 1000 2000 3000 4000 5000 6000 7000-250
-200
-150
-100
-50
0
50
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
8
9
10
tones
bit p
attern
for uplo
adin
g
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Figure 6.19: Upstream bit-loading in loop3 with load & with increased
signal PSD
Figure 6.20: Upstream bit-loading in loop3 with load & impulse
noise
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
tones
bit p
att
ern
for
uplo
adin
g
1900 2000 2100 2200 2300 2400 2500 2600 2700 2800
0
2
4
6
8
10
12
14
16
18
20
tones
bit p
att
ern
for
uplo
adin
g
700 800 900 1000 1100 1200 1300
0
0.5
1
1.5
2
2.5
3
tones
�
�
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
tones
bit p
att
ern
for
uplo
adin
g
20 40 60 80 100 120 140 160 180 200
0
2
4
6
8
10
12
tones
2000 2100 2200 2300 2400 2500 2600 2700 2800 2900
0
1
2
3
4
5
tones
�
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Figure 6.21: US SNR of loop 3 with conjugate
Figure 6.22: Upstream bit-loading in loop3 with load & impulse
noise and conjugate
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
200
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
35
40
tones
bit p
attern
for uplo
adin
g
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Figure 6.23: DS SNR of loop 3 with inductive load and
with impulse noise PSD
Figure 6.24: Downstream bit-loading in loop3 with load
0 1000 2000 3000 4000 5000 6000 7000-200
-150
-100
-50
0
50
100
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise & inductive load
singnal PSD
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
16
18
tones
bit p
att
ern
for
dow
nlo
adin
g
1250 1300 1350 1400 1450 1500 1550 1600 1650
1
2
3
4
5
6
7
8
9
tones
100 200 300 400 500 600 700 800 900 1000
0
2
4
6
8
10
12
14
16
tones
�
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Figure 6.25: Downstream bit-loading in loop3 with load & with
increased signal PSD
Figure 6.26: Downstream bit-loading in loop3 with load &
impulse noise
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
16
18
tones
bit p
attern
for dow
nlo
adin
g
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
tones
bit p
attern
for dow
nlo
adin
g
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Test loop 4: Line with two BT’s with impulse noise & inductive load
Figure 6.27: DS SNR of loop 3 with conjugate
Figure 6.28: Downstream bit-loading in loop3 with load & impulse noise and
conjugate
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
200
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise & inductive load
singnal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
tones
bit p
attern
for dow
nlo
adin
g
1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100
0
2
4
6
8
10
12
14
16
18
tones
100 200 300 400 500 600 700 800 900 1000
14
16
18
20
22
24
26
28
tones
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Test loop4: Line with two BT’s
Multiple dips are observed due to change in the resonant frequencies due to
different lengths of BTs in figure 6.29. Due to this the SNR is completely negative
with BTs connected to the load except in first few tones.
Figure 6.29: US SNR of loop 4 with inductive load and with
impulse noise PSD
As the number of BTs is increased the SNR & hence bit-loading improvement cannot
be achieved by increasing the signal PSD, which is seen in figure.6.30, 6.31. SNR
improvement & hence the bit-loading profile is seen in figure .6.33 & 6.34 by
providing a set of conjugate impedances.
0 1000 2000 3000 4000 5000 6000 7000-120
-100
-80
-60
-40
-20
0
20
40
60
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
����������������
�
����
Figure 6.30: Upstream bit-loading in loop4 with load
Figure 6.31: Upstream bit-loading in loop4 with load & with increased
signal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
35
40
45
tones
bit p
attern
for uplo
adin
g
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
16
tones
bit p
att
ern
for
uplo
adin
g
0 20 40 60 80 100 120 140 1600
2
4
6
8
10
12
14
16
tones
�
����������������
�
����
Figure 6.32: Upstream bit-loading in loop4 with load & impulse noise
Figure 6.33: US SNR of loop 4 with conjugate
0 1000 2000 3000 4000 5000 6000 70000
0.5
1
1.5
2
2.5
3
3.5
4
4.5
5
tones
bit p
att
ern
for
uplo
adin
g
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
Tones
SN
R &
Sig
nal P
SD
US: Line length(600mt) with a tap after 200mts with conjugate
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
����������������
�
����
Figure 6.34: Upstream bit-loading in loop4 with load & impulse noise with
conjugate
Multiple dips are observed due to change in the resonant frequencies due to
different lengths of BTs in figure 6.35. Due to this the SNR is completely negative
with BTs connected to the load except in first few tones. As the number of BTs is
increased the SNR & hence bit-loading improvement cannot be achieved by
increasing the signal PSD, which is seen in figure.6.37, 6.38 for DS. SNR
improvement & hence the bit-loading profile is seen in figure.6.39 & 6.40 by
providing a set of conjugate impedances. In DS the dip is in the second transmit band
of DS transmit signal PSD. This has a serious effect on the bit-loading profile as seen
in figure.6.40.
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
tones
bit p
att
ern
for
uplo
adin
g
1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800
10
12
14
16
18
20
22
tones
700 800 900 1000 1100 1200 1300
10.5
11
11.5
12
12.5
13
13.5
tones
�
�
����������������
�
����
Figure 6.35: DS SNR of loop 4 with inductive load and
with impulse noise PSD
Figure 6.36: Downstream bit-loading in loop4 with load
0 1000 2000 3000 4000 5000 6000 7000-300
-250
-200
-150
-100
-50
0
50
100
Tones
SN
R&
SIG
NA
L P
SD
snr without noise
snr with noise & inductive load
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
att
ern
for
dow
nlo
adin
g
����������������
�
����
Figure 6.37: Downstream bit-loading in loop4 with load & with
increased signal PSD
Figure 6.38: Downstream bit-loading in loop4 with load &
impulse noise
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
att
ern
for dow
nlo
adin
g
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
attern
for dow
nlo
adin
g
����������������
�
���
������������������Figure 6.39: DS SNR of loop 4 with conjugate
Figure 6.40: Downstream bit-loading in loop4 with load & impulse
noise with conjugate
0 1000 2000 3000 4000 5000 6000 7000-150
-100
-50
0
50
100
150
Tones
SN
R&
SIG
NA
L P
SD
snr without noise
snr with noise & inductive load
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
tones
bit p
attern
for dow
nlo
adin
g
1200 1300 1400 1500 1600 1700 1800 1900 2000
1
2
3
4
5
6
7
8
9
tones
100 200 300 400 500 600 700 800 900
4
6
8
10
12
14
16
18
20
22
tones
�
�
����������������
�
���
Test loop5: Line with five BT’s with impulse noise & inductive load
Test loops 5 & 6 with five and ten taps which is near to the practical conditions
of inside the building is considered for simulation. As seen in the figure.6.41 for US
and 6.45 for DS the SNR for five BTs with load and noise is negative, due to which
zero bits are loaded which is seen in figure.6.42 & 6.46 for US & DS. The SNR can
be improved through impedance matching by providing a set of conjugate
impedances, which is also seen in figure. 6.43 & 6.44 for US and in 6.47 & 6.48 for
DS.
Figure 6.41: US SNR of loop 5 with inductive load and with
impulse noise PSD
0 1000 2000 3000 4000 5000 6000 7000-1400
-1200
-1000
-800
-600
-400
-200
0
200
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
����������������
�
����
��
Figure 6.42: Upstream bit-loading in loop5 with load & impulse
noise
Figure 6.43: US SNR of loop 5 with conjugate
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
attern
for uplo
adin
g
0 1000 2000 3000 4000 5000 6000 7000-350
-300
-250
-200
-150
-100
-50
0
50
100
150
Tones
SN
R &
Sig
nal P
SD
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
����������������
�
����
� Figure 6.44: Upstream bit-loading in loop5 with load & impulse
noise with conjugate
Figure 6.45: DS SNR of loop 5 with inductive load and
with impulse noise PSD
0 1000 2000 3000 4000 5000 6000 7000-1400
-1200
-1000
-800
-600
-400
-200
0
200
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise
Signal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
35
40
tones
bit p
attern
for uplo
adin
g
1800 1900 2000 2100 2200 2300 2400 2500 2600 2700 2800
15
20
25
30
35
tones
20 40 60 80 100 120 140 1600
5
10
15
20
25
30
tones
��
����������������
�
����
Figure 6.46: Downstream bit-loading in loop5 with load & impulse
noise
Figure 6.47: DS SNR of loop 5 with conjugate
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
attern
for dow
nlo
adin
g
0 1000 2000 3000 4000 5000 6000 7000-350
-300
-250
-200
-150
-100
-50
0
50
100
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise
Signal PSD
����������������
�
����
Figure 6.48: Downstream bit-loading in loop5 with load & impulse noise
with conjugate
Test loop 6: Line with ten BT with impulse noise & inductive load
The notches in SNR are deeper for loop6 with 10 taps as seen in figure.6.49 for
US and in figure.6.53 for DS. The SNR is negative throughout the transmit band,
hence there is no bit-loading in any of the tones both in US and DS as seen in
figure.6.50 & 6.53. The SNR and hence the bit-loading can be improved by providing
conjugate impedances, which is seen in the figure.6.51 & 6.52 for US and 6.55 & 6.56
for DS.
0 1000 2000 3000 4000 5000 6000 70000
2
4
6
8
10
12
14
tones
bit p
att
ern
for
dow
nlo
adin
g
100 200 300 400 500 600 700 800 900
2
4
6
8
10
12
tones
1150 1200 1250 1300 1350 1400 1450 1500 1550 1600 1650
0.5
1
1.5
2
tones
�
�
����������������
�
����
Figure 6.49: US SNR of loop 6 with inductive load and with
impulse noise PSD
Figure 6.50: Upstream bit-loading in loop6 with load and impulse noise
0 1000 2000 3000 4000 5000 6000 7000-3000
-2500
-2000
-1500
-1000
-500
0
500
Tones
SN
R
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
0 1000 2000 3000 4000 5000 6000 70000
0.1
0.2
0.3
0.4
0.5
0.6
0.7
0.8
0.9
1
tones
bit p
attern
for uplo
adin
g
����������������
�
����
Figure 6.51: UpStream SNR of loop 6 with conjugate
Figure 6.52: Upstream bit-loading in loop6 with load and conjugate
0 1000 2000 3000 4000 5000 6000 7000-700
-600
-500
-400
-300
-200
-100
0
100
200
Tones
SN
R
snr without imp.noise
snr with imp.noise & inductive load
signal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
30
35
tones
bit p
attern
for uplo
adin
g
2000 2100 2200 2300 2400 2500 2600 2700 2800
15
20
25
30
tones
700 800 900 1000 1100 1200 1300
6
7
8
9
10
11
12
tones�
�
����������������
�
����
Figure 6.53: DS SNR of loop 6 with inductive load and with
impulse noise PSD
Figure 6.54: Downstream bit-loading in loop6 with load & impulse
noise
0 1000 2000 3000 4000 5000 6000 7000-1400
-1200
-1000
-800
-600
-400
-200
0
200
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise
Signal PSD
0 1000 2000 3000 4000 5000 6000 70000
1
2
3
4
5
6
7
8
9
10
tones
bit p
attern
for D
ow
nlo
adin
g
����������������
�
����
Figure 6.55: DS SNR of loop 6 with inductive load and with
impulse noise PSD
�
Figure 6.56: Downstream bit-loading in loop6 with load & impulse
noise with conjugate
0 1000 2000 3000 4000 5000 6000 7000-350
-300
-250
-200
-150
-100
-50
0
50
100
Tones
SN
R &
Sig
nal P
SD
snr without noise
snr with noise
Signal PSD
0 1000 2000 3000 4000 5000 6000 70000
5
10
15
20
25
tones
bit p
attern
for dow
nlo
adin
g
1100 1200 1300 1400 1500 1600 1700 1800 1900 2000 2100
2
4
6
8
10
12
tones
100 200 300 400 500 600 700 800 900 1000
12
14
16
18
20
22
tones
�
�
����������������
�
���
6.5.3 Channel Capacity Estimation
Results of more realistic cases of the loops with BTs terminated by typical
inductive loads are analysed. As a first example consider the BT in loop 2 (fig 3.11B)
to be terminated in an inductive load. SNR with inductive load, with and without
impulse noise for loop2 are shown in the figure.6.5 & 6.11 for US and DS
respectively. Bit-loading for loop2 with load is shown in figure. 6.6 and 6.12 for US
and DS. When the SNRs are already high enough to support a non-zero bit loading
profile a nominal increase in Transmit PSD would suffice as is evidenced for loop 2
with BT terminated in an inductive load which can be seen in figure. 6.7 and 6.13 for
US and DS. Capacity estimation for loop2 with inductive load and increase in
transmit signal PSD is tabulated in the table 6.2.
Table 6.2: Capacity estimation for loop2 with inductive load
Table 6.3: Capacity estimation for loop2 (US) with inductive load & impulse
noise
Line
Topology
US rates
with
inductive
load
US rate
with
increased
PSD
DS capacity
with
inductive
load
DS capacity
with
increased
PSD
Loop 2
2.673
Mbps
14.305
Mbps
12.408
Mbps
13.02
Mbps
Line
Topology
US rates
with
inductive
load
US rates
with
inductive
load and
imp. noise
US rate with
and
conjugate
impedance
US rate
with new
VDSL2
PSD and
conjugate
impedance
Loop 2
2.673
Mbps
0 Mbps
78.104
Mbps
121.564
Mbps
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�
���
Table 6.4: Capacity estimation for loop2 (DS) with inductive load &
impulse noise
Bit-loading profile for loop 2 US and DS with inductive load and impulse noise with
conjugate and new PSD (one more US & DS band added) are shown in the figure
6.57 and 6.58.
Figure 6.57: Bit-loading profile for loop 2 US with inductive load and
impulse noise with Conjugate and new PSD
0 1000 2000 3000 4000 5000 6000 70000
10
20
30
40
50
60
70
tones
bit p
att
ern
for
uplo
adin
g
Line
Topology
Loop 2
DS capacity
with
inductive
load
DS rates
with
inductive
load and
imp. noise
DS rate
with and
conjugate
impedance
DS rate
with new
VDSL2
PSD and
conjugate
impedance
Loop 2 12.408
Mbps
1.116
Mbps
77.048
Mbps
168.388
Mbps
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�
����
Figure 6.58: Bit-loading profile for loop 2 DS with inductive load and
impulse noise with Conjugate and new PSD
Addition of third band in US & DS also increases the data rate which is shown in
table 6.3 for US and table.6.4 for DS.
In case of loops 5 and 6 (loops 3.11E, 3.11F), with five & ten BTs are
terminated in inductive loads of 600mH, the US and DS SNRs are too low to support
any positive tone loading as shown in column 2 of Table 6.5. This is primarily due to
impedance mismatch since the modem is not matched to the new line impedance. To
overcome this we need to ensure that the modems have switchable impedances in
their hybrids to closely match a variety of line impedances with inductive loads
terminated in their BTsas discussed in the section 6.2.2. The hybrid impedances could
be switched in based on a rapid SNR computation done in VDSL2 “Quick rate
adaptation” along with analysis to determine the next impedance to be set in. This
scheme along with a capability to increase the Transmit PSD along with added sub
0 1000 2000 3000 4000 5000 6000 70000
10
20
30
40
50
60
tones
bit p
att
ern
for
uplo
adin
g
����������������
�
����
bands nominally would suffice to meet the rate requirements. As an example of
improved rates obtained by conjugate matching close to the line ‘look in’ impedances,
we revisit the cases of loop 5 and loop 6 with their BTs terminated in inductive loads
of 600mH. The US and DS SNRs along with bit loading profiles with impulse noise
and inductive load are shown in figures 6.41 through 6.48 for loop 5 and in figures
6.49 through 6.56 for loop 6. The rates are tabulated in Table 6.5 & 6.6. Note the
improvement in rates for loop 5 and loop 6 when the impedance is changed to a value
closer to line ‘look- in’ impedance seen in the column 3 in Table 6.5 and column 2 in
Table 6.6. Small rate improvements can now be obtained by a nominal increase in
transmit PSD along with added sub bands. This can be seen in the column 5 in Table
6.5 and column 4 in Table 6.6.
Table 6.5: Capacity estimation for loops 5 &6 (US) with conjugate
Line
Topology
US & DS
rates with
inductive
load only
US rates
with
conjugate
Impedance
Zo in
Hybrid
With load
US rates with
inductive load
and imp. Noise
PSD and
conjugate
Impedance
Zo in Hybrid
US rates with
new VDSL2
PSD and
conjugate
Impedance
Zo in Hybrid
Loop 5
Zo=1+0.1i
Zo=0.6+0.1i
0 Mbps
51.05Mbps
16.577 Mbps
15.732 Mbps
33.081 Mbps
Loop 6
Zo=1+0.1i
Zo=0.6+0.1i
0 Mbps
14.184Mbps
4.780 Mbps
10.3 Mbps
43.496 Mbps
����������������
�
����
Table 6.6: Capacity estimation for loops 5 &6 (DS) with conjugate
6.5.4 Simulation Results – Fixed Rate Sustenance due to Load
Variation
Procedure to maintain the rates due to load variation over PLC is provided by the
following methods given below
i) Higher fixed bit rate than required is targeted, with some tones free. These free
tones carry dummy data at the time of initialization. As the Bit-Error-Rate
(BER) falls due to various reasons like load variation, impulse and RF noise as
indicated by the sync frame in VDSL2, these dummy tones are kicked into used
tone map. This procedure is referred to as ‘Quick Rate Adaptation’(QRA)
ii) nominally increase Transmit PSD along with added sub bands to achieve
desired rates
iii) providing approximate conjugate impedance to the line impedance seen by the
modem
Depending on the fall of BER one of the three actions are initiated.
Simulation results of algorithm ‘A’ and algorithm ‘B’ discussed in the section
6.4, for the test cases in the figure 3.11(figure.6.1) are tabulated in table 6.7, the
required rate is obtained from both the algorithms and it is observed that the,
algorithm ‘B’ gives the rates very close to the customer requirements. Number of
iteration is more in algorithm ‘A’. Hence the rate of convergence is higher in
Line
Topology
DS rates
with
conjugate
Impedance
Zo in
Hybrid
With load
DS rates with
inductive load and
imp. Noise PSD
and conjugate
Impedance
Zo in Hybrid
DS rates with new
VDSL2 PSD and
conjugate
Impedance
Zo in Hybrid
Loop 5
Zo=1+0.1i
Zo=0.6+0.1i
52.88Mbps
18.852�Mbps
19.472�Mbps
38.172�Mbps
Loop 6
Zo=1+0.1i
Zo=0.6+0.1i
9.432�Mbps �
1.384�Mbps
1.164�Mbps
7.188�Mbps
����������������
�
����
algorithm ‘B’.
Table 6.7: Comparison of fixed rate algorithms
Line
Topology
Maximum
channel
capacity
for the DS
Fixed rate
Rate obtained
from the
algorithm ‘A’
Rate obtained
from the
algorithm ‘B’
Loop 2 &
3 with load
13.38�
Mbps
10 Mbps
9.76 Mbps
9.9 Mbps
Loop 5
with load
and
conjugate
139.4
Mbps
100 Mbps
99.4 Mbps
99.9 Mbps
Loop 6
with load
and
conjugate
9.14�Mbps
5 Mbps
4.72 Mbps
4.9 Mbps
6.6 Conclusion
In this chapter the performance of an indoor power line (AWG14) with upto ten
BTs, with inductive load and impulse noise is analysed. However BTs when inductive
loaded and affected by impulse noise result in severe shortfall in data rates due to
mismatch between line impedance and characteristic impedance. Data rates are shown
to be considerably improved by
i) Higher rate than required with a provision of fall back
ii) Increasing the Transmit signal PSD along with added sub bands would suffice
to meet the rate requirements.
iii) Adopting settable values of conjugate impedances in the hybrid of the modem
that match with the line ‘look-in’ impedance. SELT (explained in chapter 3)
will provide an analysis of variation of impedances due to variation of loads.
This is used to determine the range of conjugate impedance as that may be
provided.
This method has a distinct advantage in that it reuses the entire digital portion of
existing ADSL and VDSL2 modems.