Chapter 10Chapter 10
Instruction Sets:Instruction Sets:CharacteristicsCharacteristicsand Functionsand Functions
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ContentsContents• Machine Instruction Characteristics• Types of Operands• Pentium and PowerPC Data Types• Types of Operations• Pentium and PowerPC Operation Types• Assembly Language• Stacks• Little-, Big-, and Bi-Endian
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What is an instruction set?What is an instruction set? Machine instructioncharacteristics
• The complete collection of instructions that are understood by a CPU
• Machine Code• Binary• Usually represented by assembly codes
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Instruction Cycle State DiagramInstruction Cycle State Diagram Machine instructioncharacteristics
InstructionFetch
InstructionAddress
Calculation
InstructionOperandDecoding
OperandAddress
Calculation
OperandFetch
OperandStore
OperandAddress
Calculation
DataOperand
multipleresult
Return for stringor Vector Data
Instruction Complete,Fetch Next Instruction
multipleoperand
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Elements of a Machine InstructionElements of a Machine Instruction Machine instructioncharacteristics
• Operation code (Op code)– Do this
• Source Operand reference– To this
• Result Operand reference– Put the answer here
• Next Instruction Reference– When you have done that, do this...
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Where have all the Operands gone?Where have all the Operands gone? Machine instructioncharacteristics
• Three areas including source and result operands– Main memory (or virtual memory or cache)– CPU register– I/O device
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InstructionInstruction RepresentationRepresentation Machine instructioncharacteristics
• A Simple Instruction Format
• In machine code each instruction has a unique bit pattern
• During instruction execution, an instruction is read into an IR in the CPU which must be able to extract the data from the various instruction fields to perform the required operation
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Instruction RepresentationInstruction Representation Machine instructioncharacteristics
• For human consumption (well, programmers anyway) a symbolic representation is used– e.g. ADD, SUB, LOAD
• Common examples– ADD Add– SUB Subtract– MPY Multiply– DIV Divide– LOAD Load data from memory– STOR Store data to memory
• Operands can also be represented in this way– ADD A,B
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InstructionInstruction TypesTypes Machine instructioncharacteristics
• Example– X = X + Y– Assume that the variable X and Y correspond to
locations 513 and 514– Operation
• Load a register with the contents of memory location 513• Add the contents of memory location 514 to the register• Store the contents of the register in memory location 513
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Instruction TypesInstruction Types Machine instructioncharacteristics
• Data processing• Data storage (main memory)• Data movement (I/O)• Program flow control
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Number of AddressesNumber of Addresses Machine instructioncharacteristics
• 3 addresses– Operand 1, Operand 2, Result– a = b + c;– May be a forth - next instruction (usually implicit)– Not common– Needs very long words to hold everything
Instruction CommentSUB Y,A,D Y ← A – BMPY T,D,E T ← D × EADD T,T,C T ← T + CDIV Y,Y,T Y ← Y ÷ T
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Number of AddressesNumber of Addresses Machine instructioncharacteristics
• 2 addresses– One address doubles as operand and result– a = a + b– Reduces length of instruction– Requires some extra work
• Temporary storage to hold some results
Instruction CommentMOVE Y,A Y ← ASUB Y,B Y ← Y – B
MOVE T,D T ← DMPY T,E T ← T × EADD T,C T ← T + CDIV Y,T Y ← Y ÷ T
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Number of AddressesNumber of Addresses Machine instructioncharacteristics
• 1 address– Implicit second address– Usually a register (accumulator)– Common on early machines
Instruction CommentLOAD D AC ← DMPY E AC ← AC × EADD C AC ← AC + C
STOR Y Y ← ACLOAD A AC ← ASUB B AC ← AC – BDIV Y AC ← AC ÷ Y
STOR Y Y ← AC
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Number of AddressesNumber of Addresses Machine instructioncharacteristics
• 0 (zero) addresses– All addresses implicit– Uses a stack– e.g. push a
push baddpop cc = a + b
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Utilization of Instruction AddressesUtilization of Instruction Addresses Machine instructioncharacteristics
Number of Address
Symbolic Representation Interpretation
3 OP A,B,C A ← B OP C
2 OP A,B A ← A OP B
1 OP A AC ← AC OP A
0 OP T ← (T-1) OP T
AC = accumulatorT = top of stackA,B,C = memory or register locations
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How Many AddressesHow Many Addresses Machine instructioncharacteristics
• More addresses– More complex (powerful?) instructions– More registers
• Inter-register operations are quicker– Fewer instructions per program
• Fewer addresses– Less complex (powerful?) instructions– instructions of shorter length– More instructions per program– Faster fetch/execution of instructions– more total instructions– longer execution times and longer,more complex
programs
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Number of AddressesNumber of Addresses Machine instructioncharacteristics
• One-address instruction– one general-purpose register (accumulator)
• Multiple-address instruction– multiple general-purpose register
• Issue of whether an address references a memory location or a register
• A machine may offer variety of addressing modes
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Design DecisionsDesign Decisions Machine instructioncharacteristics
• Operation repertoire– How many ops?– What can they do?– How complex are they?
• Data types• Instruction formats
– Length of op code field– Number of addresses
• Registers– Number of CPU registers available– Which operations can be performed on which registers?
• Addressing modes • RISC vs CISC
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Types of OperandsTypes of Operands Types of operands
• Addresses• Numbers• Characters• Logical Data
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NumbersNumbers Types of operands
• A limit to the magnitude of numbers representable on a machine
• A limit to their precision in the case of floating-point numbers
• Rounding, overflow and underflow• Three types of numerical data
– Integer of fixed point– Floating point– Decimal
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CharactersCharacters Types of operands
• ASCII code(unique 7-bit pattern,128 characters)0 0 0 0 1 1 1 1
0 0 1 1 0 0 1 1
0 1 0 1 0 1 0 1
b7 b6 b5 b4 b3 b2 b1
0 0 0 0 NUL DLE SP 0 @ P ` p
0 0 0 1 SOH DC1 ! 1 A Q a q
0 0 1 0 STX DC2 “ 2 B R b r
0 0 1 1 ETX DC3 # 3 C S c s
0 1 0 0 EOT DC4 $ 4 D T d t
0 1 0 1 ENQ NAK % 5 E U e u
0 1 1 0 ACK SYN & 6 F V f v
0 1 1 1 BEL ETB ‘ 7 G W g w
1 0 0 0 BS CAN ( 8 H X h x
1 0 0 1 HT EM ) 9 I Y i y
1 0 1 0 LF SUB * : J Z j z
1 0 1 1 VT ESC + ; K [ k {
1 1 0 0 FF FS , < L \ l |
1 1 0 1 CR GS - = M ] m }
1 1 1 0 SO RS . > N ^ n ~
1 1 1 1 SI US / ? O _ o DEL
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CharactersCharacters Types of operands
• The eighth bit may be set to 0 or used as a parity bit for error detection
• Bit pattern 011XXXX, the digits 0 through 9 are represented by their binary equivalents, 0000 through 1001, in the right-most 4 digits
• Extended Binary Coded Decimal Interchange Code (EBCDIC)
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Logical DataLogical Data Types of operands
• Two advantages to the bit-oriented view– Store an array of Boolean or binary data items, in
which each item can take on only the values 1 and 0– Manipulate the bits of a data item
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Pentium Data TypesPentium Data Types Pentium and PowerPC data types
• 8 bit Byte• 16 bit word• 32 bit double word• 64 bit quad word• Addressing is by 8 bit unit• A 32 bit double word is read at addresses
divisible by 4
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Specific Data TypesSpecific Data Types Pentium and PowerPC data types
• General - arbitrary binary contents• Integer - single binary value• Ordinal - unsigned integer• Unpacked BCD - One digit per byte• Packed BCD - 2 BCD digits per byte• Near Pointer - 32 bit offset within segment• Bit field• Byte String• Floating Point
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Pentium Numeric Data FormatsPentium Numeric Data Formats Pentium and PowerPC data types
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PowerPC Data TypesPowerPC Data Types Pentium and PowerPC data types
• Unsigned byte– Used for logical or integer arithmetic operations– Loaded from memory into a general register by zero
extending on the left to the full register size• Unsigned halfword
– As for unsigned bytes, but, for 16-bit quantities• Signed halfword
– Used for arithmetic operations– Loaded into memory by sign extending on the left to
full register size
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PowerPC Data TypesPowerPC Data Types Pentium and PowerPC data types
• Unsigned word– Used for logical operations and as an address
pointer• Signed word
– Used for arithmetic operations• Unsigned doubleword
– Used as an address pointer• Byte string
– From 0 to 128 bytes in length• Single & Double Precision Floating Point
– IEEE 754
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Types of OperationsTypes of Operations Types ofoperations
• Data Transfer• Arithmetic• Logical• Conversion• I/O• System Control• Transfer of Control
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Common Instruction Set OperationsCommon Instruction Set Operations Types ofoperations
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Common Instruction Set OperationsCommon Instruction Set Operations Types ofoperations
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Common Instruction Set OperationsCommon Instruction Set Operations Types ofoperations
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Common Instruction Set OperationsCommon Instruction Set Operations Types ofoperations
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CPU Actions for OperationsCPU Actions for Operations Types ofoperations
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Data TransferData Transfer Types ofoperations
• Specify– Source– Destination– Amount of data
• May be different instructions for different movements– e.g. IBM 370
• Or one instruction and different addresses– e.g. VAX
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IBM S/370 Data Transfer OperationsIBM S/370 Data Transfer Operations Types ofoperations
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ArithmeticArithmetic Types ofoperations
• Add, Subtract, Multiply, Divide• Signed Integer• Floating point • May include
– Increment (a++)– Decrement (a--)– Negate (-a)
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LogicalLogical Types ofoperations
• Bitwise operations• AND, OR, NOT• Logical shift
– The bits of a word are shifted left or right – On one end, the bit shifted out is lost
• Arithmetic shift – Treats the data as a signed integer and does not
shift the sigh bit
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Shift and Rotate OperationsShift and Rotate Operations Types ofoperations
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Shift and Rotate OperationsShift and Rotate Operations Types ofoperations
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ConversionConversion Types ofoperations
• Change the format or operate on the format of data
• E.g. Binary to Decimal
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Input/OutputInput/Output Types ofoperations
• May be specific instructions• May be done using data movement
instructions (memory mapped)• May be done by a separate controller
(DMA)
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Systems ControlSystems Control Types ofoperations
• Executed only while– The processor is in a certain privileged state– The processor is executing a program in a special
privileged area of memory• CPU needs to be in specific state • For the use of operating systems• Examples
– Read or alter a control register– Read or modify a storage protection key– Access to process control blocks in a multiprogramming
system
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Transfer of ControlTransfer of Control Types ofoperations
• Branch– e.g. branch to x if result is zero– Conditional branch instruction– Two ways of generating the condition
• Most machines provide a 1-bit or multiple-bit condition code that is set as the result of some operations
• To perform a comparison and specify a branch in the same instruction
– BRP X– BRN X– BRZ X– BRO X– BRE R1, R2, X
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Branch InstructionsBranch Instructions Types ofoperations
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Transfer of ControlTransfer of Control Types ofoperations
• Skip– Includes an implied address– Implies that one instruction be slipped
• The implied address equals the address of the next instruction plus one instruction length
– e.g. increment and skip if zero• ISZ Register1• Branch xxxx• ADD A
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions– Self-contained computer program incorporated into
a larger program– Two principal reasons for the use of procedures
• Economy and modularity– Two basic instructions
• A call instruction branching from the present location to the procedure
• A Return instruction returning from the procedure to the place from which it was called
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Transfer of ControlTransfer of Control Types ofoperations
• Nested Procedures
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions– A procedure can be called from more than one
location– A procedure call can appear in a procedure
• Allows the nesting of procedures to an arbitrary depth
– Each procedure call is matched by a return in the called program
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions – CPU must somehow save the return address
• The return can take place appropriately– Common places for storing the return address
• Register• Start of procedure• Top of stack
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions – If the register approach is used
• CALL X causes the following actions
– RN ← PC + △– PC ← X
» RN : register always used for this purpose»△ : instruction length
– If storing the return address at the start of the procedure
• CALL X causes
– X ← PC + △– PC ← X + 1
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions – The only limitation of these approaches
• Prevention the use of reentrant procedures• A reentrant procedure is one in which it is possible to have
several cells open to it an the same time– A more general and powerful approach
• Stack– When CPU executes a call
• It places the return address on the stack
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Transfer of ControlTransfer of Control Types ofoperations
• Use of Stack
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Transfer of ControlTransfer of Control Types ofoperations
• Procedure Call Instructions (continued)– necessary to pass parameters(can be passed in
registers) with a procedure call– possible to store the parameters in memory just
after the CALL instruction– more flexible approach to parameter passing
• stack
– Entire set of parameters, including return address, stored for a procedure invocation
• stack frame
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Transfer of ControlTransfer of Control Types ofoperations
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Pentium Operation TypesPentium Operation Types Pentium and PowerPCoperation types
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Pentium Operation TypesPentium Operation Types Pentium and PowerPCoperation types
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Pentium Operation TypesPentium Operation Types Pentium and PowerPCoperation types
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Pentium Operation TypesPentium Operation Types Pentium and PowerPCoperation types
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Call/Return InstructionsCall/Return Instructions Pentium and PowerPCoperation types
• CALL instruction– pushes the current instruction pointer value onto
the stack– causes a jump to the entry point of the procedure
by placing the address of the entry point in the instruction pointer
• ENTER instruction– added to the instruction set to provide direct
support for the compiler
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Pentium Condition CodesPentium Condition Codes Pentium and PowerPCoperation types
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Pentium ConditionsPentium Conditions Pentium and PowerPCoperation types
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Pentium ConditionsPentium Conditions Pentium and PowerPCoperation types
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Pentium ConditionsPentium Conditions Pentium and PowerPCoperation types
• With comparison two numbers as signed integers– use the terms less than and greater than
• With comparison them as unsigned integers– use the terms below and above
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Pentium MMX InstructionsPentium MMX Instructions Pentium and PowerPCoperation types
• 57 new instructions treating data in a SIMD fashion– possible to perform the same operation, such as
addition or multiplication, on multiple data elements at once
• Each data type is 64-bits in length and consists of multiple smaller data fields, each of which holds a fixed-point integer– Packet byte– Packed word– Packed doubleword
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MMX Instruction SetMMX Instruction Set Pentium and PowerPCoperation types
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MMX Instruction SetMMX Instruction Set Pentium and PowerPCoperation types
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Image CompositingImage Compositing Pentium and PowerPCoperation types
Alpha AlphaB
GR
Image A
BG
R
Image B
Ar3 Ar2 Ar1 Ar0
Ar3 Ar2 Ar1 Ar0
Br3 Br2 Br1 Br0
Br3 Br2 Br1 Br0Unpack byte R pixelcomponents from images A and B
1.
Subtract
Ar3 Ar2 Ar1 Ar02. Subtract image B from image A
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Image CompositingImage Compositing Pentium and PowerPCoperation types
r3 r2 r1 r02. Subtract image B from image A
× × × ×
fade fade fade fade3. Multiply result by fade value
Fade×r3 Fade×r2 Fade×r1 Fade×r0
+ + + +
Br3 Br2 Br1 Br04. Add image B pixels
newr3 newr2 newr1 newr0
r3 r2 r1 r0
5. Pack new composit pixelsBack to bytes
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Image CompositingImage Compositing Pentium and PowerPCoperation types
MMX code sequence performing this operation
pxor mm7, mm7 ; zero out mm7
punpckblw mm0, mm7 ; unpack 4 pixels to 16bits
movq mm3, fad_val ; load fade value replicated 4 times
movd mm0, image A ; load 4 red pixel components from image A
movd mm1, image B ; load 4 red pixel components from image B
punpckblw mm1, mm7 ; unpack 4 pixels to 16bits
psubw mm0, mm1 ; subtract image B from image A
pmulhw mm0, mm3 ; multiply the subtract result by fade values
padddw mm0, mm1 ; add result to image B
packuswb mm0, mm7 ; pack 16bit results back to bytes
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PowerPC Operation TypesPowerPC Operation Types Pentium and PowerPCoperation types
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PowerPC Operation TypesPowerPC Operation Types Pentium and PowerPCoperation types
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Load/Store InstructionsLoad/Store Instructions Pentium and PowerPCoperation types
• Accesses memory locations in the PowerPC architecture
• Arithmetic and logical instructions performed only on registers
• Two features characterizing the different load/store instructions– Data size– Sign extension
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Assembly LanguageAssembly Language Assembly language
• N = I + J + K (initialize I,J and K to 2,3,4)
• Computation of the Formula N = I + J + K
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Assembly LanguageAssembly Language Assembly language
• The program starts in location 101(hexadecimal)
• Memory reserved for the four variables starting at location 201
• Four consisted instructions– Load the contents of location 201 into the AC– Add the contents of location 202 to the AC– Add the contents of location 203 to the AC– Store the contents of the AC in location 204
• Symbolic name or mnemonic of each instruction
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Assembly LanguageAssembly Language Assembly language
• Use of the symbolic name or mnemonic of each instruction
• The first field contains the address of a location
• The second field contains the three-letter symbol for the opcode
• With memory-referencing instruction, a third field contains the address
• Pseudoinstruction
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Assembly LanguageAssembly Language Assembly language
• Use of symbolic addresses
• The first field still for the address– a symbol used
instead of an absolute numerical address
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Assembly LanguageAssembly Language Assembly language
• Assembly programs are translated into machine language by an assembler
• This program not only does the symbolic translation discussed earlier, but also assigns some form of memory addresses to symbolic addresses
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StacksStacks Stacks
• An ordered set of elements, only one of which can be accessed at a time
• The point of access is called the top of the stack
• The number of elements in the stack, or length of the stack, is variable
• Also known as a pushdown list or a last-in-first-out(LIFO) list
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StackStack--Oriented OperationsOriented Operations Stacks
PUSH Append a new element on the top of the stackPOP Delete the top element of the stackUnary Operation Perform operation on top element of stack. Replace
top element with resultBinary Perform operation on top elements of stack. Delete
top two elements of stack. Place result of operation on top of stack
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Typical Stack OrganizationsTypical Stack Organizations Stacks
• Three addresses needed for proper operation– Stack pointer– Stack base– Stack limit
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Typical Stack OrganizationsTypical Stack Organizations Stacks
• To speed up stack operations, the top two stack elements are often stored in registers
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Expression EvaluationExpression Evaluation Stacks
• Applied rules for each element of the expression– If the element is a variable or constant, push it
onto the stack– If the element is an operator, pop the top tow
items of the stack, perform the operation, and push the result
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Comparison of Programs to CalculateComparison of Programs to Calculate Stacks
• f = (a-b )/(c+d×e)
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Use of Stack to ComputeUse of Stack to Compute Stacks
• f = (a-b )/(c+d×e)
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Conversion of an ExpressionConversion of an Expression Stacks
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Byte OrderingByte Ordering Little-, big-,and bi-endian
• Big-endian– The mapping stores the most significant byte in
the lowest numerical byte address– IBM System 370/390, the Motorola 680×0, Sun
SPARC, and most RISC machines• Little-endian
– The mapping stores the least significant byte in the lowest numerical byte address
– Intel 80x86, Pentium II, VAX, and Alpha• Presents problems when data are
transferred from a machine of one endiantype to the other
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C Data Structure and its C Data Structure and its EndianEndian MapsMaps Little-, big-,and bi-endian
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Another ViewAnother View Little-, big-,and bi-endian
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Byte OrderingByte Ordering Little-, big-,and bi-endian
• What order do we read numbers that occupy more than one byte
• 12345678 can be stored in 4x8bit locations as follows– Address Value (1) Value(2)– 184 12 78– 185 34 56– 186 56 34– 186 78 12
• i.e. read top down or bottom up?
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Byte OrderingByte Ordering Little-, big-,and bi-endian
• No general consensus as to which is the superior style of endianness.
• Points favoring the big-endian style– Character-string sorting– Decimal / ASCII dumps– Consistent order
• points favoring the little-endian style– big-endian processor has to perform addition
when it converts a 32-bit integer address to a 16-bit integer address, to use the least significant bytes
– easier to perform higher-precision arithmetic• not required to find least-significant byte and move
backward
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Byte OrderingByte Ordering Little-, big-,and bi-endian
• PowerPC is a bi-endian processor that supports both big-endian and little-endian modes
• The bi-endian architecture enables software developers to choose either mode when migrating operating systems and applications from other machines
• To support this hardware feature, 2 bits are maintained in the machine in the MSR maintained by the operating system as part of the process state
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StandardStandard……What Standard?What Standard? Little-, big-,and bi-endian
• Pentium (80x86), VAX are little-endian• IBM 370, Moterola 680x0 (Mac), and most
RISC are big-endian• Internet is big-endian
– Makes writing Internet programs on PC more awkward!
– WinSock provides htoi and itoh (Host to Internet & Internet to Host) functions to convert
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Bit OrderingBit Ordering Little-, big-,and bi-endian
• Questions faced with in ordering the bits within a byte– Do you count the first bit as bit zero or as bit one?– Do you assign the lowest bit number to the byte’s
least significant bit(little endian) or to the bytes most significant bit(big-endian)