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6.002 CIRCUITS ANDELECTRONICS
Introduction and Lumped Circuit Abstraction
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ADMINISTRIVIA Lecturer: Prof. Anant Agarwal Textbook: Agarwal and Lang (A&L Readings are important!
Handout no. 3 Assignments
Homework exercisesLabs
QuizzesFinal exam
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Two homework assignments canbe missed (except HW11).
Collaboration policyHomework
You may collaborate withothers, but do your ownwrite-up.
LabYou may work in a team oftwo, but do you own write-up.
Info handout Reading for today
Chapter 1 of the book
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What is engineering?
Purposeful use of science
What is 6.002 about?Gainful employment ofMaxwells equations
From electrons to digital gatesand op-amps
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6.
002
Simple amplifier abstraction
Instruction set abstraction
Pentium, MIPS
Software systemsOperating systems, Browsers
Filters
Operationalamplifier abstractionabstraction
-+
Digital abstraction
Programming languagesJava, C++, Matlab 6.001
Combinational logic f
Lumped circuit abstraction
R S
+
Nature as observed in experiments
0.40.30.20.1I
12963V
Physics laws or abstractions Maxwells Ohms
V = R I
abstraction fortables of data
Clocked digital abstraction
Analog system
components:Modulators,oscillators,RF amps,power supplies 6.061
Mice, toasters, sonar, stereos, doom, space shuttle
6.1706.455
6.004
6.033
MLCV
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Lumped Circuit Abstraction
ConsiderI
The Big Jumpfrom physics
to EECS
+
-
V
?Suppose we wish to answer this question:
What is the current through the bulb?
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We could do it the Hard Way
Apply Maxwells
Differential form Integral form
Faradays E= B Edl= Bt t
Continuity J=
t
JdS= qtOthers E= EdS= q
0 0
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Instead, there is an Easy WayFirst, let us build some insight:
Analogy
Fa?
I ask you: What is the acceleration?
You quickly ask me: What is the mass?
I tell you: mF
You respond: a=m
Done!!!
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Instead, there is an Easy WayFirst, let us build some insight:
Fa?
Analogy
In doing so, you ignored the objects shape its temperature
its color point of force application
Point-mass discretization
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The Easy WayConsider the filament of the light bulb.
A
B
We do not care about how current flows inside the filament its temperature, shape, orientation, etc.Then, we can replace the bulb with a
discrete resistorfor the purpose of calculating the current.
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The Easy Way
A
B
Replace the bulb with a
discrete resistorfor the purpose of calculating the current.
+
VA
I
R and I=V
RB
In EE, we do thingsthe easy way
R represents the only property of interest
Like with point-mass: replace objectsF
with their mass m to find a=m
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The Easy Way
+
V
AIR and I=V
RB
In EE, we do thingsthe easy way
R represents the only property of interest
R relates element v and iV
I=R
called element v-i relationship
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R is a lumped element abstraction
for the bulb.
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R is a lumped element abstractionfor the bulb.
Not so fast, though
A
B
SBS
I
+
Vblack box
Although we will take the easy wayusing lumped abstractions for the restof this course, we must make sure (atleast the first time) that ourabstraction is reasonable. In this case,ensuring that V I
are definedfor the element
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AV Imust be defined
B
ASBS
I
+
Vfor the element
black box
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l
I must be defined. True when
I into SA = I out of SBTrue only when q=0 in the filament!
tJdSSAJdS
SB
JdS JdS= qSA SB t
IA IB
IA =IB only if 0=
tq
So lets assume this
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from
Maxwe
l
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V Must also be defined.see
A&L
So lets assume this too
VABSo VAB = AB Edl
defined when 0=
tB
outside elements
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Lumped Matter Discipline (LMD)
0=
tB
outside
0=
tq
inside elementsbulb, wire, battery
Or self imposed constraints:
More inChapter 1of A & L
Lumped circuit abstraction applies whenelements adhere to the lumped matterdiscipline.
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Demo Lumped element exampleswhosecaptured by their VIrelationship.
only for thesorts ofquestions we
as EEs wouldlike to ask!
is completelybehavior
DemoExploding resistor demo
cant predict that!Pickle demo
cant predict light, smell
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So, what does this buy us?Replace the differential equationswith simple algebra using lumped
circuit abstraction (LCA).
For example a
+
1
2
3b d
R4
VR
5
cWhat can we say about voltages in a loopunder the lumped matter discipline?
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What can we say about voltages in a loopunder LMD?
+
1
2
3
a
b dR
4V
R5
c
Edl=tB under DMD0
Edl+ Edl+ Edl=0ca ab bc+ Vca + Vab + Vbc = 0
Kirchhoffs Voltage Law (KVL):
The sum of the voltages in a loop is 0.
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What can we say about currents?Consider
SIca Ida
baIa
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What can we say about currents?ca da
baI
aIS
I
SJdS=
tq
under LMD
0Ica
+Ida
+Iba
=0Kirchhoffs Current Law (KCL):
The sum of the currents into a node is 0.
simply conservation of charge
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KVL and KCL SummaryKVL: jj =0
loop
KCL:
j ij =0node
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6.002 CIRCUITS ANDELECTRONICS
Amplifiers --
Small Signal Model
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Review
MOSFET ampSV
L
DSi
vO
vI
Saturation discipline operateMOSFET only in saturation region
Large signal analysis1. Find vO vs vI under saturation discipline.
2. ValidvI, v
O ranges under saturation discipline.
Reading: Small signal model -- Chapter 86.002 Fall 2000 Lecture 10 2
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Large Signal Review
1 vO vs vI
vO =VS K(vI 1)2RL2
valid for vI VTandvO vI VT(same as iDS KvO2 )
2
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But
SV
Ov
Ov =Iv
5V
1VvI VT
vIvO
Demo
VT1V 2V
Amplifies alright,but distortsvI
vOt
Amp is nonlinear /6.002 Fall 2000 Lecture 10 5
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Small Signal Model
~ 5V VS
~1V
Hmmm
( )L
TI
SO R
VvK
Vv 2
2
=Amp all right, but nonlinear!
Iv
Ov
TV
V1 V2~
Insight:
( )OI V,VFocus on this line segment
So what about our linear amplifier ???
But, observe vI vs vO about somepoint (VI, VO) looks quite linear !
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Trickov
iv
IV
OV
( )OVV ,Ovlookslinear
vI
Operate amp at VI
, VO
DC bias (good choice: midpointof input operating range)
Superimpose small signal on top of VI Response to small signal seems to be
approximately linear
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Trickov
iv
IV
OV
( )OVV ,Ovlookslinear
vI Operate amp at VI, VO
DC bias (good choice: midpointof input operating range)
Superimpose small signal on top of VI Response to small signal seems to be
approximately linear
Lets look at this in more detail I
III from a circuit viewpoint
graphically nextII mathematically week
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I GraphicallyWe use a DC bias VI to boost interesting inputsignal above VT, and in fact, well above VT.
interestinginput signal
++
SV
L
vO
vI
VIOffset voltage or bias
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Graphically
interesting
vOvI
SV
L
++
input signal
VI
SVOv
OV
operatingpoint
OI VV ,
IV
TV
O vv =0
I VTv
I
Good choice for operating point:midpoint of input operating range
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Small Signal Modelaka incremental modelaka linearized model
Notation Input:
total
vI = VI + vi
DC smallvariable bias signal (like vI)
bias voltage aka operating point voltage
Output: vO = VO + vo
Graphically,v vvi vo
VIVO
O
0 t 0 t6.002 Fall 2000 Lecture 10 11
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II Mathematically( watch my fingers)
vO =VS RLK
(vI VT)2
VO =VS RLK (VI VT2 2
substituting vI =VI +vi vi
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Mathematically
vo = RLK( TI )V V vigm related to VI
vo = gmRL vi
For a given DC operating point voltage VI, VIVT is constant. So,
vo = A viconstant w.r.t. vi
In other words, our circuit behaves like a linear amplifier
for small signals
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Another way
vO
=VS
RLK (vI
VT
)22
vo =
dv
d
I
VS
RL2
K(vI
VT
)2
vi
Iv =V
slope at VIvo = RLK(VI VT) vi
gm =K(VI VT)A = gmRL amp gain
Also, see Figure 8.9 in the course notes
for a graphical interpretation of this result
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More next lecture
DemoDSi
IV
Ov
load line
operating pointinput signal response
VO
How to choose the bias point:
1. Gain component gm VI2. vi gets big distortion.
So bias carefully3. Input valid operating range.
Bias at midpoint of input operatingrange for maximum swing.
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6.002 Fall 2000 Lecture 111
6.002 CIRCUITS ANDELECTRONICS
Small Signal Circuits
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6.002 Fall 2000 Lecture 211
Small signal notation
vA = VA + va
total operatingpoint
smallsignal
( ) iVv
I
I
out
IOUT
vvfdv
dv
vfv
II
=
=
=
)(
SV
L
oOO vVv+=
IV
+
+
iII vVv +=
iv
Review:
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6.002 Fall 2000 Lecture 311
I Graphical view
(using transfer function)
behaves linear
for smallperturbations
Iv
Ov
Review:
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6.002 Fall 2000 Lecture 411
II Mathematical view
( )L
TISO R
VvKVv
2
2
=
( )
i
Vv
LTIS
I
o v
RVvK
V
dv
dv
II
=
=
2
2
related to VIconstant for fixed
DC bias
( ) iLTIo vVVKv =
gm
Review:
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6.002 Fall 2000 Lecture 511
Demo
Choosing a bias point:
DSi
Ov
L
SLTI
KR
VKRVv
211 +++=
TI Vv =
2
ODS v2
Ki >RON C
Building a memory element
CR
t
CLev
= 5
5
ln OHLV
CRT =
2from
vC
tT
5V
VOH
vC
store = 1dIN dOUT
C
*
vC
store = 0
dIN dOUT
C*
RL
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6.002 Fall 2000 Lecture 1114
Input resistanceRIN
B Second attempt buffer
RIN
store
buffer
dIN dOUT
C
*
5ln OHIN
VCRT =
LIN >>
Better, but still not perfect.
Demo
Building a memory element
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6.002 Fall 2000 Lecture 1214
Does this work?
C Third attempt buffer + refresh
store
dIN dOUT
C
*
store
Building a memory element
No. External value caninfluence storage node.
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6.002 Fall 2000 Lecture 1314
Works!
D Fourth attempt buffer + decoupledrefresh
store
dIN dOUT
C
*
store
Building a memory element
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6.002 Fall 2000 Lecture 1414
A Memory Array
Decoder
Address
INd
OUTd
S M
INd
OUTdS M
INd
OUTdS M
INd
OUTd
S M
A
B
C
D
00
10
01
11
IN storeOUT
a0a1 2
A
B
C
D
store4-bit memory
Address
IN
OUT
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6.002 Fall 2000 Lecture 1514
Truth table for decoder
a0 a1 A B C D
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
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6.002 Fall 2000 Lecture 1614
Agarwals top 10 list on memory
10 I have no recollection, Senator.9 I forgot the homework was due today.8 Adlibbing ZSR
7 I think, therefore I am.6 I think that was right.5 I forgot the rest
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6.002 Fall 2000 Lecture 115
6.002 CIRCUITS ANDELECTRONICS
Second-Order Systems
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6.002 Fall 2000 Lecture 215
Second-Order Systems
CA
B
5V
+
5V
CGS
large
loop
2K50
2K
Demo
Our old friend, the inverter, driving another.The parasitic inductance of the wire andthe gate-to-source capacitance of theMOSFET are shown
[Review complex algebra appendix for next class]
S
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6.002 Fall 2000 Lecture 415
Now, lets try to speed up our inverter byclosing the switch S to lower the effectiveresistance
t
vA
5
0
vB
0 t
vC
0 t
Observed Output
2k
2k
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6.002 Fall 2000 Lecture 515
t
vA
5
0
vB
0 t
vC
0 t
Observed Output ~50
50
Huh!
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6.002 Fall 2000 Lecture 615
v, i state variables
+
C
L +
)(tv)(tvI
)(ti
Node method:
dt
dvCti =)(
dt
dv
CdtvvL
t
I=
)(1
2
2
)(1
dt
vdCvv
LI =
IvvdtvdLC =+2
2
time2
dt
diLvvI =
idtvvL
t
I =
)(1
Recall
First, lets analyze the LC network
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6.002 Fall 2000 Lecture 815
And for initial conditionsv(0) = 0 i(0) = 0 [ZSR]
Iv
0V
0t
Lets solve
Ivvdt
vdLC =+2
2
For input
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6.002 Fall 2000 Lecture 915
1 Particular solution
02
2
Vvdt
vdLC P
P =+
0VvP = is a solution.
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6.002 Fall 2000 Lecture 1015
02
2
=+ HH vdtvdLC
Solution to
Homogeneous solution2
Recall, vH : solution to homogeneousequation (drive set to zero)
Four-step method:
D tj2
tj
1Hoo eAeAv
+=
General solution,
RootsC os = LC
1o =
Assume solution of the form*A?s,A,Aev stH ==
so, 02 =+ stst eeLCAs
*Differential equations are commonlysolved by guessing solutions
1=jLC
js1
=
B LCs12
=
characteristic
equation
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6.002 Fall 2000 Lecture 1215
Remember Euler relation
(verify using Taylorsexpansion)
xjxejx sincos +=
xee jxjx
cos2
=+
tsinCV)t(i oo0 =
tcosVV)t(v o00 =so, where
LC
1o =
Total solution3
The output looks sinusoidal
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6.002 Fall 2000 Lecture 1315
)(tv
02V
0V
0
2
2
3 2to
)(ti
o0CV
0
2
2
3 2to
o0CV
Plotting the Total Solution
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6.002 Fall 2000 Lecture 1415
Summary of Method
1
2
3
Write DE for circuit by applyingnode method.
Find particular solution vP by guessingand trial & error.
Find homogeneous solution vH
4 Total solution isvP
+ vH ,solve for remaining constants using
initial conditions.
Assume solution of the formAest.
Obtain characteristic equation.
Solve characteristic equation
for roots si .
Form vH by summing Ai esit
terms.D
C
A
B
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6.002 Fall 2000 Lecture 1515
What if we have:
We can obtain the answer directly from
the homogeneous solution (V0 = 0).
VvC =)0(
0)0( =CiCL
Ci +
Cv
Example
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6.002 Fall 2000 Lecture 1615
We can obtain the answer directly fromthe homogeneous solution (V0 = 0).
tj
2
tj
1Coo eAeA)t(v
+=
VvC =)0(
0)0( =Ci
21V +=
o2o1 CACA0 =
or2
21
VAA ==
( )tjtjC oo ee2
Vv
+=or
tcosVv oC =
tsinCVi ooC =
VvC =)0(0)0( =Ci
CLC
i +
Cv
Example
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6.002 Fall 2000 Lecture 1715
to2
CvV
Ci
to2
oCV
oCV
Example
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6.002 Fall 2000 Lecture 1815
222
2
1
2
1
2
1CVLiCv CC =+Notice
Energy
2
2
1: CCvC
2
2
1: CLiL
to2
C
2
2
1CV
to2
LE
2
2
1CV
Total energy in the system is a constant,
but it sloshes back and forth between theCapacitor and the inductor
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6.002 CIRCUITS ANDELECTRONICS
Sinusoidal Steady State
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Review
We now understand the why of:5V
C
R
L
v
Today, look at response of networksto sinusoidal drive.
Sinusoids important because signals can berepresented as a sum of sinusoids. Response tosinusoids of various frequencies -- aka frequencyresponse -- tells us a lot about the system
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MotivationFor motivation, consider our old friend,the amplifier:
SV
vO
vi
Cv
++ GS
C
VBIAS
Observe vo amplitude as the frequency of theinput vi changes. Notice it decreases withfrequency.
Also observe vo shift as frequency changes(phase).
Need to study behavior of networks forsinusoidal drive.
Demo
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Sinusoidal Response of RC NetworkExample:
+
iC+
vI vC
vI(t) =Vi cost for t0 (Vi real)=0 for t
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11 11ectur
Example:+
Our Approach
iC+
vI vC
Determine vC(t)Indulge me!
Effort
lecture
sneaky approach
very
sneaky
Usual
approach
agony
easyte
0 :0: 00210:2l
shiT
txeN
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Lets use the usual approach1 Set up DE.
2 Find vp.
3 Find vH.
4 vC= vP+ vH, solve for unknownsusing initial conditions
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Usual approach
1 Set up DE
RCdvC +vC =vIdt =Vi cost
That was easy!
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2 Find vp
RC
dvP +dt vP
=Vi
cost
First try: vP =A nopeSecond try: vP =Acost nopeThird try: vP =Acos(
amplitude
+t frequency)phase
RCAsin(t+) +Acos(t+) =Vi costRCAsintcosRCAcostsin+AcostcosAsintsin =Vi cost
.. gasp !.works, but trig nightmare!
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6.002 ll 2000 Lecture 916
Lets get sneaky!
Try solution stpPS eVv =st
i
st
p
st
peVeV
dt
edVRC =+
st
i
st
p
st
p eVeVesRCV =+ip VV)1sRC( =+
sRC1
VV
ip
+=
Nicepropertyof
exponentials
ISPS
PS vvdt
dvRC =+ (S: sneaky :-))
st
ieV=
Find particular solution to another input
pV complex amplitude
Thus, stiPS esRC1
Vv
+=st
ieVis particular solution toeasy!
where we replace s =jly tj
ieV
solution fortji e
RCj
V +1
Fa
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2 Fourth try to find vP
using the sneaky approach
Fact 1: Finding the response toVie
jt
was easy.
Fact 2: vI =Vi cost=real[Viejt]=real[vIS]
from Euler relation,
j
Iv Pvresponse
ISv PSvresponse
realpart
realpart
ejt =cost+ sint
an inverse superposition argument,assuming system is real, linear.
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2 Fourth try to find vP
so, complex
Pv =Re[vPS] =
Re[Vpe
jt
]
Vi=Re1+jRCejt
=ReVi (1jRC) ejt1+2R2C2
=ReC1
222
+
Vi ejejt,tan=RC
=Re + 222 C1 Vi ej(t+)
vP = C1 222+ Vi cos(t+)
Recall, vP is particular response to Vi cost.
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3 Find vHt
Recall, vH=
Ae
RC
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4 Find total solution
vC=
Pv+
vHt
vC = 222 C1+
Vi cos(t+) +Ae RCwhere =tan1(RC )
Given vC(0) = 0 for t = 0
so,
A = 1 222 C+
Vi cos()
Done! Phew!
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Sinusoidal Steady StateWe are usually interested only in the
particular solution for sinusoids,i.e. after transients have died.
t
Notice when t , vC vP as e RC 0
222
iC cos(
C1
V
+= tanwhere =
A =
pV
RC
t
Ae)t
++)RC(1
cos(1 222
CVi+
0v
)
Described as
SSS: Sinusoidal Steady State
pV
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Sinusoidal Steady StateAll information about SSS is contained
in Vp , the complex amplitude!
RecallRCj1
VV ip
+=Steps 3 ,were a waste oftime!
4
Vp 1=Vi 1+jRCVp
222
i CR1V +
= 1 ejwhere=tan1 RC
2221
1
CRV
V
i
p
+=
RCV
V
i
p 1tan:phase =
magnitude
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Sinusoidal Steady StateVisualizing the process of finding theparticular solution v
P
sneakin
Viejt
drive
algebraicequation
+complex
algebra
takerealpart
tj
peV
particularsolution
tVi cos D.E.+
nightmaretrig.
drive [p VtV +cos p
the sneaky path!
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Magnitude Plottransfer function
V
H(j)=
V
p
i2221
1
CRV
V
i
p
+=
Vp1
Vi
logscale
log 1
=
scale RC
From demo: explains vo fall offfor high frequencies!
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Phase Plot=tan1 RC
V= p
Vi
0
4
2
C
1=
log scale
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6.002 Fall 2000 Lecture 117
6.002 CIRCUITS ANDELECTRONICS
The Impedance Model
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6.002 Fall 2000 Lecture 217
Sinusoidal Steady State (SSS)Reading 13.1, 13.2
+
OvtVv iI cos= + C
Focus on steady state, only careabout vP as vH dies away.
Focus on sinusoids.
Reading: Section 13.3 from course notes.
SSS
Review
Sinusoidal Steady State (SSS)Reading 13.1, 13.2
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6.002 Fall 2000 Lecture 317
3
4Hv
total
Review
Vp contains all the information we need:
p
p
V
V
Amplitude of output cosine
phase
sneakin
Viejt
drive
complexalgebra
takerealpart
The Sneaky Path
pV
tVi cos [ ]pp VtV +cos
setupDE
usualcircuitmodel
nightmaretrig.
1
vP
tjp eV
RCj
Vi+1
2
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6.002 Fall 2000 Lecture 417
i
p
V
V
transfer
function( )
jHRCjV
V
i
p =
+
=1
1
( )ppO VtVv += cos
2221
1
C+
break frequencyBode plot
C
1=
1
C1
2
1
rememberdemo
RC
1=
4
2
0i
p
V
V
1
RCtan 1
The Frequency View
Review
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6.002 Fall 2000 Lecture 517
Is there an even simpler wayto get V
p
?
RCj
VV ip
+=1
Divide numerator and denominator byjC.
RCj
CjVV ip
+=
1
1
Lets explore further
Hmmm looks like a voltage dividerrelationship.
RZ
ZVV
C
Cip
+=
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The Impedance Model
Is there an even simpler way to get Vp ?
Consider:tj
rR eIi=tj
rR eVv=
RR iv =tj
r
tj
r eRIeV =
rr IV =
Ri+
Rv
Resistor
tj
CC eIi=
tj
CC eVv=C
Ci+
Cv
Capacitor CC ICj
1V
=
dt
dvCi CC =
tj
C
tj
C ejCVeI
=
CZ
L
Li+
Lv
tj
lL eIi=
tj
lL eVv=
dt
diLv LL =
tj
l
tj
l ejLIeV
=
Inductorll LjV =
LZ
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6.002 Fall 2000 Lecture 717
In other words,
For a drive of the form Vcejt,complex amplitude Vc is related to thecomplex amplitude Ic algebraically,by a generalization of Ohms Law.
inductor
LZl =lll ZV =
l
+
lV LZ
resistorrrr ZV =
Zr =RZ
r
+
rV
capacitor
Cj
1ZC
=
cCc ZV =
impedance
c
+
cV CZ
The Impedance Model
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6.002 Fall 2000 Lecture 817
Impedance model:
All our old friends apply!KVL, KCL, superposition
Back to RC example
i
RC
Cic V
ZZ
ZV
RCj
1
Cj1
V+
=+
=
ic V
RCj1
1V
+= Done!
+
CvIv + C
+
cVi
V +
ZR =
CjZC
1=
c
-
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6.002 Fall 2000 Lecture 917
Another example, recall series RLC:
We will study this and other functionsin more detail in the next lecture.
RCj
Lj
VV ir++
=
1
RCL
Rir
ZZZ
ZVV
++=
CRjLC
CRjVV ir
++
=
1
2
+
L
r
C +
rViV
tj
reV
( )rr VtV +cos
tj
ieV
tVi cos
Remember, we want only the steady-state
response to sinusoid
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The Big Picture
tVi cos [ ]pp VtV +cos
setupDE
usualcircuitmodel
nightmaretrig.
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6.002 Fall 2000 Lecture 1117
The Big Picture
tVi cos [ ]pp VtV +cos
setupDE
usualcircuitmodel
nightmaretrig.
Viejt
drive
complex
algebra
takereal
part
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6.002 Fall 2000 Lecture 1217
The Big Picture
No D.E.s, no trig!
tVi cos [ ]pp VtV +cos
setupDE
usualcircuitmodel
nightmaretrig.
Viejt
drive
complex
algebra
takereal
part
complexalgebra
impedance-basedcircuit model
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6.002 Fall 2000 Lecture 1317
Back to
LCRCj1
C
V
V2
i
r
+
=
( ))
( ) RCjLC1RCjLC1
RCjLC1
RCj2
2
2
+=
( ) ( )222ir
RCLC1
RC
V
V
+
=
:Low C
:High L
:1LC= 1
Lets study this transfer function
+
rI
C +
rVi
R
LCRCj1
RCj
V
V
2i
r
+=
Observe
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6.002 Fall 2000 Lecture 1417
Graphically
( ) ( )2221 RCLC
RCVV
i
r
+=
More next week
:Low C
:High L
:1LC= 1
i
r
V
V
LC
1
LRC
1 Band Pass
Remember this trick to sketch the form oftransfer functions quickly.
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6.002 CIRCUITS ANDELECTRONICS
Filters
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6.002 Fall 2000 Lecture 218
Review
+
CvIv
+ C
Reading: Section 14.5, 14.6, 15.3 from A & L.
+
cVi
V +
RZ
CZ
i
RC
Cc V
ZZ
ZV +
=
RCj1
1
RCj
1
Cj
1
V
V
i
c
+
=
+
=
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6.002 Fall 2000 Lecture 318
A Filter
RCj11V
ZZZV i
RC
Cc
+=
+=
Low Pass Filter
1
( )i
c
V
VH =
Demowith audio
+
cVi
V +
RZ
CZ
-
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6.002 Fall 2000 Lecture 418
Quick Review of Impedances-Just as
21
ab
abAB RR
I
VR +==
LjRI
VZ 1
ab
abAB +==
1
ab+
abV
2
1
ab+
abV
L
-
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6.002 Fall 2000 Lecture 518
Quick Review of ImpedancesSimilarly
L2C1B Z||ZZ ++=
L2C
2C
1Z
RZ
ZR +
++=
LjCRj1
R2
21
++
+=
1
L
2C
-
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6.002 Fall 2000 Lecture 618
We can build other filters bycombining impedances
( )Z
L
R
C
Z
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6.002 Fall 2000 Lecture 718
We can build other filters bycombining impedances
HPFHigh Pass Filter
( )H
( )H
LPFLow Pass Filter
( )H
HPF
( )Z
L
R
C
Z
+
+
+
-
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6.002 Fall 2000 Lecture 818
Check out:
RCj
1Lj
R
V
V
i
r
++=
RCjLC1
RCj2
+
=
( ) ( )222ir
RCLC1
RC
V
V
+=
+
L C
+
rViV
LC
1
o=
At resonance, = o
andZ
L+Z
C= 0
,so Vi seesonly R!More later
Intuitively:
i
r
V
V1
LblockshighfreqCblock
slowfr
eq
-
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6.002 Fall 2000 Lecture 918
What about:
+
L C
+ lcV
iV
Band Stop Filterilc
VV
1C open L open
Check out Vl and Vc in the lab.
-
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6.002 Fall 2000 Lecture 1018
Another example:
+
+
LiV C oV
i
o
V
V
o
BPF
CshortLshort
Application: see AM radio coming up shortly
-
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6.002 Fall 2000 Lecture 1118
AM Radio Receiver
crystal radio demo
Thveninantenna
model
+ LiV C
demodulator
amplifier
antenna
-
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AM Receiver
Selectivity important relates to a parameter Q for the filter. Next
+ LiV C
demodulator
amplifier
f
signalstrength
540 1000 1010 1020 1030 1600 KHz
10 KHz
filter WBZNews
Radio
-
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6.002 Fall 2000 Lecture 1318
Recall,
Selectivity:Look at series RLC in more detail
+
L C
+
rViV
Cj1LjR
R
V
V
i
r
++
=
i
r
V
V
o
2
1higherQ
1
Define quality factor=Qo
bandwidth
Qhigh more selective
-
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6.002 Fall 2000 Lecture 1418
=o
Q
LC
1o =
Quality Factor Q
+
=++
=
CR
1
R
Lj1
1
Cj
1LjRi
VrV
?
at =0
:
-
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6.002 Fall 2000 Lecture 1518
Note that abs magnitude is2
1
when1j1
1
CR
1
R
Lj1
1
V
V
i
r
=
+
=
i.e. when 1CR
1=
0C
12 =
m
:
= oQ
Quality Factor Q
Looking at the roots of both equations,
C
4R
2
1
2
R2
2
1 ++= LC
4
L
R
2
1
L2
R2
2
2 ++=
R== 21
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6.002 Fall 2000 Lecture 1618
R
L
L
RQ oo
==
The lower the R (for seriesR),the sharper the peak
= oQ
Quality Factor Q
LC
1o =
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Another way of looking at Q :
cycleperlostenergy
storedenergy2=Q
0
2
r
2
r
2RI
2
1
IL21
2
=
L
Q
o=
Quality Factor Q
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6.002 CIRCUITS ANDELECTRONICS
The Operational AmplifierAbstraction
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6.002 Fall 2000 Lecture 219
MOSFET amplifier 3 ports
power
portinputport
outputport+
Iv
+
Ov
+
SV
Amplifier abstraction
+
Iv
+
SV
+
Ov
Iv
Ov
Function of vI
Review
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6.002 Fall 2000 Lecture 319
Can use as an abstract building block for
more complex circuits (of course, needto be careful about input and output).
Today
Introduce a more powerful amplifier
abstraction and use it to build morecomplex circuits.
Reading: Chapter 15 from A & L.
Iv
Ov
Function of vI
Review
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6.002 Fall 2000 Lecture 419
Operational AmplifierOp Amp
OUTv
+
+
INv
More abstract representation:
input
port
SV
outputport
powerport
SV
+
+
+
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6.002 Fall 2000 Lecture 519
Circuit model (ideal):
i.e. input resistance 0 output resistance
A virtually
No saturation
Ov
v
+
+
v
v+
v
0=i+
0=i
-
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6.002 Fall 2000 Lecture 619
(Note: possible confusion with MOSFET saturation!)
Using it
+
VV
S12= LR
Ov
+12V
+12V VVS 12=
Demo
INv
V10V10
Ov
V12
V12
610~
but unreliable,
temp. dependent
saturation
active region
INv
-
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6.002 Fall 2000 Lecture 719
Let us build a circuitCircuit: noninverting amplifier
Equivalent circuit model
1
Ov
+
2
INv
+v
v
+ vvA+
0=i+
0=i
opamp
1
Ov
+
2
INv
+
+v
v
-
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Let us analyze the circuit:
FindvO in terms of
vIN, etc.
What happens when A is very large?
( )+ = vvAvO
+=
21
2
RR
RvvAOIN
IN
21
2
OAv
RR
AR1v =
++
21
2
IN
O
RR
AR
1
vv
++
=
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Lets see When A is large
Gain: determined by resistor ratio insensitive to A, temperature, fab variations
21
2
IN
O
RR
AR1
vv
++=
( )
2
21
IN
Rv
+
gain
Demo
Suppose6
10=9
1=
=2
9
R10
1
v10v
6
IN
6
O
++
=
10vv INO
10
1101
v10
6
IN
6
+
=
21
2
IN
RR
AR
v
+
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e.g. vIN
= 5V
Suppose I perturb the circuit(e.g., force v
Omomentarily to 12V somehow).
Stable point is when v+ v- .
Key: negative feedback portion of
output fed tove
input.e.g. Car antilock brakes small corrections.
Why did this happen?
Insight:
+
INOv2v =
+INv
+v
v
negativefeedback
2
vO
5V
5V
10V
0i =
12V
6V6V
-
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6.002 Fall 2000 Lecture 1219
More op amp insights:
Observe, under negative feedback,
0
vR
RR
vvv
IN
1
21
O
+
== +
+ vv
We also knowi+ 0
i - 0
yields an easier analysis method(under negative feedback).
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6.002 Fall 2000 Lecture 1319
Insightful analysis methodunder negative feedback
+
1
Ov
+
2
INv
INvc
2
21
INO
Rvv +=g
INvb
0=ie
2
IN
R
vd
2
IN
R
vf
0i
0i
vv
+
+
INva
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6.002 Fall 2000 Lecture 1419
Question:
+
Ov
+INv
+v
v ?
01=
=2
2
21
RvvINO
+=or
with
INOvv
INvc
INvb
INva
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6.002 Fall 2000 Lecture 1519
Buffer
voltage gain = 1input impedance =
output impedance = 0
current gain =
power gain =
+
Ov
+INv
INOvv
Why is this circuit useful?
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6.002 CIRCUITS ANDELECTRONICS
Basic Circuit Analysis Method(KVL and KCL method)
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6.002 Fall 2000 Lecture 22
0=
t
B
0=
t
q
Outside elements
Inside elements
Allows us to create the lumped circuitabstraction
wires resistors sources
Review
Lumped Matter Discipline LMD:Constraints we impose on ourselves to simplifyour analysis
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6.002 Fall 2000 Lecture 42
KVL:
loop
KCL:
node
0=j j
0=j ji
ReviewReview
Maxwells equations simplify toalgebraic KVL and KCL under LMD!
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6.002 Fall 2000 Lecture 52
KVL0=++ bcabca vvv
0=++ badaca iii KCLDEMO
1
2
4
5
3
a
b
d
c
+
Review
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6.002 Fall 2000 Lecture 62
Method 1: Basic KVL, KCL method ofCircuit analysis
Goal: Find all element vs and is
write element v-i relationships(from lumped circuit abstraction)
write KCL for all nodeswrite KVL for all loops
1.
2.3.
lots of unknownslots of equationslots of funsolve
-
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6.002 Fall 2000 Lecture 72
Method 1: Basic KVL, KCL method ofCircuit analysis
For R,
For voltage source,
For current source,
Element Relationships
IRV =
0VV =
0I=
3 lumped circuit elements
0V
oI
+
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6.002 Fall 2000 Lecture 82
KVL, KCL Example
The Demo Circuit
+
1
2
4
5
3
a
b d
c
00 V=+
1+
5
+
3+
2+
4+
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Associated variables discipline
i+
-
Element e
Then power consumed
by element e
i= is positive
Current is taken to be positive goinginto the positive voltage terminal
-
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KVL, KCL Example
The Demo Circuit
+
1
2
4
5
3
a
b d
c
00 V=+
1+
5
+
3+
1L
2L
4L
3L2
+
4+
2i
1i
0i
5i
3i
4i
-
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6.002 Fall 2000 Lecture 112
Analyze12 unknowns
5050 ,
1. Element relationships
3. KVL for loops
00 Vv =111 iv =
222 iv =
333 iv =444 iv =
555 iv =
given
2. KCL at the nodes
redundant
0431 =+ vvv
0210 =++ vvv
0253 =+ vvv0540 =++ vvv redundant
0410 =++ iii0132 =+ iii0435 = iii0520 = iii
a:b:
d:
e:
6 equations
3 independentequations
3 independentequations
12unknown
s
12equa
tions
ugh@#!
( )iv,
L1:
L2:
L3:
L4:
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6.002 Fall 2000 Lecture 122
Other Analysis MethodsMethod 2 Apply element combination rules
B
C
D
+++ 21
1G 2G NG GGG ++21
i
iR
G1
=
+ + + 1V 2V 21 VV +
1 2 21 +
A1 2 3 N
Surprisingly, these rules (along with superposition, whichyou will learn about later) can solve the circuit on page 8
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6.002 Fall 2000 Lecture 132
Other Analysis MethodsMethod 2 Apply element combination rules
V
32
32
RR +
V
32
32
1 RRRR
++=
+
V
?=
1
32
+
+
Example
1
R
VI=
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6.002 Fall 2000 Lecture 142
1.
2.
3.
4.
5.
Select reference node ( ground)from which voltages are measured.
Label voltages of remaining nodeswith respect to ground.These are the primary unknowns.
Write KCL for all but the ground
node, substituting device laws andKVL.
Solve for node voltages.
Back solve for branch voltages andcurrents (i.e., the secondary unknowns)
Particular application of KVL, KCL method
Method 3Node analysis
-
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6.002 Fall 2000 Lecture 152
Example: Old Faithfulplus current source
0V
1
2
4
5
3
1I
0V
+ 1e
2e
Step 1Step 2
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6.002 Fall 2000 Lecture 162
Example: Old Faithfulplus current source
0)()()( 21321101 =++ GeGeeGVeKCL at 1e
0)()()( 152402312=++IGeGVeGee
KCL at 2e
for
conveniencewrite
i
iR
G1
=
0V
1
2
4
5
3
1e
1
0V
+
2e
Step 3
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Example: Old Faithfulplus current source
0)()()( 21321101 =++ GeGeeGVe
KCL at 1e
0)()()( 152402312 =++ IGeGVeGeeKCL at 2l
move constant terms to RHS & collect unknowns
)()()( 10323211 GVGeGGGe =+++
140543231 )()()( GVGGGeGe +=+++
i
iR
G 1=
2 equations, 2 unknowns Solve for es(compare units)
0V
1
2
4
5
3
1e
1
0V
+
2e
Step 4
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6.002 Fall 2000 Lecture 182
In matrix form:
+=
++
++
104
01
2
1
5433
3321
IVG
VG
e
e
GGGG
GGGG
conductivitymatrix
unknownnode
voltages
sources
( )( ) 23543321
104
01
3213
3543
2
1
GGGGGGG
IVG
VG
GGGG
GGGG
e
e
++++
+
++
++
=
Solve
5G3G4G3G2
3G5G2G4G2G3G2G5G1G4G1G3G1G
1I0V4G3G
0V1G5G4G3G
1e
++++++++
++++=
( )( ) ( )( )
5343
2
3524232514131
1043210132
GGGGGGGGGGGGGGGGG
IVGGGGVGGe
++++++++
++++=
(same denominator)
Notice: linear in , , no negativesin denominator
0V 1
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Solve, given
K2.8
1
G
G
5
1
=
K9.3
1
G
G
4
2
=
K5.1
1G3 =
01 =I
( ) ( ) 23G5G4G3G3G2G1G
1
I
0
V
4
G
3
G
2
G
1
G
0
V
1
G
3
G
2e +++++
++++
=
15.1
1
9.3
1
2.8
1
3G2G1G =++=++
12.81
9.31
5.11GGG 543 =++=++
0
2
2 V
5.1
11
9.3
115.1
1
2.8
1
e
+=
02 6.0 Ve =
If , thenVV 30 = 02 8.1 Ve =
Check out the
DEMO
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6.002 CIRCUITS ANDELECTRONICS
Operational Amplifier Circuits
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6.002 Fall 2000 Lecture 220
Operational amplifier abstraction
Building block for analog systems
We will see these examples:
Digital-to-analog converters
FiltersClock generators
Amplifiers
Adders
Integrators & Differentiators
Reading: Chapter 15.5 & 15.6 of A & L.
+
Review
input resistance
0 output resistance
Gain A very large
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6.002 Fall 2000 Lecture 320
Consider this circuit:
+
+=
v
RRvv
21
21
1
2
R
vvi
=
2iRvvOUT =
2
1
2R
R
vvv
=
1
22
1
21R
Rv
R
Rv
+=
1
22
1
21
21
21
Rv
RRRv
+
+=
( )211
2vv
R=
subtracts!
+
2
+
1
+
1
2
+v
v
i
i
OUTv
+
1v
2v
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6.002 Fall 2000 Lecture 420
Another way of solving use superposition
1
21
1R
vvOUT
+= +
1
21
21
21
RRR
v +
+
=
1
21R
v=
2
1
2
2
v
R
vOUT
=
+
21 ||R
+
1R
2R
2OUTv2v
+
+
1
2R1OUT
v
1v
2R
+v
1R
21 OUTOUTOUT vvv +=
( )211
2vv
R=
01 v 02 v
Still subtracts!
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6.002 Fall 2000 Lecture 520
Lets build an intergrator
dtiC
1v
t
O
=
Lets start with the following insight:
vO
is related to dti
Iv
+
O
v+
dt
i +
i
+
OvC
But we need to somehow convertvoltage v
Ito current.
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6.002 Fall 2000 Lecture 620
But, vO
must be very small compared
to vR, or else vi
I
When is vO
small compared to vR
?
First try use resistor
iv
I
O
Ov
dt
dvRC >>when
I
Ov
dt
dvRC
dtvRC
1v
t
IO
or
IO
Ovv
dt
dvRC =+
Rv
larger the RC,smaller the vO
for goodintegratorRC >> 1
Iv +
i
+
OvC
Rv+
Demo
-
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6.002 Fall 2000 Lecture 720
Theres a better way
vi
I=so,
+
+I
v
+
+
vI
I
v
Cv
+
+
Ov
i
i
under negative feedbackV0v
Notice
COvv =
dtR
v
C
1v
t
I
O
=
We have our integrator.
+
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6.002 Fall 2000 Lecture 820
Now, lets build a differentiator
Iv
+
Ov+
dt
d
But we need to somehow convert currentto voltage.
i is related todt
dvI
Lets start with the following insights:
dt
dvCi
I=+I
v
i
C
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6.002 Fall 2000 Lecture 920
Demo
CIvv =
dtdvCi I=
dt
dvRCv
I
O=
Recall
+
i
i
currentto
voltage
iRvO
=
V0
+
+I
v + Ov
C
Cv
i
Differentiator
+
i
+
v
O
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6.002 CIRCUITS ANDELECTRONICS
Op Amps Positive Feedback
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6.002 Fall 2000 Lecture 221
Consider this circuit negative feedback
+
+
1R
1R
vIN
Nv +
INOUT v
Rv
1
2=
2
Whats the difference?
Consider what happens when there is a pertubationPositive feedback drives op amp into saturation:
SOUT Vv
and this positive feedback
+
+
1Nv +
2
INOUT vR
v1
2=
see
ana
lysis
onnext
pag
e
Negative vs Positive Feedback
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6.002 Fall 2000 Lecture 321
+
+
1RINv
2R
OUTv
)+ = vvAvOUT
++
= IN1
21
INOUT vRRR
vvA
IN
21
IN1OUT
21
1 AvRR
vARv
RR
AR+
+
+=
+= Av
IN
1
2IN
21
1
21
1
OUT vR
RAv
RR
AR
RR
R1
v =
+
+
=
+=
+ 211IN
21
1OUTRR
R1AvRR
AR1v
+
1INv
2 OUTv+v
v ( )+ vvA+
Static Analysis of Positive Feedback Ckt
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6.002 Fall 2000 Lecture 421
Representing dynamics of op amp
+v
v
ov*v+
+
*v
)( + vvC+
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6.002 Fall 2000 Lecture 521
Representing dynamics of op amp
Consider this circuit and lets analyze itsdynamics to build insight.
+
1 2
ov
3 4
Lets develop equation representing timebehavior of vo .
Circuit model
1
2
3 4
+
*v
)(+ vvC+
+
+
ov
+v
v
vo
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6.002 Fall 2000 Lecture 621
vvAvv oo ==
** or
)(A
CTwhere0
T
v
dt
dv oo+
==+or
oo vRR
vv +=
+=+
21
1
oo vRR
vv
=+
= 43
3
0)( =+
+ oo v
Cdt
dv
1time
0)(1
=
+++ o
o vRCRCdt
dvor
neglect
_**
vvvdt
dv
RC=+ +
ov)(
+
=
Dynamics of op amp
_vvv
dt
dvC oo =+ +
0)0(vo =
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6.002 Fall 2000 Lecture 721
Consider a small disturbance to vo
(noise).
Now, lets build some useful circuits with
positive feedback.
+> if
stableeKv
positiveisT
T
t
o
=
>+
if
unstableeKv
negativeisT
T
t
o ==
+if
neutralKv
largeveryisT
o =
ov
t
neutral
stable
K
disturbance
unstable
-
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6.002 Fall 2000 Lecture 821
One use for instability: Build on thebasic op amp as a comparator
+
+vov
SV+
SV
v
+ vv
ov
SV+
SV
0
t0v
+v
ov
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6.002 Fall 2000 Lecture 921
Now, use positive feedback
+
2
ov
1
iv
21
1
RR
vv o
+
=+
5.7v =+
5.7v =
15vo =
15vo =
15e.g. 21
==
SV
5.7v
5.7)vv( i
>
>=
5.7=
+
5.7I.e., if we wait long enough
Independenof R!
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6.002 Fall 2000 Lecture 922
T2 : S2 closed, S1 open
+
Cv
2C
So, initially,
2
SCV2
1=energy stored in capacitor
Assume T2 >>R2C
So, capacitor discharges ~fully in T2
So, energy dissipated inR2 during T2
2
S2 CV2
1E =
E1,E2 independent ofR2 !
Initially, vC= VS (recall T1 >>R1C)
-
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6.002 Fall 2000 Lecture 1022
Putting the two together:
Energy dissipated in each cycle
2
S
2
S CV2
1CV
2
1+=
21 EEE +=
Cgdischargin&chargingindissipatedenergyCVE
2
S=
Assumes C charges and discharges fully.
frequency
T
f1
=
TP=
T
CVS
2
=
fCVS2=
Average power
-
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6.002 Fall 2000 Lecture 1122
Back to our inverter
Ov
Nv C
SV
L
ON
t
2
T
T
2
T
INv
fT 1=
What is for the following input?P
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6.002 Fall 2000 Lecture 1222
Equivalent Circuit
SV +
L
C
ON
t
2
T
T
2
T
INv
fT
1
=
What is for the following input?P
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6.002 Fall 2000 Lecture 1322
We can show (see section 12.2 of A & L)
( ) ( )2ONL
2L2
S
ONL
2S
RR
RfCV
RR2
VP
++
+=
fCVR2
VP
2
S
L
2S +=
when RL >>RON
What is for gate?P
reme
mber
remem
ber
STATICP DYNAMICP
related to switchingcapacitor
independent of f.MOSFET ON half
the time.
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6.002 Fall 2000 Lecture 1422
fCVRVP S
L
S 2
2
2 +=
when RL >>RON
In standby mode,half the gates in achip can be
assumed to be on.So pergate is still .
Relates to standbypower.
STATIC
L
2
S
R2
V
What is for gate?P
In standby mode,
f 0 ,so dynamic poweris 0
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6.002 Fall 2000 Lecture 1522
Some numbers
a chip with 106 gates clocking
at 100 MHZ
V5V
10100f
k10R
Ff1C
S
6
L
=
=
==
+
= 6154
6 101002510102
2510P
[ ]microwatts5.2milliwatts25.1106 +=
problem!1.25KW! 2.5W
not bad
mW150W5.2
V1V5
Vreduce
f
V
S
2
S
nextlecture
must get rid of this
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6.002 CIRCUITS ANDELECTRONICS
Energy, CMOS
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6.002 Fall 2000 Lecture 223
Reading: Section 11.5 of A & L.
SV +
1
C 2
1S 2S
fTTT
121 =+=
fCVP S2
=
T1: closed
T2: open
open
closed
ONL
S
RR
VP
+=
2
Ov
SV
ON
L
Iv
Review
-
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6.002 Fall 2000 Lecture 323
Inverter Ov
Iv C
SV
L
ON
fCVR
VP S
L
S 22
2+=
related to switchingcapacitor.
independent of f.MOSFET ON half
the time.
STATIC DYNAMIC
constanttime
"RC"2
T
ONL
>>
>>Square wave inputf
T 1=
Demo
Review
In standby mode, halfthe gates in a chip can
be assumed to be on.So per gate isstill .
STATIC
L
2
S
R2
V
In standby mode,f 0 ,so dynamic power is 0
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6.002 Fall 2000 Lecture 423
fCV
R
VP S
L
S 22
2
+=
Chip with 106 gates clocking at 100 MHz
V5V,10100f,K10RF,f1C S6
L ====
problem!
1.25KWatts 2.5Watts
not bad+
independent off also standby power
(assume MOSFETsON if f 0)
must get rid of this!
f VS2
reduce VS5V1V
2.5V150mW
[ ]watts5.2milliwatts25.1106 +=
+
= 62153
26 10100510
10102
510P
gates
Review
-
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6.002 Fall 2000 Lecture 523
How to get rid of static power
Intuition:
Ov
SV
ON
L
Iv high low
i
idea!
Ov
SV
Iv high low
SV
L
Ov
Iv low
offMOSFET
high
-
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6.002 Fall 2000 Lecture 623
New Device PFET
N-channel MOSFET (NFET)
D
S
Gon when vGS VTNoff when vGS < VTN
e.g. VTN= 1V
P-channel MOSFET (PFET)
on when vGS VTPoff when vGS > VTPe.g. VTP= -1V
S
D
G
ON when
less than 4V
5V
-
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6.002 Fall 2000 Lecture 723
Consider this circuit:
S
DG
D
SG
OvIv+
SV
PU = pull up
PD = pull down
works like an inverter!
IN OUT
-
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6.002 Fall 2000 Lecture 923
O
vIv
SV
Ct
T
Iv
Tf
1=
From fCVP S2
=
Key: no path from VS to GND!no static power!
Lets compute DYNAMIC
SV +
pON
CnON
closed forvI low
closed forvI high
-
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6.002 Fall 2000 Lecture 1023
For our previous example
1,Hz100f,V5VF,f1C S ===
keep
allelse
same
fCVP S2
=
6215 10100510 =
gateperwatts5.2=
chipgate10forwatts5.2 6=P
P
PIII?~240watts1.2 GHz8x106
PIV?~1875watts3 GHz25x106
PII?~30
watts600
MHz2x106
PII?~15
watts300
MHz2x106
Pentium?~2.5
watts100
MHz106
fGates
gasp!
-
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6.002 Fall 2000 Lecture 1123
and use big heatsink
How to reduce power
A VS 5V 3V 1.8V 1.5V~PIV 170 watts better, but high
next time:power supply
B Turn off clock when not in use.
C Change VS depending on need.
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6.002 Fall 2000 Lecture 1223
CMOS Logic
NAND:
ZA B
0 0 1
0 1 1
1 0 1
1 1 0
SDG
V0 on
V5
SDG
V5 off
V5
SV
Z
-
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6.002 Fall 2000 Lecture 1323
BABAF +==e.g.
In general, if we want to implementF
short whenA = 0 or B = 0,open otherwise
short whenA B is true,else open
shortwhenFis true,else open
SV
Z
shortwhenFis true,else open
remember
DeMorgans
law
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6.002 Fall 2000 Lecture 124
6.002 CIRCUITS ANDELECTRONICS
Power Conversion Circuits
and Diodes
-
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6.002 Fall 2000 Lecture 224
Power Conversion Circuits (PCC)
Power efficiency of converter important,so use lots of devices:
MOSFET switches, clock circuits,inductors, capacitors, op amps, diodes
Reading: Chapter 16 and 4.4 of A & L.
PCC110V60Hz
+
5V DC
solar cells,battery PCC
+
5V DC
3VDC
DC-to-DC UP converter
R
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6.002 Fall 2000 Lecture 324
First, lets look at the diode
Can use this exponential model withanalysis methods learned earlier
analytical graphical incremental
(Our fake expodweeb was modeled after this device!)
Dv
Di
Dv
Di
SI mV V
Dv+
Di
= 1eIi T
D
V
v
SD
A10I 12S=
V025.0VT =
qTkVT =
Boltzmanns constant
temperature in Kelvinscharge of an electron
-
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6.002 Fall 2000 Lecture 424
Another analysis method:piecewiselinear analysis
PL diode models:
Dv
Di
0
Ideal diode model
iD = 0
openoroff
vD < 0
vD = 0
shortoron
iD 0
-
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6.002 Fall 2000 Lecture 524
Dv
Di
V6.0
0vD =
0iD =
Practical diode modelideal with offset
V6.0
+
Another analysis method:piecewiselinear analysis
Open segment
Short segment
-
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6.002 Fall 2000 Lecture 624
Another analysis method:piecewiselinear analysis
Replace nonlinear characteristic with
linear segments. Perform linear analysis within each
segment.
Piecewiselinear analysis method
-
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6.002 Fall 2000 Lecture 724
(We will build up towards an AC-to-DC converter)
Ov
+
+I
v
V6.0
+
Example
Consider
vI is a sine wave
-
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6.002 Fall 2000 Lecture 924
Example
t
6.0
Iv
Ov
-
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6.002 Fall 2000 Lecture 1024
Now consider a half-wave rectifier
Iv R Ov
+
+
V6.0
+
C
-
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6.002 Fall 2000 Lecture 1224
DC-to-DC UP Converter
The circuit has 3 states:
I. S is on, diode is offi increases linearly
II. S turns off, diode turns on
C charges up, vO increasesIII. S is off, diode turns off
C holds vO (discharges into load)
t
Sv
Sclosed
Sopen
T
pT
Ov
+
+DC
IV CSv
load
i
switchS
Donotuse
resistive
elements!
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6.002 Fall 2000 Lecture 1324
More detailed analysis
I. Assume i(0) = 0, vO(0) > 0
Son at t= 0, diode off
+I
V C
i
LOv
t
i
L
TVTi I=)(
T
dt
diLVI =
i is a rampL
VI=slope
2)T(Li
2
1:TtatstoredenergyE ==
L
TVE I
2
22
=
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II. Sturns off at t= Tdiode turns on (ignore diode voltage drop)
+I
V C
LOv
Si
Diode turns off at T when i tries to go negative.
t
i
T0
L
TVI
LCO
1=
T PT
State III starts here
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6.002 Fall 2000 Lecture 1524
II. Sturns off at t= T, diode turns on
Diode turns off at T when I tries to go negative.
LCO
1=
ignorediodedrop
)(TvO
Ov
T tT0
Capacitor voltage
PT
Ov
t
i
T
0
L
TVI
T PT
LCO
1=
III.
Lets look at the voltage profile
-
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6.002 Fall 2000 Lecture 1624
II. Sturns off at t= T, diode turns on
Diode turns off at T when I tries to go negative.
LCO
1=
ignorediodedrop
)(TvO
Ov
T tT0
Capacitor voltage
PT
Ov
t
i
T
0
L
TVI
T PT
LCO
1=
III.
Lets look at the voltage profile
-
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6.002 Fall 2000 Lecture 1724
III. Sis off, diode turns off
C holds vO after Ti is zero
+I
V CS Ov
+
Eg, no load
Ov
T
t0
Capacitor voltage
PT
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6.002 Fall 2000 Lecture 1824
III. Sis off, diode turns off
C holds vO after Ti is zero
until S turns ON at TP, and cycle repeatsI II III I II III
Thus, vO increases each cycle, if there is no load.
t
Ov
)(nvO
PT2 PT3
+I
V CS Ov
+
Eg, no load
PT
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6.002 Fall 2000 Lecture 1924
What is vO after n cycles vO(n) ?
Use energy argument (KVL tedious!)
Each cycle deposits E in capacitor.
2)Tt(iL2
1E ==
2
I
L
TVL
2
1
=L
TV
2
1E
22
I=
After n cycles, energy on capacitor
L2
TnVEn
22
I=
This energy must equal 2O )n(Cv21
orLC
TnV)n(v22
IO =
LC1
O =
nTV)n(v OIO =
so,L2
TnV)n(Cv
2
1 22
I2
O =
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How to maintain vO
at a given value?
recallL
TVE I
2
22
=
Another example of negative feedback:
(( )
Tvv
Tvv
refO
refO
thenif
thenif
Ov
+
+I
V load
control
change TT
pT
pwm
+ refv
compare
Ov
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6.002 CIRCUITS ANDELECTRONICS
Violating the Abstraction Barrier
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6.002 Fall 2000 Lecture 225
Case 1: The Double Take
Problem
iV
OV
0 1
t
OV
0
1 OV
0
1
observedexpected
in forbidden region!
huh?
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6.002 Fall 2000 Lecture 325
(a) DC case
iV
OV
1V
very high
impedancelike opencircuit
OKDCV5Vi = DCV5VO = DCV5V1 =
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6.002 Fall 2000 Lecture 525
iV
. . . .
instantaneous R dividerfinite propagation speedof signals
characteristicimpedance
T2 T
5
2.5
0
V5
0
V5
0
V5
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6.002 Fall 2000 Lecture 725
Case 2: The Double DipProblem strange spikes on supply
driving a 50 resistor!
V
0 1
01
OK
Why?
input
driving a 50 resistor!
V
0
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6.002 Fall 2000 Lecture 825
V
dt
Ldi
Drop across inductor
Inverter current
v inductor
solution 1. short wires2. low inductance wires3. avoid big current swings
VS
VS
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6.002 Fall 2000 Lecture 925
Case 3: The Double Team, or,Slower may be faster!Problem
a given chipworked,but was slow.
Lets try speeding it up by using stronger
drivers
actual
ideal
ideal
C
Disaster!
L
actual
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6.002 Fall 2000 Lecture 1025
Why?Consider
crosstalk!
1
0
DEMO
2
C
dt
dV
DEMO
ok
dtdVC
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6.002 Fall 2000 Lecture 1125
How does this relate to chip?
Load output! put cap on outputs of chip jitter edges slew edges
dt
dVsmall
DEMOSolution
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Case 4: The Double JumpCareful abstraction violation for thebetter
Recall
oV
iV
oV
iV
expect
but, observe
oV
iV
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Case 4: The Double JumpCareful abstraction violation for thebetter
iV
V5
5V
0V
3V5V +
3V So, pullup hasstronger drive
as output rises
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6.002 Fall 2000 Lecture 13
6.002 CIRCUITS ANDELECTRONICS
Superposition, Thvenin and Norton
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6.002 Fall 2000 Lecture 23
0=loop
iV
Review
Circuit Analysis Methods
Circuit composition rules
Node method the workhorse of 6.002KCL at nodes using Vs referencedfrom ground(KVL implicit in )ji ee G
KVL: KCL:
0=node
i
VI
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Consider
Linearity
Write node equations
VI
1
2+
021
=+
IR
e
R
Ve
Notice:linear in Ve ,,
VI,eVNo
terms
e
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6.002 Fall 2000 Lecture 43
Consider
Linearity
Write node equations --
Rearrange --
VI
1
2+
021
=+
IR
e
R
Ve
IR
VeRR +=
+121
11
e S=
conductance
matrix
node
voltages
linear sum
of sources
linear in IVe ,,
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6.002 Fall 2000 Lecture 53
Linearity
or IRRVRRe21
21
21
2
+++=
+++++= 22112211 bbVaVae
Write node equations --
Rearrange --
021
=+
IR
e
R
Ve
IRVe
RR+=
+
121
11
e S=
conductancematrix nodevoltages linear sumof sources
linear in IVe ,,
Linear!
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6.002 Fall 2000 Lecture 63
LinearityHomogeneitySuperposition
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6.002 Fall 2000 Lecture 73
LinearityHomogeneitySuperposition
Homogeneity
1x2
x y...
1x2x y...
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6.002 Fall 2000 Lecture 83
LinearityHomogeneitySuperposition
Superposition
ax1ax2 ay... ...
bx1bx2 by
ba xx 11 +
ba xx 22 + ba yy +
...
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6.002 Fall 2000 Lecture 93
LinearityHomogeneitySuperposition
Specific superposition example:
1V0 1y 02V 2y
01
+V
20 V+ 21y +
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6.002 Fall 2000 Lecture 113
i
+0=V
+
-
v
i
short
+
-
v
i
0=I
+
-
v
i
open
+
-
v
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6.002 Fall 2000 Lecture 123
Back to the exampleUse superposition method
V
1
2+
e
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6.002 Fall 2000 Lecture 133
Back to the exampleUse superposition method
V
acting alone
V0=I2
+
e
1
I acting alone
0=V
1
2
e
VRR
eV21
2
+=
IRR
eI21
21
+=
IRR
VRR
eee IV21
21
21
2
++
+=+=
sum superposition
Voil !
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6.002 Fall 2000 Lecture 143
saltwater
output showssuperposition
Demo
constant
+
sinusoid
+
?
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6.002 Fall 2000 Lecture 153
ConsiderYet another method
resistors
nounits
By setting
0
,0
=
=
i
nn
0
,0
=
=
i
Vmm
All
0
,0==
mm
nn
V
+
mVn
Arbitrar
y networkN
By superpositioniIVv n
nnm
mm ++=
+
-v
i
i
resistanceunits
independent of externalexcitation and behaves like avoltage THv
alsoindependentof externalexcitement &behaves likea resistor
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6.002 Fall 2000 Lecture 163
Orivv THTH +=
As far as the external world is concerned(for the purpose of I-V relation),
Arbitrary network N is indistinguishable
from:
i+
TH
THv
+
-
vThveninequivalentnetwork
TH
THv open circuit voltageat terminal pair (a.k.a. port)
resistance of network seenfrom port( s, s set to 0)
mV n
N
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Method 4:
The Thvenin Method
Replace network N with its Thvenin
equivalent, then solve external network E.
E
Thvenin equivalent
+
TH
THv
+
-
v
i
E
+
+
i
+
-v
N
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6.002 Fall 2000 Lecture 183
Example:1
V+
1i
1
V
+
1i
TH
TH
RRVVi
+=
1
1
2
TH
THV +
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Example:
:TH
:THV
2IRVTH =
2TH =
+
-THV 2
+
-TH 2
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6.002 Fall 2000 Lecture 203
Graphically, ivv THTH +=
i
Open circuit( )0i
THvv = OCV
Short circuit( )0v TH
TH
R
vi
=
SCI
v
THR
1
THv
SCI
OCV
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6.002 Fall 2000 Lecture 213
Method 5:
The Norton Method
in recitation,see text
+
+
i
+
-v
Nortonequivalent
TH
THN
R
VI =
NTH =N
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6.002 Fall 2000 Lecture 223
Summary
101100
Discretize matterLMD LCA
Physics EE
R, I, V Linear networks
Analysis methods (linear)KVL, KCL, I VCombination rulesNode methodSuperpositionThveninNorton
NextNonlinear analysis
Discretize voltage
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6.002 Fall 2000 Lecture 24
Review
Discretize matter by agreeing toobserve the lumped matter discipline
Analysis tool kit: KVL/KCL, node method,superposition, Thvenin, Norton
(remember superposition, Thvenin,Norton apply only for linear circuits)
Lumped Circuit Abstraction
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6.002 Fall 2000 Lecture 34
Discretize value Digital abstraction
Interestingly, we will see shortly that thetools learned in the previous threelectures are sufficient to analyze simpledigital circuits
Reading: Chapter 5 of Agarwal & Lang
Today
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6.002 Fall 2000 Lecture 44
Analog signal processing
But first, why digital?In the past
By superposition,
The above is an adder circuit.
2
21
11
21
20
VRR
VRR
V+
+
+
=
If ,21 RR =
2
21
0
VVV
+=
1V
1
2+
2V +
0V
and
might represent the
outputs of two
sensors, for example.
1V 2V
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Noise Problem
noise hampers our ability to distinguishbetween small differences in value e.g. between 3.1V and 3.2V.
Receiver:
huh?
add noise onthis wire
t
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6.002 Fall 2000 Lecture 64
Value Discretizati