đồ án mạch đo nhiệt độ dung lm35 và 89s52

8/10/2019 n mch o nhit dung LM35 v 89S52

1/50

MC LC:

- Phn 1: Gii thiu ti.Trang 1

1. t vn ...Trang 1

2. Mc tiu..Trang 1

3. Phng n thc hin...Trang 1

- Phn 2: Ni dungTrang 2

Chng 1: Gii thiu linh kin...Trang 2

1. Gii thiu ADC0809Trang 2


2/50


3/50

Hunh Thanh Vng Page 1

PHN 1. GII THIU TI

1. t vn :

- Bng cch no c tho, v hin thc nhit ? Vic o v hin th dng ng

dng vo vic g?...

- Nhng vn trn sc gii p trong n mn hc 1 ny.

2. Mc tiu:

- Thit kmch o nhit 4 knh trong di t0 n 140oC.

- o vhin thng nhit hin ti ni ang kho st.

- Cnh bo nu nhit vt mc ngng nguy him( ti ny chn ngng nguy

him l 50 C).

3. Phng n thc hin:

C nhiu phng n khc nhau thc hin vic o v hin thnhit :

- Sdng IC cc IC shay vi iu khin.

- Hin thtrn led 7 on, LCD, led ma trn

y em sdng vi iu khin v hin th trn LCD v k thut vi x l hin nay rt

pht trin, so vi kthut sdng IC sth vi iu khin c tch hp nhiu hn,nhgn hnv quan trng nht l c lp trnh iu khin. Mch sdng vi iu khinkh n gin, khng phc tp, cng knh nh kthut dng IC sv mang tnh thc tcao hn..


4/50


PHN 2. NI DUNG

CHNG 1: GII THIU LINH KIN

1. Gii thiu ADC0809:

B ADC 0809 l mt thit b CMOS tch hp vi mt b chuyn i t tng t sang s8 bit, b chn 8 knh vi mt b logic iu khin tng thch. B chuyn i ADC 8 bitny dng phng php chuyn i xp x tip. B chn knh c th truy xut bt k knhno trong cc ng vo tng t mt cch c lp.

Thit b ny loi tr kh nng cn thit iu chnh im 0 bn ngoi v kh nng iuchnh t s lm trn ADC 0809 d dng giao tip vi cc b vi x l.

1.1. S chn ADC 0809:

* ngha cc chn:

. IN0n IN7 : 8 ng vo tng t.

. A, B, C : gii m chn mt trong 8 ng vo.

. Z-1n Z-8 : ng ra song song 8 bit.

ADC0809

28 15

1 14

IN2 IN1 IN0 A B C ALE 2-1

2-2

2-3

2-4

2-8

REF 2-6

STARTIN3 IN4 IN5 IN6 IN7 EOC 2-5

OE CLK VCC REF GND 2-7


5/50


. ALE : cho php cht a ch.

. START : xung bt u chuyn i.

. CLK : xung ng h.

. REF (+): in th tham chiu (Vref+).

. REF (-) : in th tham chiu (Vref-).

. VCC : ngun cung cp.

1.1.2 Cc c im ca ADC 0809:

. phn gii 8 bit.

. Tng sai s cha chnh nh LSB; 1 LSB.

. Thi gian chuyn i: 100s tn s 640 kHz.

. Ngun cung cp + 5V.

. in p ng vo 05V.

. Tn s xung clock 10kHz 1280 kHz.

. Nhit hot ng - 40oC n 85oC.

. D dng giao tip vi vi xl hoc dng ring.

. Khng cn iu chnh zero hoc y thang.

1.1.3. Nguyn l hot ng:

ADC 0809 c 8 ng vo tng t, 8 ng ra 8 bit c th chn 1 trong 8 ng vo tngt chuyn i sang s 8 bit.

Cc ng vo tng t c chn bng cch giim. Chn 1 trong 8 ng vo tng t

c thc hin nh 3 chnADDA, ADDB, ADDC nh bng trng thi sau:

A B C Ng vo c chn

0 0 0 IN0


6/50


0

0

0

1

1

1

1

0

1

1

0

0

1

1

1

0

1

0

1

0

1

IN1

IN2

IN3

IN4

IN5

IN6

IN7

Sau khi kch xung start th b chuyn i bt u hot ng cnh xung ca xungstart, ng ra EOC s xung mc thp sau khong 8 xung clock (tnh t cnh xung caxung start). Lc ny bit c trng s ln nht (MSB) c t ln mc 1, tt c cc bit cnli mc 0, ng thi to ra in th c gi trVref/2, in th ny c so snhvi inth vo Vin.

+ Nu Vin > Vref/2 th bit MSB vn mc 1.

+ Nu Vin < Vref/2 th bit MSB vn mc 0.

Tng t nh vy bit k tip MSB c t ln 1 v to ra in th c gi tr Vref/4 vcng so snh vi in p ng vo Vin. Qu trnh c tip tc nh vy cho n khi xc nhc bit cui cng. Khi chnEOC ln mc 1 bo cho bit kt thc chuyn i.

Trong sut qu trnh chuyn i chn OE c t mc 1, mun c d liu ra chnOE xung mc 0.

Trong sut qu trnh chuyn i nu c 1 xung start tcng th ADC s ngng chuyni.

M ra N cho mt ng vo ty l mt s nguyn.

)()(

)( ).(256

refref

refIN

VV

VVN


7/50


Trong Vin: in p ng vo h so snh.

Vref(+): in p ti chn REF(+).

Vref(-): in p ti chn REF(-).

Nu chn Vref(-) = 0 th N = 256.)(ref

in

V

V

Vref(+) = Vcc = 5V th y thang l 256.

- Gi tr bc nh nht

1 LSB =12

58

= 0,0196 V/byte

Vy vi 256 bc Vin = 5V.

p vo ln nhtca ADC0809 l 5V.

Biu thi gian ca ADC 0809.

Hnh 1.1 Biu thi gian ca ADC 0809


8/50


1.2. Mch to xung clock cho ADC 0809:

Xung nhp cho ADC c th c ly t ngun bn ngoi nh CPU clock hay c th dng

cc mch to dao ng sau:

1.2.1S dng mch dao ng dng cc cng not to dao ng cho ADC nhsau:

Tn s dao ng ca mch l f =RC3

1.

Tn s dao ng chun l 640 kHz.

Suy ra 640 =RC3

1

Vi R t 100n vi kchn R =1 kC = 500 PF.

S kt ni mch nh sau:

Vcc

560P

10K

IKIK


9/50


Hnh 1.2 S kt ni mch chuyn i ADC 0809.

1.2.2.Mch dao ng RC to xung clock:

y tis dng mch ny to dao ng cho ADC lm vic.

Vref_

GND

Vcc

560P

10K

IKIK

Vcc

PC5

PC4

PC2

PB7

PB6

PB5

PB4

OE

ALE

Start

C

B

A

D

825

5

8255

080

9

Vcc

Vref +

IN0

IN1

IN2

CLK


10/50


Hnh 1-3: mch dao ng cho ADC0809

Tn s ca mch dao ng: f =RC.8,0

1

Ta chn cc gi tr linh kin R v C sao cho xung clock to c c tn s khong640kHz chu k chuyn i l 100us.

thc hin cc vic chuyn i nhn d liu t ADC ta thc hin cc bc sau:

Khi to 8255.Chn ng vo tng t, v d nh chn Ino bng cch gi gi tr 0000 = 00H ra 4

bit thp ca portc.

Cht a ch ng thi kch xung clock bng cch gi gi tr 0001 = 01Hra 4 bit cao

ca portc.Tr hon trong khong thi gian 200s ADC thc hin xong hon ton vicchuyn i.Nhn d liu t ADC vo port tng ng.

2. Gii thiu vi iu khin AT89C52:

2.1. Gii thiu:B vi iu khin vit tt l Micro-controller, l mch tch hp trn mt chip c th

lp trnh c, dng iu khin hot ng ca mt h thng. Theo cc tp lnh cangi lp trnh, b vi iu khin tin hnh c, lu tr thng tin, x l thng tin, o thigian v tin hnh ng m mt c cu no .

Trong cc thit b in v in v in t dn dng, cc b vi iu khin, iu khinhot ng ca TV, my git, u c laser, in thai, l vi -ba Trong h thng snxut t ng, b vi iu khin c s dng trong Robot, dy chuyn t ng. Cc hthng cng thng minh th vai tr ca h vi iu khin cng quan trng.

2.2.Lch s pht trin ca cc b vi iu khinB vi iu khin thc ra, l mt loi vi x l trong tp hp cc b vi x l ni

chung. B vi iu khin c pht trin t b vi x l, t nhng nm 70 do s pht trin

v hon thin v cng ngh vi in t da trn k thut MOS (Metal-Oxide-Semiconductor) , mc tch hp ca cc linh kin bn dn trong mt chip ngy cngcao.

Nm 1971 xut hin b vi x l 4 bit loi TMS1000 do cng ty texas Instrumentsva l ni pht minh va l nh sn xut. Nhn tng th th b vi x l ch c cha trnmt chip nhng chc nng cn thit x l chng trnh theo mt trnh t, cn tt c b

phn ph tr khc cn thit nh : b nh d liu , b nh chng trnh , b chun i


11/50


AID, khi iu khin, khi hin th, iu khin my in, hi ng h v lch l nhng linhkin nm bn ngoi c ni vo b vi x l.

Mi n nm 1976 cng ty INTEL (Interlligen-Elictronics). Mi cho ra i b viiu khin n chip u tin trn th gii vi tn gi 8048. Bn cnh b x l trung tm8048 cn cha b nh d liu, b nh chng trnh, b m v pht thi gian cc cng

vo v ra Digital trn mt chip.Cc cng ty khc cng ln lc cho ra i cc b vi iu khin 8bit tng t nh

8048 v hnh thnh h vi iu khin MCS-48 (Microcontroller-sustem-48).n nm 1980 cng ty INTEL cho ra i th h th hai ca b vi iu khin n

chip vi tn gi 8051. V sau hng lot cc vi iu khin cng loi vi 8051 ra i vhnh thnh h vi iu khin MCS-51 .

n nay h vi iukhin 8 bit MCS51 c n 250 thnh vin v hu ht cccng ty hng dn hng u th gii ch to. ng u l cng ty INTEL v rt nhiucng ty khc nh : AMD, SIEMENS, PHILIPS, DALLAS, OKI

Ngoi ra cn c cc cng ty khc cng c nhng h vi iu khin ring nh:

H 68HCOS ca cng ty MotorolaH ST62 ca cng ty SGS-THOMSONH H8 ca cng ty HitachiH pic cu cng ty Microchip2.3. Kho st b vi iu khin 8051 v 8031:

IC vi iu khin 8051/8031 thuc h MCS51 c cc t im sau :- 4kbyte ROM (c lp trnh bi nh sn xut ch c 8051)-

128 bit RAM- 4port I10 8bit- Hai b nh thi 16bit

-

Giao tip ni tip- 64KB khng gian b nh chng trnh m rng-

64 KB khng gian b nh d liu m rng- Mt b x l lun l (thao tc trn cc bit n) -

210 bit c a ch ha-

B nhn / chia 4s

2.3.1.Cu trc bn trong ca 8051 / 8031 :

Hnh 1: S khi 8051/8031.


12/50


Phn chnh ca vi iu khin 8051 / 8031 l b x l trung tm (CPU: centralprocessing unit ) bao gm :

-

Thanh ghi tch ly A- Thanh ghi tch ly ph B, dng cho php nhn v php chia-

n v logic hc (ALU : Arithmetic Logical Unit )

-

T trng thi chng trnh (PSW : Prorgam Status Word)- Bn bng thanh ghi-

Con tr ngn xp- Ngoi ra cn c b nh chng trnh, b giim lnh, b iu khin thi gian

v logic.

n v x l trung tm nhn trc tip xung t b giao ng, ngoi ra cn c khnng a mt tn hiu gi nhp t bn ngoi.

TXD*

RXD*

T1*

T2*

P0 P1 P2 P3

INT/*1

INT/*0

EA\ RST PSEN ALE

Cc thanh ghi

khc

128 byte

Ram

Rom

4K-8051

OK-8031

Timer1

Timer2

iu khin

ngt

i u khi nbus

CPU

Port ni tipCc port I\OTo daong


13/50


Chng trnh ang chy c th cho dng li nh mt khi iu khin ngt bntrong. Cc ngun ngt c th l : cc bin c bn ngoi , s trn b m nh thi hoccng c th l giao din ni tip.

Hai b nh thi 16 bit hot ng nh mt b m.Cc cng (port0, port1, port2, port3 ). S dng vo mc ch iu khin.

cng 3 c thm cc ng dn iu khin dng trao i vi mt b nh bnngoi, hoc u ni giao din ni tip, cng nh cc ng ngt dn bn ngoi.

Giao din ni tip c cha mt b truyn v mt b nhn khng ng b, lm vicc lp vi nhau. Tc truyn qua cng ni tip c th t trong vy rng v c nnh bng mt b nh thi.

Trong vi iu khin 8051 / 8031 c hai thnh phn quan trng khc l b nh vcc thanh ghi :

B nh gm c b nh Ram v b nh Rom (ch c 8031) dng lu tr d liuv m lnh.

Cc thanh ghi s dng lu tr thng tin trong qu trnh x l. Khi CPU lm vic

n lm thay i ni dung ca cc thanh ghi.2.3.2.Chc nng ca cc chn vi iu khin

18

19

12MHz

40

29

30

17

16

15

14

13

RD\

WR\

T1

T0

INT1

A15

A14

A13

A12

A11

28

27

26

25

24

87654321

32

33

34

35

36

Po.7

Po.6

Po.5

Po.4

Po.3

AD7

AD6

AD5

AD4

AD3

P1.7

P1.6

P1.5

P1.4

P1.3

P2.7

P2.6

P2.5

P2.4

P2.3

PSEN\

ALE

EA\

Vcc

20

Vss

30p

30p

XTAL1

XTAL2


14/50


15/50


c tn s 2MHz. Ch ngoi tr khi thi hnh lnh MOVX, mt xung ALE s b mt. Chnny cng c lm ng vo cho xung lp trnh cho EPROM trong 8051.

g.EA(External Access):Tn hiu vo EA trn chn 31 thng c mc ln mc cao (+5V) hoc mc thp

(GND). Nu mc cao, 8051 thi hnh chng trnh t ROM ni trong khong a ch

thp (4K). Nu mc thp, chng trnh ch c thi hnh t b nh m rng. Khi dng8031, EA lun c ni mc thp v khng c b nh chng trnh trn chip. Nu EAc ni mc thp b nh bn trong chng trnh 8051 s b cm v chng trnh thihnh t EPROM m rng. Ngi ta cn dng chn EA lm chn cp in p 21V khi lptrnh cho EPROM trong 8051.

h.SRT(Reset) :Ng vo RST trn chn 9 l ng reset ca 8051. Khi tn hiu ny c a ln mc

cao (trong t nht 2 chu k my ), cc thanh ghi trong 8051 c ti nhng gi tr thchhp khi ng h thng.

i.Cc ng vo b dao ng trn chip :

Nh thy trong cc hnh trn , 8051 c mt b dao ng trn chip. N thngc ni vi thch anh gia hai chn 18 v 19. Cc t gia cng cn thit nh v. Tns thch anh thng thng l 12MHz.

j.Cc chn ngun :8051 vn hnh vi ngun n +5V. Vccc ni vo chn 40 v Vss(GND) c

ni vo chn 20.2.3.3.Cc thanh ghi chc nng c bit:

Cc thanh ghi ni ca 8051/8031 c truy xut ngm nh bi b lnh. V dlnh INC A s tng ni dung ca thanh ghi tch ly A ln 1. Tc ng ny c ngmnh trong m lnh.

Cc thanh ghi trong 8051/8031 c nh dng nh mt phn ca RAM trn chip.V vy mi thanh ghis c mt a ch (ngoi tr thanh ghi trc tip, s khng c li khit chng vo trong RAM trn chip). l l do 8051/0831 c nhiu thanh ghi. Cngnh R0 n R7, c 21 thanh ghi chc nng c bit (SFR: Special Funtion Rgister) vng trn ca RAM ni, t a ch 80H n FFH. Ch rng hu ht 128 a ch t 80Hn FFH khng c nh ngha. Ch c 21 a ch SFR l c nh ngha.

Ngoi tr tch ly (A) c th c truy xut ngm nh ni, a s cc SFR ctruy xut dng a ch trc tip.ch rng mt vi SFR c th c a ch ha bit hoc

byte. Ngi thit k phi thn trng khi truy xut bit v byte. V d lnh sau:SETB 0E0H

S Set bit 0 trong thanh ghi tch ly, cc bit khc khng thay i. Ta thy rng E0Hng thi l a ch byte ca thanh ghi tch ly v l a ch bit c trng s nh nht trongthanh ghi tch ly. V lnh SETB ch tc ng trn bit, nn ch c a ch bit l c hiuqu.

a.T trng thi chng trnh:T trng thi chng trnh (PSW: Program Status Word) a chD0H cha cc bit

trng thi nh bng tm tt sau:


16/50


Bit K hiu a ch ngha

PSW.7PSW.6PSW.5PSW.4PSW.3

PSW.2PSW.1PSW.0

CYACF0RS1RS0

OV

P

D7HD6HD5HD4HD3H

D2HD1HD0H

C nhC nh phC 0Bit 1 chn bank thanh ghiBit chnbank thanh ghi.00=bank 0; a ch 00H-07H01=bank 1: a ch 08H-0FH10=bank 2:a ch 10H-17H11=bank 3:a ch 18H-1FHC trnD trC Parity chn.

Bng : T trng thi chng trnhC nh (CY) c cng dng kp. Thng thng n c dng cho cc lnh ton hc:

n s c set nu c mt s nh sinh ra bi php cng hoc c mt s mn phptr . V d, nu thanh ghi tch ly cha FFH, th lnh sau:

ADD A,#1S tr v thanh ghi tch ly kt qa 00H v set c nh trong PSW.C nh cng c th xem nh mt thanh ghi 1 bit cho cc lnh lun l thi hnh trn

bit. V d, lnh s AND bit 25H vi c nh v t kt qa tr vo c nh:ANL C,25H

C nh ph:Khi cng cc s BCD, c nh ph (AC) c set nu kt qa ca 4 bit thp trong

khong 0AH n 0FH. Nu cc gi tr cng c l s BCD, th sau lnh cng cn c DA

A( hiu chnh thp phn thanh ghi tch ly) mang kt qa ln hn 9 tr v tm t 09.C 0

C 0 (F0)l mt bit c a dng dnh cc ng dng ca ngi dng.Cc bit chn bank thanh ghi

Cc bit chn bank thanh ghi (RSO v RS1) xc nh bank thanh ghi c tch cc.Chng c xa sau khi reset h thng v c thay i bng phn mm nu cn. V d,

ba lnh sau cho php bank thanh ghi 3 v di chuyn ni dung ca thanh ghi R7 (a chbyte IFH) n thanh ghi tch ly:SETB RS1SETB RSO

MOV A,R7Khi chng trnh c hp dch cc a ch bit ng c thay th cho cc k hiuRS1 v RS0. Vy lnh SETB RS1 s ging nh lnh SETB 0D4H.

C TrnC trn (OV) c set mt lnh cng hoc tr nu c mt php ton b trn. Khi

cc s c du c cng hoc tr vi nhau, phn mm c th kim tra bit ny xc nh


17/50


xem kt qa ca n c nm trong tm xc nh khng. Khi cc s khng du c cng,bit OV c th c b qua. Cc kt qa ln hn +127 hoc nh hn128 s set bit OV.

b.Thanh ghi B :Thanh ghi B a ch F0H c dng cng vi thanh ghi tch ly A cho cc php

ton nhn v chia. Lnh MUL AB s nhn cc gi tr khng du 8 bit trong A v B ri tr

v kt qa 16 bit trong A (byte thp) v B (byte cao). Lnh DIV AB s chia A cho B ritr v kt qa nguyn trong A v phn d trong B. Thanh ghi B cng c th c xemnh thanh ghi m a dng. N c a ch ha ttng bit bng cc a ch bit FOH nF7H.

c. Con tr ngn xp:Con tr ngn xp (SP) l mt thanh ghi 8 bit a ch 81H. N cha a ch ca

byte d liu hin hnh trn nh ca ngn xp. Cc lnh trn ngn xp bao gm cc thaotc ct d liu vo ngn xp v ly d liu ra khi ngn xp. Lnh ct d liu vo ngnxp s lm tng SP trc khi ghid liu, v lnh ly d liu ra khi ngn xp s dc dliu v lm gim SP. Ngn xp ca 8051/8031 c gi trong RAM ni v c gii hn

cc a ch c th truy xut bng a ch gin tip. chng l 128 byte u ca 8051/8031. khi ng li SP vi ngn xp bt u ti 60H, cc lnh sau y c dng:MOV SP,#%FH

Trn 8051/8031 ngn xp b gii hn 32 byte v a ch cao nht ca RAM trnchip l 7FH. S d cng gi tr 5FH v SP s tng ln 60H trc khi ct byte d lu utin.

Ngi thit k c th chn khng phi khi ng li con tr ngn xp m nly gi tr mc nh khi reset h thng. Gi tr mc nh l 07H v kt qa l ngn utin ct d liu c a ch 08H. Nu phn mm ng dng khng khi ng li SP ,

bank thanh ghi 1 (c th c 2 v 3) s khng dng c v vng RAM ny c dng

lm ngn xp.Ngn xp c truy xut trc tip bng cc lnh PUSH v POP lu gi tm thiv ly li d liu hoc c truy xut ngm bng cc lnh gi chng trnh con (ACALL,LACALL) v cc lnh tr v (RET,RETI) ct v ly li b m chng trnh.

d.Con tr d liu:Con tr d liu (DPTR) c dng truy xut b nh ngoi l mt thanh ghi 16

bit a ch 82H(DPL: byte thp) v 83H (DPH:byte cao). Ba lnh sau s ghi 55H voRAM ngoi a ch 1000H:MOV A,#55HMOV DPTR,#1000HMOVX @DPTR,A

Lnh u tin dng a ch tc thi ti d liu 55H vo thanh ghi tch ly, lnhth hai cng dng a ch tc thi, ln ny ti d liu 16 bit 1000H vo con tr d liu.Lnh th ba dng a ch gin tip di chuyn d liu trong A (55H) n RAM ngoi a ch c cha trong DPTR (1000H)

e. Cc thanh ghi port xut nhp:


18/50


Cc port ca 8051/8031 bao gm Port 0 a ch 80H, Port 1 a ch 90 H, Port 2 a ch A0H v Port 3 a ch B0H. Tt c cc Port u c a ch ha tng bit.iu cung cp mt kh nng giao tip thun li.

f. Cc thanh ghi timer:

8051/8031 cha 2 b nh thi m 16 bit c dng trong vic nh thi hoc m

s kin. Timer 0 a ch 8AH (TL0:byte thp) v 8CH (TH0:byte cao).Timer 1 ach 8BH (TL1:byte thp) v 8DH (TH1: byte cao). vic vn hnh timer c set bithanh ghi Timer Mode (TMOD) a ch 89H v thanh ghi iu khin timer (TCON) a ch 88H. Ch c TCON c a ch ha tng bit.

g.Cc thanh ghi port ni tip:8051/8031 chc mt port ni tip trn chip dnh cho vic trao i thng tin vi cc

thit b ni tip nh my tnh, modem hoc cho vic giao tip vi cc IC khc c giaotip ni tip (c b chuyn i A/D, cc thanh ghi dch..). Mt thanh ghi gi l b md liu ni tip (SBUF) a ch 99H ss gi c hai gi liu truyn v nhn. Khi truynd liu th ghi ln SBUf, khi nhn d liu th c SBUF. Cc mode vn hnh khc nhau

c lp trnh qua thanh ghi iu khin port ni tip (SCON) (c a ch ha tng bit) a ch 98H.h.Cc thanh ghi ngt:8051/8031 c cu trc 5 ngun ngt, 2 mc u tin. Cc ngt b cm sau khi reset

h thng v s c cho php bng vic ghi thanh ghi cho php ngt (IE) a ch 8AH.C hai thanh ghi c a ch ha tng bit.

i . Cc thanh ghi iu khin cng sut:Thanh ghi iu khin cng sut (PCON) a ch 87H cha nhiu bit iu khin.

Chng c tm tt trong bng sau:Bit K hiu ngha

654321

0

SMOD

GF1GF0PD

IDL

Bit gp i tc baud, nu c set th tc baud s tng gp i trong cc mode 1,2v 3 ca port ni tipKhng nh nghaKhng nh nghaKhng nh nghaBit c a dng 1Bit c a dng 0Gim cng sut, c set kch hot modegim cng sut, ch tho khi resetMode ch, set kch hot mode ch, chthot khi c ngt hoc reset h thng.

Bng :Thanh ghi iu khin cng sut (PCON)

2.3.4. Lnh reset.8051/8031 c reset bng cch gi chn RST mc cao t nht trong 2 chu k

my v tr n v mc thp. RST c th c kch khi cp in dng mt mch R-C.


19/50


Hnh 8.Mch reset h thng.

Trng thi ca tt c cc thanh ghi ca 8051/8031 sau khi reset h thng c tmtt trong bng sau:

Thanh ghi Ni dungm chng trnhTch lyBPSWSPDPTRPort 0-3

IPIECc thanh ghi nh thiSCONSBUFPCON(HMOS)PCON(CMOS)

0000H00H00H00H07H0000HFFH

XXX00000B0XX00000B00H00H00H0XXXXXXB0XXX0000B

BngTrng thi cc thanh ghi sau khi reset

Quan trng nht trong cc thanh ghi trn l thanh ghi m chng trnh, nc

t li 0000H. Khi RST tr li mc thp, vic thi hnh chng trnh lun bt u ach u tin trong b nh trong chng trnh: a ch 0000H. Ni dung ca RAM trnchip khng b thay i bi lnh reset.

2.3.5. Hot ng ca b nh thi (timer)a. Gii thiu.Mt nh ngha n gin ca timer l mt chui cc flip-flop chia i tn s ni

tip vi nhau, chng nhn tn hiu vo lm ngun xung nhp. Ng ra ca tn s cui lmngun xung nhp cho flip-flop bo trn ca timer (flip-flop c). Gi tr nh phn trong ccflip-flop ca timer c th xem nh s m s xung nhp (hoc cc s kin) t khi khi

ng timer. V d timer 16 bit s m ln t 0000H n FFFFH. C bo trn s ln 1 khis m trn t FFFFH n 0000H.8051/8031 c 2 timer 16 bit, mi timer c bn cch lm vic. Ngi ta s dng cc timer : a) nh khong thi gian, b) m s kin hoc c) to tc baud cho port ni tiptrong 8051/8031.

Trong cc ng dng nh khong thi gian, ngi ta lp trnh timer mt khongu n v t c trn timer. C c dng ng b ha chng trnh thc hinmt tc ng nh kim tra trng thi ca cc ca ng vo hoc gi cc s kin ra cc ng

+5V+5V

100

8,2K

10UF


20/50


ra. Cc ng dng khc c th s dng vic to xung nhp u n ca timer o thigian tri qua gia hai s kin (v d : o rng xung).

m s kin dng xc nh s ln xy ra ca mt s kin. Mt s kin l btc tc ng ngoi no c th cung cp mt chuyn trng thi trn mt chn ca8051/8031. Cc timer cng c th cung cp xung nhp tc baud cho port ni tip trong

8051/8031.Truy xut timer ca 8051/8031 dng 6 thanh ghi chc nng c bit cho trongbng sau:

TN MC CH A CH a ch ha tng bitTCONTMODTL0

TL1

TH0

TH1

iu khin timerChn ch timerByte thpca timer0.Byte thp ca timer1Byte cao ca timer

0Byte cao ca timer1

88H89H8AH

8BH

8CH

8DH

CKhngKhng

Khng

Khng

Khng

Bng : Thanh ghi chc nng c bit dng timer.b. Thanh ghi ch timer (TMOD)

Thanh ghi TMOD cha hai nhm 4 bit dng t ch lm vic cho timer 0 v timer1.Bit Tn Timer M t

7 GATE 1 Bit (M) cng, khi ln 1 timer1 ch chy khi INT1 mc cao.Gate = 0 th timer hot ng bnh thng

6 C/T 1 Bit chn ch counter/timer1=b m s kin(m xung ngoi).0=b nh khong thi gian(m xung ni).

5 M1 1 Bit chn mode ca timer1.4 M0 1 Bit chn mode ca timer0.

00: ch 0 : timer 13 bit01: ch 1 : timer 16 bit10: ch 2 : t ng np li 8255A bit11: ch 3 : tch timer

3 GATE 0 Bit (m) cng(nh trn).

2 C/T 0 Bit chn counter/timer(nh trn).1 M1 0 Bit chn mode ca timer0.0 M0 0 Bit chn mode ca timer0.

Bng : Tm tt thanh ghi TMOD

c. Thanh ghi iu khin timer (TCON)


21/50


Thanh ghi TCON cha cc bit trng thi v cc bit iu khin cho timer 0 v timer 1.Bit K hiu a ch M tTCON.7 TF1 8FH C bo trn timer 1. t bi phn cng khi

trn, c xa bi phn mm hoc phn

cng khi b x l ch n chng trnh phcv ngt.

TCON.6 TR1 8EH Bit iu khin timer 1 chy/ngng chy.t/xa bng phn mm cho timerchy/ngng.TR1 = 1 th timer c phpm khi c xung.TR1 = 0 th timer khngc php m.

TCON.5 TF0 8DH C bo trn timer 0.TCON.4 TR0 8CH Bit iu khin timer 0 chy(nh trn).TCON.3 IE1 8BH C cnh ngt 1 bn ngoi(INT1).

TCON.2 IT1 8AH Bit la chn ngt INT1 tc ng bng mchay cnh.IT1 = 0 th ngt INT1 tc ng bng mc.IT1 = 1 th ngt INT1 tc ng bng cnhxung

TCON.1 IE0 89H Ging nh IE1 nhng phc v cho ngtINT0.

TCON.0 IT0 88H Ging IT1 nhng phc v cho ngt INT0.

Bng :Tm tt thanh ghi TCON

d.Cc ch timer.Ch 0, ch timer 13 bit. tng thch vi 8048 (c trc 8051)Ba bit cao ca TLX (TL0 v/hoc TL1) khng dng

Xung nhp C bo trntimer

Ch 1- ch timer 16 bit.Hot ng nh timer 16 bit y .C bo trn l bit TFx trong TCON c th c hoc ghi bng phm mm.MSB ca gi tr trong cc thanh ghi timer l bit 7 ca THx v LBS l bit 0 ca

TLx. Cc thanh ghi timer (Tlx/THx) c th c c hoc ghi bt c lc no bng phmmm.Xung nhpTimer C bo trn

TLx THx(5 bit) (8 bit)

TFx

TLx THx(5 bit) (8 bit)

TFx


22/50


Ch 0- ch t ng np li 8 bit.TLx hot ng nh mt timer 8 bit, trong khi THx vn gi nguyn gi tr c

np. Khi s m trn t FFH n 00H, khng nhng c timer c set m gi tr trongTHx ng thi c np vo TLx. Vic m tip tc t gi tr ny ln n FFH xung

00H v np li... ch ny rt thng dng v s trn timer xy ra trong nhng khongthi gian nht nh v tun hon mt khi khi ng TMOD v THx.

Xung nhptimer

Np liC bo trn

Ch 3- ch tch timer

Timer 0 tch thnh hai timer 8 bit (TL0 v TH0), TL0 c c bo trn l TF0 vTH0 c c bo trn l TF1.Timer 1 ngng ch 3, nhng c th c khi ng bng cch chuyn sang

ch khc. Gii hn duy nht l c bo trn TF1 khng cn b tc ng khitimer 1 btrn v n c ni ti TH0.Khi timer 0 ch 3, c th cho timer 1 chy v ngng bng cch chuyn n ra ngoiv vo ch 3. N vn c th c s dng bi port ni tip nh b to tc baundhoc n c th c s dng bng bt c cch no khng cn ngt (v n khng cn cni vi TF1).Xung nhp

TimerXung nhpTimer

I/12 Fosc

C bo trn

e.Ngun to xung nhp.C hai ngun to xung nhp c th c, chn bng cch ghi vo bit C/T

(counter/timer) trong TMOD khi khi ng timer. Mt ngun to xung nhp dng chonh khong thi gian, ci khc cho m s kin.

TLx(8 bit)

TFx

THx8 bit

TL1 TH1

TL0 TF0

TH0 TF1

On chipOsillator

12


23/50


CrytalTimerClock

T0 or T1pin

0=Up (Internal Timing)1=Down (Event Counting)

Ngun xung to nhp

-

nh khong thi gian (interval timing)Nu C/T =0 ho t ng timer lin tc c chn v timer c dng cho vic nh

khong thi gian. Lc , timer ly xung nhp t b dao ng trn chip. B chia 12 cthm vo gim tn s xung nhp n gi tr thch hp cho phn ln cc ng dng. Nhvy thch anh 12 MHz s cho tc xung nhp timer 1 MHz. Ba trn timer xy ra saumt s (c ng) xung nhp, ph thuc vo gi tr ban u c np vo cc thanh ghi

timer TLx/THx.- m s kin (Event counting)-

Nu C/T=1, timer ly xung nhp t ngun bn ngoi. Trong hu ht cc ng dngngun bn ngoi ny cung cp cho timer mt xung kh xy ra mt s kin , timerdng m s kin c xc nh bng phn mm bng cch c cc thanh ghiTLx/THx v gi tr 16 bit trong cc thanh ghi ny tng thm 1 cho mi s kin.

Ngun xung nhp ngoi c t thay i ch7c nng ca cc chn port 3. Bit 4 caport 3 (P3.4) dng lm ng vo to xung nhp bn trong timer 0 v c gi l T0. Vp3.5 hay T1 l ng vo to xung nhp cho timer 1.

f.Bt u dng v iu khin cc timer.

Phng php mi n gin nht bt u (cho chy) v dng cc timer l dngcc bit iu khin chy :TRx trong TCON, TRx b xa sau khi reset h thng. Nh vy,cc timer theo mc nhin l b cm (b dng). TRx c t ln 1 bng phn mm chocc timer chy.Xung nhp

TimerCc thanh ghi timer

0=ln : timer dng1=xung : timer chy

cho chy v dng timerV TRx trong thanh ghi TCON c a ch bit, nn d dng cho vic iu khin cctimer trong chng trnh. V d : cho timer 0 chy bng lnh : SETB TR0v dng bnglnh SETB TR0Trnh bin dch s thc hin vic chuyn i k hiu cn thit t TR0 sang a ch bitng. SETB TR0 chnh xc ging nh SETB 8CH.

g.Khi ng v truy xut cc thanh ghi timer.

TRx


24/50


25/50


Port ni tip cho hot ng song cng (full duplex : thu v pht ng thi) v mlc thu (receiver buffering) cho php mt k t s c thu v c gi trong khi k tth hai c nhn. Nu CPU c k t th nht trc khi k t th hai c thu y th d liu s khng b mt.

Hai thanh ghi chc nng c bit cho php phn mm truy xut n port ni tip l

: SBUF v SCON. B m port ni tip (SBUF) i ch 99H tht s l hai b m. Vitvo SBUF truy xut d liu thu c. y l hai thanh ghi ring bit thanh ghi ch ghi pht v thanh ghi thu.

TXD (P3.1) RXD (P3.0)

CLK

Q DCLK

Xung nhp tc Xung nhp tc baud (Thu) baud (Thu)

Hnh 9.S port ni tip.Thanh ghi iu khin port ni tip (SCON) a ch 98H l thanh ghi c a ch

bit cha cc bit trng thi v cc bit iu khin. Cc bit iu khin t ch hot ngcho port ni tip, v cc bit trng thi bo co kt thc vic pht hoc thu k t. Cc bittrng thi c th c kim tra bng phn mm hoc c th c lp trnh to ngt.

Tn s lm vic ca port ni tip cn gi l tc baund c th c nh (ly t bgiao ng ca chip). Nu s dng tc baud thay i, timer 1 s cung cp xung nhp tc baud v phi c lp trnh.

b. Thanh ghi iu khin port ni tip.Ch hot ng ca port ni tip c t bng cch ghi vo thanh ghi ch

port ni tip (SCON) a ch 98H. Sau y cc bng tm tt thanh ghi SCON v ccch ca port ni tip :

Bit K hiu a ch M t

SCON.7 SM0 9FH Bit 0 ca ch port ni tipSCON.6 SM1 9EH Bit 1 ca ch port ni tipSCON.5 SM2 9DH Bit 2 ca ch 2 ni tip.

cho php trun thng x l trongcc ch 2 v 3 ;RI s khng b tcng nu bit th 9 thu c l 0

SUBF(Chghi) Thanh ghi dch

SBUF(Chc)

BUS ni 8051/8031

SBUF(Chghi)


26/50


SCON.4 REN 9CH Cho php b thu phi t ln 1 thu (nhn) cc k t

SCON.3 TB8 9BH Bit 8 pht, bit th 9 c pht ccch 2 v 3; c t v xa

bng phn mm

SCON.2 RB8 9AH Bit 8 thu, bit th 9 thu cSCON.1 TI 99H C ngt pht. t ln 1 khi kt thc

pht k t; c xa phn mmSCON.0 RI 98H C ngt thu. t ln 1 khi kt thc

thuk t; c xa bng phn mm

Bng :Tm tt thanh ghi ch port ni tip SCON.Trc khi s dng port ni tip, phi khi ng SCON cho ng ch . V d

,lnh sau:

MOV SCON,#01010010BKhi ng port ni tip cho ch 1 (SM0/SM1=0/1), cho php b thu (REN=1)v t c ngt pht (TP=1) ch b pht sn sng hot ng.

c.Khi ng v truy xut cc thanh ghi cng ni tip.Cho php thu:Bit cho php b thu (REN = Receiver Enable) trong SCON phi c t ln 1

bng phn mm cho php thu cc k t. Thng thng thc hin vic ny uchng trnh khi khi ng cng ni tip, timer...C th thc hin vic ny theo hai cch.Lnh :

SETB RENS t REN ln 1, hoc lnh :MOV SCON,#xxx1xxxxBS t REN 1 v c hoc xa i cc bit khc trn SCON khi cn (cc x phi l 0

hoc 2 c ch lm vic).Bit d liu th 9:

Bit d liu th 9 cn pht trong cc ch 2 v 3, phi c np vo trong TB8bng phn mm. Bit d liu th 9 thu c t RBS. Phn mm c th cn hoc khngcn bit d liu th 9, ph thuc vo cc c tnh k thut ca thit b ni tip s dng (bitd liu th 9 cng ng vai mt tr quan trng trong truyn thng a x l).

Thm 1 bit par i ty:Thng s dng bit d liu th 9 thm parity vo k t. Nh xt ccchng trc, pit P trong t trng thi chng trnh (PSW) c t ln 1 hoc b xa bichu k my thit lp kim tra chn vi 8 bit trong thanh tch ly.

Cc c ngt:Hai c ngt thu v pht (RI v TI) trong SCON ng mt vai tr quan trng truyn

thng ni tip dng 8051/8031. C hai bit c t ln 1 bng phn cng, nhng phic xa bng phn mm.


27/50


d . Tc baud port ni tip.Nh ni, tc baud c nh cc ch 0 v 2. Trong ch 0 n lun lun

l tn s dao ng trn chip c chia cho 12 . Thng thng thch anh n nh tn sdao ng trn chip ca 8051/8031 nhng cng c th s dng ngun xung nhp khc. Gis vi tn s dao ng danh nh l 12 MHz, tm tc baud ch 0 l 1 MHz.

Dao ng Xung nhptrn chip tc baud

a. Ch 0

Dao ng SMOD=0 Xung nhptrn chip tc baud

SMOD=1

b. Ch 2

Dao ng Xung nhptrn chip SMOD=0 tc baud

SMOD=1c. Ch 1 v 3.

Hnh10. Cc ngun to xung nhp cho port ni tip.Mc nhin, sau khi reset h thng, tc baud ch l 2 tn s b dao ng chia

cho 64. Tc baud cng nh hng bi 1 bit trong thanh ghi iu khin ngun cung cp(PCON). Bit 7 ca PCON l bit SMOD. t bit sMOD ln mt lm gp i tc baudtrong ch 1,2 v 3. Trong ch 2, tc baud c th b gp i t gi tr mc nhinca 1/64 tn s dao ng (SMOD=0) n 1/32 tn s dao ng (SMOD=1)

V PCON khng c nh a ch theo bit, nn t bit SMOD ln 1 cn phitheo cc lnh sau:MOV A,PCON ly gi tr hin thi ca PCONSETB ACC.7 t bit 7 (SMOD) ln 1MOV PCON,A ghi gi tr ngc v PCON

Cc tc baud trong cc ch 1 v 3 c xc nh bng tc trn ca timer1. V timer hot ng tn s tng i cao, trn timer c chia thm cho 32 (hay 16nu SMOD=1) trc khi cung cp xung nhp tc baud cho port ni tip.

12

64

32

32

16


28/50


3. Gii thiu cm bin nhit LM35:

Nhit c xc nh bng cch o hiu in th ng ra ca LM35. S chn ca cc

loi LM35 nh sau:

Chn 1: Chn ngunVccChn 2: u raVoutChn 3: GND phn gii ADC c tnh theo cng thc:

SS =

Trong : - SS: step size.


29/50


-n: sbit ca ADC( vi ADC 0809 n = 8).

Theo thng sca cm bin LM35 th hschuyn i nhit sang tn hiu in p tngtk 10mV/1oC, tm nhit o c t-50oC n 150oC.

o v hin thng nhit o th phn gii ca ADC phi trng vi phn giica cm bin LM35.

T ta tnh c: Vref+- Vref-= SSx(2n1) = 10mVx(281) = 2550mV.

Cho Vref-= 0 th Vref+= 2550mV.

4. Gii thiu vLCD.

4.1 Gii thiu chung:

Giao tip led 7 on c hn chrt ln v chhin thc dy shex t0 n F,khng th hin th c cc thng tin k tkhc. Do , LCD l 1 gii php khc

phc nhc im ny v LCD c th hin th c tt c cc thng tin k t ta mongmun.

LCD c rt nhiu dng phn bit theo kch thc tvi k tn hng chc k t, t1 hng n vi chc hng. LCD 16x2 c ngha l c 2 hng, mi hng 16 k t. LCD20x4 c ngha l c 4 hng, mi hng 20 k t.

4.2 S chn ca LCD:

LCD c nhiu loi v schn ca chng cng khc nhau nhng c 2 loi phbin lloi 14 chn v loi 16 chn, skhc nhau l cc chn ngun cung cp, cn cc chn iukhin th khng thay i, khi sdng loi LCD no ta phi tra datasheet ca loi LCD bit chnh xc s chn.

Bng 4.1: Cc chn ca LCD:

Tht Tn tn hiu I/O M t1 Vss Ngun GND

2 VDD Ngun +5V3 Vo in p iu khin nh sangnn

4 RS INPUT Register select5 R/W INPUT Read/Write6 E INPUT Enable7 D0 I/O DATA LSB


30/50


8 D1 I/O DATA9 D2 I/O DATA10 D3 I/O DATA11 D4 I/O DATA12 D5 I/O DATA

13 D6 I/O DATA14 D7 I/O DATA MSB15 A I Ngun dng +5V16 K I GND

Trong cc chn ca LCD c chia lm 3 dng tn hiu nh sau:

- Cc chn cp ngun: Chn s1 ni mass 0V, chn s2 l VDDni ngun +5V, chn s3 dng chnh contrast thng ni vi bin tr. Hai chn A,K cp ngun cho n

nn nhn vo ban m.

- Cc chn iu khin: Chn s 4 l chn RS dng iu khin la chn thanh ghi.Chn R/W dng iu khin qu trnh c/ghi. Chn E l chn cho php dng xungcht.

Cc chn d liu D0 : l chn s7 n chn s14 dng trao i d liu giathit biu khin v LCD.

4.3 Giao tip Vi iu khin vi LCD


31/50


4.4 Cc lnh iu khin LCD:

Lnh RS RW D7 D6 D5 D4 D3 D2 D1 D0 ClockNOP 0 0 0 0 0 0 0 0 0 0 0Clear

display

0 0 0 0 0 0 0 0 0 1 165

Cursorhome

0 0 0 0 0 0 0 0 1 0 3

Entry modeset

0 0 0 0 0 0 1 I/D S 3

Displaycontrol

0 0 0 0 0 0 1 D C B 3

Cursordisplay/shift

0 0 0 0 0 1 S/C R/L 0 0 3

Function set 0 0 0 0 1 DL N F 0 0 3

SetCGRAM

0 0 0 1 Character generator RAM 3

SetDDRAMaddr

0 0 1 Display data RAM address 3

Buzy flag &addr

0 1 BF Address counter 0

Read data 1 1 Read data 3Write data 1 0 Write data 3

M t:

iu khin LCD th c cc IC chuyn dng c tch hp bn di LCD c m s447801 n cc IC 447809. Trong IC ny c bnhRAM dng lu trdliu cnhin thv thc hin vic iu khin LCD hin th.

Lnh xa mn hnh Display control: khi thc hin lnh ny th LCD bxa v bma chc xa v0.

Lnh di chuyn con trvu mn hnh Cursor home: khi thc hin lnh ny th bm a chc xa v0, phn hin thtrvv tr gc bdch trc . Ni dung

bnhRAM hin thDDRAM khng bthay i.

Lnh thit lp li vo Entry mode: lnh ny dng thit lp li vo cho cc k thinth, bit ID = 1 th con trtng tng ln 1 mi khi c 1 byte dliu ghi vo bhin th,khi ID = 0 th con trtng gim i 1 mi khi c byte dliu ghi vo bhin th. Bit S= 1 th cho php dch chuyn dliu mkhi nhn 1 byte hin th.


32/50


Lnh iu khin con trDisplay control: lnh ny dng iu khin con tr(cho hinthth bit D = 1, tt hin thth bit D = 0), tt mcon tr(mcon trth bit C = 1, tt contrth bit C = 0), v nhp nhy con tr(cho nhp nhy th bit B = 1, khng th bit B = 0);

Lnh di chuyn con tr Cursor display shift: lnh ny dng iu khin di chuyn

con trhin thdch chuyn (SC = 1 cho php dch chuyn, SC = 0 khng cho php),hng dch chuyn (RL = 1 th dich phi, RL = 0 th dch tri). Ni dung bnhDDRAM vn khng i).

Lnh thit lp chc nng Function set: lnh ny dng thit lp chc nng giao tip,bit DL (data length) = 1 th cho php giao tip 8 ng data D7D0, nu = 0 th cho phpgiao tip 4 ng D7D4. Bit N (number of line) = 1 th cho php hin th2 hng, bng 0th cho php hin th1 hng. Bit F (font) = 1 th cho php hin thvi ma trn 5x10,

bng 0 th cho php hin thvi ma trn 5x7.

Lnh thit lp a chcho bnhRAM pht k tSet GGRAM addr: lnh ny dng thit lp a chcho bnhRAM pht k t.

Lnh thit lp a chch bnhRAM hin thSet DDRAM addr: lnh ny dng thit lp a chcho bnhRAM lu trcc dliu hin th.

Hai lnh cui trong bng l lnh c v ghi dliu LCD.

Dng sng cc tn hiu khi thc hin ghi dliu vo LCD nh sau:


33/50


Tdng sng ta c trnh tiu khin nh sau:

- iu khin tn hiu RS.

- iu khin tn hiu R/W xung mc thp.

- iu khin tn hiu E ln mc cao cho php.

- Xut dliu D7D0.

- iu khin tn hiu E vmc thp.

- iu khin tn hiu R/W ln mc cao trli.

4.5 a chtng k ttrn LCD

LCD 16x2 c 2 hng, mi hng c 16 k t.

Hng thnht: k t tn cng bn tri c a ch0x80, k l 0x81 v cui cng l0x8F. Hng th2: k ttn cng bn tri l 0xC0, kl 0xC1 v cui cng l 0xCF.

Bng a chca tng k ttrn LCD 16x2:

Hng1

80 81 82 83 84 85 86 87 88 89 8A 8B 8C 8D 8E 8F

Hng2

C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF

5. Cc linh kin c sdng khc:

- Transistor A1015 dng phn cc cho khi bo ng.

- in tr, tkhng cc, IC cng o 74hc14 lm khi to dao ng cho ADC.

- Bin tr(dng chnh in p tham chiu cho ADC v chnh sng nn cho LCD).

- Cc tha lm khi ngun, khi reset cho vi iu khin v lm gim nhy ca

cm bin LM35.

- IC7805 to ngun n nh 5V cho hthng, ngoi ra cn c diode chnh lu.

CHNG II: THIT K

I. S khi:


34/50


Ngun

Ngun

1. Nguyn tc hot ng:

- Khi ngun cung cp in p cho cc khi: cm bin, vi iu khin, hin thvbo ng.

- Khi cm bin nhn nhit mi trng ri chuyn thnh tn hiu in p tngta vo ng vo ca ADC0809 thc hin qu trnh chuyn i.

- Khi vi iu khin nhn dliu chuyn i tADC ca khi cm bin, tinhnh xl v gi dliu ra khi hin thv bo ng.

- Khi hin th: LCD nhn dliu tvi iu khin v hin th.

- Khi bo ng: khi nhit vt qu ngng thit lp (cthy l 50oC) thbuzzer pht cnh bo.

2. Khi cm bin:

Nhit mi

trng

Khi cm

bin

Khi vi iu

khin

Khi hin th

Khi bo

ng

Khi ngun


35/50


- Do yu cu ti thc hin o nhit dng 4 knh ADC nn ta dng 4 cmbin LM35 thc hin vic o nhit 4 im.

- LM35: Chn s1 ni ngun, chn s2 v 3 ni vi nhau thng qua tha gim nhy ca n. Chn s2 ni vo cc ng vo tng t(tin0 n in3) caADC0809.

- Ng ra ca khi to dao ng c ni vo chn s10 ca ADC.

- Ta chn Vref-= 0 nn chn s16 ni mass.

- Chn Vref+ni vi ngun thng qua bin trchnh ng in p 2550mV.

- Cc chn data ni vo Port1 ca vi iu khin.

- Cc chn chn ng vo tng tADDA (25), ADDB (24), ADDC (23) ni lnlt vo chn P3.6, P3.5, P3.4 ca vi iu khin.

- Chn START ni vo P2.5, chn ALE ni vo chn P2.0. Chn OE(9) v chnVcc(11) ni ln ngun.

3. Khi ngun:


36/50


- in p ng vo c chnh lu thng qua diode. in p chnh lu a vo ng vo

ca 7805 to ra mc in p n nh 5V.

4. Khi vi iu khin, hin thv bo ng.

* Khi vi xl v hin th:

- Cc chn dliu (data) ca LCD kt ni vi vi iu khin thng qua P0.

- Chn E ca LCD ni vi P2.6, chn RS ni vi P2.7, c bit chn R/W do trong tiny LCD chthc hin vic ghi dliu nn ta ni R/W vi mass.

- Cc chn cn li ca LCD (VDD, VEE, A, K, GND) kt ni nh phn gii thiu LCDchng I.

- Vi iu khin: chn 18 v 19 kt ni vi tthch anh to dao ng cho vi iu khin.Chn s9 (reset) ni vi mch Reset nh trnh by chng I v hnh minh ha bntrn.

- Vi iu khin sau khi xl xong dliu nhn tADC sa vo cc chn dliuca LCD v tin hnh ghi v hin th.

* Khi bo ng:


37/50


- Khi nhit o c vt qu ngng cho php th chn P2.5 sc cp mc 0 phn cc cho transistor A1015, transistor dn v cp p cho led v buzzer tin hnhbo ng.

- Bnh thng khi nhit di ngng th P2.5 sc cp mc 1, transistor ngng

dn, v khi bo ng ngng lm vic.

5. S nguyn l tng th:


38/50



39/50


CHNG III: THI CNG

1. S mch in:


40/50


2. S btr linh kin:


41/50


3. Code iu khin:

#include

#include

#include

#define RS P2_7

//#define RW P3_6//RW=0 => ghi

#define EN P2_6//RW=1 => doc

//RS=0 => code

//RS=1 => data

#define LCD_PORT P0

#define ADC_PORT P1

#define ALE P2_0

#define START P2_4

#define ADCA P3_6

#define ADCB P3_5

#define ADCC P3_4

#define loa P2_5

//===========================

void delay_ms(int n)

{

int k,j;

for(k=0;k


42/50


{

for(j=0;j


43/50


EN=0;

delay_5ms();

}

//==============================

void LCDWriteData(unsigned char c) //CT con doc du lieu tu LCD

{

RS=1;

//RW=0;

LCD_PORT=c;

EN=1;

EN=0;

delay_5ms();

}

//=============================

void LCDcursorxy(int x, int y)

{

if((x2)&&(y16))

{

x=1;

y=1;

}

if(x == 1)

LCDWriteCmd(0x7F+y);

else


44/50


LCDWriteCmd(0xBF+y);

}

//===============================

void LCD_init() // Khoi tao LCD

{

delay_15ms();

LCDWriteCmd(0x38);

LCDWriteCmd(0x0C);

// LCDWriteCmd(0x06);

LCDWriteCmd(0x01); // Xoa man hinh LCD

}

//================================

void LCD_clear()

{

LCDWriteCmd(0x01);

}

//===============================

void LCD_home()

{

LCDWriteCmd(0x80);

}

//=============================

void LCD_putstr(unsigned char *s)


45/50


{

while (*s)

{

LCDWriteData(*s);

s++;

}

}

//============================

void HienThi_ADC(unsigned char n1,n2,n3,n4)

{

LCDWriteCmd(0x80);

LCD_putstr("T1:"); LCDWriteData(n1/10+48); LCDWriteData(n1%10+48);LCDWriteData(223);

LCD_putstr("C ");


LCD_putstr("C ");

LCDWriteCmd(0xC0);


LCD_putstr("C ");


LCD_putstr("C ");


46/50


}

//==========================================

void main (void)

{

unsigned char t1,t2,t3,t4=0; //gt la bie^n' cho gia tri 8bit ADC

LCD_init();

LCDWriteCmd(0x80);

LCD_putstr("MACH DO NHIET DO");

while(1)

{

//doc kenh 1

ADCA = 0; ADCB = 0; ADCC = 0;

ALE = 1;

START = 1; // Bat dau chuyen doi gia tri tu ADC

delay_ms(1); // Tao tre de cap nhat du lieu tu ADC

START = 0;

ALE = 0;

delay_ms(2); // Nhan du lieu da duoc chuyen doi

t1=ADC_PORT;

//doc kenh 2


47/50



ALE = 1;



START = 0;

ALE = 0;


t2=ADC_PORT;

//doc kenh 3


ALE = 1;



START = 0;

ALE = 0;


t3=ADC_PORT;

//doc kenh 4


ALE = 1;



START = 0;

ALE = 0;


48/50



t4=ADC_PORT;

HienThi_ADC(t1,t2,t3,t4);

if(t1>50||t2>50||t3>50||t4>50) loa = 0; if(t1


49/50


PHN 3: KT LUN V HNG PHT TRIN

1. Nhng iu t c trong n:

- nm c phng php giao tip vi iu khin vi ADC0809 v LCD.

- Hiu c phng phc hot ng ca ADC0809 vi cm bin nhit LM35.

- Rn luyn c knng ttm ti, hc hi.

2. Hn ch:

- Smch cng knh nhng chc 1 mc ch l o nhit mi trng 1 cchn iu.

- Lng ph knh ADC0809 do o nhit dng 4 knh nhng cho ti 1 im.

- Tnh ng dng thc tcha cao.

3. Hng pht trin:

- C thkt hp mch o nhit vi ng hlch vn nin.

- ng dng cao hn l dng bo chy trong cc nh my, hay da vo nhit oc iu khin nhit trong phng, l bnh m, l p trng

TI LIU THAM KHO

- Sch Vi xl- Vi iu khin Nguyn nh Ph.

- Sch Thc tp vi xl AT89S522013 Nguyn nh Ph.

- Sch Hvi iu khin 8051 Tng Vn On & Hong c Hi.

- Ngoi ra cn sdng ngun internet:

+ dientuvietnam.net

+ codientu.com

+ chipkool.blogspot.com


50/50

đồ án mạch đo nhiệt độ dung lm35 và 89s52

Documents