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M.S. THESIS

A Ka-band Voltage Controlled Oscillator with Parasitic Capacitance Canceling

Technique

기생 캐퍼시턴스 상쇄 기법을 적용한 Ka-대역 전압 제어 발진기

BY

WONHO LEE

FEBRUARY 2017

DEPARTMENT OF ELECTRICAL ENGINEERING AND COMPUTER SCIENCE

COLLEGE OF ENGINEERINGSEOUL NATIONAL UNIVERSITY

Abstract

In this thesis, a Ka-band push-push voltage-controlled oscillator (VCO)

using a parasitic capacitance (Cp) canceling technique is presented.

In wireless communication, the demand for a high speed communication

system using millimeter wave bands is growing. A VCO with a high oscillation

frequency (fosc) and a wide tuning range (TR) is an essential component of

a high speed communication system. However, there are major limitations

associated with the fosc and the TR of a VCO from the Cp of the transistors.

Therefore, to enhance fosc and the TR, the Cp of the VCO is canceled with

negative capacitance (NC).

First of all, effects of Cp is and its extraction methods are described. fosc

and TR of VCO are determined by resonance frequency of the LC tank. LC

tank is composd of Cp and variable capacitance. Resonance frequency of LC

tank tuned by tuning total capacitance (Ctot), however, Cp limits TR of Ctot

and also creates lower bound of Ctot. Therefore Cp limits fosc and TR. Cp can

be expressed differently by topology of VCO. In this thesis, Cp is analyzed in

the cross-coupled VCO. Therefore, a conventional 10 GHz cross-coupled VCO

is designed. Cp is mainly composed of intrinsics of transistors and constant ca-

pacitance Cconst of the varactors. The mathematical analysis of Cp is described.

However, the VCO is operated nonlinearly, it is difficult to extract exact in-

trinsic parameter of transistors and Cconst. With harmonic balance simulation,

exact Cp is extracted. Extracted value of Cp is 0.35 pF.

Finally, a VCO with Cp canceling technique is proposed. The Cp is canceled

out with NC circuit. To realize NC, a negative impedance circuit (NIC) is

analyzed and designed. Because of self-resonance frequency, NC is realized

using an open-circuit stable NIC. For further enhancement of the fosc, the

i

VCO is developed in a push-push operation. The proposed VCO is fabricated

in a commercial 0.15 µm GaAs pHEMT process. It shows 12.4% of the TR

at 31.6 GHz with 11 dBm output power. With the NIC, the center frequency

(fc) of the VCO increases from 20.1 GHz to 31.6 GHz and the TR increases

from 5.7% to 12.4% compared with a VCO without the NIC. The measured

phase noise of the VCO is –93 dBc/Hz with the NIC and –101 dBc/Hz without

the NIC at 1 MHz offset frequency. Analyzing phase noise model, Phase noise

degradation is mainly caused by increased fosc, not by NIC. This shows best

improvement ratio of fc and TR compared to other Cp canceling techniques.

keywords: cross-coupled VCO, Ka-band, MMIC, negative capacitance (NC),

negative impedance converter (NIC), non-Foster circuit, parasitics capacitance

canceling, push-push VCO, tuning range, voltage controlled oscillator (VCO)

student number: 2015-20972

ii

Contents

Abstract i

Contents iii

List of Tables v

List of Figures vi

1 Introduction 1

1.1 Motivation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.2 Thesis organization . . . . . . . . . . . . . . . . . . . . . . . . . . 2

2 Parasitic Capacitance in Cross-coupled VCO 4

2.1 Effects of parasitic capacitance in VCO . . . . . . . . . . . . . . 4

2.2 Parasitic capacitance extraction method in Cross-coupled VCO . 6

2.2.1 Cross-coupled VCO design and extracting Cp . . . . . . . 6

3 VCO with Parasitic Capacitance Canceling Technique 10

3.1 Operation principle of the proposed VCO . . . . . . . . . . . . . 10

3.2 Negative impedance converter . . . . . . . . . . . . . . . . . . . . 11

3.2.1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . 11

3.2.2 effects of gate-drain capacitance . . . . . . . . . . . . . . 13

3.2.3 Resistance of OCS NIC . . . . . . . . . . . . . . . . . . . 14

iii

3.3 Push-push operation . . . . . . . . . . . . . . . . . . . . . . . . . 15

3.4 Measurement . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

3.4.1 Oscillation frequency and output power measurement . . 16

3.4.2 Phase noise measurement and analysis . . . . . . . . . . . 19

3.4.3 Comparison . . . . . . . . . . . . . . . . . . . . . . . . . . 20

22

26

4 Conclusion

Abstract (In Korean)

iv

List of Tables

3.1 Performance comparison of Ka-band VCOs . . . . . . . . . . . . 21

3.2 Performance comparison of Cp canceling techniques . . . . . . . . 21

v

List of Figures

1.1 Concept diagram of the proposed VCO. . . . . . . . . . . . . . . 2

2.1 LC tank of the VCO and Cp. . . . . . . . . . . . . . . . . . . . . 4

2.2 TR of Ctot and Cp canceling effect. . . . . . . . . . . . . . . . . . 5

2.3 Diagram of cross-coupled VCO. . . . . . . . . . . . . . . . . . . . 6

2.4 Cp in cross-coupled VCO. . . . . . . . . . . . . . . . . . . . . . . 7

2.5 Schematics of designed VCO. . . . . . . . . . . . . . . . . . . . . 7

2.6 Intrinsic parameter of transistor (gate width = 4× 25 µm). . . . 8

2.7 Cp versus transistor bias and bias point contour. . . . . . . . . . 8

3.1 TR of Ctot and Cp canceling effect. . . . . . . . . . . . . . . . . . 10

3.2 Schematics of SCS NIC. . . . . . . . . . . . . . . . . . . . . . . . 11

3.3 Schematics of OCS NIC. . . . . . . . . . . . . . . . . . . . . . . . 12

3.4 Small signal eq. circuit of SCS NIC with Cgd. . . . . . . . . . . . 13

3.5 Small signal eq. circuit of OCS NIC with Cgd. . . . . . . . . . . . 13

3.6 Frequency characteristics of NICs. . . . . . . . . . . . . . . . . . 14

3.7 Resistance of NIC with or without RL. . . . . . . . . . . . . . . . 15

3.8 Schematics of proposed VCO. (a) Designed VCO core with a

buffer. (b) Designed NIC. . . . . . . . . . . . . . . . . . . . . . . 16

3.9 Output power at second harmonic frequency with or without

filter in NIC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

vi

3.10 Die photograph of proposed VCO (chip size: 1.5 mm × 1 mm). . 17

3.11 Measured fosc with and without NIC. . . . . . . . . . . . . . . . 18

3.12 Measured Pout with and without NIC. . . . . . . . . . . . . . . . 18

3.13 Measured phase noise of fabricated VCO. . . . . . . . . . . . . . 19

3.14 Measured phase noise degradation of the VCO. . . . . . . . . . . 20

vii

Chapter 1

Introduction

1.1 Motivation

In wireless communication, the demand for a high speed communication system

using millimeter wave bands is growing. A voltage-controlled oscillator (VCO)

with a high oscillation frequency (fosc) and a wide tuning range (TR) is an

essential component of a high speed communication system [1]. However, there

are major limitations associated with the fosc and the TR of a VCO from the

parasitic capacitance (Cp) of the transistors.

Therefore, frequency multiplication techniques are widely used to increase

the fosc. Push-push topology provides frequency doubling without an external

multiplier circuit and can be easy to implement in a cross-coupled VCO. How-

ever, as the order of multiplication increases, the performance of the output

power (Pout) and the phase noise is dramatically degraded. A switched-tuning

technique was proposed to increase the TR [2]. However, the switches added

more Cp and degraded the quality factor of the resonance LC tank of the VCO.

In addition, several control voltage of the switches increase the complexity of

the system. These techniques cannot solve the inherent limitations of Cp. To

overcome these limitations, several techniques have been reported [3, 4, 5]. In

1

[3], they designed common-centroid cross-coupled transistors that minimized

the Cp and other parasitics to increase the fosc and the TR. In [4, 5], the Cp

was canceled using a variable negative capacitance (NC) circuit. The NC was

realized by connecting the capacitor to the source of the LC-VCO; however,

the capacitor affected the start-up condition. Therefore, the NC of the [4, 5]

only had a small effect on the fosc and the TR.

In this thesis, a Ka-band VCO with a Cp canceling technique is developed.

Push-push topology is adopted to enhance the fosc. To realize a NC that was

independent of the start-up condition, the NC circuit is separated. Frequency

characteristics of the negative impedance converter (NIC) are analyzed to re-

alize the NC.

1.2 Thesis organization

NC circuit

Separated NC circuit Freq. characteristics analysis Harmonic resistance control

Frequency multiplication

RF out

f0

2f0

Figure 1.1: Concept diagram of the proposed VCO.

Fig. 1.1 shows concept diagram of this thesis. A realization of NC and the

VCO with Cp canceling technique are introduced in each chapter.

In Chapter 2, effects of Cp is and its extraction methods are described. fosc

of VCO is determined by resonance frequency of LC tank. However, LC tank

2

has unwanted Cp which holds fixed capacitance in the LC tank. In section 1,

it is shown that fosc and TR are limited by the unwanted Cp. In section 2,

a conventional 10 GHz cross-coupled VCO is designed and to extract precious

value of the Cp, mathematical analysis and simulation based extraction method

is studied.

In Chapter 3, a VCO with Cp canceling technique is proposed. In section

1, the operation principle is described. Then, in section 2, to cancel out Cp,

negative capacitance (NC) concept is introduced. The NC is realized in NIC.

The type and frequency characteristics are studied respectively. For further

enhancement in fosc, push-push operation is implemented and described in

section 3. in section 4, measured results are described. Noise effect of NIC is

briefly shown in this section.

Finally, the thesis ends with conclusion in chapter 4 which summarized a

Ka-band VCO with Cp canceling technique demonstrated in this thesis.

3

Chapter 2

Parasitic Capacitance in Cross-coupled VCO

2.1 Effects of parasitic capacitance in VCO

L

ΔCv

∙∙∙

Ctr Cbuf Cconst

Cp

Figure 2.1: LC tank of the VCO and Cp.

In general, the oscillation frequency (fosc) is determined by resonance fre-

quency of the LC tank. Fig. 2.1 shows LC tank of the VCO. The LC tank

is composed of parallel inductance and capacitance. Its capacitance can be di-

vided in to parasitic capacitance (Cp) and variable capacitance (∆Cv). Cp is

unwanted fixed capacitance come from intrinsics of transistor, buffer amplifier,

varactors and so on. ∆Cv capacitance make fosc to be variable. Resonance

4

frequency of LC tank is expressed as follows:

fresonance =1

2π√L (Cp +∆Cv)

(2.1)

By the Eq.2.1, the unwanted Cp makes upper bound of fosc.

Hence, Cp limits the tuning range (TR) of VCO. The TR of VCO is deter-

mined by TR of total capacitance (Ctot) of tank. The Fig. 2.2 shows the TR of

Cp ,pF

TR o

f Cto

t,%

canceling Cp

Figure 2.2: TR of Ctot and Cp canceling effect.

Ctot according to Cp. The TR of Ctot is inversely proportional to Cp. It shows

that if the Cp canceled then TR range of VCO can be increased. Following

equation is the TR of the VCO:

TR = 2

√Cp +∆Cv −

√Cp√

Cp +∆Cv −√Cp

(2.2)

5

2.2 Parasitic capacitance extraction method in Cross-

coupled VCO

2.2.1 Cross-coupled VCO design and extracting Cp

Cp is expressed differently by the topology of the VCO. A cross-coupled VCO is

widely used because of its simple structure, therefore, Cp of the cross-coupled

VCO is analyzed. Fig. 2.3 shows diagram of cross-coupled VCO. A pair of

Cp

Figure 2.3: Diagram of cross-coupled VCO.

varactors controls the fosc of VCO. Cp in the cross-coupled VCO is mainly

composed of intrinsic of transistors such as gate-source capacitance (Cgs), gate-

drain capacitance (Cgd) and drain-source capacitance (Cds) and constant capac-

itance (Cconst) of a varactor pair. If we assume cross-coupled VCO is operated

in differential mode and ignore the buffer’s loading capacitance then the Cp can

be expressed as Fig 2.4. Compare the Cp and other parameters, Cp is expressed

as follows:

Cp = Cgd +Cgs + Cds

2+ Cconst (2.3)

To validate the analysis of Cp, a 10 GHz cross-coupled VCO is designed.

6

Virtual GND

Cds

Cgs Cgs

Cds

2Cgd+Cconst

Virtual GND

Cp ↔

Figure 2.4: Cp in cross-coupled VCO.

T1T1

M1 M1

M2M2

Vctrl

Vg,VCO

VG,VCO : -0.2 VVD,VCO : 1.7 VM1 : 2×100 µmM2 : 4×100 µmT1 : 15×550 µm

−+

Figure 2.5: Schematics of designed VCO.

7

The inductance is realized in line inductor T1 which has equivalent 0.34 nH.

Varactors are realized by connecting drain and source of the transistors. The

size of varactor is selected as 4 µm to maximize the TR of the VCO. The size of

VCO core is selected by its noise characteristics. In this thesis, 2 µm transistor

is selected.

-2.5 -2.0 -1.5 -1.0 -0.5 0.00

10

20

30

40

50Cgd

Cap

acita

nce

(fF)

Vg (V)

Vd (V) 2 2.5 3 3.5 4

-2.5 -2.0 -1.5 -1.0 -0.5 0.00

10

20

30

40

50Cds

Cap

acita

nce

(fF)

Vg (V)

Vd (V) 2 2.5 3 3.5 4

-2.5 -2.0 -1.5 -1.0 -0.5 0.00

50

100

150

200Cgs

Cap

acita

nce

(fF)

Vg (V)

Vd (V) 2 2.5 3 3.5 4

Figure 2.6: Intrinsic parameter of transistor (gate width = 4× 25 µm).

-2

-10

1

0

2

4

6

0

83

166

249

332

415

498

V gs (V)

Cap

acita

nce

(fF)

0.00062.50125.0187.5250.0312.5375.0437.5500.0

Vds (V)

Bias contour

Figure 2.7: Cp versus transistor bias and bias point contour.

To calculate Cp in designed VCO, scalable intrinsics of transistor is mea-

sured. Intrinsics are extracted by the method introduced in [7]. Fig 2.6 shows

intrinsic parameters of 4 × 25 µm transistor. Since the intrinsic parameter is

scalable, Cp can be calculated regardless of gate width. However, the VCO is

8

operated nonlinearly, it is hard to extract exact value of Cp. In Fig 2.7 the

blue line shows transistor bias changes according to time varying. As the VCO

is operated nonlinearly, the bias point is changed dramatically. Therefore to

extract exact value of Cp Harmonic balance simulation is executed. If we set

∆Cv = 0, fosc is determined by only L and Cp. From harmonic balance sim-

ulation fosc of LC tank is calculated as 10.3 GHz. By following equation the

exact Cp can be calculated.

Cp =1

L(2πfosc)2 = 0.35 pF (2.4)

9

Chapter 3

VCO with Parasitic Capacitance Canceling Tech-

nique

3.1 Operation principle of the proposed VCO

In Chapter 2, parasitic capacitance (Cp) is studied. Cp limits the oscillation fre-

quency (fosc) and the tuning range (TR). However, canceling Cp with negative

capacitance (NC), aforementioned limitations are overcome. Fig. 3.1 shows

that as the Cp is canceled with NC, the TR of the Ctot increases. With NC,the

Cp ,pF

TR o

f Cto

t,%

canceling Cp

Cp

ΔCv

NC

Ctot

Figure 3.1: TR of Ctot and Cp canceling effect.

10

equation of TR can be rewritten as follows:

TR = 2

√Cp +∆Cv − |NC| −

√Cp − |NC|√

Cp +∆Cv + |NC| −√Cp − |NC|

(3.1)

With the cancellation of the Cp, theoretically, the TR can be 200% with infinite

fosc. However, increasing the magnitude of the NC decreases the operation

frequency range of the NC circuit [4, 5, 6]. Therefore, the magnitude of NC

should be carefully determined considering the Cp and the operation frequency

of the NC. In this thesis, since the Cp is calculated as 0.35 pF, −0.3 pF of NC

realized.

3.2 Negative impedance converter

3.2.1 Introduction

Negative impedance converter (NIC) is widely used to realize negative capac-

itance. NICs are first proposed by Linvill in 1953 [8]. Linvil proposed two

types of NIC, short-circuit-stable (SCS) NIC and open-circuit-stable (OCS)

NIC shown in Fig. 3.2, 3.3.

Zin

CL

Figure 3.2: Schematics of SCS NIC.

11

CL

Zin

Figure 3.3: Schematics of OCS NIC.

If the transistors are same and modeled with only Cgs and gm then input

impedance of each NIC is expressed as follows:

Zin,SCS = − 1

ωT2 + ω2

[s ·

(2

Cgs+

1

CL

)+

2 · ωT

Cgs+

2 · ωT

CL+

ωT2

s · CL

](3.2)

Zin,OCS =1

ωT2 − ω2 + 2 · s · ωT

[s ·

(2

Cgs+

1

CL

)+

2 · ωT

Cgs− ωT

2

s · CL

](3.3)

where, s = jω and ωT = gm/Cgs. Two types shows same value of NC with

CL. The frequency characteristics of NIC can be extracted with self-resonance

frequency (SRF). SRF is the point that imaginary part of input impedance

becomes zero. From equation 3.2, 3.3 SRF of each NICs are calculated same

and followed:

fSRF,SCS = fSRF,OCS =gm

2πCgs

√1 +

2CL

Cgs

−1

(3.4)

The difference between SCS NIC and OCS NIC is that, input impedance of

SCS NIC shows negative resistance, while input impedance of OCS NIC shows

positive resistance. In this case, SCS NIC is looked like more attractive topology

to adopt in to the VCO, because resistance of OCS may degrade quality factor

of the LC tank.

12

3.2.2 effects of gate-drain capacitance

Zin

CL

2Cgd

Figure 3.4: Small signal eq. circuit of SCS NIC with Cgd.

CL + 2Cgd

Zin

Figure 3.5: Small signal eq. circuit of OCS NIC with Cgd.

However, gate-drain capacitance (Cgd) degrades the frequency characteris-

tics of the SCS NIC. With considering the Cgd, small signal equivalent circuits

of each NIC are followed in Fig. 3.4, 3.5. Considering the Cgd is connected

in parallel to the input impedance of the SCS NIC, the Cgd degenerates the

SRF of the NIC and the magnitude of NC by 2Cgd. On the other hand, for an

13

OCS NIC, the Cgd is absorbed into the CL. Therefore, the effects of Cgd vanish

in an OCS NIC by reducing the CL. The following equations can be used to

determine the SRF of the NIC considering the Cgd:

fSRF,OCS =gm

2πCgs

√1 +

2CL,eq

Cgs

−1

(3.5)

fSRF,SCS =gm

2πCgs

√1 +

2CL

Cgs

−1√CL − 2Cgd

CL + 2Cgd + 4CLCgd/Cgs(3.6)

where CL,eq is the CL + 2Cgd. For SCS NIC, CL + 2Cgd must be positive to

operate as the NC. For same NC, CL of SCS NIC should be large than that of

OCS NIC. Then, by (3.5) and (3.6) OCS NIC has higher SRF than SCS NIC.

Fig.3.6 shows simulated frequency characteristics of the NICs.

1E8 1E9 1E10 1E11-1.0

-0.8

-0.6

-0.4

-0.2

0.0

Cap

acita

nce

(pF)

Frequency (Hz)

-0.3 pF SCS NIC OCS NIC

Figure 3.6: Frequency characteristics of NICs.

3.2.3 Resistance of OCS NIC

To mitigate the loss of the NIC, a resistor (RL) is added in series to the load

of the NIC like Fig. 3.7. The loaded RL operates as negative resistance and

cancels the series resistance of the OCS NIC. Following equation is resistance

of OCS NIC (Cgd effect is ignored to simplify the equation):

14

Rin =Cgs

(CLCgsRLω

2 + gm)

CL

[(Cgsω)

2 + gm2] +

gm (2CLω + Cgsω − CLRLgmω)

CLω[(Cgsω)

2 + gm2] (3.7)

In the equation 3.7, second term is superior to first term if the low frequency re-

gion. Looking into the second term, RL can reduce the resistance of NIC.Therefore,

with the loaded RL, the series resistance of the NIC is decreased to 25 Ω up to

17 GHz, which is the highest fosc of the fundamental signal of the VCO with

the NIC. However, since the current flows into the Cgd of the transistors rather

than into the loaded resistor at the high frequency, the loss is increased at the

second harmonic frequency.

CL RL

Zin001011

0

10

20

30

40

50

Res

ista

nce

(Ω)

Frequency (GHz)

w/o RL

w/ RL

Figure 3.7: Resistance of NIC with or without RL.

3.3 Push-push operation

Fig. 3.8 shows the schematics of the proposed VCO. The push-push topology is

adopted to increase the fosc over the operation frequency of the NIC. The VCO

core achieves the differential operation and provides the out-of-phase voltages at

odd harmonics. However, at even harmonic frequencies, they are in-phase and

15

M1

M3

M2 M2+

Vctrl

CL RL

out

0.3 pF 35 Ω

200 ΩM1 : 2×100 µmM2 : 4×100 µmM3 : 4×75 µm

0.7 pF

1 pF

2 V-0.6 V2 V2.5 V1.7 V

-0.1 V

-0.2 V

0.7 pFband-pass filter @

+NIC

NC @open @ 2

−−

P

)b()a(

Figure 3.8: Schematics of proposed VCO. (a) Designed VCO core with a buffer.

(b) Designed NIC.

can be combined constructively at node P. Therefore, cross-coupled topology

can inherently provide the push-push operation. As the VCO generate 2fosc,

NIC loss characteristics at second harmonic frequency is important. However,

at second harmonic frequency the NIC is quite lossy as shown previous section.

Thereforem to reduce the loss at the second harmonic frequency, we make input

impedance of NIC open using filter, so that oscillation signal is not wasted in

to the NIC. The filter is implemented in conventional series LC circuit. The

simulated output power at second harmonic frequency is shown in Fig. 3.9.

3.4 Measurement

3.4.1 Oscillation frequency and output power measurement

A proposed VCO is fabricated in a commercial 0.15 µ m GaAs pHEMT process

using a transistor with a 90 GHz cut-off frequency and a 185 GHz maximum

oscillation frequency. Fig. 3.10 shows the die photograph of the proposed VCO.

The power consumption is 590 mW with the NIC and 410 mW without the NIC.

16

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0-10

-5

0

5

10

15

Out

put p

ower

(dBm

)

Vctrl (V)

w/o Filter w/ Filter

Figure 3.9: Output power at second harmonic frequency with or without filter

in NIC.

RFout

Vdrain,VCOVgate,VCO

Vctrl

buffer

VCO

NIC

Vgate,NIC

Vdrain1,NIC

Vdrain2,NIC

Vdrain,bufferVgate,buffer

Figure 3.10: Die photograph of proposed VCO (chip size: 1.5 mm × 1 mm).

17

Fig. 3.11, 3.12 shows the measured fosc and output power of the fabricated

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.0

20

25

30

35

fc increased

TR : 5.7 %

Freq

uenc

y (G

Hz)

Vctrl (V)

w/ NIC w/o NIC

TR : 12.4 %

Figure 3.11: Measured fosc with and without NIC.

-2.0 -1.5 -1.0 -0.5 0.0 0.5 1.0 1.5 2.00

5

10

15

20

Pou

t (dBm

)

Vctrl (V)

w/ NIC w/o NIC

Figure 3.12: Measured Pout with and without NIC.

VCO. With the NIC, the center frequency (fc) of the VCO increases from 20.1

GHz to 31.6 GHz and the TR increases from 5.7% to 12.4%. The Pout of the

VCO is about 11 dBm with or without the NIC since the NIC does not affect

the Pout.

18

3.4.2 Phase noise measurement and analysis

In Fig. 3.13, the measured phase noise of the VCO is –93 dBc/Hz with the NIC

and –101 dBc/Hz without the NIC at 1 MHz offset frequency. Although phase

noise is degraded because of the increased fosc and the additional noise current

of the NIC, the inherent limitations of the Cp are overcome in the proposed

VCO.

100k 1M 10M 100M-160

-140

-120

-100

-80

-60

-40

w/ NIC: fosc= 30.5 GHz

Phas

e no

ise

(dBc

/Hz)

Frequency (Hz)

w/o NIC: fosc= 19.3 GHz

Figure 3.13: Measured phase noise of fabricated VCO.

There is phase noise degradation effects. The degradation could be occurred

by additional noise of NIC or degradation of quality factor of the LC tank. With

simple phase noise model, the degradation of phase noise is analyzed. Followed

equation are phase noise model in the 1/f2 region.

L(∆ω) = 10 log[2kT

Psig

(ω0

2Q∆ω

)2]

(3.8)

Assume that there is no effect of NIC in phase noise. However, in that case,

according to equation 3.8, there is also phase noise degradation cause by qual-

ity factor of the tank and increased fosc. As the quality factor of tank is also

dependent to increased ratio of fosc. Therefore calculated phase noise degra-

19

dation without NIC noise is 40 log(

ωw/ NIC

ωw/o NIC

). To extract noise effect of NIC,

subtract these value to measured value. Fig. 3.14 shows measured ∆L at −2 V

control voltage. The calculated ∆L without NIC noise is 40 log(33.920.6

)= 8.6 dB.

Therefore, noise effects of NIC is about 3 dB.

100k 1M 10M 100M-160

-140

-120

-100

-80

-60

fosc= 20.6 GHz

Phas

e no

ise

(dBc

/Hz)

Frequency (Hz)

fosc= 33.9 GHz

11.1 dB

Figure 3.14: Measured phase noise degradation of the VCO.

3.4.3 Comparison

Table 3.1 compares the improvement ratio of the fc and the TR of this study

with that of other references. In [4, 5], the switched-tuning techniques were

adopted and, therefore, the TR is wider than the proposed VCO. The proposed

VCO with the NIC in this study shows the highest improvement ratio of fc and

TR compared with other techniques. The proposed VCO represents the best

improvements in fc and TR.

Table 3.2 compares the performance of Ka-band VCO. Switched-capacitor

VCOs are not included for the fair competition. Although performance is not

the best, proposed VCO has moderate performance.

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Table 3.1: Performance comparison of Ka-band VCOs

Ref. Process Technique Improvement ratio Ratio of fc Ratio of TR

[3] 0.18 μm CMOS

C-C CCa transistor

1.09 (26.2/24)b

1.18 (15.2/12.9)b

[4] 0.13 μm CMOS

Variable NC

1.05 (40/38)b

1.35 (27/20)b

[5] 0.13 μm CMOS

Variable NC

1.02 (35/34.2)b

1.3 (26/20)b

This work

0.15 μm GaAs

pHEMT

Constant NC

1.57 (31.6/20.1)b

2.18 (12.4/5.7)b

a Common-centroid cross-coupled b The units for fc and TR are GHz and %, respectively.

Table 3.2: Performance comparison of Cp canceling techniques

Ref. Process Center freq. (GHz)

TR (%)

Pout (dBm)

PN (dBc/Hz)

[9] 0.18 μm CMOS 30.5 1.7 -15 -109 @ 1MHz

[10] 65 nm CMOS 40 18 2–6 -96 @ 1MHz

[11] 0.15 μm GaAs pHEMT 28.3 13.4 11.8 -102 @ 1MHz

[12] 0.15 μm GaAs pHEMT 37.8 1 10.5 -112 @ 1MHz

This work 0.15 μm GaAs pHEMT 31.6 12.4 11.9 -93

@ 1MHz

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Chapter 4

Conclusion

In this thesis, a Ka-band push-push voltage-controlled oscillator (VCO) using

a parasitic capacitance (Cp) canceling technique is presented.

First of all, effects of Cp is and its extraction methods are described. fosc

and TR of VCO are determined by resonance frequency of the LC tank. LC

tank is composd of Cp and variable capacitance. Resonance frequency of LC

tank tuned by tuning total capacitance (Ctot), however, Cp limits TR of Ctot

and also creates lower bound of Ctot. Therefore Cp limits fosc and TR. Cp can

be expressed differently by topology of VCO. In this thesis, Cp is analyzed in

the cross-coupled VCO. Therefore, a conventional 10 GHz cross-coupled VCO

is designed. Cp is mainly composed of intrinsics of transistors and constant ca-

pacitance Cconst of the varactors. The mathematical analysis of Cp is described.

However, the VCO is operated nonlinearly, it is difficult to extract exact in-

trinsic parameter of transistors and Cconst. With harmonic balance simulation,

exact Cp is extracted. Extracted value of Cp is 0.35 pF.

Finally, a VCO with Cp canceling technique is proposed. The Cp is canceled

out with NC circuit. To realize NC, a negative impedance circuit (NIC) is

analyzed and designed. Because of self-resonance frequency, NC is realized

using an open-circuit stable NIC. For further enhancement of the fosc, the

22

VCO is developed in a push-push operation. The proposed VCO is fabricated

in a commercial 0.15 µm GaAs pHEMT process. It shows 12.4% of the TR

at 31.6 GHz with 11 dBm output power. With the NIC, the center frequency

(fc) of the VCO increases from 20.1 GHz to 31.6 GHz and the TR increases

from 5.7% to 12.4% compared with a VCO without the NIC. The measured

phase noise of the VCO is –93 dBc/Hz with the NIC and –101 dBc/Hz without

the NIC at 1 MHz offset frequency. Analyzing phase noise model, Phase noise

degradation is mainly caused by increased fosc, not by NIC. This shows best

improvement ratio of fc and TR compared to other Cp canceling techniques.

23

Bibliography

[1] E. Socher and S. Jameson, “Wide tuning range W-band Colpitts VCO in

90 nm CMOS,” Electronics Letter, vol. 47, no. 22, pp. 1227-1229, October

2011.

[2] A. Kral, F. Behbahani and A. A. Abidi, “RF-CMOS oscillators with

switched tuning,” Custom Integrated Circuits Conference, Santa Clara,

CA, May 1998, pp. 555-558.

[3] I. Y. Lee, S. J. Yun, S. M. Oh and S. G. Lee, “A Low-Parasitic

and Common-centroid cross-coupled CMOS transistor structure for high-

frequency VCO design,” Electron Device Letters, vol. 30, no. 5, pp. 532-534,

May 2009.

[4] Q. Wu, T.K. Quach, A. Mattamana et al., “Frequency tuning range ex-

tension in LC-VCOs using negative-capacitance circuits,” Transactions on

Circuits and Systems II: Express Briefs, vol. 60, no. 4, pp. 182-186, April

2013.

[5] Q. Wu, S. Elabd, T.K. Quach et al., “A −189 dBc/Hz FOMT wide tuning

range Ka-band VCO using tunable negative capacitance and inductance

redistribution,” Radio Frequency Integrated Circuits Symposium (RFIC),

Seattle, WA, May 2013, pp. 199-202.

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[6] S. Lee, H. Park, K. Choi and Y. Kwon, “A Broadband GaN pHEMT power

amplifier using non-Foster matching,” Transactions on Microwave Theory

and Techniques, vol. 63, no. 12, pp. 4406-4414, Dec. 2015.

[7] D. Lee, “Analytical extraction method for small-signal parameters of

HEMT and its application to noise modeling,” Master thesis, Department

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[8] J. G. Linvill, “Transistor negative impedance converters,” Proceedings of

the IRE, vol. 41, no. 6, pp. 725-729, June 1953.

[9] T. P. Wang, “A CMOS Colpitts VCO using negative-conductance boosted

technology,” Transactions on Circuits and Systems I: Regular Papers, vol.

58, no. 11, pp. 2623-2635, Dec. 2011.

[10] V. P. Trivedi and K. H. To, “A novel mmWave CMOS VCO with an

AC-coupled LC tank,” Radio Frequency Integrated Circuits Symposium

(RFIC), Montreal, QC, July 2012, pp. 515-518.

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25

초 록

본 논문에서는 기생 캐퍼시턴스 상쇄 기법을 적용한 Ka-대역 푸쉬-푸쉬 방식을

이용한 전압 제어 발진기를 제안한다.

무선 통신 환경이 점점 발전해가면서, 밀리미터파 대역을 이용한 초고속 통신

시스템에 대한 수요는 꾸준히 증가하고 있다. 그 중 높은 발진 주파수를 가지고,

넓은 튜닝 범위를 가지는 전압 제어 발진기는 초고속 통신 시스템의 핵심적인 부품

요소이다. 하지만, 전압 제어 발진기 내부의 기생 캐퍼시턴스에 의해서, 최대 발진

주파수와 튜닝 범위가 제한된다. 그러므로 이러한 한계를 극복하고 위해 전압 제어

발진기의 기생 캐퍼시턴스는 부성 캐퍼시턴스로 상쇄 되었다.

우선 기생 캐퍼시턴스가 전압 제어 발진기에 미치는 영향과 추출 방법에 대해서

서술한다. 전압 제어 발진기의 발진 주파수와 튜닝 범위는 LC 공진기의 공진

주파수에 의해 결정된다. 공진 주파수는 공진기의 토탈 케퍼시턴스를 조절하여

제어하게 되는데, 기생 캐퍼시턴스는 토탈 캐퍼시턴스의 제어 범위를 제한한다.

그리고 또한 고정된 값을 가지는 기생 캐퍼시턴스에 의해 발진 주파수의 상한도

생기게 된다. 따라서 기생 캐퍼시턴스는 튜닝 범위와 발진주파수에 제한을 준다고

할 수 있다. 기생 캐퍼시턴스는 전압 제어 발진기의 구조에 따라 다르게 표현된

다. 본 논문에서는 교차 결합 전압 제어 발진기에서의 기생 캐퍼시턴스에 대하여

분석하였다. 그러기 위해서 10 GHz 전압 제어 발진기를 설계하였다. 기생 캐퍼

시턴스는 주로 트랜지스터의 기생 성분과 버랙터의 고정 성분에 의하여 결정된다.

기생 캐퍼시턴스의 수학적 분석을 시행하였다. 하지만 전압 제어 발진기는 비선형

영역에서 동작하기 때문에, 정확한 기생 캐퍼시턴스는 하모닉 밸런스 시뮬레이션을

통해 구할 수 있었다. 구해진 기생 캐퍼시턴스의 값은 0.35 pF 이다.

결론적으로, 기생 캐퍼시턴스 상쇄 기법을 적용한 전압 제어 발진기를 제안 하

였다. 기생 캐퍼시턴스는 부성 캐퍼시턴스를 통해 상쇄되었다. 부성 캐퍼시턴스를

구현하기 위해 부성 임피던스 변환기를 분석하고 설계하였다. 자기 공진 주파수

특성 때문에, 부성 캐퍼시턴스는 개회로 안정 부성 임피던스 변환기로 구현되었다.

26

발진주파수를좀더올리기위해푸쉬-푸쉬방식의전압제어발진기를설계하였다.

제안된 전압 제어 발진기는 상용 0.15 µm GaAs pHEMT 공정에서 만들어 졌다.

제안된전압제어발진기는 12.4 %의튜닝범위를보였고, 중심주파수는 31.6 GHz

였고, 이 때 11 dBm의 출력 전력을 발생시켰다. 부성 임피던스 변환기를 통해,

부성 임피던스 변환기를 껐을 때에 비해 전압 제어 발진기의 중심 주파수는 20.1

GHz 에서 31.6 GHz로 증가하였고 튜닝 범위는 5.7% 에서 12.4%로 증가하였다.

측정된 위상 잡음은 부성 임피던스 변환기가 켰을 때는 1 MHz 오프셋에서 −93

dBc/Hz를 가졌고, 부성 임피던스 변환기를 껐을 때는 1 MHz 오프셋에서 −101

dBc/Hz을가졌다. 그리고위상잡음의수학적모델분석을통해, 위상잡음악화의

원인은 부성 임피던스 변환기의 영향은 크지 않고 주로 발진 주파수 증가에 의한

것으로 밝혀졌다. 다른 기생 캐퍼시턴스 상쇄 기법들과 비교하여 본 논문의 발진

주파수와 튜닝 범위의 증가 비율이 제일 우수한 결과를 나타냈다.

주요어: Ka-대역, 교차 결합 전압 제어 발진기, 기생 캐퍼시턴스 상쇄, 부성

임피던스 변환기, 부성 캐퍼시턴스, 전압 제어 발진기, 집적 시스템, 튜닝 범위,

푸쉬-푸쉬 방식을 이용한 전압 제어 발진기

학번: 2015-20972

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