digital predistortion linearization and crest factor...

DIGITAL PREDISTORTION LINEARIZATION AND

CREST FACTOR REDUCTION FOR WIDEBAND

APPLICATIONS

Wan- Jong Kiln

h1 .S~ . Kwarlgwoon University 2001

B .Sc. K~~angurooii Uiiivcrsit,y, 1999

.I THESIS SIIHhlITTEI> I N PAlU'IA12 FI~1,Fll~l~hlEN'I'

OF THE REQUlItEhIENTS FOR THE DEGREE OF

in the School

of

Eiigiileeriilg Scieiice

@ Wan-Jong Kim 2006

SIhION FRASER UNIVERSITY

Fa11 2006

APPROVAL

Name:

Degree:

Title of thesis:

Doctor of Philosophy

Digital Preclistortioil Lil~earization and Crest Factor Reduc-

ti011 for Wideband Applications

Examining Committee: Dr. Paul I<. h1. Ho

Chair

Date Approved:

Dr. Shawn P. Staplctoii. Senior Slip~rvisor

Dr. J a i ~ ~ e s K . Cavers. Supervisoi

Dr. hIarek Syrzycki. Slip~rvisor

Dr. Dong-In Kim. Internal Exainiiier

Dl. hlicliael Fadkncr, Exteriial Exaininer

Profwsor. Electrical m t l C'oinp~itri Eiigii~ceriilg

Victoria Uliivtmity of Technology. Australia

SIMON FRASER ' u~im~sml l bra ry

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Simon Fraser University Library Burnaby, BC, Canada

Revised: Fall 2006

Abstract

Power amplifiers are essential coinponents in wireless cominuiiicatioii systems and are inher-

cntly noidinear. This iioiilinearity generates spectral regrowth 1)eyoiitl the signal banclwidtjl~.

which in turn interferes wit11 adjacent channels. Witlelx~rid code (livisioii inliltiple access

(WCDh,fA) and orthogona,l frequency division multiplexing (OFDhI) s!.stems are particli-

1 x 1 ~ . vulnerable to nonliiiear distortions: this is d11~ to t,lieir high peak-to-average. power

ratios (PAPRs). which rcqllirc. a stringent lii~earity. Oil(' waj- to nchicvc the ix'(lllirtd liiit'ar-

itv is to Ijack-off the input sigiial. Howwer, in tllt case of high PAPR signals. tlic efficiency

o f the powcr ainplificr will hc wry low.

111 this disscrt,ation. we are concerned with acliieviiig high linearity and high efficir1ic.j..

\.I> first propose a predistortcr based on piecewise pre-equalizers, for w e in inulti-cliaiiiiel

wideband applications. This predistortioii linearizer coiisists of piecewisc pre-equalizers.

aloiig wit11 R lookup table (LUT) ba.sed digital predistorter: together t l i q con~pensate for

nonlinearitics. as well as illenlory effects of power ainplifiors. Taking aclvaiitage of the in111-

tiple finite irnpulse response (FIR) filters, the complexity is significantl;\.. reduced when corn-

pared to irieniory polyiiomial methods. Furthermore. cx1)criinental resdts ohtairied wlien

two WCDhlIA carriers wen. applied verified that our. proposed ~rietliod provides iniprove-

inent,s comparable to tliose seen using the memory polyiioiiiial a.pproacl1.

Seconcl1~-. a ~li~iqllc baschand derived radio f req~lc~~cj . (RF) pretlistortion sj-strm is pre-

scmtctl. wliicli llses LUT coefficient,^ rxtra,ctetl at l)asclmitl to directly R F ciivclope 1iiotl11-

late a q~latlrat~lre> ~'cct~or iriotlulator. The primnr!. atlvantagc of this arcliitect~lrc is that i t

ro~id)ines the iiai~rowhaiitl bt~iefit of eiivelope pre(1istoi~tioii wit11 tlir accllrwc!. of I,asc~l)aiitl

1)i'tdistor.t ion.

Finally. a novel eficieiit (,rest factor reduction tt~~liiiicll~e fix nit1eh;~ntl applicatioiis is

described. Tlie tetliiiiqnc ltsrs peak caiicellation to ietlltce the PAPR of tlic inpitt 5ig-

iial. C'onveiitioiial itcrativc peak cancellation requircs scvci.al iterations to conveige t o tlir

targeted PAPR. si1ic.c~ filtering causes peak re-growth. The proposed algorithin eliiniiiates

several iterations a i d subscquently saves hardware resources. A direct perfoririaiice coin-

parison between il digitally predistorted and a feed-forward linearized Doherty amplifier is

provided. under various crest factor reduction levels.

Keywords: wireless cominuilication systems. digital predistortioii, memory effects. crest

factor reduction.

-1 keep the subject of nq- inq~liry constantly before me. and wait till the first d a w ~ ~ i n g

opens gradually. hv little and little. illto a full slid clear light."

1sa;tc. Newtoll (1 642-1 727)

Acknowledgments

First, I would like to thank n1.v advisor. Prof. Shawn P. Stapleton, for providing constant

encouragement. valuable advice. and an enjoyable working environment tlliriiig my Ph.D.

studies.

I wollld also like t,o t,hank i.ri!, exaininiiig conunittee fbr providing coiistructive advice.

which improved the quality of this innnuscript.

hlariy t,linnks go tc~) s t~~ t l cn t s aiitl facult,!. ill tliv RF/hIicrowavc 1lol)ilt. Coiriiiil~nicatimis

La11or;rtory.

I wolild like to thank iriy farnily fbr their ~inconditiond support. La.st 1,11t not least.

I would like to oxpress particular gratitude to So Young. my lovely wife. fbr lu:r love.

enconragement, a ~ i d unencli~lg support.

Contents

. . Approval 11

Abstract iii

Dedication v

Quotation vi

Acknowledgments vii

Contents viii

List of Tables xi

List of Figures xii

List of Abbreviations xvi

1 Introduction 1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.1 AIotiva,tioll 1

. . . . . . . . . . . . . . . . . . . . . . . . . . 1.2 History of digital 1)redistortioii 3

. . . . . . . . . . . . . . . . . . . . . . . . . . 1 .:3 Hist,ory of crest factor rrthtction 4

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1.4 C'ontril~ution 5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 List of publications 6

1.5 Outline . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2 Background 9

. . . . . . . . . . . . . . . . . . . . . . '2.1 Behavioral models of povwv ainplifims 9

viii

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.1 I\Ienioryless iriotlel !!

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.2 hlc~riory effects 10

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.3 Volterra series 19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.4 Wiener model 21

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.1.5 Hairiinersteiii model 22

. . . . . . . . . . . . . . . . . . . . . . . . 2.1.6 Parallel Hammerst ein model 23

. . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2 Power amplifier linearization 24

. . . . . . . . . . . . . . . . . . . . . . . . . 2.2.1 Feed-forward lineaxization 24

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.2.2 Digital predistortion 25

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2.3 Crest factor reduction 30

. . . . . . . . . . . . . . . . . . 2.3.1 Crest factor effect on power amplifiers 30

. . . . . . . . . . . . 2.3.2 Crrst factor efl'ect on digital-to-andog con\-t.rters 31

3 Piecewise Pre-equalized Linearization 34

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.1 Int.rodi~c.tion :34

. . . . . . . . . . . . . . 2 The proposed piecewise pre-equalized based LUT PD 36

. . . . . . . . . . . . . . . . . . . . . . . 3 . 3 The proposed prcdistorter algorithm 41

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 . 3 PA beliavioral niotleliiig 43

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.5 Sinlulation results 35

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.6 Experiinental resillts 51

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Co~nplexity evaluation 53

. . . . . . . . . . . . . . . 3.7.1 Tlw piecewise pre-equalized based LUT PD 53

. . . . . . . . . . . . . . . . . . . . . . . 3.7.2 The irlelilorv polynolnial PD 54

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3.8 C~o~iclusions 53

4 Digital Baseband Derived RF Predistortion 5 6

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.1 Introduction 56

. . . . . . . . . . . . . . 4 2 Digital hasd)and clt.rived RF predistortioii arc11itcc.t llrc 5!)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . 4.3 Delay cffccts and calibration 5!)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 . 4 Experinient;~l res~llts 64

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 . 5 C!onclusiolis 73

5 Crest Factor Reduction and Linearization 7 5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5.1 Introduction 75

5.2 Crcst factor reductioli fbr widelxmd applications . . . . . . . . . . . . . . . . 76

5.2.1 A scaled peak callcellation iilethotl . . . . . . . . . . . . . . . . . . . . 76

5.2.2 Peak wiiltlowiiig technique . . . . . . . . . . . . . . . . . . . . . . . . . 78 -

5 . 3 Silnulatioll results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 9

5.4 Experimental results . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 86

5.4.1 A class AB power amplifier . . . . . . . . . . . . . . . . . . . . . . . . 86

5.4.2 A Doherty aniplifer with digital predistortion and feed-forward h i -

eariza.tion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 89

5.5 Conclusions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . '31

6 An FPGA Testbed for Digital Predistortion 9 3

6.1 Introductioii . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 93

6.2 Design flow . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94

6.3 Digital predistortion test bed. using a11 Altera DSP devcloprncnt FPGA l,oard 95

6.4 Expcriirieiitwl iwults . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 97

6.5 Conclusioiis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 99

7 Summary and Future Research 100

Appendices 102

A Predistortability Analysis of the Proposed Predistortion 102

Bibliography 103

List of Tables

2.1 The number of parameters in the complex-valued Volterra model of' (2.16).

as a fiinction of order and memory length . . . . . . . . . . . . . . . . . . . . . 21

3.1 Suirmlarly of the ACLR simulatioi~s fi)r the different PDs . . . . . . . . . . . . 50

3.2 Suinm;~ry of the ACLR . meas~~rci r~cnts for the different PDs . . . . . . . . . . . 52

3.3 Coinplexity estimation of tho proposed piecewise pre-~qualiz~cl PD . . . . . . . 53

4 Coinplexity estiination of thc nleino1.y polynoinial P D . . . . . . . . . . . . . . 54

.4.1 Siunmary of the ACLR performance of the proposed systeiii . . . . . . . . . . 73

. . . . . . . . . . . . . . . . . 4.2 Comparison of the three digital P D arcl~itectures 74

5.1 Tlle setup for a four-carrier ThI l signal . . . . . . . . . . . . . . . . . . . . . . 79

5.2 Performance for different carrirr iiiiiribcrs . . . . . . . . . . . . . . . . . . . . . 84

5.3 h. Ieasurement. results for a fixed 20-11- out. put power . . . . . . . . . . . . . . . 86

. . . . . . . . . . . . . . . . . . . 5.4 h1eaurement results with a first fixetl ACLR 88

. . . . . . . . . . . . . . . . . 5.5 hleasureinent results with a secni~tl fixttl ACLR 88

6.1 Stratix device features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

List of Figures

2.1 Time doinain plots of a PA with memory. for a single WCDhlA carrier for:

(a) AM/AhI . and (b) AM/PA>I . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.2 Asyiriinetry of the PA with ineinory for three WCDhlA carriers in the fre-

quency domain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.3 Typical locatioii of irieiriory effects in the FET power airiplifiers [2] . . . . . . . 13

4 hleasnretl impedance of a AIESFET amplifit~ at the: ( a ) fimtlmieiital frc.-

quency . (13) second haririonic frequencv . a i d (c) envelope frequency (1)ase-

bancl) 1781 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.5 Typical locations of the ineinory effects i11 the hias network of bipolar ant1

FET amplifiers [10] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.6 Memory effects due t. o the mismatching of even haririoiiics [38 . 78 . 21 . . . . . 16

2.7 Memory effects clue to power supply inodulatiori effects [38, 25. 21 . . . . . . . 17

2.8 Electrical circnit inotlel of heat flow from the active device [79] . . . . . . . . . 18

2.9 Block diagram of a Wiener model . . . . . . . . . . . . . . . . . . . . . . . . . 22

2.10 Block diagram of a Hainrriersteiii model . . . . . . . . . . . . . . . . . . . . . . 22

2.11 Block diagram of a parallel Hani~nersteiil rriodel . . . . . . . . . . . . . . . . . 23

2.12 Feed-forward architecture . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

2.13 Digital pretlistorter followed by a power amplifier . . . . . . . . . . . . . . . . 25

2.14 Power a11il)lifirr P ,,,, , versus P,,, curve tinti digital prctlistortioii . . . . . . . . . 26

2.15 Block diagraiii of irieirioryless digital predistortion . . . . . . . . . . . . . . . . 27

2.16 The indirect learning architecture for the prcc1istortt.r. . . . . . . . . . . . . . 28

2.1'7 Definition of t lie ol~tput 1)ack-off . . . . . . . . . . . . . . . . . . . . . . . . . . 31

2.18 Power a.inplificr efficiency vs . output lmk-off. . . . . . . . . . . . . . . . . . . 32

3 1 Block diagiaiii of the piecewise pre-eq~ializetl I. IT?' 1 ) a d PI) 3 7

xii

Block (iiitgril~~l of' {lie proposctl P D witli tlir . LUT replaced l ) , ~ a polyioiriial

equation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3'3

Piecewise pre-eq~ialized LUT P D grapliica.1 cxpressions: (a) complex gaiii ad-

. juster response. (h) piecewise equalizer response . (c) response of the ca.scaded

complex gain adjuster and piecewise equalizers . (d) power anplifier response . and (e) desired response from (c) and (d) . . . . . . . . . . . . . . . . . . . . . 40

The indirect 1ea.rning algorithin for the predistorter of the power a.mplifier. . . 42

Line-up for a . 300-W- P E P Doherty poxver anlplifier . . . . . . . . . . . . . . . . 44

The test bench set-up for modeling of the power amplifier . . . . . . . . . . . . 44

In-phase signal modeling results . . . . . . . . . . . . . . . . . . . . . . . . . . 46

Quadrature signal modeling results . . . . . . . . . . . . . . . . . . . . . . .

Frequency domain modeling resu1t.s. . . . . . . . . . . . . . . . . . . . . . .

Linearizi~tion with a memory-less LUT PD . . . . . . . . . . . . . . . . . . .

. . . . . . . . . . . . . . . . . Linea.riza.tioii with the LUT Ha~mnerstein P D

Line;~rizatio~~ with the proposed piecewise pre-equalized P D . . . . . . . . . .

Linearizatio~l wit 11 the nieniory polyiioiriial P D . . . . . . . . . . . . . . . . .

Linearizatio~i: ( a ) without P D . (b) LUT PD . (c) Hairiiiiersteiil P D wit11 ;I

5-t.ap FIR filt.er . ((1) proposed piecewisc pre-equalized P D witli 2 taps . ilild

(e) ineinorv polyno~nial PD of 5th order with 2 inemory terms . . . . . . . .

Experimental results: (a) witliolit PD. (b) LUT P D . (c) Hainmerst.ein PD

wit11 a 5-t. itp FIR filter . (d ) proposed piecewise pre-equalized P D with 2 taps .

and ( c ) meinor?; polynomial P D of 5th order with 2 memory terms . . . . . .

Digital 1)asehand predistortioil arcliitectr~rc . . . . . . . . . . . . . . . . . . .

R F envelope digital predistortion architecture . . . . . . . . . . . . . . . . .

Digital hasedhand derived R F predistoi.tioii architectlire . . . . . . . . . . . .

Represent at ion of vector suiilina.t ion . . . . . . . . . . . . . . . . . . . . . . .

Ih13 cancellation performance as ;i f'unc.tioi~ of T,, . . . . . . . . . . . . . . . .

Ih15 c~mc~llwtioii performance as a fiiiictioii of ~ . j . . . . . . . . . . . . . . . .

Delay calil )ration procedure. . . . . . . . . . . . . . . . . . . . . . . . . . . .

Test l)e~ic.li for the proposed pretlistortion syst.em . . . . . . . . . . . . . . . .

Thc ca.ptrirtd spcctruin hefore liiiturizatioii . at 47 dBm of' the avtrilgc olitpllt

powcr . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.10 Tlir c a p t ~ ~ r r d spectrlun after linearization. a t 47 rlBttl of tlic. avcrage o l~ tpu t

poncr. . . . . . . . . . . . . . . . . . . . . . . . . . . . ... . . . ... .

4.11 hleasllretl spectral results for delay tlependeiicc of the proposed system: (a)

without predist,ortioll, (b) with one sa.mple advance. (c) with one sample

delay, and (d) wit,ll coarse delay match. . . . . . . . . . . . . . . . . . . . . .

4.12 h'leasured spectral results for the proposed system. with fractional delay com-

pelisation a t 44 dBm of the average output power: (a) without predistortion.

(b) with predistortion and coarse delay ~riatcll. and (c) with predistortion and

fractional delay match. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.13 Measnrcd spectral results for the different fractional delays. a t 44 dB171 of the

average output power: (a) witli coa.rse delay. (h) with 3 fractional delay, (c)

with 4 fractiolial delay, a d (d) with 5 fractional tlelay. . . . . . . . . . . . . .

4.14 hlcasured spectral results for the proposed system. n.it,li fractional delay com-

pensatioli a t 46 dBm of the avcragc olltput power: (a) ~vitliout prfdistort,ion.

(b) with predistortion and coarst. dt.lay match. and (c) with plmlistortion and

fractional tlelay match. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

4.15 hlewsiired spectral results for tllr different fractional delays- at 46 tlBrrr of the

averagc output power: (a) with coarse delay, (b) with 3 fract,iolial c1ela.y. (c)

with 4 fract.iona1 delay, and (d) wit,l~ 5 fractiollal delay. . . . . . . . . . . . . .

5.1 Block diagram of the scaled peak c~mccllat,ioli technique. . . . . . . . . . . . .

5.2 Block diagram of tlic noise slia1)er for a multi-carrier 1%-DChlA system. . . .

5.3 Block diagram of the peak windowing ~nethotl . . . . . . . . . . . . . . . . . .

5.4 T l ~ v CCDF plot for four WCDhlA c.urriers. hcforc :~nd after the setup in

Table 5.1. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

5.5 PAPR versus EVM for R P C and PIA:. witli four WCDhIA carriers. . . . . . .

5 . PAPR versus EVhI for SRPC' witli h11r WCDhIA carric>rs. . . . . . . . . . . .

5.7 ACLR versiis PAPR for h u r II'CDhlA carriers. . . . . . . . . . . . . . . . . .

5.8 P D F of the P W for folly WCDhIA c.arriers. . . . . . . . . . . . . . . . . . .

5 . P D F of tlic single P C for b u r \V('DhlA carriel~s. . . . . . . . . . . . . . . .

5.10 PDF of the R P C for four WCDhIA c,arricrs. . . . . . . . . . . . . . . . . . .

5.11 '1'11~ tcst bench for tlir CFR algoritlilll. . . . . . . . . . . . . . . . . . . . . .

5.12 011t l )1~t spcctruin of the PA foi to111 I\.-CDhIA carriers with tliffc~iont PAPRs. 88

wiv

5.13 Expcriinci~tal rtsults 11siing the 9.8 dB PAPR . signal . . . . . . . . . . . . . . . 89

5.14 Experiinci~tal results u s i ~ ~ g the 6.5 dB PAPR. signal . . . . . . . . . . . . . . . 90

5.15 Exprriinental results using the 5.5 dB PAPR signal . . . . . . . . . . . . . . . 90

. . . . . . . . . . . . . . . . . . . 6.1 An FPGA test bench for digit. a1 predistortion 94

. . . . . . 6.2 Stratix EPlS80 DSP development board cornpoimlts and interfaces 96

6.3 hlrasurement results at the average 43 dBm output power: (a. ) without PD:

(1)) with PD: and ( c ) with a linear output . . . . . . . . . . . . . . . . . . . . . 97

6.4 hleasurement results a t the average 45 dBrn output power: (a) without PD . (11) with PD. and ( c ) with a linear output . . . . . . . . . . . . . . . . . . . . . 98

List of Abbreviations

3G

3GPP

ACLR

ACP

ACPR

ADC

ADS

AM/AM

AM/PM

ASIC

CCDF

CDMA

CF

CFR

DAC

dB

dBc

dBm

DFFLPA

DPA

DPCH

DPD

DSP

DUT

third generation

third generatioil partnersliip project

adjacent channel leakage ratio

adjacent chaiinrl power

adjacent chaiiilel ponrcr 1 i t t 10

analog-to-digit a1 coilvcrtci

advanced tleslgii xystclrl

arnplitudc nlodlilation/anlplitll(le ilmtllilatioil

amplitude ir~odulation/~)1~ase modulation

applicatioii specific integrated clrcuit

coniplinlentary cuinulativt~ distributloll functioil

code divisioii iriultiple access

crest factoi

crest factor reductloll

digital- t o-analog corivci t r r

decibel

decitwl reldtive to a wirier level

decihcl relativc to a inilliwatt

Dollerty feedforward l inea~ pomc31 iliiiplifiei

Doheitv p n w ainplihei

dedicated pl11.sical cliaiincl

Dollcr tv 1~ t3tlist 01 t ion

digit a1 signal prot essing

tie\-ic c uildt>~ t (.st

xvi

EDGE

ESG

EVM

FET

FFLPA

FIR

FM

FPGA

GMSK

GSM

HDL

HPA

IIR

IMD

LAN

LDMOS

LINC

LMS

LPF

LTI

LUT

MESFET

OBO

OFDM

PAE

PAPR

PD

PDF

PEP

PW

enhancetl data ratrs for GShI rvo l~~t ion

electroiiic sigl~al gewrator

error vector rnagnit~lde

field effect transistor

feed-forward linear power amplifier

f inik inlpulse response

frequency modulation

field prograinable gate array

gaussian minimum shift keying

global system for mobile communications

hardware description language

high power amplifier

infinite ilnpulse response

3rd order interniod~~lation tlistortiou

interinodulation tlis tort ioii

local area network

laterally diffused 111ctal oxide senliconcluctor

linear amplificatioli using i~oiilil~ear coiripoilent~s

least mean square

low pass filter

linear time-invariant

lookup table

metal semiconductor FET

output back-off

orthogonal frequency clivisioii nn~ltiplexing

power alnplifier

power added efficiei~cy

peak-to-average power ratio

pretlistoit io11

prohahility density fiinctioii

peak envelope. powc,~

peak wi~idowi~ig

xvii

QPSK

RF

RLS

RPC

SQRT

SRPC

TS

UMTS

VSA

WCDMA

cl~m(lr;it,~lrt' pliafi~sliift keyiiig

radio frequency

recursive lcast square

repeated pulse cancellation

square root

scaled repeated pulse cancellation

test specificatioii

universal mobile telecommunicatiol~s systein

vector signal analyzer

wideband code division multiple access

xviii

Chapter 1

Introduction

1.1 Motivation

Rcliahlc collulnr servicc rcq~rires elran and cwi~sistc~~t trwnsniission from I ~ s c stations. 1111-

der widely and rapidly changing conditions. Tlic base stntion's radio frequency (RF) power

amplifiers (P.4s) are key i l l g:.uaranteeing this reliability. Spectral efficie~~cy has always 1)etw

iiriportant in ~nohile co~nrr~urlic;ttioiis. Now, iiioclcr~i sccontl- and third-generatiori cligital

systems denland that PA linearity and efficiency also 1)e included as crucial prrforrri;~nce

requirements. These an~plifiers are found in ccllular base stations tha.t support the code di-

vision multiple access (CDhIA) family of wireless standards (e.g. cdma2000. 3rd Gcl~eratiorl

Partnersliip Project (3GPP). or widebmd CDAlA (WC'DhlA)). as well as iniproveiiients to

existing standards (e.g. d i a n c e d data rates for g l o l d system for mobile corn~nuriit~;~tiol~s

(GYM) evolution (EDGE)). Due to the use of ~ ~ l l d r i ~ t l ~ r ~ modulation and multiple carriers.

the signal power in lrialiy of these a.pplications f uctuatcs significar~tly over time. This r~iea~iti

that t,he signal lias a high peak-to-average-pon~er ratio (PAPR) when compared with analog

f req~~ency rnoc\~~lat,ior~ (Fhl) or Gaussiai~ ~ r ~ i ~ i i ~ l i i ~ ~ t ~ shift keying (GhISK) 1110<l11li\tio11. as

~ w t l in GShl.

Altliougli the aforrme~itioned systems iiiixintai~i good spectral efficie~ic!-. tlie varying

ciivelope of tlic ~ig~i i \ . l gt\lierates spectral ro-gro\vtl~ in the ac1ja.cent clianncls a l ~ t l iw1)iriitl

distortion. JYlie~i ;~n~~)li l iet l . this leads to a tleg~.atlatio~i ill the error vector ~r~ag~iitu(lts

(EVM). si~icc RF PAS artJ i~iherent,ly no~ili~icar. A trw.tleoff exists betweell l i~ iear i t~ , iwtl

efficiency: power efficicwcy is very low wh(w tl~cs a1111)lificr operates in its l i~ i~>i \ r rcgio~i i111(l

increases as tlit. a~~ipliticlr is driven into its cwn~prc~ssio~l rcgion. In order to ( ' I I ~ I ~ ~ I I ( . c ' 1)otli

CHAPTER 1. 1NTR.OD UCTION 2

liiitaritj. aiicl c4ficiency at the same time. one of the variolis linearizat,ion t,echniques slio~iltl

1)e applied t,o a efficient R F PA. A Doliertj, p o n u amplifier (DPA), for example. is able to

achicvc liiglier efficieiicy than tratlit,ional PAS. although at the expense of linearity.

illany systematic methods for reducing nonlinear distortion. often called linearizat,ioii.

have beell developed. The feed-forward linearization method is the most well known for

providing good linearity; however, the teclmique has poor efficiency and an undesirable

reliance on complex, expensive and potent,ially difficult t,o maintain analog hardware. Feed-

forward linearization first samples the output of the amplifier and reduces it to the same

level as the input signal. The reduced value is then subtracted from the input, leaving only

the distort,ion generated by the amplifier. Thc distortion signal is increased by a separate

amplifier. in order to obtain the same level a.s the main output. and is t,hen sl~btractetl from

the origiiial amplifier output signal. The result is a linearly amplified version of the iiiput

signal. Feetl-forward linearization 11a.s 11ecn sl~c.cessflilly einployed in man!; comm~ulication

systems. Ho~vevcr, it is difficult to appljr to cxistiiig a.rriplifiers and call oiily provide good

resldts if tlle R F PA output back-off level is at loast ill tlle order of 6 to 7 dB.

111 ;~dclition to feed-forward. several other liucm-ization methods h a w heeii used. Tliese

incliide analog predistortion, linear amplifica.tion using nonlinear components (LINC). and

cxtesian feedlmck. As with feed-forward methods and its variants: these t,echniques iiivolve

a coiisidera.ble amount of added analog hardware. In addition, they may require the use of

lionlinear coniponents. the characteristics of wliich are difficult to control to the degree of

precision necessary to achieve the desired iinproveinents.

Tlic riiost promising and cost-effective linearization technique is adaptive baseband dig-

ital predistortion (PD), which has recently demolistrated notable success ill correct,ing the

nonlinearity of R F PAS. Due to PD's digital iniplenientation. it coilcurrently heliefits from

the coiitiiiuous iiriprovements of digital signal processing (DSP) and field-programmable

gate n.rra.jr (FPGA) circuitry. Thus, P D provides significmt accuracy and flexibilit,~. lias

I~etter power efficiency. and reduced iniplriiieutatioii complexity.

Icleally. in tlie case of memory-less aiiiplifiti~s. the nonlinearity of ail R F PA sliould be

tlic sairic fbr all signals, a t all frequencies. Uiifort~iiia.tely. most R F PAS liavt. soiiie degree of

mernorj.. iriakirig their output dependent oil uot oiily the cl~rreiit iiipllt sigual. h i t also tlle

previous input signals. In other words, tlicl olit])~it signal will be iiifll~eiicetl 11y the frequency

of tlie sigiial's cuvelope. the frequency of t l i v sigiial itself. and the teriipcratlire [ lo. 331.

Tllcsc 1iic~iiol.y cffects substantially liiiiit t l i ~ l i i i l ~ i l ~ i l l l l i achievable cancel1;~tioii performance

CHAPTER 1. INTRODUCTION

of ~n~inory-less digital P D systeins for ~videbantl applications.

Using a DPA along with digital I'D presents a syst,ein to achieve botli liigli cfFiciency

and linearity. However, due to t,he high PAPR of t,he input signal. a limitatioii still exists

concerning efficiency. This high PAPR sets a inaxiinuin correctal~le point wlien using PD.

Therefore, it is desirable to apply one of the PAPR reduction techniques, ill order to drive the

PA closer to its saturation power level. The use of deliberate envelope clipping to digitally

distort tlie signal. while maintaining the signal quality a t a sufficient level, is a simple and

practical way to decrease PAPR. hloreover. reducing the PAPR via clipping presents the

possibility of utilizing the dynamic range of the digital-to-analog convert,er (DAC) more

efficiently. Therefore. combining digitally pre-distorted DPA with a crest factor reduction

(CFR) technique has the potential of inaxiinizing system linearity arid overall efficiency.

1.2 History of digital predistortion

The 111i\tllrit~ of this research area has rcsnltecl ill ail abundance of research papers oil tligit,;tl

P D over the last twenty years. The first pra.ctica1 implementation of a. gaiii l~asetl digital

predistortcr was proposed by James Cavers 1171 in 1990. Prior to this inetliotl. tlie intijority

of digital PDs were based on the mapping predistorter principle. i l l wliicli vacli possihle

signal level was directly mapped to ail output level [53].

Linear distortions (impairments) in the forward or feedback patlis of the tligital predis-

torter call affect its performance and therefore, irilist be reduced. hlajor sources of tliese

linear dist,ortioris are the quadrature modulator and demodulator and the reconstruction

and anti-alias filters. The first method to analyze and correct t,lic cpiadraturc nlodula.tor

was developed by Faulkner et al. 1321 in 1991. I11 1993, Cavers ct al. [19] proposed the

adaptive compensation method for errors in direct conversion transceivers. followcrl by an

il l dtptli a.iialysis in 1997 [18]. The effects of reconstruct~ioil filters were first analyzcd 1)).

Sl~litlstroni et al. 1711. without providing a solution to the problem. hlorc receiitly. digital

up nncl tlowii converters lime beeii iniplemented. wliicli do not exhibit tlie iinpairiiieiits of

tlic> alialog niodulator aad tleinodulat~or: the converter is a popular clioicc for the systeni

tllw to t o llic advances ill DSP t,ecliiiology.

The nieniory effects exllihit,etl hy tlie midetxmd traiisniittcr (PA) sigiiiiica.iitly limit t l ~ c

alility of the memory-less predistorter to suppress the spectruiri rc>-growtll [39]. Therefore.

tlifftw'i~t piwtistort,er arcliitectures. whicli ;ire iiit~entled to coiiipciisatc fbr tlic iioiilinearity

CHAPTER 1. INTRODUCTION 4

as well as the nieniory effects. liave I~ceii reported in the literature. For example. a Volterra

predistorter using an indirect learning algorit,llnl was proposed in [30]. I11 order to reduce

t.lie number of coefficients to be estimated. a memory polynomial pretlist,orter. a siinplifiecl

version of the Volterra predistorter. was implemented to address these effects [41]. However.

the polynomial based memory predist,orter suffers from a nunierical instability when higher

order polynomial terms are included, since a matrix inversion is needed for determination of

the polynomial coefficients [28]. Alternatively. R.aicli et a1. 1631 employed orthogonal polyno-

mials to alleviate the numerical instability problem associated wit,l~ traditional polynomials.

Two-box based predistorters are another type of colnlnori PD ardiitectures. which are

referred to as either Hammerstein or Wiener predistorters according to the cascading order

of the non1inea.r and linear blocks. For cxample. a Hammerstein pretlist,orter. which is

a cascade of a memory-less nonlinear block followed by a linear filter. 1 1 ; ~ ~ been used to

compensate for the nonlinea.rity as well as the menlory effects of a PA [37. 2'3, 271. Wang and

Ilow [80] have tleinorlstratetl the compensation performance of a Wiener predistortcr. used

to linearize a high power amplifier (HPA) with ~riclriory effects in a.11 orthogonal frequelicy-

division multiplexing (OFDhl) transinittcr. wliilc co~isidering the HPA as a Ha.rrunerstein

nonlinear syst,em. In these two exa.niples. the memory-less nonlinearity was represented

by a complex high order n~eniory-less polynoniial. 111 addition. the identification of the

inernory-less nonlinear block coefficients and the linear filter taps are concurrently resolved

by means of complicated algorithms, whicli are a.pplied in either the time (lomain [37, 271

or the frequency domain [80].

1.3 History of crest factor reduction

The various PAPR techniques can be categorized illto two groups. depending on whetlier

they use linear tjechniques (niodulation- a~it l coc-li~ig-depende~~t) or nonlinear tecliniq~~es

(~rioclulatio~l- and coding-independent). hlethotls that use linear tecliniques for OFDhl

syste~ns do not distort the sig~ial in t,lie time tlo~riaiii ant1 tl~ereforc. the spectral properties

are not altered [59. 13. 431. Conversely. nonli~iea,r techniques modify tlw cnx~lope of the

time domain signal and are ~nainly l~asecl 011 (:li~)~)i~ig-filtering and wiiitlowing [60. 771. To

suppress pea.k re-growth wlle~i filt,ering the o~~t-of-band distortion of the clippecl signal. iter-

ative clipping and filtering methods for OFDhl systeins liave been proposetl in [3] and [46].

CHAPTER 1 . 1NTR.ODUCTION 5

Tliese works silggested that iterative clippiiig and f~lteriiig of the clipped pulses would re-

tl~ice tlie convergence rate to tlie targeted PAPR. Howvei. repeated clipping ant1 filtering

tecl~liiqlics that have been inlpleinented for O F D l l systenis reelllire several iterations to coii-

Ierge to the desired PAPR level, irnplyiiig that it is not an efficierit algoritlim for hardware

iiripleinentation.

1.4 Contribution

This thesis presents severa,l original contributions to t,lle field of coinputationally efficient

digital P D architecture design. The research takes into account. memory effects, structurally

efficient, digita,l P D svstems. and crest factor reduction. Details of thc original contributions

arc given below.

First. a new digital predi~t~orter for ineinory effect coinpensation was proposed. which

applied iniiltiple lookup tables (LUTs). Tho coi~t,rihutioiis arc as follows:

0 T h r new pretlistorter based oil piec~wis(-' pie-equalizers was tlevtloped for use in niulti-

channel w~deha i~d applications. in or clcl to coinpensatc, fol c~nvelopr 111~11io1 y effect 5 .

0 A i~ovrl LUT-based method for envelope ineinory c4lect5 was iinpleiner~trtl, which was

a1)lr to cornpensate for not only tlir noiilinearity of the R F PAS 13ut also the envelope

111erliol y effects.

0 The coiriputational complexity was analyzed anel compared with the conventioilal

incinory polynomial PD approach: it was foulid that thr 1)roposcd structure is very

efficient in coinputation

Secoiid. we implemented a basebaiitl clcr ived R F digital P D svstenl. whicl~ offers several

advantages ovrr (olwentioilal digital l),lschallcl P D and R F tiivclopc clrgitJ PD

0 A tligltd P D architecture using a vcctor inodulator was iinplcmented and derived

f i om LUT coefficieiits at digital 1)awhaiid This st1 i i c t ~ u c i etliices thr. t~andwidtli

~ c ~ ~ ~ i ~ ~ i n e n t ~ of the digital-to-i~iialog c oinw tcrs (DACs) m t l rtw)i15truc tioii filters.

n l 1 r 1 1 1 c-oinpared to the digltal 1)asel)antl predistoi tcr It also icwiovc~s the inacciiracy

of tlic RE' detector and the large R F t k l i t + liiics in t11e R F c~nvc~lopc cllgltal P D systern

CHAPTER 1. INTRODUCTION G

a A new delay cdi1)ration niethotl 11sing corlelatiol~ was tle\cslopetl. in order to svnc.liro-

iiizc the two paths of' the system

Tliild. a novel crest factor algoritlim. which saves hartlware resources and is easv to inl-

plenient. was developed and applied to a PA, a Dohertv feecl-forward linear power amplifier

(DFFLPA). and a digital PD. respectively.

a A liovel crest factor reduction (CFR) algorithm was developed based on iterative peak

cancellation. This new CFR method saves hardware resources by means of a scaling

factor.

a The iiew CFR algorithm was applied to a class AB. a DFFLPA. and a digital PD. ill

order to niaxilnize the efficiency of the system. I11 atldition. tlic cfficicncy of a DFFLPA

was compared to the efficiency of' a digital P D using the proposed algoritlilii

1.4.1 List of publications

The following list details t l i ~ pu1)lications that have res~dtecl fium tlir, work prcsentcd ill this

t llcsls.

Journal Papers

.I1 \I: J. Kim. K. J . Clio. S. P. Stapleton. and J . H. Kim, "Effic*iaicv Comparison betwt.eli

a Digitally Pleclistorted illid a Feed-for\v\-alcl Linearized Dolic>rt\, Amplifier with Cre\t

Factor Reduction." A17crowave Journal, submitted.

.12. If'. J . Kim. K. J. Cho. S. P. Staplrton. and J . H. Kim. .'An Efficieiit Crest Factor Re-

clllction Technique for Widehand Applicatiolis." Ar~,a,lo!g Irrtcypted Czrcwits nnd Signtd

Pror.c.s.sing. submit tetl.

.74. I i . .J. Cho. M:. J . Kim. S . P. Stapleton. and .J. H. Iiiiii. ..All Eiihaiiced Dolici,ty

Airiplifier Design Basctl oil the Derivative Superpositio1i AIot llorl." A4zcrowa,ve ,Jouvrzol.

ac.c.opted for fut~irt. ln~tdic- ~1 t ' 1011.

CHAPTER I . INTRODUCTION - I

.Is. \IT. .J. Kiln. I i . . I . Cho, S. P. St,a,pletoi~. a i d . I . H. Kim, "Piecewisr Pre-cq~lalizetl

Linearization of the IVireless Trailsinitt,er wit,h a Doherty Ainplifier." I E E E T7un.s.

11li.c.r.oum~lt: Th.eory and Tech,r~iq?ies. Vol. 54, No. 9. pp. 3469-3478. Sep. 2006.

J6. Ii. J. Cho. I\-. J . Iiiin. S. P. Stapleton. and J. H. Kiin. 'bGalliu~n-nitridr hlicrowave

Doherty Power Amplifier with 40 W P E P and 68 O/o PAE." I E E Electronzcs Letters.

Vol. 42. No. 12. pp. 704-705. June 2006.

.J7. W. J. Kim. K. .I. Cho, S. P. Stapleton. and .I. H. Kiin. "Baseband Derived RF Digital

Predistortion." I E E Electronics Letters, Vol. 42, No. 8. pp. 468-470, Apr. 2006.

.J8. K. J. Cho. W . J. Kiin. J. H. Kim. and S. P. Staplrton, "Linearity optiinization of a high

power Doherty amplifier based on post-tl~stortloii compensation," I E E E A I ~ t ~ o ~ ~ i n v c

and Wzreless Co~nponen t5 Letters. Vol 15. No 11, pp 748-750. Nov. 2005

.J9. W. J . Kim, S. P. Staplrton, - 7 . H. Iiilii. alid C. Etlelmaii, "Digital Predistortion Liii-

earizes Wireless Powei Airiplifiers." IEEE All( 7 o u ~ o r i ~ i\.lagaazr~c.. Sep. 2005.

J10. K. Mekechuk. W. .J Kim, S. P. Stapleton. I(. J. Cho. and J . H. Kim. "Test Iiistl lnneiits

Coupled with EDA Software hlaxiinize Doliertv Amplifier Linearitv and Ef f i (~ i i c~- . "

E E T.r.rnes. 27 Sep. 2004.

Jll. I(, hlekechuk. W. .I. Kiln, S. P. Staplrton, and .I. H. Kiin, *'Liilearizing Pone1 Alrl-

plifiers Usii~g Digital Predistortion. EDA Tools and Test Hardware." HI($) F7~qut tlc11

Electrot,lcs. April 2004.

Conference Papers

C1. Ii . J. Cho. mi. .J. Kim. .I. H. Kim, aiid S. P. Stapleton: "40 W Galliuni-Nitride hli-

crowave Dolierty Power Amplifier." in I E E E M T T - S Internation~nl n/Iic:rovrr~ Syn. -

poszum, Dzgest. .111i i~ 2006. pp. 1387-1390.

C2. K. J. Clio. I. H Hwalig. W .J Kim. .J H Kim. m t l S P. Stapleton. '.Linearlt\- opti-

mization of a high pomrtr Dohertv ainpllfir~ ." 111 I E E E A f T T - S It~tc.7natzoiinl A l i r rouir~ot

Syrrpos~urn D ~ q r s t . .111iie 2005. pp l38T-l3OO

C3. W . .I. Kim. S. P. Staplcton, I<. J . Cho. ant1 . I . H. Kini. ..Digital Prc(1istortioii of

a Dohert,y Airip1ific.r wit,li a, Weak hlemor~, ~vithin a Col~liectetl Solutioli." il l I E E E

V e h i c u l n ~ T f ~ h ~ , o / o g ! j Con,ferrnce. Sep. 2001. 111). 2020- 2023.

CHAPTER 1 . INTRODUCTION

1.5 Outline

The remainder of thesis is orgailiactl as fbllows:

C:liapter 2 introduces basic t,licories and gives a 1it)erat)ure review of tliv inodeling and

predistort,ion of power amplifiers.

Chapter 3 describes a predistorter based on piecewise pre-equalizers for use in multi-

chamel tvideband applications. It takes advanta.ge of multiple finite impulse response (FIR)

filters. which significantly reduce the complexity when compared to nlerriory polynomial

methods.

In Clmpter 4, a unique baseband derived R F predistortion system is presented. whicli

uses LUT coefficient,^ ext,ract,ed at. baseband to directly R F envelope lnodulat,e a quadra-

t,ure vector modulat,or. The primary advantage of this architecture is that it combines the

narrowband benefit of envelope predistortion with tlie accuracy of baseband predistortion.

Chapter 5 presents a novel efficient crest factor rcduct,ion technique for witlebancl appli-

cations. The tc~linique is based on using pt.itk c;~nc.ellatioli to rcduw tlir: peak-to-averagc

power ratio (PAPR) of the input signal. This tech~iiquc is applied to a clilss AB power

aniplificr. 1-1 Dolierty power amplifier, a Dolic~ty fed-forward linear power ainplifier, and a

digitally pretlistorted Doherty power anplifier. ill order to illust,rate the efficimcy elihance-

melit,.

In Chapter 6: a digital predistortion test-bed. wliicli uses a field programnable ga,te

array (FPGA) board, is described.

Finally. Chapter 7 suminarizes the tlissertation ant1 provides future research directions.

Chapter 2

Background

111 this chapter, wc review models of a power amplifier and liiiearization for iiieniorv-less

and meinorj- affected systeins.

2.1 Behavioral models of power amplifiers

2.1.1 Memoryless model

In the passband. a meinorvless power amplifier can be descrihtl as a nonlinc~ir fiuiction.

This ineinory-less nonlinearity can he approximated bv a power series

where bp are real-vallletl coefFicients, ? ( t ) is the passhand powei amplifier input. a11tl i j ( t) is

tlie passhand powei ainplifier output. I11 the baseband. (2 .1 ) becoir~es [9]

I ( t ) is tllc l)awl>aiitl l x m ~ i amplifier input. aiitl r l ( t ) 15 the t~ascl~niitl power ainplifici olitl)l~t

Not(. that ( 2 2 ) onlv ~ ~ l l t i t i l i ~ odd order terms. its t l i ~ signals generated from tllc cveii orclcl

CHAPTER 2. BACKGROUND 10

t.crins in (2.1) are far from the carrier freql~enc-y. Tll~ls. they do not contrilx~tc to the base-

band output y ( t ) . Tllc coefficient,s bp are complex valued and thus introduce anlplit,udc and

phase tlistortioii to the input signal; this gilres rise to t,lie amplitude ~iiodulat~ioii/a~nplit~~(le

modulation (AhI/AhI) and amplitude ~nodulation/phase inodulat~ion (Ahl/Ph'I) conversion

of the power amplifiers. In other words. tlle Ah,l/AhI conversion is the nonlinear function

mapping from Jz(t) l to ly(t)l; the Ah,I/PM conversioil is the nonlinear function mapping

from I.r:(t)l to the output phase deviation Ly(t) - Lm(t). Expressing z ( t ) = Ir(t)le~c'.~('). we

can rewrite (2.2) as

y(t) = ( I - 'r. ( t) l )> (2.4)

n~here I(

F(lWl) = C bkl4t)l" (2.5) I,= I

k ( J C ~ [ /

From (2.4) and (2.5). it follows that I!j(t)l = IF(( r ( t ) l ) l . Ly( t ) - Lx(t ) = L F ( l ~ ( t ) l ) . in

other worcls. IF(.)\ IS tlie AhI/AILI response and L F ( o ) is the Ahl/PhI response

2.1.2 Memory effects

111 recent years, memory effects have been the suh,]ect of intensifying investigation. In

the time doiriain and for ii single nTCDhIA carrier. the memory effect phenonie~~a can

be illustrated as dynamic Ahl/Ah/l and AhI/PhI: refer to Figure 2.1. In the freq~lency

domain and for a multi-carrier WCDhIA signal. tlle lneinory effect produces an asyiriinctric

intermodulation distortion (IMD); refer to Figure 2.2.

111 the literature. memory effects [78] have heel1 referred to as hanclwidtli-dependeilt dis-

tortion [14] (more specifically slow or long-tenn inerrlory effect,s [67]), low-frequeucy nieiri-

ory [34] effects. dynamic system effects [GI]. slow dyna~nic effects [SO], a i d rate-depeiitle~it

effects [Ed ] . The ineniory effects are gene1.;~11>, classified int,o t,wo groups [78].

0 H~gl i f lecpncv memory effects (Sliort tcinl niciric)Iv effects)

Tlit. o u t p ~ ~ t it+ponse depends on tlic cu t l ~ a l value oi its input aiitl on tlic. past saniples

at tllc RF time scale 111 this caw. the i~iipldsc response lias n short t i i i i~ 1)eiiod.

Possiljle sources include charge stoiagr 111 sciniconductor cteviccs. trnnsit tlincs in

seiniconductoi devices. and ~ n ~ s n ~ t c l i ~t t~uiclaniental and ha~nlonit trtyllcuc ~ c s

0 Envelope tiecluc~iicy menlory effects (IJong t ~ ~ i i i illenlory effects)

CHAPTER 2. BACKGROUND

Figure 2.2: Asymmetry of tlic PA with memory for three \;I'CDI\IA carriers in the frecp~eiicy t l o ~ i i n i n .

(High & LOW')

frequency /1- effects 4

E3ias networks

178 I 9 1 8 2 frequency [GH;]

358 36 3 6 2 0 TO 20 frequency [ G H i ] f i ~ q i ~ e ~ ~ c y [i!lHz]

( 1 ) ) ( 1

Mismatching of even harnionics

Zone C Zone ! Zm. 2

output matching

load

network

Input lnatch~ny

source c

Sclf-heating effects

\ \ - I I ( ~ I , ( > 7;),,,1, is t 1 1 ~ i \ ~ ~ i l ) i ( > ~ ~ t 1 ( l ~ ~ ~ l ) ( > ~ ; ~ t I I I , ( > . Rl,ll i h t11( , I I I O I ~ I I ~ ~ I I ~ , ( > s i s t ; i l l ( , ( > us111ti11g i ~ i I 110

; r \ ' ( ' l ' i r g ( ' 1 ('1111)('1';11 I l l ' ( ' l ' i ~ ( ' ( ' i l l l ~ ( ' ( I I ) \ ' ~ ( ' l S - I l ( ' i l t i l l g . ~) l l l ,a~(( / f ' ) ;111(1 - A,,) i l l , ( > 1 l l ( ' (lis-

s i l x \ I ( > ( I I ) O \ \ T I , i l t ( I ( , : ~ I I ( I ( ~ I I \ Y ~ ( J I ) ( ~ I ' I , ( Y ~ I I ( ~ I I ( , \ . . I ~ ( ~ S I ) ( Y ~ ~ i \ . ( , l \ . . ; L I I ( I XI 11 15 t t I I ( \ Y I I I ; ~ I i 1 1 1 1 ) ( v l i \ 1 1 ( ( >

of' I l l ( ? ( ~ l ~ i l ) a t 1110 ( ~ I I \ Y ~ ~ I O I ) ( ~ I ' I x Y ~ I I I ~ I I ( , \ ~ . 11 is i111 ( ~ I Y Y I i 1 1 g 1 11111 I,, 1 1 1 ; t t 1 I i (1 1 l ~ i ~ , ( l ~ ( > I , I I I i11 (2.7)

2. L . 3 Volt,eri-a series

- C C . . . C " ) , . ( ? 1 l I . , . . . I l l , , ) ? ( I 1 - l l , / ) + ( 1 1 ) .

I';11)1(. 2 . 1 SllO\\'S 110\\- t l l c 1111111~)(!1' Of ~)i l l . i l l l l ( !I 0L.S i l l ( ' l ' ( ~ i l ~ ( Y I\'itll Ol'(I01' :111(1 111(~11101.~ l('ll$ll.

I : ~ O I I - ~ T ; I I I ~ ( L 2. I . \VV (,;11i (Y>IIcIII ( I (~ 1 1 1 a I i t is 110t ~xwlist i( . 1 o \IS(> 1 I I ( > \toll ( lrri l I I I O ( I V I for l i i g l l v r


Figure 2.9: Block diagram of a Wiener inodel.

Figure 2.10: Block diagram of a Hamniersteiii model.

Tlic output. ~ ( I L ) . is given by

where P tfenotrs tlie inaxiinuin polynoinial order. 2 P - 1. A! is the nninher of previous

samples considered. i e. the memory lengtli of the iriode, and N ( * ) is defined as an odd P polynoinial moclel with order 2p - 1. i . e b ( ) ( I ) - ) Not(. tliitt n finite

irnpulsc response filter is nsed to represent H ( z ) . I11 [24]. Clark et al. nsed a \J'icncr iriodel

to capt~iic. the nonlinear memory effects in the power amplifier associated with wideband

signals

2.1.5 Hammerstein model

The Haii~iiiersteni inotlel is anotliei nonlinear iriodel with memory. wliich offers ,I complexity

siinilai to that of the L\-ieiiei inodel. The Hairiil~ersteiii systeii~ is a liicwior\ lcss nouliiiearit~.

-V(*). followcd lw an LTI svstein. H ( z ) ; refer to Figuic 2 10 [54. 271

Tliv output. ( / ( I ? ) . of a. Hairinic~\tc~iii svstcin call bc writteii

CHAPTER 2. BACKGRO[JND

Figure 2.11: Block diagrain of a parallel Hammerstein inodel.

where 1U is the number of previous samples considered, i.e. the memory length of the model. P and N ( e ) is defined as an odd polynomial inodel with order 2p-1. i.e. Cp=, b 2 , , ~ . r ( n ) l : , . ( n ) ~ ' ( ~ ' )

In this case, a finite impulse response filter is used to represent H ( 2 ) The output of tlic

Hammerstein lnodel is linear with ~ r spcc t to the LTI parameters, as opposed to the 11-irner

~riodrl wliicll is not.

2.1.6 Parallel Hammerstein model

111 Figure 2.11. a block diagrain of tlic parallel Haninlcrstein inodel is presented. which

coiisists of multiple Hamrriersteiil hranclirs with a comnioii input and an output comprised

of tlle s~~innia t ion of tlle iiitlividlial brailcll outputs. This systenl call be represented by

which in [41, 281 is refrrrtd to as a mcmory polyno7nzd. Similar to liow tlle Hainniersteiii

inode1 liax polynoinial nonlinear it^. t l i ~ liicinory polynomial is linear with rcspect to its

toefkicimts. b,,, ~ ~ - 1 . This prqwrtv ~ \ 1 1 0 ~ : , t l i ~ llse of linear techniques to idrntify a po\vei

;iiripllficr using t h r iriemory polvnonii~l ~riotlel. Coinparcd to tlir \$Timer and Haminrrstrin

~ilotlcls. this niotlel is more grnei a1 and therefole. can providr a more ,~cc uratc iiiodel of t lic

power amplifier.

C'HAPTER 2. BACKGROUND

Figure 2.12: Feecl-forwd ;trc.liittcture

2.2 Power amplifier linearization

Section 2.1 described how power amplifier models. with il.li(l without memory. can aid in

selecting a PA to match a given application. To enslire linear ainplificatioli of t,he signal. a

PA with a higher than required power is usually selected, such that the input signal falls

within the linear region of the PA. Although during this "back-off' approach the PA is using

a high DC power, it onlv utilizes a. small portion of its allowed input range; this can result.

ill a significant PA power specification increase and redllced efficiency. The linearization

approach offers a remedy to this problem. PA linearizatioii call be implemented using various

different architectures. In this research, we consider t,he two most well known architectures:

feecl-forward linearization and digital predistortion.

2.2.1 Feed-forward linearization

'rhc f(w-forlvartl lillearizatioii tedliiique. which is curreiitly used in the mobile coinniunica-

tioil systerlis' 11ase sta,tioiis. is the most wdl kiiowii tecliiiiqil~ and acliieves high linearization

perforinnlice. The draw1)a.c.k~ of t,his syst.eiri are thc low power cfficienc~,. due to the high

power rul~lirenieiit of the class A mode error amplifier. aiitl losses dlle to couplers and t l c lq

liiics ill the systern. In Figure 2.12. the feed-forward 1ine;trization arcliitecture is presenttd.


Figure 2.13: Digital predistorter followed by a power amplifier.

The input signal, Pi,. is split into two paths. I11 the inail1 path, the input signal is ainpli-

fied by tlic: main PA. In the secondary path, the inairi PA output is scaled and compared

with the original input. in order to extract only the error from t,he main PA output. The

resulting error sigiial is then fed through an error PA. Once the error signal is obtaiiietl, it,

is ainplified and su1)tracted froni tlie delayed out~plit of t,he main PA. Since the error signal

is the ii~iiliiiear tlistortion. rernoving it fro111 the PA outpllt effectively linearizes tlie PA.

Itlcallj-. tliis ;wcliitc~ctlirc is tlesigiietl to perfc.ctly liiitwize tlw PA. 111 practice liowcver. it is

~ ~ i i s i t i v e t,o chaiiges in tlie PA parameters. due to factors sucli as temperature. aging effects.

and amplitudc/phase iriat~ching; each of these factors require coiitiiiuolis adaptation [62].

2.2.2 Digital predistortion

A digital PD st,teiripts to linearize the nonlinear response of a PA over an operating region.

Tlic P D employs digital sigrial processing techniques. in order to predistort a base1,aiitl signal

prior to inodulat.ion, up-conversion and amplification by the PA. As a result. the cascade

of tlir tligit.al P D and the PA responses produces the desired linear response. Figure 2.13

shows t,he siinplified block diagram. The gain. G, of the PA is modeled as a function of

the magnitude of the PA input sigiial, V,. In this case. the function G is nieiriory-less and

nouliiiear in both airiplitlitl~ and phase. The use of a inemoryless model, wliicli is tlependent

only oli the input signal magnit~ide. is a simplification of a typical PA's ilctllal response.

Other ~ w i a l ~ l e s will impact tlie PA response; most 11otxt)ljr. tliese iriclucle the frequciicy and

inst.antaneous opcrating t.cmperature. Similar to G. t,llc t,ransfcr fiinction of the PD circuit

in Figluc 2.13. F . is tlesigiicd to 1)c a fuiiction of the tligit,al PD illput signal magiiitntle.

I/;. Thus. the cascacle of t,he predistorter a i d aiiiplifier will result ill tlie desirctl linear

response. wlieii F(IKl)G(II/; ,I) = k . where k is a, coiist;liit ;1nd \;, = 1); F ( ( 1 ; I ) . Digital P D

operatioil is depicted in Figure 2.14. which illust~ratvs tlic typical relat,ionsliip lwtwoeii the

Linear Response

ax Correctable Pi,

Nlen~oryless digital pre~list~ortiotl


Figure 2.16: The indirect learning architecture for the predistorter.

bee11 coilsidered for these predistorters iiiclude the Volterra series 129. 301, the Hanimerstein

~norlcl [37]. imrl the nieiliory polynolnial mot1c.l [21. 41. 281. Tlit. \17icmcr ailtl Hamr~erstcili

inodels only iileasuw iwlllinearity at the center frequency, with linear filtcrs ciq~turii~g t,llc

meinory. Howe\-er. these models caiinot predict the interactions hetween the iiistai~taneoi~s

toile. nor can they descrihe the chaiige of shape in Ar\,I/ARI aiicl Ar\I/Pr\I fiiiictioiis de-

pendent on tone spacing [24]. The parallel Hairinierstein model: i.e. nlcirlory polynoniial

inodel. is simple compa.red to the gcneral Volterra series and complex compared to the

Wiener aid Hwinirierstein models. In addition; this model comperisates fbr the drawbacks

of the. Volterra. Wiener. and Haminerstein models. c a l l quantify the menlory effects in PAS.

a.nc1 can he a.pplied to a linearizer design.

Tliere arc t,wo approaches to coiistruct digital predistorters with meirlory structures.

Tllc first approa.ch, which was used in [37]. identifies the PA and the11 finds the inverse of

thc PA. However, obtaining the inverse of a nonlinear system nrit,li iliemory is geuerally a

d i f f id t task. Tllc second approach is t,o iise ail indirect learning i~rcli i t(~cti ir~ to (lesigii

tlic prcdistorter tlirect,ly. as adopted in [29. 21. 281. This approach offers the atl\.iil~t ages of

eliininatiiig the need for model assumpt.ion and parameter estirnatioii of the pow^ ainplifier.

A 1)loc.k dingra.iri of the indirect lcarniiig s t ruct~ue is shown ill Figiuc 2.l( i . Tlw feedl~ack

path la1,clctl "Predistorter Training (A)" Iias y(rr)/G as its input. wherc C: is t iiitcnded

power a~~~pl i f i e r ga.in. and . ? ( 7 1 ) as its oiitput. Thc ac:tual prcdistortcr is a11 exact copy of

the fecd1)ac.k pa.tl~ (copy of A) : it has u ( n ) as its input and ~ ( 7 1 ) as its olitpiit. ltlci~lly. we

woiilcl like y ( r r ) = G'.r(is), which rcquircs . r ( ~ , ) = . ? ( l r ) and tlic error tern1 c(rt) = 0. Givci~

CHAPTER 2. BACKGRO[JND 2 9

y ( n ) aiid .r(it). this st1.11ct111.e C \ I ~ ~ L J I ~ W 11s to fiii~l tlie parameters of I~lock A tlirectl!.. yielding

the prcdistorter. The algoritliiri converges when tlie error ener g~ 1 lc(n) 1 l2 is mininlized.

In the training hrancli ( I efer to Figure 2.16) . the memory pol~.noinial t an he clescribetl

wl~ere y ( n ) and .c(n) are the input and output of the predistorter in the training branch.

respectitel!.. and u,,,,~, are the cocfficicnts of the predistortrr. Since the model in (2 .20 ) is

linear with respect to its coefficients, a,,, can be tllrectl\~ obtained using the least-squares

method. First we define the lienr sequeuct

111 niatrix forin

x = Ua.

wlicrc

a i d T a = [ ( I , , 1 . . . ( 1 0 p . . . (L,\( 1 . . . n.\l,p] .

T h r least-squares solution for ( 2 . 2 2 ) IS

wlierc ( o ) ~ denotes the complex corijugatc transpose. The accliracy and stability of the

solutions 2 are directly relatcd to tlic ii~iincrical condition of the ~natr lx UI'U A good

indicatioii is the coli(litio11 riuiiihci of tlic riiatrix [Sl]. i.e..

w11crc h.(o) is the c~ndit ioi i 11111iiher a,iitl A,,,,, , and A,,,;,, are tlic 1a.rgest i~llcl sinallest cigeii-

valllrs of U"U. rcspect,ively. The mntlix U'IU generally has a high c.ondition n~iinhrr: this

means tllilt tliere is a hig11 corre1;itioii 1)etween the colulnils of this niatrix. Therr arc two

s o u i ~ ~ . s for this high correlat,ioil:


1 . The 1101ili1i~wr pol~noinials. slicll as y. !/(/I!/). yj!ll'. etc.. are l~iglily correlatetl.

2 . Tlie da ta sninples y ( n ) at differelit tinic indices 11.c correlated.

The correlation due to the first source call he great,ly reduced by using the orthogonal

poly~iomial proposed in [63]. The correlatioii from the second source can he alleviated by

using a special training signal. whose samples at differelit time indices are independent. In

nialiy cases, h o n w w , dedicated training is not feasible. Hence. the accuracy of the solution

a can hc irnproved by using higher precision floating point numhers. such as 64-bit clouhle

precision instead of 32-bit single precision.

111 general, power amplifier cl~aracteristics do not change rapidly with time; changes

in the power amplifier characteristics arc oftell due to tciriperat,ure drift and aging, which

h a w very long time constants. After gathering a block of ~ ( I L ) and x(11) tla.ta samples.

tlic training branch (block A) can proress tlicl t1a.t:~ off-line. This lowers t,he processing

rrtll~ireuients of t,lic prctlistortioli s ~ ~ s t e ~ i i . Oiiw the 1x-ctlistortcr idcntificatioil algoritlmi

has co~iverged. t,lie new set of' parameters is plt~ggetl into tlie high speed predist,orter: this

(.an he readily irnpleineiitetl using applicatio~i-specifk integrat,ctl circuit,^ (ASICs) or field

prograniinable gat,? arr;tys (FPGAs).

2.3 Crest factor reduction

D I I ~ to the ~ia ture of' signal generatioil. rnTCDhlA. OFDhl. multi-carrier GShl, and ~riulti-

carrier EDGE signals have large peak-t,o-average-power ratios. The PAPR values set high

denia~ids for the linearity of the power ailiplifier: since it is tlesira.l)le for the PA to opemte in

its linear region, this leads to low power efficiency. Tlrr use of tle1il)erate ei~velope clipping

to digitally distort the signal, while still ma.intaining the signal quality at a sufficient level.

is a. siiiiplc ant1 practical way to decrea.se the PAPR. hloreovcr. the clipping reduced PAPR

gives rise to the possil)ility of utiliziiig tlic. dy~l;uriic~ 1 . i 1 1 1 ~ ~ of t l i ~ DAC inore efficieiitly.

2.3.1 Crest factor effect on power amplifiers

The tlcgice of tlic. slgiial's c~ivelope flnctl~ntioiis 15 oftcli iii~>as111f~1 I )Y t l i ~ tiest factor (CF).

Output

7

Input Power

12.3.2 Crest factor cifcct 011 digital- to-aiialog co~wcrtws

CHAPTER 2. BACKGROTJND

Figure 2.18: P o ~ w r ai~~plifier cfficienc~. vs output hack-off.

The relatioilship betweell tlir signal-to-noise ratio (SNR) and the word-lei~gtli. for a

q ~ ~ a n t i a e d signal. is coveretl ill most digital signal processing literature. For a real and

quantized signal, the SNR is given hy

where Nb denotes the nuinbcr of bits. In (2.28). a uniforinly distributed quantization error

over every quantization step is presupposed. When tlie sigiial is complex, the quantization

power will double, since tlic q::antization will occur iiideperideiitly in both the real and

imaginary signals. Consequently. the SNR will decrease by 3.01 dB. i.e.

SNR = 6.02iV/, + 1.76 - C'F[dB]. (2.29)

assuming that the yuantimtioii iioise~ is uniformly distribllted over the whole frequent 1' I~and.

froin zero to the Nyylust fieqllciicj, ( f , / 2 ) 111 orclci to hiid an ecluatioii for thc acljaceiit

c.liaiine1 power (ACP). tlic noisc i n ~ ~ s t he integrated ovei il frequeiicy band wit11 the hilllle

1)aiitlwidth as the signal (\IT) Therefore. we ohtaiii

CHAPTER 2. BACKG'ROCWD 3 3

Tlw CF c~tn he 1~11lcrd using various irirthotls. griiciallv. the CF is sapprcssrd at tlic

cxpeiise of the sigiial quality, i e. reduced SNR and incrcasetl ACP. Therefore. it should not

hr assumed that (2.29) a i d (2.30) will give precise results for the real case ~vheii clipping

is iiivolved. Instead. they show the general relationship 1)etwecn the CF and signal quality.

When the examination is confined to the quantization error and the CF is reduced. adequate

perforrnaiice (in terrris of both the SNR and ACP) call be ;~cliieved with a lower number of

bits [76].

Chapter 3

Piecewise Pre-equalized

Linearization

3.1 Introduction

Recently, there 1lw.s l~eeii iiicreasiiig importance placed on spect,ral efficiency in niolile com-

inunic:ations. Thus. tlie linearity and efficieiicv of radio frequency (RF) powcr amplifiers

(PAS) have beeii critical desigii issues for non-constant envelope digital inodulatioil sclleines.

whicli have high peak to average power ratio (PAPRs). R F PAS have nonlinearities, whidl

generate ainplitude nlotllllat.ion/a.~nplitude inodulatioi~ (AAl/AAl) and amplitude iiiodula-

tion/phase inodulatioi~ (AI\I/PI\I) distortions at. tlie o~ l tpu t of the PA. These effects create

spect,ral regrowth in the adjacent cllannels and in-hancl clist,ortion. which degrades the error

vector iriagnit~ic-le (EVLI). A tradeoff exists hetween linearit,y and efficiency; power efficiency

is very low when t l ~ c amplifier operates in it,s linear region and increases as the airiplificr is

driven irit,o it,s compression region. I11 order t,o enliailce both linearity and efficiency a t the

same tiii~e. o11e of tlic t-a.rio11s linearization tecliniqucs should he applied to ail effic%iriit R F

PA. For example. a Doherty power amplifier (DPA) call achieve higher efficieiicies tliaii tradi-

tiorla1 PA tlesigiis. alt ,lio~~gh a t the expeiise of linearity. Various linearizatioi~ te<:liiiiclues linvc

heell proposed iii tlic literature. such as feedback, frctl-forward and predistortioi~ [25. 381

The n~os t proinising liiicarization tccliiiiq~w is I)aseband digital predistortiol~. wliicl~ takes

ad~.i\l~tag(' of t l i ~ rocelit advances in digit,al signal processors. Digital prcdistn~tio~i adlicves

gooci liiwwrity wild ponrc.r efFicieuq, wit>ll iI reduced system coiriplexity n . 1 1 ~ ro l~~p; \ r r t l t o the

CHAPTER 3. PIECEII-ISE PRE-EQ UA LIZED LINEA RIZATION 3 5

\vidcly 11sed fved-forward linearization tecliiiique. Tlie software implementation of tlie digital

1xdistorter (PD) provides configurahility suitable for tlie inulti-standard environliients,

Through tlie combination of digital predistortion with t,lle aforementioned efficient DPA.

there is the potential to niaxiinize systein linearity and overall efficiency. However. inost

digital PDs presuppose that PAS have either no or weak nieniory [17. 48: 311. This is

impractical in wideband applications. where memory effects describe the output sigi~al as

a function of both current and past input signals. Tlie sources of PA iiieinory effects are

self-lieating of the active device (thermal memory effects) and frequency dependencies of

the active device. related to the matching networks or hias circuits (electrical inenlory

effects) [78]. As signal bandwidth increa.ses. the PA memory effects become significant and

will limit the performance of inemoryless digital PDs.

Various approaches have heen suggested for overcoining rneniory effects in digit,al PDs.

For electrical memory effects. a Volterra filter structure was use to compensate for the

ineinory effects. using an indirect learning algorithm. However. the number of optiiniza-

tion coefficients heconies iiicreasingly large as t,lie order increases [30]. This complexity

makes the Volterra filter 1)asetl PD extreir~ely difficult to iinplement in real hardware. Tlie

memory polynomial structure. which is a simplified versioi~ of the Volterra filter. has hccn

used t,o reduce the number of coefficients; liowevei., a large coinputational load is still re-

quired [41, 28, G . %]. Ill addition. a nieinory polynomial based P D suffers from a numerical

instabilit ,~ when higher order polynomial terms are included, since a matrix ii~versioii is

required for estimating the polynomial coefficients. In order to alleviate the numerical

instability associated with tlie traditional polyno~nials, an alternat,ive. yet equally coni-

plex structure based on orthogonal polynoinials has been used [64]. To f ~ ~ r t l i e r redl~ce tlie

coiriplexity (at the expense of the performance), a Hainlnerstein predistorter has \>eel1 pro-

posed 127. 29, 371. The Hanirnerstein predistorter consists of a finite impulse response (FIR)

filter or a linear time invariant (LTI) systein. followed by a memoryless polyi~oiriial PD. It

assuincls that tlie PA niodel follows a Wiener model structure. which consists of a uiernorjr-

less nonlinearity followed by a FIR filter or a.11 LTI system. Tliis iilipleii~ei~t~atioil restricts

tlie coiripensation of the Haininerstein str11ct1u.e to only ineinory effects coi~ii i~g from the

RF frequ~ncy i~esponse. If the R F frequency respolise is q l~i te flat, tlie Hainiriersteii~ P D

callnot correct for any otller ineinory effects. such as hias-ii~cluced or tl~errlial niciiiory ef-

fects [34]. A LIJT ha.setl approach which usctl enrdope filters for the niemory elfects was

proposed in [47]. Ho~vcvcr. 110 results ivorc7 sliowi~ and the method was for a iia.rrowlji~nd

CHAPTER 3. PIECEWISE PRE-EQUALIZED LINEARIZATION 3 6

pa.ging system: this implies t,liat it was ii~telidctl to conipeiisat,e for theririal iiicinory effects.

R.eccntly. a static LUT digital baseband PD cascaded with a sub-barid filteriiig block was

tieveloped: the systein combats gain and pllase variatiolis, whicli are due to PA temperature

cl~aiiges after an initial setting for the fixed LUT PD [35].

In this Chapter. we propose a piecewise pre-equalized LUT PD, whicli is a cascade of

a LUT PD and piecewise pre-equalizers. This approach may be considered as an extended

structure of the LUT hased Harnrnersteiii PD. which has only one equalizer. Our results

show that the proposed method is superior to the Haminerstein PD. Our approach has the

distinct advantage of simplicity and is easy to implement in real hardware. In Section 3.2,

the proposed piecewise pre-equalized LUT PD is described. The measurement based PA

behavioral model is presented in Section 3.3. The simulation results coinparing a memo-

ryless PD based on a LUT and the proposed PD wit,h meinor): are given in Section 3.4.

I11 Section 3.5. experimental results using th r proposed PD arc co i~~pared to alternative

strnct~lrcs. l~sing two WCDhIA carriers in tlic trst lwd. Lastl!.. Scction 3.6 evaluates tlie

complexity for the proposed approach and the irieinory polyiioiiiial.

3.2 The proposed piecewise pre-equalized based LUT PD

Fignrr 3.1 illustrates the structure of the piecewisc pre-equalized LUT based PD. The N by

K - 1 filter cwrfficieiits i11 the LUT are used to coinpel~sate for memory effects. where N is

the depth of the LUT and the FIR filter lias K taps (iiicluding TV(~(IPL(IT)~) wllicli is eqlial

to 1). Note that for an LUT hased Hamiricrstcin PD. N is equal to olie

Tlie pecewise pre-equalizers use a FIR filter rather than an infinite impulse response

(IIR) filtcr. duc to stability issues. The output of the pre-equalizers call be tl(wribed 11y

li- 1

wliew 1.1;"' ( 1 1 1 ( 7 1 ) 1 ) is tlic kt11 tap and rrbtli iiitlexcd coefficient corresponcling to the magliitucle

of tlic illput signal. 171,(ri) 1 , and F,,, is the ~iicworylcss LUT structurt.. ~vl~icli is i\ fu~ictioli of

1 ~ 0 1 - k)I. For aiialytical purposes. the iileiiioryless LUT (F,,,) stnictiirc rail tw replaced 1,y

CHAPTER 3. PIEC'EII%S'E PRE-EQ [JALIZED LINEARIZATION

CHAPTER 3. PIECEIVISE PRE-EQ LrA LIZED LINEARIZATION

the following polynoiiiial lnotlel

where 2 p - 1 is the polylomial order and b is a corriplex coefficient correspoiiding to the

polynomial order. hloreover, note that the tap coefficients and meinoryless LUT coefficients

(F,,,) depend on u ( r 1 ) and u(11 - k). respectively.

Therefore. the proposed model can be expressed using a polynomial equation by

where TYr(l u,(n) 1) is tlie kt11 tap coefficient with tlie rn th index t ~eing a function of (11 (i1)I.

Withol~t loss of generality. the piecewise pre-eql~alizers can he siniilarly defined using an It11

order polynoinial

where nlk., is the kt11 tap and It11 order coefficient. Figure 3.2 illustrates the correspoiidiiig

\,lock diagram of the piecewise pre-equalized PD when polynomial equations are utilized.

From Figures 3.1 and 3.2, it can easily be seen that (3.1) is equivalent to (3.4). For

illustration purposes. wc sct K=2. L=2. and P=2. in order to represent a third odd ordei

polvnoinial model of a nonliiiearity: we then expand (3.4) as follows:

The first tap coefficiei~t (I, = 0) in (3 1). wliicli is lrlo 1 + r~yl,~lu(n)12 in (3.5). call l,e

cmisideiecl equal to o i~e . tl1115. t l ~ c i~i~inorvless nonlinear it^ pretlistorter LUT F,, will 11ot

CHAPTER 3. PIECE WISE PRE-EQUA LIZED LINEARIZATION

Figure 3.2: Block diagram of tlie proposed P D with the LUT replaced by il polynoiriial cquat ioii

Clearly. (3.6) call lw considered as the predistort io~~ of a trunca,t,ed h l t e r r a . series model

for a power aniplifier. wl~ich is able t'o coinpeilsate f i~r iloiilinea.rit,y a.nd memory effect,s [%I: refer to Appendix A.

However. (3.6) is based on a polynomia.1 represeiitatioi~ of the proposed iriodel, in order

to deinonst'ra.tje tlie piecewise pre-equalized LUT P D irieiriorv coinpensatio~i. Sirnilar to t,Ile

Volterra series, the polynomial representatioii requires too inany coniplex multiplications.

The c:oinplexity is reduced when a piecewise pre-equalized LUT P D based a.pproacli. as

shown in Figure 3.1, is utilized.

Figure 3.3 present,^ a graphical explaaatio~i of the pieccwise pre-equalized LUT PD.

A typical memoryless predist,orter response is sllowri in Figure 3.3(a), wldc Figure 3.3(b)

tlernonstrates the Ilyst,eresis created by t,he piecewise pre-equalizers divided into N pieces.

Since tlie hysteresis of tlie power a.mplifier is not necessilrily uniformly distributed over

the whole input ~riag~iitude range. we propose t,hc piecewise prc-equalizers. The c,ascadc

of 3.3(a) a i d 3.3(1)) results in t'lie piecewise pre-eq~~alized LUT based P D as represented

i l l Figure 3.3(c). Figure 3.3((1) sliows the respoiise of a typical power a.inplifitr respoilst.

and Figure 3.3(b) results in the piecewise pre-equalized LUT Imsed PD: a.s represent,etl in

Figure 3.3(c). Fignre 3.3((1) sliows t,he response of' a typival ponw amplifier response wit11

memory. Tlie tlesird liwar response is acliieved after Fig~lre 3.3(c) and Figure 3.3(d) an.

CHAPTER 3. PIECELVISE PR E-EQ UALIZED LINEARIZATION

Figure 3 3: Piecewise pre-eqnalizecl LUT PD graphical expressions: (a) coniplex gain atl- juster response. (b) piecewise equalizer response, (c) response of the cascaded complex gaili adjuster and piecewise equalizers. (d) power amplifier response. and (e) desired rcspoilsc from (c) mtl (d).

CHAPTER 3. PIECE\\'ISE PRE-EQUALIZED LINEARIZATION

3.3 The proposed predistorter algorithm

Cavers studied the optimal addressing of the LUT and showed that addressing via a uni-

form quantization achieves near optimal performance[20]. Therefore, we applied the linear

magnitude addressing methocl for the LUT indexing as follows:

~ r t = rouirc1(1u(n) 1 . N), (3.7)

where round(.) returns the nearest ~nteger ~iumher. which IS the index (m) . a i d iV is

the LUT size. As sliown in (3.1). the digital complex baseband input signal s m p l e s are

ml~ltiplied prior to prr-equalization. by complcx coeffic~ents drawn from LUT entries

where F,, (Ju(11) 1 ) is the complex cotffic~ent t ol responti~ng to an ~ n p u t signal ~ i i d p ~ i ~ t ~ ~ d ~ .

used f o ~ compensating AhI/AhI and AhIlPhI PA distortions.

After tlle digital-to-analog conversio~i of ~ ( 1 1 ) . this signal IS: a) up-conve~trtl to RF. 1))

an~phfied hy the PA gt~ieratmg distortions. c) attenuatrd. d) down-converted to hc~sc~l)a~id.

and e) converted from analog-to-thgital and applied to tlle delay estimation algo11tl1111 The

fecdback s~gnal. i e the delayed PA output, y (n - A ) can b r described by

where G(.) and a(.) are AhI/AhI and AhI/PhI PA distortions. respectively. m t l A 15 the

feedback loop delay. For estimating A. a correlatio~i technique was applied as follou~5.

wlie~e d is the delay va~iable and N is tlie ldock slze t o co~relatcl Aftel tlic delaj ~ ' s t i l i ld t~o~i

tlie memory-less LUT c orfficirnts call hc (1etc1 11il11tt1 11s11ig the least lwali sql~aic (LhIS)

nlgor~tlinl w~t l i ~ricl~rcc t ltari1111g (refcr to F ~ g l u e 3 4) [30]

where 12 is tlie iteration n ~ ~ ~ r i b e r , /I, is tlit stability factor. ant1 e (n ) is : c ( n ) -!/(I/ ) F,,, ( I . ~ . ( I I ) 1 ) . Not.c that tho addrwsiug generated for (3.7) (,ail rc~l~scrl for indexing ,y(r r ) . \1'11id1 is il

CHAPTER 3. PIECE WISE PRE-EQ UALIZED LINEARIZATION

Figure 3.4: The indirect learning algorithm for the predistorter of the power amplifier.

distorted signal and can coinpouiltl errors tluc to incorrect indexing. The samples. .c(n) .

slloilltl bypass 1)y thc piecewise pre-equalizers tli~ring this procethlrc>. After coIivergriicr of

the indirect 1ea.rning LMS algorithm. the equalizers a.re activated.

An indirect learning inetllod with the LhlS algorithm lias also becii usctl to ada.pt the

piecewise filter coefficients. The input of the rriultiple eqnalizers ill the feedback path.

written in vector format. is

Y F I ( ~ ~ ) = [ Y F ( ~ ~ ) yF(77.-1) . . . ~ ~ ( 7 7 - K f l)], (3.12)

where yl;.(n) is the post-LUT output, i.e. F,,, (ly ( 7 1 ) 1 ) . Therefore, the multiple FIR filter

outputs. yFO(/7), can be derived in vector format using the followi~ig equations:

yPo(n) = W"' . y F ~ ( r ~ ) T . (3.13)

wliere ( ) I is tlie transpose operator.

Atlaptatioii of the. pre-eq~ializcrs' tap cocfficic~nts arr obtainrtl as follows:

where ( . ( I / ) is thr error. signal between z(u) ;\rid ~ ~ ~ . ~ ( n ) . /L is tlie step siar ;uid ( ) * denotes

the co i i ip l (~ coiljugate.

CHAPTER 3. PIECE l171SE PRE-EQ UALIZED LINEARIZATION 43

where a is the coefficient colulnri vector, e ( n ) is the error signal defined bj'

~ ( 7 % ) is the row vector equal to [y (n) , y (n) Iy(n) l . . . ., ~ ( 7 % - 1). y(iz - l ) ( y ( l ~ - 1)I.. . .]. K ( n )

is the gain vector defined by

X is the forgettiiig factor, ( ) * represe~its the coniplex corijugate. ant1 P ( n ) is ~lptlated ac-

cording to P I - 1) - K ( v ) . y' (71) . P(71 - 1)

P ( n ) = X

(3.19)

3.4 PA behavioral modeling

111 order t,o silnulate the perforrnarice of the proposed PD in IbIATLAB. behavioral modeling

l~ased on t h t \ ~loinain ~neasureincnt samples was first carried out. Ainong the PA models.

t , h ~ siinplrst truncat,ed Volterra. model is the dia,gonal Volterra model, termed memory poly-

iioinial inoclel. ill which all off-diagonal terms are zero. This conditioii drast,ic,ally reduces

tlie nuinber of nod el parameters to he estimated. However, \vliril tlie off-tliagoiial terms

are inore important than the diagonal t'errris: there are sigiiificaiit consequences. which de-

creases the model's reliability. In these case, the condition shoiild bc rclaxtd to include

11cw-diagonal terms.

Therefore. the selected l~ehavioral model was based on tlic trliiicirtcd Voltcmx model [85]

;1s follows:

RF input

MHL21336 MRF21010 RF ourpul

LAN

CHAPTER 3. PIECEIVISE PRE-EQ l iA LIZED LINEARIZATION 4 5

The signal was ~~p loaded to an Agileilt electioilic signal generator (ESG) (iiiotlel 4438C')

through a local area network (LAN) cable. The RF signal generated hy the ESG is applied to

the DPA: the o~ l tpu t of the DPA 1s then fed into a single channel vector sigiial analyzer (VSA)

(niotlel 89641A) after attenuation. The normalization and synchronization are perforirled,

in order to compare the complex envelope at both the input and output of the DPA

Thirty-thousand time donlain data samples, froin the input and output of the DPA.

were ilsed to constiuct the behavioral model of the truncated Volterra series. The seveiith

order truncated Voltcrra series PA model, with a memory length of four. was constructed

anti extracted using in-house software iiriplernented in A/IATLAB. The extracted behavioral

model had -44 1 dB of normalized mean square error (NAISE). defined as

N A I S E [ d B ] = 10 log,,, CrL I ~ m e a s ( ~ 1 ) - ~ m o d 1 ~

X I , I~mc.crn l 2 wheie y,,,,,, and y,noc, are the measured and niodeled dut,\ samples. respectivelv Figures 3.7

m r l 3.8 show the time dolllain irs111ts fo1 tliv il~-pli~jse (1) i~rid quxlrature (Q) coinponelits.

~espectively, of the truncated Volterra sei 1c.s brliaviural imdel. The frequent-v tlomain resillt s

of the behavioral model are shown in Figwe 3.9. C'learlv, it call 11e seen that behavioral

inodel inatches the ineasureinent data ill lmtli thc tinic and frequeucv doir~ains.

3.5 Simulation results

Based oli the behavioral model coi~st~rilctrd in Section 3.4. wc 11a.ve simulated four types

of PDs: 1) a meinoryless LUT PD. 2) a. Hairlinersteiii PD, 3) the proposed piecewise pre-

equalized PD, a.iid 4) a memory polynoniial PD. Tlie xljacelit cliannel leakage ratio (ACLR.)

pcrforinances are compared.

Tlie simulations for the aforernent,ioiied PDs were performed in AIATLAB. based on the

behavioral model for t,he PA. The LUT size wa.s fixed at 128 entries for all siinulations: tallis

size is w coinpronlise bet,weeii quantizatioii effects aiitl mcinory size. First,. ail eight tone

sigrml with 500 k H z spacing. 9.03 dB of PAR and 4 J I H i bantluritltli. wllicll is comparable

to a \j-CDAlA signal, was used for verif>.iiig tlio proposed inethod. Figures 3.10 wild 3.11

sliow the imults before and aft'er liiieaiizatioii of the LUT P D and of tllc LUT Haniiiierstcin

PD. respectively. Tlie Hammersteiii PI2 cletcriorates the perfol~ri;~iice above 10 M H z and

iiriproves it witllili a 10 i\Hz balidwitltll. Note tl1a.t the Haiiilnerstciii P D hvitli LUT Ivas

iiot able t'o coinpelisate for the inenlory t:ffccts. I f the R F frtqllcncy res1)onse in tlit iriaiii

-0.8 A . . L - - . -- . - J 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800

Sample lndex (n)

-0 8 - -- .- - - 3300 3350 3400 3450 3500 3550 3600 3650 3700 3750 3800

Sample lndex (n)

0.8

0 6

- - -- -

Modeled

Measured !

-5 0 5 Frequency (MHz!

PS

D [d

BIH

z)

PS

D (d

BIH

z)

Frequency (MHz)

17igrlrc> :). 1.1: I , i~ l ( ' i \~' i~i l t i o ~ ~ : ( i l ) \ v i t l ~ o ~ ~ l 1'1). ( 1 ) ) 1,11'1' 1'1). (( ' ) I - l i ~ ~ ~ l ~ l i ( ~ ~ . s t ( ~ i ~ l 1'L) \\\.i 1 1 11 r)-1;\1)

FIR filter. ((1) ~)roposcvl pic~cmvisc~ ~)rc~-c~c~r~i~lizc.(I I'D wit11 2 taps. ;11i(l (c) ~ l ~ c n l o r \ . 1)o1\.11011lii\l

1'1) 01' 5tli ot,(k11, \ \ . i t 1 1 2 t ~ ~ ~ ~ i i o l , \ . t.(11,11ts.

Af't S ~ I I I I I ~ : I ~ ~ I I ~ :i11(I w l . i l j . i l i g f l i ~ .\( 'I,1( ~ ) ( ~ l , f o i . ~ ~ l i l ~ ~ ( , c ~ 01' 1 11(> 1)1 ,01)os (v l 1'17 i l l 31.-\TL.-\I!

( l ) i i ~ ( ~ l 011 l ) ( ~ l ~ i \ \ ~ i o ~ ~ ~ \ l 1',4 1110( l (> l ) . i l l1 ( ~ s 1 w i ~ i l 1 1 v i 1 t \ I , : I ,~ ~ ) ( ! s ~ o I ' I I I ( Y ~ I I ~ ~ I I ~ iI1(1 > \ ( , I 11;ll 11P.A

i l l 0111, I (.st I ) ( : I I ( ' ~ I . 'rl~c o s l ) c l . i u i w t id 5(>1-111) 1 1 ~ ~ 1 1 o ( ' \ ' i \ l \ l i \ l ( ' 1 \ . i l l . i 0 1 1 ~ 1 '1) ~ ) ( ' ~ . L ' o ~ . I ~ I ; ~ ~ I ( T s

is s i ~ ~ ~ i l i \ r to t I I V tcst l w t l i r i F i g l w :3.5. 1101u~vc~. \ ~ i t l ~ o ~ l t t l ~c : s w i t t , l i . T1111 t r i \ l i s ~ l i i t t c r pro-

l o t ~ - l ) o ( m ~ i s i s t s of' ; i l l ESC;. n-Iii(~li 11:)s t \ v o (1igit;rI t o i111;110g ( Y ) I ~ \ Y ~ ~ I ( X ~ S (1)AC's) : t ~ i ( l a11 I{F

1~1)-(.01i\.(~rto1.. : \ l o ~ i g wit 11 t l i c 1'A. T l i c rc,c,c4vc,r is c .o l i i l ) i . i sc : t l o f a11 1tl: t l o \ \ - ~ ~ - c o ~ i \ . c ~ r t ( ~ r . :I l i i g l i

S ~ X Y Y I i ~ ~ i i \ l o g 1.0 (ligital ~ 0 1 i ~ ~ r t ~ r . t111~l i l (liy,it i l l ( I o \ v I ~ - ( ~ o I ~ \ ~ ( : I . ~ ( ; I ~ . T l i i s rwvi\.vr ~ ) Y O ~ O ~ J - ~ ) V ('k111

I ) ( , ( x ) ~ ~ s ~ I ~ I I c ~ ( Y ~ I)!' it VSA. F o ~ t l l c I10s t IIS1'. it 1 ) 0 1 ~ ) 1 l i \ l ( X ) I I I I ) \ I I ('1. (PC) \\'it11 AILITLAB ; \ ~ i t l

L \ g i l c l l t 's A ~ \ X I I ( Y V I 1ksig11 S > . s t ( w l (ADS) \ v a s I I S ( V I l i ) r l)ot 11 t ( l ( > l ; i ~ ~ ( . o 1 1 1 ~ ) ( 1 1 i s i t t i o 1 1 : t l ~ c l

~ ) ~ m l i b t ort i o i i i \ l g o i . i t ~ l ~ i ~ i . K)r t I I V ~ l ~ c ~ ; r s t ~ ~ ~ c ~ ~ l ~ c ~ t i t 5 . t \YO ( I o \ \ . i ~ l i i ~ l i \ \ - C I I > A I i \ c , i \ r l ~ i c ~ r s \ \ Y > w ~ i s c ~ l

i i h t 110 ii11)1iI t ( \ s t s i g i ~ : \ l . i l l O I X I ( : ~ ~ 1 0 \.ol,if;\. 1 1 1 0 C O I I I I N > ~ I S ; \ ~ i o 1 1 ~ ) o ~ ~ l ' o ~ ~ ~ ~ i ~ i ~ ~ ( ~ ( ~ of' t11v ( 1 i f f ' ~ u ? i i t

I ' h : 1 l i t 1 t ( % l ~ i ! < ~ i i \ l I i i l ( I (i 1 J ) ~ ' [ ' I ~ s 01' F l ' ( ' ~ t h l ( ) ( l ( > l 1 . \ \ . l ~ i ( , l l I I i \ ( I :),84 .\I('// / / I , ~ / . s ;\11(1 0.8 //J!?

0 1 ' i l ( , I , ( > , ~ I l ' i\( '101,. ,-\I1 of ~ I I V 1'1) c . o c , f t i c , i c ' ~ ~ t . i \\.(TO itl( '11l i f i o t l I)!. ;\11 i ~ ~ ( l i l . ( ' ( , l l ( l i l ~ , l l i ~ ~ g ;ilgo~,il 11111.

\ \ . l ~ i ( . l \ is c o i ~ s i ( l ( ~ i , ( ~ ( l to t i 1 1 \ . ( \ 1 w ~ ~ ~ o ( l ~ ~ l i ~ ~ g 01' t II(! 1 'A, D 1 1 r i i 1 ~ I 110 ~ . t ~ ~ ~ i l i ( ~ i i t i o11 ~ ) I , O ~ O S S .

t l1 ( ' l O l l o \ \ . i ~ ~ g \\,(>i.(> I I S O ( I : i \ ) ; l 'Ir)(i-(>11t1.\. l , l ' F I ' . 1 ) ) il 5 I i \ l ) F I R I i l t ( 1 l I 'OI. I l ; l l l 1 l l l ( ~ l ~ s t ( ~ i 1 1 I'D. C )

1 l l ( \ ~ ) Y O I ) O S ( V I ~ ) ~ O W \ V ~ S ( \ l ) ~ ( ~ - ( ~ ( [ l l L \ l i ~ ( ~ [ l 1'1) ({sit 11 2 1 i l l ) $ ) . i t l l ( I ( 1 ) ; I :)I 11 o l ' ( l ( l l ' . 2 (IOIi\> ' 1 1 1 ~ ~ 1 1 1 0 ~ J ~

l ) o l ~ ~ i ~ o t ~ ~ i i r l . 'l'11(\ \?;\111(: for tllc 11111ilI)(~r o f t i \ l ) ~ \\-il> o l ) t i ~ ~ i i n \ ( l ~ i s i ~ i g s ( ~ \ . ~ r a l l i ~ ( ~ i ~ s ~ i r ( ~ l ~ ~ ( ~ ~ i t s ,

I:ig~~r(x :j. 15 ~ I I o \ \ , s t h~ l i ~ l ( ; a r i ~ i r t i o ~ ~ 1 ) ( > r S o l ~ l i 1 : \ 1 i ( ~ o l'or ('i1('11 of t ( l i I ~ v r ( m ~ 1'1)s. T l i ( \ ilC'IAI{

c . i \ 1 ( . 1 l h l i o l i > \ I 1 1 1 ~ o ~ l t l ) ~ l t oi' the. ~ ) l ' o t o l y l ) c ' 1 r a ~ l s l r i i l l c ' ~ \v;\s ] ) o l ~ f o l ~ l i c ~ l i \ t i r ~ ~ ( Y ~ I W I I C ! - offs(?t

(5 -\IN 1 i l l l ( I -5 .\I 11.3) f'l.0111 t 1 1 0 ('('llt('1' f l .O(l l l (~ll( 'J . . 'I,ll \ . ; \ l l lCs ;\1'(. 511111111il~i%O(l i l l

.I';~l)l(l ri.2. For t11c t r t \ ~ i s ~ ~ i i t t c r wit11 t lw I ~ ~ ~ I I I I ~ I I ( > I . S ~ ( > ~ I I PI) c o 1 1 1 1 ) 1 k ( v I 01' il 5 ta1) FII< fiIt(1r.

I I K , I( '],I{ is : ~ l ) l ) ~ ~ o x i ~ ~ ~ : ~ t ( ~ l ~ . I (111 Ix>t t(!r t I I ; I I I t I I ( \ Id l IT P D 011 t I I ~ ) J N ~ I ~ , I ~ ' l . I ~ (: L \ I I l z

f ) 1 i l l 1 I ! l o s i 1 1 1 1 1 1 I 1 1 0 0 1 ' 1 ( -5 . O f 1 . 7'11('

~ ) ~ ' O ] ) O ~ ( Y I 1'1.1 i111(l I110 5 t l l O I ' ( I ( > ~ , , 2 I I I ( ~ I I L O I . \ , ~ ) o l ~ ~ ~ ~ o ~ i ~ i i ~ l PU o x l i i l ) i t ( ~ ( l ~ i ~ l l i l i l l ~ C O ~ I ~ ~ ) ( > I ~ S ; I -

t i o ~ i ~ ) ( ~ I ~ I ' ~ I , ~ I I ~ I ~ I ( , ( ~ , ~ : t l ~ o ~ , ~ I I I ~ ) ~ ) I ~ I t 1 1 ~ :\['l,l< I ) \ . i ~ l ) l ) i ~ o x i i ~ i : ~ t ( ~ l \ . I (111 ; i l ~ ( l (i (111 ~ I I O W ~ ~ I : \ I I

l ) O t l l 1 l l l 1 ~ ~ ; l l l l l l l ( ' l ' ~ ~ ( ' i l l i l l l ( 1 111( '11101' \~1~'h.~ l , lT ' I ' 1'1)s. 1'01' t l l ( ' 10\\'('1' i t l l c I I l l ) [ )c ' l ' . \ ( ' I , I ! \ ' i l l l l ( ' ~ .

~ . o s l ) ( ~ t i \ x l l y

90 I- I -- - -

2125 2130 2135 2110 2145 2150 2155 Frequercy ( M H z )

' l ' i 1 1 ) I ~ :).'L: S111iitt1;11.\. 01' I l l ( ' ;\( '1,Il I i i ( ' i l h l 1 l . ( ~ l i 1 ( ' l i t ~ 101. I lit' ( l i l l ' ( ~ i ~ ( ~ l i t I 'J)h. . -- .-

PI1 ' 1 q ) v . , ' I ( I ) AC'I,IZ (Uppel.) ?do I ) ] ? -;3.7. l(11h -;W. l ( l J h

CHA4PTER 3. PIECE \VISE PRE-EQ UA LIZED LINEA RIZATIOIL' 53

Trlljle 3.3 Coiilplesit\- estimation of the pi oposrtl pieccwise pre-eqiializetl PD

hlethocl Operation No. Operatioils LUT PD olttput ADD/SUB 2

MPY 4 hleinory size(LUT) 2N

1 Iteratioil ADD/SUB 4L + 10 ~ I P Y 4 ~ + 12

hlemory size 2N + 2 N L Filtering ADD/SUB 4L - 2

n IPY 4 ~ h Iemory size 2 N L

Tot a1 Operations ADD/SIJB 8L + 10 hIPY 8L + 16

hIemory sizc 4N + 4 N L

3.7 Complexity evaluation

The complexity of the digital prrdistortion algorithm is a crucial problem. Hence. tlic coni-

plexity of both the proposed and memory polynoinial iiietliotls are evaluated. Note t h t t lir

coinplexity calculatioiis iicy,lcct tllc LUT readings, writings. indexing, and calculations of

the square root (SQRT) of th t signal inagnitudc. These values are ~ieglected siilcc tlic LlJT

indexing depends on both the neth hods and the variable; for example, the inagnitude. loga-

rit hin, power. and SQRT operat ions can be i~npleinciited in different ways. Therefor(.. t lit.

coinplexity is only estiirmtetl b\. counting the iiuinbrr of additions. subtractions, and ml~lti-

plications per input sample Iii order to consider a real hardware implementation. coniplcx

operations are roiivertetl into 1.eil1 operations: memory size is also considered. For exainple.

one complex multiplication requires two real additions and four real multiplicatioiis. If !Y is the number of LUT ~ntr ics . the memory size required is 2N ( I k Q LUTs).

3.7.1 The piecewise pre-equalized based LUT PD

Table 3.3 gives the complexity of the proposed piece~~isc pre-tvll~wliztcl based LUT PD. h i ,

N eiitries aald L coefficients pcr filter. If the LUT 11as 256 cnt,ries and the filters ha\.(. 2

taps. the P D requires 26 real wdtlitions (subtra,ctioiis). 32 iri~iItiplicat,ioris per saiiiplc.

a i d a niemory size of 3070. 011r proposed PD require\ tho same number of additions aiitl

i ~ i ~ ~ l t i p l i ~ a t i o ~ i s as the tral i t ioi~al Hammerstein PD. l111t i.eqltircs iriorr memory

CHAPTER 3. PIECEIVISE PRE-EQ U A LIZED LINEA RIZA4T10hT

Tal)lc 3.4: Coiiiplexity cstiinntioii of tlir iilciimry polynomial PD.

AIetllocl O ~ e r i~ t 1011 ' No. O~era t ions P D output ADD/SUB 4 0 - 2

MPY 6 0 - 2 ( K + 1) Memory size 2 0

1 Iteration ADD/SUB 6 0 2 + 2 0 + 2 AIPY 1 6 0 2 + 1 2 0 - 4

hlemory size 2 0 Total Operations ADD/SUB 6 0 2 + 6 0

hIPY 1 6 0 2 + 180 - TZK - 6 Memory size 4 0

3.7.2 The memory polynomial PD

For the nieinory polynomial method using an RLS illdirect lcarning algoritliiri [30], t , l ~

nuirlber of aritllrrletic operations a,re given in Tahlc 3.4. where 0 is equal t'o P ( K + 1). For

exainple. for P = 5 and A- = 1) it requires 660 real atldit,ioils (sul)tract,ions). 1772 real

inultiplicat~ioiis per sainple. and a meinory sizc of 40. In addition, the Ineirior!, polynoinial

P D iieetls onc real division. But it. can 11c rclrio\-etl clepeirtling on tlw algorithms. The

memory polynoinial P D requires a.round 50 tilrics more real ~riultiplicat~ioiis per sample,

wheu coinpared to t'he proposed PD. Thereforr, the proposed lrlethod offers a significant

reduct,ioii in coinplexity. In addition, the iiuinhei. of r e d ~nultiplicat.ions for the memory

polynoiriiill inethod grows a,s the squa.re power of t,lic. polynomial order alitl incmory lengtli

increase.

3.8 Conclusions

The piecewisc pre-equalized LUT based digital predistortioii \va,s described. sini~ilat~ed. 1iieil.-

slued niitl coinpared with the different P D stri~ctllrcs. A AIATLAB l ~ s r t l l)eliaviora,l model

of t,hc PA was coiistruct.ed. ~lsing t'inie doiriaili 111ca~ureinent for a 300-CV PEP DPA i l l oilr

test I-)encli.Thr results showed that a cor1wt'ion c:ilp~l)ilitj. siiriilar to thc iririnory polyiioinial

P D \vas acliievrtl. 111 addition. the proposetl PD pc~~~f'orinancc is sl~perior to the conrwitio~i;il

Hammrrsteiii appro;~l i . whicli has a. limited c~q)i\ l) i l i t~~, wheii eight tones wit'll 500 k H z t o i ~ c

spacing and a siiigle MTCDhIA carrier (nit11 :3.84 IUHZ signal I~aiitluridt~h) are enrployed.

The prolmwtl nietliod and the various PDs were expcri~r~cntally vcrificd using ail actual

CHAPTER 3. PIECETT71SE PRE-EQUALIZED LII\'EARIZATIOIL' 5 5

DPA i11 the same test 1)ecl. Whcii two U'CDhIA carriers were applied. approxiniatel!, 4

dB of additioiial cori.ectioii was acliieved. compared to the conventional Haninierstein PD.

Moreover. the complexity of t,he proposed and the memory polynoinial iiietliocls were es-

tima.ted and compared. The proposed piecewise pre-equalized P D was fo~intl to perform

equivalently to a memory polynomial P D and was significantly less complex. The effectilre-

ness of the piecewise pre-equalized LUT approach for compensating frequency dependent,

menlory effects was demonstrated in both simulations and measurements. In the futilre. t,he

proposed method can be extended to correct long time constant memory effects. generated

from the self heating of the transistors.

Chapter 4

Digital Baseband Derived RF

Predistort ion

4.1 Introduction

Reliable mobile comniunicatioii services rely oil clean and consistent transinissioii f'roin base

stations! under widely a l d rapidly changiiig conclitions. The ra.dio frequency (RF) I)owcr

amplifiers (PA) of the wireless cornmunicatioii system's base station have been t,he most crit-

ical and costly component. This is due to the strillgelit requirements on spect,ruin e~iiissions

and transmitter power efficiency. Recent, advances in digital signal processors has allowed

digital baseband predist,ort,ioii to be successfully utilized and meet the various specifications.

Baseband predistortioii requires tlie entire transmit path t,o be several times wider tlian

the signal bandwidth, i11 order to compensate for the predistorted input. This wideband

transmit. path demands a very accurat,e and fast digital-to-analog convert,er (DAC) [17].

Moreover, as tlie bandwidth of the input signal increasrs to accomiriodate multiple carriers.

tlie processor speed rquireirient of the hascf)antl pretlistortion system heconles issut..

Figure 4.1 illustrates t,licse concerns. The ii;xrrow 11pt:onverter handwidtli of' t l i ~ IIF c w

velope digital predist,ortrr is offset by the clisatlvaiitages of tlie additional co~~ipoiic~iits: for

example, ail additional aiii~log-to-digit:ll-(~oiivc'rter (ADC). an accurat ,~ cnr:clopc cl('tc't.tor.

a i d a costly large RF tlclay line [82] (refer to Figure 4.2).

CHAPTER 4. DIGITAL BASEBALND DERIVED RF PREDISTORTION

CHAPTER 4. DIGITAL BASEBAND DERIVED RF PREDISTORTION

CHAPTER 4. DIGITAL BASEBAND DERIVED RF PREDISTORTION 5 9

4.2 Digital baseband derived RF predistortion architecture

Tlie block diagram of tlie proposed systciii is ~ l i o w i ~ i l l Figure 4.3. Tlie prcdistortion func-

tion. F , is generated by a vector inoddator and derivetl at baseband. liowcver. it is applied

at RF. Tlie input signal is indexed bv an iiistantarieous magnitude calculation. i11 order to

determine tlie proper correction coefficients from the lookup table. The DAC in the main

signal path should have at least twice the signal bandwidth. A baseband digital delay is able

to compensate for the difference. ra. between the predistorting path and the niaiii trans-

mit path. A delay calibration procedure is required to compensate for the delay inismatcli

between the two signal paths.

4.3 Delay effects and calibration

To observe the delay inismatcll effects with respect t o the svstem performance. let tlic RF

input. . c ( t ) . coiisist of two toiles. wit11 w toiic spacing of (J? - dl) aiitl equal aiiiplitlitlv A as

follows: 1 ( t ) = -4 c.os(dlt) + A c o s ( q t )

The predistortion function, F. wit11 a delay inismatcli (q!) between the two paths. can be

wlltrc ?(t) is the envelope of tlie input signal. ( 1 7 arc7 tlic coiriplex coefficieiit,~. T,! is tlie

tlclay mismat~ch. aiid A lias 1)eeii norirdized to unity. Note that (4.2) denioiistratts tliat

the predistortion fiiiictioii requires twice tlir ri~vclope frequency, in order to coiiipeiisate for

1111 to fifth order inter-modulation tlistortioiis (IhIDs). The predistortetl iiipl~t signal. .r,,,{(t).

C H A P T E R 4. DIGITAL BASEBAND DERIVED RF PREDISTORTION


( d l 1 t 11e11 I ) r (lrrl\wl as

-rpd(t) =7( t )F( t - 7d)

= b l [ c0s (d l f ) + ~ 0 b ( d ~ t ) ]

t bj[cos(wlt + (w2 - w1)rd) + cos(ul~t - (w2 - d ~ ) ~ d ) ]

+ b3 C 0 5 ( ( 2 ~ 1 - w2)t + (w2 - w l ) ~ d )

+ blcos ((2w2 - wI)t - (w2 - wl)rd)

+ b5 cos ((2wl - w2)t + 2(wr - wl)rd)

+ b5cos ((2w2 - wl)t - 2(w2 - wl)rd)

+ b g COY ( ( 3 ~ 1 - 2 ~ 2 ) t + 2 ( ~ 2 - W I ) T ~ )

+ b5 cos ((3d2 - 2wl)t - 2(w2 - dl)rd).

where the b, are complex corfficiriits Clearly, the various IhlDs of tllr prrdlstortlon functioii

havr magnitudes ant1 pliascs ~vhich are dependent on r d . Note that thc delay niislnatcli will

cause additional nirnioi J, eiicc-t 5

Fol simplicity. wc sssunic the delay is perfrctlv iriattlrtcl aritl only IhIDs up to thc 3rd

order ,\re considerrtl. IhlD callcellation performancr (If\IDc.) tor A 3rd order IhID (IhI3) cnli

he ~epresentrd using tlir vector suinniation depicted ~n Figilre 4 4. it can then h r expressed

as the followlllg ratio

where f? denotes phase niislnatcli.

If perfect IM3 cancellatioii is assumed, i.e. lIf\f3prjl is cq~lal t,o lIAf3P.4( and H is

zero. I i \IDc goes to negative infinity. In addition. JIA13rnl and / I11 13p.4 1 are out-of-pliasr.

However. d i ~ e to the delay niisinatch. the phase mismat~cll is 110 longer zero. I11 fact. it is

tlepei~cleiit oil T,{ ant1 thv t~vo toile spaciiig, a.s shown ill (4.3). C'oi~sitlrriilg only up to 3rtl

order polynomial fluictious. i.c. tlirrc are no 5th order IhlD coiiipoiiciit~s (c5 = 0) . thcw tI1(1

upper In13 coinpoi-rciit phase. tlecr~asrs 11y (d:, - wl)r,, aiid t,lic~ lowr IN3 coiripoiiriit pliasr

i11c:reilscs by an equal ailioiu~t. ' r l~ i s iricans that a phase i ~ ~ i s i ~ ~ i \ t ( . l ~ is caused. resi~lt i l~g i l l ;I

pt\rforniaiice tlegradatioi~ at tlic output of the systeiil.

Usiiig (4.1). the influcwcc of t l i ~ IN3 cancellat,ioi~ pelfor~~iancc oil the phase error rc9-

sultiiig fl-oin delay nlisiriatc~li can IM. plotted; refer to Figi11.t' 4.5. Ii~iposiiig the coiiditioii

CHAPTER 4. DIG'IT.4L BASEBAND DERIVED H F PREDISTORTIOAT

Figurc 4.4: Representation of 1-cc to~ sliininatioii.


Figwe 4.5: Ik13 callcellation perfoririancc as a furictioli o f T,,.

digital input I -- - 4 'dl I I

I Step 1 1

. - - - . . -- Step 2

4.4 Experimental results

I File O~erat ion Status. C:\TRRCE126.CSV file deleted 1

-100 - - _. __ L - - - 1. --- -

2 125 2 13 2 135 2 14 2 145 2 15 2 155 Frequency (Hz) x 1 0

.')t 47 ( / I ! ~ T T / O f I Il(' i l V ( ~ 1 ' : l ~ C O l l I l ) \ l l l)O\V(!l'. t I l ( ' -4(;I41< i l ( t I l ( ' 5 I II Z C'f ' l l~Ol ' f l ' ( Y ~ l l ( ' l l ( ' ~ ~ OII'SOI

t \ ~ ) ~ ) r o s i ~ ~ ~ ; \ t ( ~ l ~ ~ -30 d / 3 r 1 ) t ~ f ' o r ~ l i l ~ t ~ i \ l , i ~ ; ~ t i o ~ ~ : i1Slv1, l i l i ( ~ ; \ l ~ i x ; ~ t i o ~ i . i t ; \ ~ ) ~ ) ~ ~ o s i ~ i ~ ; ~ l ( ~ l ~ ~

- 4 5 ( I l l ( : f 'ol , 1 I I ( T - S ~ ~ I I C ~ I I ~ ( \ 01' t l i t > (ligitk11 l ) ~ w I i . ~ i o r t i o l i s ~ , s t , ( ~ 1 1 1 .

T11c ( I ~ l i ~ y ( I C ~ ) ( : I I ( ~ ( ! I I C Y > ~ ) ~ ! K ~ ( ) ~ I I I ~ ~ I I ( ' ( , S >\l.t\ giv(w i l l F ' I ~ I I W 4.11. A OII(: S ~ I I I I I ) I ( > (26 11 ,s )

i l ( l ~ i l l l ( X ' ? I l l d Oil(' ~ i l l l 1 1 ) I t ' t I(?Ii lJ ' ( l ( > ~ l ' i l ( l ( Y I l l ( ' s J . ~ t ( ' l l l ~ ~ ( ~ l ' ~ ~ ~ ~ l l l i ~ 1 1 ~ ~ ~ ~ I)!' k l ~ ) ~ ~ l ' O ~ i 1 1 l i l ~ ( ~ ~ J ~ 1 1 0 10

(/I?. 111 t 1 1 ~ p ~ ~ o ] ) o s ( ~ l S J , S ~ ( ~ I I I . t I I ( ~ ( l ( \ l ; \ y ( , > I I I I N > ~ ) ( ~ l ~ l ' i ~ - l 1 ~ . 111i1t C I I ~ Y I ~ . i i \ a ( l i g i t i l l ( l ( \ l ; l \ . : 1 l i i s is

1101 l ) o s s i l ) l ( ~ \\,if 11 1<k7 ( ~ ~ I I Y ~ o ~ H ~ (ligil i l l ~ ) n ~ ( l i s t o ~ l io11. \ ~ l i i ( , l ~ 1 1 t i I i z v s i l l1 i \ ~ l i \ l O g IiF ( l ( ~ I i \ j . ] i l l ( > ,

:\s S ( Y l 1 i l l I.'lglllX' 1. 1 1. I llc!l'(! is i l l1 i l~ ,VlI1111( '~ 1 \' 1 ) ( ' [ \\.(Y'11 I l l ( ' 11[)1)('1' i l l l t I I ( l \ ~ ( ' l ' .\( ' 1 , l i .

7 1 ' l l i ~ I l l ( > i l l l S I I I i l l I ] I ( > ( ~ ) i l l . S t ' (I(!lil\. ( ~ O I l l l ) t ' l l ~ i l l i( )11 is Ilcil . s l l j i i ( ' i ( \ l l t t o 1.(?(111(:(' 1 !I( ' ;I.,!.I~III 1(\I I.!..

s i l ~ ( ~ 0 1110 ( l t ' I i ~ > . l l l i s l l l ~ ~ l ~ ~ ~ l ( , ; \ I1 ('iIIISC' I I ~ ( ~ ~ I I o I ~ \ ~ ( l f f ( ~ ~ , l s i l l i l l ( > s ) . s l ( ~ ~ l i , 111 ~ I I I , I I . t\!is 1 . t ~ i 1 l 1 s i l l

;l11 i l~! ' l l l l l l ( ' t l ' !~ i l l ~ I I ( J t ' l ' (Y[ll( ' l l ( .J . c l O l l l i l i l 1 . ' ~ ' ~ l ~ ' l ' ( ' ~ ~ ) l l ~ . \\'P t l ] ) l ) l i ( Y l ~ ~ i l g l ' i l l l ~ ( ' ~ 1 1 1 ~ ~ l ] ~ ~ l ~ i 1 ~ 0 l ~ S 1 0

i ~ ~ c : l , o ; l s c : 1 I I I ~ I I ~ I I I I I I ~ ~ (1('1;1~. 1 . ( ~ ~ ) 1 1 1 1 i o l ~ ( 10 I i l ~ ~ ( ' s ) . i l l o 1 . ( l t ~ 1 ~ 1 0 111;\1(~11 t11(1 (1('1;1\. i l l s t ( ' 1 ) > 01'

2.(j 11.5.

111 1~'ig111x> .l . l2. 1 \ I ( \ v l T ( ~ . l 011 f ~ . i \ ( * t i o ~ ~ i ~ l ( I ( ~ I ; I \ - s ~ , ~ i ( ~ l ~ ~ ~ o ~ ~ i x : ~ t i o l ~ is , S ~ I ~ \ V I I . ; ) I 1 I ( I l j ~ t i of'

CHAPTER 4. DIGITAL BASEBAND DERIVED R F PREDISTORTION

i 1 I I 2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150

Frequency (MHz)

Figure 4.12: Measured spectral results for the proposecl system. with fractioilal delay corn- pensation at 44 dBm of the average output pourer: (a) without predistortion. (b) with predistortion and coarse delay match. and (c) with predistortion and fractional dday match.

-100 -.

2130 2132 2134 2136 2138 2140 2142 2144 2146 2148-2 Frequency (MHz)

CHAPTER -1. DIGITAL BASEBAND DERIVED RF PREDISTORTION

-100' I I I I 1 I 2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150

Frequency (MHz)

Figure 4.14. AIeasllred spectral results for the proposed svstein. with fractional dclay corn- pensation at 46 dBin of the average output power (a) without predistortion. (h) with predistortioii arid coarse delav match. and (c) with predistortion and fractional delav match

CHAPTER 4. DIGITAL BASEBAND DERIVED RF PR,EDlSTORTION

-100 L--- 1 I L -- i - 1

2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150 Frequency (MHz)

Figure 4.15. Neasured spectral results for the different fractioiial delays, at 46 dBrn of the average output power: (a) with coarsc dclav, (h) with 3 fractional dtlay, (c) with 4 fractiorial tlela~,. ant1 ((1) with 5 fractional delay.

C H A P T E R 4. DIGITAL B A S E B A N D DERII 'ED RF PREDISTORTION

Table 4.1: Sun~mary of the ACLR performance of the proposed svs tc~ l~ .

Output power AIethod ACLR (Lower) ACLR (Upper) 44 dBm No PD -36.6dBc -36.7dBc

No PD -34.2dBc PD with coarse -47.2dBc PD wit11 coarse -49.2dBc

PD with 3 fractional -51.9dBc PD with 3 fractional -47.9dBc PD with 4 fractional -51.4dBc PD with 4 fractional -48.6dBc PD with 5 fractional -52.2dBc PD with 5 fractional -49.6dBc

t l ~ c average output power. When a coarse delay was used (b), the preclistorter suppressed

clistortio~is around 11 d B for. the lower ACLR ai~cl around 12 d B for tlie upper ACLR. LVitll

a fractional delav. tllc perfonn;l~~t c. could I)c optiinizetl: tlim. c\pploximatelp 4 dB autl :(

dB mort reduction was acl~icvccl. as sllown in (b) and (c) of Figure 4.12, respcctivtlv 111

addition. the asyrnrnrtry between the lower and upper ACLR was rcducccl. which ~neans

that the delay mismatch was lninirnized with the fractional delay. As seen in Figure 4.13.

siinilar ptrforniances are achieved using different fractional delays. At 46 dBm of the averagc

out pr~t power. the measured results are sllown in Figures 4.13 a i d 4.14. As illustrated in the

previous results. the asymmetry was reduced by the fractiolial delay compensation. These

pcrforlnances are sunnnarized in Table 4.1.

A comparison between the three digital PD architectures is tabulated 111 Table 4.2. For

example. if the nlain path DAC had 14 bits, a speed of 240 M s p s would Ije required foi

thc digital baseband (BB) PD. a digital BB/RF PD would reqllirc 14 hits a11t1 a 48 n l s p s

DAC for the inaiii path. along with two additional DACs with 8 hits and 96 AIsps. The

p ~ i r p ~ s e of the two additional DAC's is to liaiidlt. the lookup table coefficiel~ts. Tliercfort..

t l~cv aieu't required to have tlic sttme lesolutioil as t l ~ r inain DAC'. as is the case for the

tl~gital BB PD. This i~rlplirs that t h t cost of the two ;itlditional DACs is low

4.5 Conclusions

111 tl1i5 Cl~aptei . we prcseiitctl w predistortion architecture. \1111(-11 ~eiriovcd the widel)a11(1

r cyn~ i ( \ i~~ tu t s of the up-convrrtcxr and e lm~natet l the inacclu <ltt> autl costly colnponents of tlitl

CHAPTER 4. DIGITAL BASEBAND DERIVED RF PREDISTORTION 74

Table 4.2: Coiiiparisoii o f the three digital P D arcliitectl~iw.

Digital BB PD R F Eiiv./Digital P D Digital BB/RF P D hlain Path DAC U'idebancl 1 x Input BW 1 x ~~~~~t B\V

(5 x Input BJV) Main Path BW Wideband Narrowband Narrowhand

Upconverter Same Same Same LPF Wideband Narrowband Narrowband

Env. Det. No Yes(inaccurate) No R F delay lines No Yes(loss.cost) No

Vector hlodulator No Yes Yes Additional DACs No Two(2xBW) Two(2 x BUT) Additional ADC No One No

Comments No additional No need for an access Narrowband and compolients to baseband accurate

traditional RE eiivt.lopc preclistorter. The performance of the proposed svstem was verified

rising a 300-Mi Dolierty Airiplifier i11 olu test 1,eiich. Experimental results clcinonstratetl

that the proposed arcliitecturc acliieved ail ACLR reduction comparable to that of the

coiiventional baseband predistortion ,~rchitec tur t

Chapter 5

Crest Factor Reduction and

Linearization

5.1 Introduction

Duc t,o the iiicreasiiig importance of' spectral efficieiicy in inol~ile coiriiriuiiicatioiis, effective

inodulatioii techniques have heel1 used. including widebancl code clivisioii multiple access

(WCDhIA) and orthogonal frequency division inultiplexiiig (OFDhI). These rnodulatioris

have large envelope fluctuations, since tlle transinittecl signal is generated by adding a large

nllinber of statistically independent signals. Tlie high peak-to-average power ra.tio (PAPR)

sets strict requirernent,~ for tlle linearity of the power ainplifier (PA). This leads to low

power efficiency~ since it is desirable for the PA to operate ill its linear region. The use of

deliberate envelope clipping to digitally distort the signal. while still iriaintainiiig the signal

quality at a sufficient level. is a simple and practical way to clecreast the PAPR. IJIoreover.

reducing the PAPR via clipping has tlle potential t,o allow fhr a more efficient utilization

of t,he digital-to-analog-converter's (DAC's) dvna.iiiic raiigc.. The vario~is PAPR. tecliniclues

call he categorized into two groups: 1inea.r techniques (inod~ilation-and-codiilg-clepei1dei1t)

ancl noillinear tecliniclues (inoclulatioii-aild-coding-iiidepeiidont). Using linear techiiiques

for OFDIJI systems does not cause sigiial distortioii i11 tlic. t i i r i~ tloniaiii: lielice, the spectral

properties are not altered [59. 13. 431. Conversely. iioiiliiic~ar tccliiiicpes modify the eiivelopc

of tlic t,iirie tloiiiniil sigiial and arc iriairily hasctl on clippiilg-filtc~1,iilg arid wiiidowing [GO. 771.

CK4PTER 5 . CREST FACTOR REDUCTION AND LINEARIZATION

x " C

t A

Delay Xn-d

Figure 5.1: Block diagram of the scaled peak caiicellatioil technique.

To suppress pea.k re-growth when filtering the clipped signal's out-of-band clistortioii. it,er-

ative clipping and filtering for OFDM systems have lwen proposed in [3] ant1 1361. These

works suggested that iterative clipping and filtering of the clipped pulses would reduce the

convergence rate to tlle t,a.rgeted PAPR. However. repeated clippiiig and filtering t,echniques

that liave heen iinpleniented for OFDM systems require several iterations to coilr-crge to

the desired PAPR level. inlplying that it is not an efficient algorithm for hardware iinple-

inenta.t,io~i.

5.2 Crest factor reduction for wideband applications

5.2.1 A scaled peak cancellation method

Figure 5.1 illustrates the geiieral structilre of tlle scaled peak cancellatioi~ technicp. The

clipper output. c,,. call be written as follows:

where A is tlic clipping tliresllold level. The clipped

can be W I it t ell

Pn = 7 ,( - l ' , , Cr,

Fi~ially the PAPR ictl~iretl sigiial. 2,. 1s clesrrihetl In

d s r or peak cailcellatioi~ pulse. I ) ~ , .

CHAPTER 5. CREST FACTOR REDUCTION AND LINEARIZATION

jco, n -l(o,n e e

LPF

e' """

Figurt. 5.2: Block diagram of the iioist. shaptr for a multi-carrier WDChIA systtni.

Pn

where pf,,. h,,. and rr denote tlie output signal of the noise shaper (shown in Figl~rc 5.2).

t.he iinpiilse respoiisc of the low pass filtcr (LPF) . and t,he scaler. respectivc.l!-. anti ( ) *

denotes the convolution operation. For iiiulti-cxrrier WCDhIA applications. p,, slioultl he:

a) frequency translated by w,,. b) fi1t)erecl. c) frequency translated back to hasehntl . a11d

d ) combined. These steps are necessary. sincc the out-of-band emissions reside 1xtwet.n

tlie different carriers. Therefore. they cannot he filtered out by one LPF. Conversely, in

the single carrier application, only one finite impulst. response (FIR.) filter is required. Tlw

coefficients for the multi-carrier and single carrier FIR filters are t,he same. Notc t,liat there

is peak re-growth beyond the clipped signal. sillrc p,, is filtered by the noise sllaper and

subsecluently subtracted from the delayed ilipilt signal. This has the net effect of increasing

the peaks beyond that of the clipped signal.

In order to reduct. the PAPR. and increase the convergence rate to tlie desired thresliold

level. the repeated pulse cancellation (RPC) technique was proposed for OFDhI syterris [81].

which is based on clipping-filtering (cr = 1 ) .

We proposc a liovtl algorithm for R P C in IYC'DhIh downlink syst,eins. callttl tlw ~ ( - i t l t t l

RPC ( S R K ' ) . Let z , , in (5.3) he tllc outpl~t signal aiitl t;') he the output aftvr the first

LPF

CHAPTER 5 . CREST FACTOR REDUCTION AND LINEARIZATION

1tc.i atlon Aftei the 7th iteratloii. the resliltiiig signal can he represelitcd

The scalr factor. a , at the zth iterati011 can I x calculated as

According to the central limit theoreill. t l ~ e envelope of the input q p a l has a Rayleigh

tlistri1)lltion. It may be possible to find the iriaxi~nuln clipping pulse niag~iitude ~lunlerically

oncc thr threshold level is set This implies that it may he possible that tlir inaxirnuin

iiiagiiitii(1e o f the filtered pulse 1s ;dso clett~iliiii~(~(l a~mrdil iglv

The scaling factor reduces the coniputatioiial load. which saves liaidware lesources dur-

ing iinpleirlent ation. Numerical simulwt ions fo~iritl that two or three itcmt ions of the SRPC

are suficieilt. The details are provided i l l Scctioii 5 3.

5.2.2 Peak windowing technique

As detailed in [77]. the windowing iiiethotl filters the clipped output signal c,, in (5.1) to

the f'liiiction

b,, = 1 - 1 ( ! k . W r l - ~ .

where ( r 9 , , is the window functio~i and ( ~ k is A coefficient weight. The functioii b,, must satisfy

tlre iiieqliality, in order to achieve the desired clipping level

'I'o iriiiiiniizc~ the rrsultant error in the. tii~iv domilill, tlir illtqliality inlist he as rlvsr to

rguall t~. ns possible. This is dcpentlcnt on t l ~ v tylw a i d lengtli of the window. The resultant

functloii is t l i t ~ i multipliecl by the delayctl il11)ut sigrial. The outpr~t sig~ial according to the

peak ~~'iiidowiiig (PW) method can h r tlt+iiictl as


Figure 5.3: Block diagram of the peak windowing inetl~ocl

Tahle 5.1: The setup for a four-carrier ThlIl signal.

Carrier Scrambliiig Codes Time ~ f f s e t -

Tho block diagram of the peak windowing neth hod is shown in Figure 5.3.

5.3 Simulation results

The 3rd Generation Partnership Project (3GPP) sta.ndard specifications state that the error

vector ~nagnitude (EVhI) and adjacent channel leakage ratio (ACLR) a t a 5 A I H z offset

sliould be less thaii 17.5 ';lo and -45 dBc. respectively. The scramhliiig codes and t,iine offsets

of the time slot duratioii. for t'he multi-carrier test model 1 (Th,Il) of the WCDhlA downlink

s~.steni il; slunirirrrizetl in Table 5.1. This t,able is hasecl on 3GPP Test Specification (TS)

25.141. Section 6.1.1 of' Releasc: 6 (2002-12) [I]. Numerical siiriulatioils were performed using

i 1 ThI l signal. mit'li 64 tletlicated physical cliannels (DPCHs) and 614.400 input s i ~ ~ i n p l ~ ~ (oiie

radio f'raine at 61.44 AIsc~,rri.plr.s/.sl,c): all samples were processed in hlATLAB. Figlue 5.4

shows the coinplenleiitarg cmrn~lative d is t r ib~~t ion funct~ion (CCDF). hef'bre aud after set,tiiig

up the scri~.irihling codes aiid t'iine offsets. This signal set11p (Tal~le 5.1) cl~wionstrates a

PAPR red~lct,ioii of 2.61 dB a t 0.01 %) of CCDF. as s11ow11 il l Fig-~uv 5.4.


0 2 4 6 8 10 12 14 Peak to A~emge Ratio (dB)

Figure 5.4: The CCDF plot for four WCDAIA carriers, before and after the setup ill Ta- ble 5.1.

CH,4PTER 5 . CREST FACTOR REDUCTION AND LINEARIZATION

- 0 5 10 15 20 25

Error Vector Magnitude [RMS] (%)

Figure 5.5: PAPR versus EVhI fix RPC' and PUi. with folu WCDhIA carriers.

A low pass FIR filter with 129 taps was designed to meet o~~t-of-hand distortion specifi-

cations of -77 dBc. Figure 5.5 illustrates the PAPRs with respect to EVhpl for a seven-stage

pulse cancellation (PC) (RPC) and P W with an 85 tap haimriing window lengtli. The solid

line with diamond markers represent,^ the performance with just clipping: this sets the lower

houiid oil the PAPR and EVM. Clearly, a large out-of-band spectral radiation exists. The

seveii-stage P C compressed the PAPR by 1.3 dB more than the single stage, at an EVhI of

10 ( X : the P W reduced the PAPR by 0.5 dB when coiiiparecl to t.he single stage. In Fig-

Ilrc 5 . 5 . the PW's performance (solid line) is coiriparahle to that of a 2 stage RPC (dashed

liiic wit.11 square marker). for up to an EVhI of 10 %). Beyoiitl ail EVhjI of 10 %, the RPC

pc~forinance exceeds that of tllc PI+' technique. Using tlicl RPC teclmiq~~e. the PAPR call

1)r slippressed to approximately 6 dB at a fixed 10 %# of EVhI: it sing the PW* inethod based

oil a h l ~ r IVCDhlA carrier input sigiial. G.7 dB is ;~cliiev;+l~l(~.

111 Figure 5.6. the proposed methotl (SRPC) is sliown as ;I fun(-tioii of PAPR versus EVAI.

Note that eveii a single stage of tlie proposed algorithiri outperfi)i~iiis the P W technique. In

;~cltlitioi~. it orily requires two iterations to o1)tain the snmc pt~rfi)riii;tnce that the previoi~s

RPC iiietliocl requires seven iterations to achieve. Tho proposctl RPC inethocl attains a


9 1 I r 1 -- 1 r --- -

C. C Newlstage

LL IJ New 2 stages

8 8 - $ A

0 8 'lq>

Error Vector Magnitude [RMS] (%)

Figure 5.6: PAPR versus EVM for SRPC wit11 four JVCDhlA carriers.

PAPR of 5.71 dB at 10 %, of EVM. after only three stages.

To the best of our knowledge, this perforinance is state of tlic art for WCDA'IA appli-

catjioiis 184. 83, 731. I t s1101ild be noted that relaxing the ACLR characteristics can flirthcr

reduce the PAPR.

Figure 5.7 illustrates the ~rit~ical disadvantage that the P W technique has when coinpared

with the RPC and SRPC. which degrades the ACLR. The original input signal has an ACLR

of approxirriately -77 dBc. Also note is that the RPC and SRPC techniques deteriorate tlic

ACLR up to approximately 2 dB. when the clipping threshold is reduced. This is due to

t,he decrease i11 the itver;tgr power as clipping bccoincs inore significant. Sim~ilations were

perfornid for a different iiiimher of carriers and t,he rmilts are tabulated in Taljle ri.:3.

For i\ single carrier. all three tecliiiiqlies indicate a, similar aljility ill terms of EVA1 ant1

PAPR. However. t,lie PJV inetliod st,ill allows tlie ACLR t,o Ijc coii~proiiiisetl. ~iiilikc t l i ~

otlicr two i~ietllotls. The R.PCi t,eclinique requires niorc tlian five iterations. wllicli i1icrrasc.s

it,s coinplexity: tlie proposed SRPC inethod 0111,~ requires two itei.ations. For tlir t,lirrr i11ltl

fi~lir carrier cases. it is not ~~ossible for tlie P W inctliotl to achieve a PAPR of 5.5 dB. CVNI

witllolit c.onsidering EVA1 i ~ i d ACLR. I11 this caw. this wiiidow sigiiificaiitly a.lters iriaily


Peak-to-average Power Ratio (dB) at 0.01 Sb of CCDF

Figure 5.7: ACLR \.erstls PAPR for four WCDAIA carriers.

input samples due to the large clipping. wliich significantly changes the average power.

The probability deiisit,y function (PDF) of the PW inet,llod is illustrated ill Figure 5.8.

The solid line shows the PDF of the original input sigiial and the dashed-line indiratrs tlir

PIIT co~npressed signal. The tlegradat~ioii of tlie EVA1 can be explained by t,lir difference

11etween the two PDFs.

In Figure 5.9. the PDF of t,he teclinique )lased on the single P C method is plotted

(clashed-line). Compared to the P W case. this approach should be more heavily clipped.

since tlie P C method regenerates the peaks. The smaller magnitude sarnples are to some

extent affected. As seeii ill Figllre 5.9. the PDF difference is more significant near the clippilig

threshold level. However. l y sing the RPC' algoritlirn. this difference can be ininimizetl for

sarnples with iriagiiit,utle less t lml 1 V . Tliis l~cconics clear in Figure 5.10. where t,lie PDF is

illustrated at each of tlie t h e e stages for the RPC tecllnique. The same PDF pattern is idso

ohtailled for our new approach. SRPC. Anioiig the three techniques. tlle PC 1)asrtl iiietllods

are the most tlcsii,xhle choice for inaxiiniziiig thc svstein performance A1orcovt~i. tlie new

SRPC tecliniqt~c~ i ~ c l i i e v ~ ~ hetter perforinaiicc 111 onlv three iterations. wli~i(>;1\ t l l ~ RPC

algoritliiri requires srveli. Hence. tlle SRPC tccliniquc lias a reduced system coiiiplc~itv

CXA4PTER 5. CREST FACTOR REDUCTION AND LINE.4HIZATION

TaGlc 5.2: Performance for different carrier numhcrs.

No. of Carriers Method RhIS EVhI % 7 dB 6 dB 5.5 dB

P W 4.69 % 8.89 % 12.16 % 1 RPC 4.76 % 9.26 6 12.03

SRPC 4.74 % 8.7 7 11.65 %I

P W 6.46 % 14.44 % 3 RPC 5.15 % 9.38 % 13 %I

SRPC 4.64% 8 . 5 % 11.7% Pm7 7.6 93 18.66 '%

4 RPC 5.5 % 9.5 '% 13.1 % SRPC 5 8 .26% 11 .4%

I --- I - - a- 0 5 1 1 5 2

Magn~tude (V)

Figure 5.8: PDF of the P W fbr four II'CDlIA cal~icrs.


Magnitude (V)

F i g m 5.9: P D F of the single PC for four WCDhIA carriers.

I stage 1 2 stages /

-- 3 stages]

Magnitude (V)

Fig~trc> 5 10: PDF of the RPC for four JT7CD1\IA carriers


5.4.1 A class AB power amplifier

T l i o I ~ ( \ \ v I'AI'It u x I ~ ~ ( , t i o l i t , ( > c l i n i q ~ ~ ( ~ \\,;I.< i ~ l ) l ~ l i ( ~ ( l t o ;l 2.10-11' l ) t ~ l l < P I I \ T I o ~ ) ( ~ ~ ) O \ \ Y > I , (PEl')

c ~ l ; l s s A U 111.to1~i111y rliH~~sctl 11lcl:11 o s i t l v s c ~ ~ ~ ~ i c , o ~ ~ ( l ~ ~ c ~ ~ o ~ . (LDAIOS) I)O\V(\Y i \ ~ l ~ l ) l i l i c l ~ , . u . l l i ( ' l l \\1;1s

( . x ) ~ ~ i l ) l , i s c ( l of ~ I I U Y > S ~ ~ I ~ O S (h11I IA21 :Kj ( j . h [ I < I ~ ' 2 1 0 . 1 5 . il11(1 A [ R F 2 1 2 4 0 ) . '1-110 I'A I i i ~ ( l ;I g i l i l i

01' 58 (Ill ilt 2 1 4 0 .I1 1 1 2 . 'l.'li(; twI I W I I ( , I I i11( ,111( l (v l : 1 \gi lv111 r l . ( ~ ( ~ l ~ ~ i o l o g i o , ~ ' . \ ( l \ ~ l ~ i ( , ( v l l h ) s i g i ~

S ~ S I ( > I I I (.\[IS). \ I ; l t l ~ \ \ , ~ l . k ~ ' A1.4'1'1,~\13. ; i ~ ) c ' ~ , s o ~ l ; r l C O I ~ ~ I ) I I I ( ' I ~ . ill1 ; ~ ~ ~ l ) i t l ~ i l ~ ~ ! . ~ ) ~ ~ ~ ) g ~ ~ i l ~ l ~ ~ l l i ~ l ) I ( ~

s i g l i i i l g ( ! ~ i ( ~ i l l o r ( A g i l o ~ i f ES(: I<!L/l:JX( ' ) . I ] I ( ' I).\ . ;111(1 il s 1 ) ( ~ t r 1 1 1 1 1 : ~ I I ; ~ ~ J . Z ( ~ I . ( . \ g i l ( l ~ i t 11:'1 1 4 . 4 ) :

f to I 1 I ) '1'110 1)01,~011;11 ( , O I I I ~ ) I I I ( ~ I . I I I I I ( . ( ~ O I I S ;15 il ( l i g i ~ i l l s i y l : l l ~ ) I . O ( , ( \ S S O I ,

i l l l ~ ) ~ ( ~ i l l ( ' l l ~ i l l g I l l ( ' ( ' l . ( ' s t fil( ' tO1' l ~ ( ' ( l l l c ~ l iOli (( ' l ; 'I<) i l l g 0 l ' i l l i l l l .

I;OIIY 'LA11 l~ l . (~~DhI i \ ( * i i l , ~ , i ( \ ~ ~ \\.it11 6 4 l)l '(:lI ; \ I , ( , ~ ) I ~ o c Y ~ ~ ( Y I 1111.o11g11 [ I N > l) . \ , i l l 0 1 ~ 1 ~ 1 , to

0I ) t i l i 11 I'.AI'li. ;IdI< N I ( I ~ ~ I f i c ~ i ( x ~ ( ~ y I ~ I ( ~ : ~ S I I I ~ ( ~ I I I ( ~ I I ~ s.

r l ' l~(> 0111 1'111 s l ) ( x 4 l.11111 01' t . l lv I'A ;IS ;I 1'11llc.t io11 of' f 110 i11[)11t s i ~ ~ ~ i l l ' s I'i\I'I< is OI)S(T\YYI 111

l;ig111x> r'. 12. '1'11(> i \ v ( \ r i l g t ' O I I ( ~ ) I I ~ I ) O \ V ( > ~ is lis(>(l i l t 20-11.. SO t l ~ i l t . L4C12K< ( . h i ~ ~ ~ i > ( ~ I ( ~ ~ i ~ t its ('il l1

-40 -A -

2.11 2.12 2.13 2.14 2.15 2.16 2.17 Frequency (GHz)

+ ACLPu w rlhoul CFU '

- - A - ACLPI wthoul DPD

I A ACLPU ..~rlh D m

- - - A - - - ACLRJwilhDPD

o ACLRu wilh DFFLPA .................... 24 5 9.

A B l c ~ e n c y w ilh DFU

17% ...........................

35 40 45 50 55

Output power (dBm)

5.4.2 A Dol~erty anlplifcr wit,ll digital predistortion and feed-forward lin-

earization

- -

--.-b ~GI, without DPD

. - .A- . - ACLPJ w Rhout DFO

A ACLRu with DPD

. ...A ACLWwllhDPD 27 % ..... ..........------. -- o ACLRu w flh DFFLPA

. . . o... ACLRlwilh DFFLPA - Bflciency w ilhaut DPD

--e Efficiency vd nh DPD 19 5 51 .................... - Bllciency i v ich IFFLPA ... . - - . - ...

35 4 0 4 5 50 55

Output power (dBm)

A ACLRu w ilh DPD

A. - - ACLR vr ich Dm o ACLm a tlh DFFLPA

0 - - - A U R w n h DFFLPA

-Efficiency w ahout DPD

A Oficiency vrich DPD

+ Bficiency v~ ith DFFLPA

35 40 45 50

Output power (dBm)

CHAPTER 5. CREST FACTOR REDUCTION AND LINEARIZATION !I 1

Fig1li.c 5.13 sl~ows t,lie nieasured results for ACLR. output power. ant1 eficieiic.!.. for ;I

9.8 dB PAPR illput signal. At an ACLR of -45 dBc, the efficiency iniprovetl to 24.5 '%

~lsing PD. We ii~cluded 10-CV of power consumption for the DSP Imsecl inenlory polyiioinial

iinpleineiit~atioii [XI. The DFFLPA achieved a11 cficiency of 17 '% for the same ACLR value

of -45 dBc. For an ACLR specification of -55 dBc, the Doherty PD and DFFLPA have

efficieiicies of approximately 15 % and 12 %, respectively. In Figure 5.14, for ail input signal

wit11 a 6.5 d B PAPR (7.01 % of EVM). the Dolierty PD and DFFLPA achieved efficiencies

of 37 '371 and 19.5 %. respectively, at an ACLR of -45 dBc . An inlportait result is that

for an ACLR specification of -55 dBc, the efficiencies are alinost identical for tlle Doherty

PD and DFFLPA. As the PAPR is further reduced to 5.5 dB (11.8 % of EVhl). as seen in

Figure 5.15. tlic Doherty PD's efficiency can approach 2'3 %; the DFFLPA can achicvc 31 96.

Once again tlie efficiellcies of the t,wo syst,enis arr itlinost identical for an ACLR specification

of -55 dBc. As the input signal PAPR clecreaxtl. tlic measured results deino~istrated t,liat

the Dohert!. PD rcquiretl more back-off' thaii the DFFLPA. This implies that nrlien using

thc samr LDhIOS oiitpiit. device, the DFFLPA witli CFR can he used to acliievc a higher

output power tlian tlic Doherty PD witli CFR. Ultiinatelj, this results ill ;I lower cost for

the DFFLPA ill coinparison to the Dollcrty PD.

5.5 Conclusions

A lien- CFR algoritlmi. i.c. the SRPC. was proposed; the SRPC reduces systein complexity

and irnp~.ovcs syst>em performance. in terms of EVhI, ACLR and PAPR. Siinulat~ion results

validi~te tl~ilt tlie proposed method compresses the PAPR by over 4 dB for four carrier

WCDhIA applicatioiis. Clipping-filtering based tecliniques were tlemonsti~atrtl t,o have a

superior performance compared to the P W technique. when two or more stages arc utilized.

Expcriiricntal reslilts sliowed that tlle SRPC technique enhanccd the PA power efficiency

hy 2.9 'i; to 6.6 %. wllcn a 240-1Y PEP class AB power amplifiei. was 11setl i l l t l l v t,est

l ~ c i ~ c l ~ . Rcstating, tlic SRPC tecliiiique iniprovecl the ACLR by G to 14 dB. foi a fixed

30-11- ;tvcbr;tge outpit power. This technique is siniplc to iinplcii~cnt in 11artlwarc. and is

niotliilat,io~i i~ntl cotling iiidepeiidrnt. Flirtlic~i~ cfficieilc.y ei~llaiiceirleiit is nc~hie\xl)lv I lirougli

digital 1iiic~;ti~iziitioil. A performance coiliparisoii is given between tlic Doliert~. I'D and

DFFLPA trcliniql~rs with C'FR. whe~i two \VC'DhlA carriers are applied. Tlie reslilts sliom

tlist for a low AC'LR specifica.tion of -45 dB(.. tlic. Doliertv PD wit11 C'FR acliievcd up to

CHAPTER 5 . CREST FACTOR REDUCTIOhT.4ND LINEARIZATION 92

20 M power efficiency, the DFFLPX with tlir CFR obtained 21 'A Howcvcl. as tlw ACLR

sllec lfication becomes more stnligrnt, tlie c$kiency gap between tlie two svhtems decreases.

Tlic DFFLPA system was alwavs aide to ol~tairi n higher output power than the Dohertv

PD approach. which ultllnately factors into the cost.

Chapter 6

An FPGA Testbed for Digital

Predistort ion

6.1 Introduction

The wireless coinmilnicatioii indllstry has a great interest in the design of highly efficient.

reliahle. aild low-cost power amplifiers; the high power amplifier (HPA) of tlie transrnit-

ter 11a.s to meet stringent performance requirernent,~. in order to achieve the overall system

specification. With wideband code division m~ilt,iple access (WCDMA), the challenge be-

comes even greater, as linearity inust he niaint,aiiied over a wider l~anclwiclth. There are a

nuin1)er of techniques t,hat call be used for 1iiieariza.tion. Digital predistortion is one such

teclmique t,liat can potentially meet the require~nents of a WCDhIA transmitter; it is more

efficient and cheaper than the conveiltiorla1 feed-forward technicpe. There 11a.s been a. lot

of rcscarcll concerning digital predistortion; however. it has mostly been in the simulation

cloinaiil. A.Iany of these systerris are too corriplicated and coinples to iinplernent in a real

hartlwarc. Tlilis. irripleinentiiig tlie digital piedistort ion in a fieltl prograinable ga.te array

(FPGA) lias I~ecoine a primary issue. In this Chapter. ail FPGA test I ~ e d for the digital

predistort,er is iinplenlented using an Altera digital signal piwcssiilg (DSP) tleveloplrient

h a r t l . i l l ortlw to verify the performance of the digital pretlistortci,.

CHAPTER 6. AN FPCA TESTBED FOR DIGITAL PREDISTORTION

Figure 6.1: An FPGA test bench for digital predistortion.

6.2 Design flow

hIost DSP designs are first siinulated using MATLAB. unt,il t,lie desigl~ specifications are met.

This code is t,heii coii~ert~etl iiitm C . which can be run by a DSP. or i l l a l~artlware tlescript,ion

language (HDL) for hardware configuration. However. by employing hlat~hworks' Sirnulink.

we call specify a dcsign using a graphical user interface (GUI). Siinulink removes inany of

the logical prograiriiriing errors that can occur, by providing predefined intellectl~ltl property

( IP ) silnulation blocks. Since Altera blocks can be synthesized, Sirnlllink can generate HDL

code for fiinctional sirnulation in either Altera's Quartus I1 or hIentor Graphics' ModelSinl.

Onc~ . tllc fiinctional te~t~irig is complete. t,hc s,vntllesis process maps the HDL cotlc to tlie

fuiictioiial logic gatcs aild flip-flops (FF) . w1iic:li coi~stitute the FPGA. Next. tlie place i~iid

routc software mis t efficie~~t\y 111wp the gates to t.he Stratix DSP/FPGA liardwarc.

CHAPTER 6. AN FPGA TESTBED FOR DIGITAL PREDISTORTION

Table 6.1: St ratix device feat l~res

Featurc EPlS80B956 Logic elements (LEs) 79,040

A1512 RAM Blocks (32 hy 18 bits) 767 h14K RAM Blocks (128 by 36 bits) 364

hI-RAM Blocks 9 Total RAM hits 7.427.520

DSP Blocks 22 Embedded multipliers (based on 9 ny 9) 176

PLLs 12 hIaxiinuin user I /O pins 679

Package type 956-pin BGA Board reference U1

Volt agc 1 5-V internal, 3.3-V I/O

6.3 Digital predistortion test bed, using an Altera DSP de-

velopment FPGA board

Thc test beiic.11 usiiig the Alteia DSP tlevelopineiit FPGA board is shown in Figuie 6.1.

Tlic Altcra Stratix EPlS80 DSP developinent hoard includes two 12-bit 125-MHz aiialog-

to-digital converters (ADCs). two 14-bit 165-h1Hz digital-to-analog converters (DACs). 2

AlBytes synchronous SRAAI. 64 hlbits of flash memory, on-board 80-AIHz oscillator. and

the Stratix device EPlS8OB956. The featlires of the Stratix device are suininarized in

Table 6.1, with a top view of thc board coiiipoilents and interfaces shown in Figure 6.2.

The test bench operates as follows. First. WCDh1A sarnples geiierated in the advanced

design system (ADS) software are stored in the memorv of the FPGA; The lookup table

(LUT) coefficients are initially set to unity. so that I,,, and Q,,, are the same as the original

inp11t saniples. Secondly. the analog I and Q signals after passing through DACs are direct117

1113-converted by the quadrature inotii1l;ator (ESG4433B signal generator). The up-convertecl

RF signal drives a Dollert?. PA; tlie attenuated PA olitput signal is then broliglit back to

tlic vPctoi. signal aiialyzer JVSA). rq)liiciiig tlie down-convcrtcr. the ADC. the digital tlowii-

c~)ilvrrter (DDC). and incirior\.. Tliirtll~,. the sigiials stored i11 thc FPGA and in tlie VSA

memory are synchroi~i~ed and coniparctl to update LUT coefficicwts. In this test bed. t l i ~

algoritlnri for tlie LUT coc~ffici~nts IS porfor~lid 111 the P C as digital signal processing, this

is onc iteration.

Frequency (MHz)


CHAPTER 6. AN FPGA TESTBED FOR DIGITAL PREDISTORTION

-1lOL- - 2 - 1 I L 1 - 1 . -1 2130 2132 2134 2136 2138 2140 2142 2144 2146 2148 2150

Frequency (MHz)

Figure 6.4: l\leasuremeiit results a t the average 45 dB7n output power: (a) without PD. (1)) with PD. and (c ) with a linear output.

CHAPTER 6. AN FPGA TESTBED FOR DIGITAL PREDISTORTION (3 9

6.5 Conclusions

I11 this Chaptcr. a digital P D testbed was iinplcriimtctl ill the FPGA development board.

Using the DSP builder software embedded ill slniuliilk f101n Altera, iriost of the system was

easily impleirmitcd in hardware without any knowleclge of HDL or verilog. Siinulink does

not have the extensive library blocks as does the that Quartus I1 software. Thus. it would

I~eneficial if the target system was inlpleinenteti by hot11 DSP builder and Quartus 11.

Chapter 7

Summary and Future Research

The rcsea,rch present,ed in this dissertation wa.s motivated by the need to eiihance the efi-

ciericy a i d linearity of wireless transmitters. Currently, the power i~inplifier ill the wireless

t~r i \ . i i~ i~i i t t (~ i~ is iiilic1-eiitly iioiiliiiear aiitl the ~~fficiency of the power amplifier is low.

Tlirec ~mtliot ls were considered. in order t o increase t'he efficiency and improve the

linearit,y for wireless cornrnunicat,ioii syst.rms: 1) a lookup table haset1 digital pretlistort,ioii

syst,eiri. with iiiemory effect coinpeiisat~ion, 2) a baseband derived radio frequeiiry (H.F)

digit,al predistortion system. and 3) a novel crest factor reduction algorithni. applied to a.

class AB powcr aniplifier. a Doherty power a,mplifier. it Doherty feed-forward linear power

amplifier. and a digithlly predistorted Dohert,y power amplifier.

C l i ap te~ 3 presented the piecewise pre-equalizer based lookup t,ablc predistortion li11-

earizatioii system, which compensated for nlernory effects and 1ionlinearit.y. The method

was coi~lp~~t,atioiially efficient compared to the memory polynomial predistortion syst,erri.

Chapt,er 3 provided the novel baseband derived RF digital pretlistortion system. The

system exhibited thc na,rrowband advantage of an RF envelope digita.1 predistort,io~i system

and t l ~ v acx-uracy of' a baseband digital predistortion sys te~n.

Tlir third contribution wis the iiovcl crest factor reduction irietliod. wliicli savetl 1ia.rd-

ware rcsolirces. This method was applied to tlic class AB power amplifier. the Dohert'y

power aii~plificr. tlic Doherty ftm-forward liilear powcr amplifier. and tlie digitally predis-

tortetl Dol i~r ty power amplifier.

Tliv fi)llowiiig points illust,rate potential f'lit,llre rcsearcll t,opics. Althougli illost impor-

tant c~ivt~lope liirirlory effects were coiripensated for in this disscrtatiu~i. tlcpt.ntlii~g on tlir

a.pplic%i~tioli. o t l w lrieniory effects may pose prolhrns. For exailiple. coiisitlcr tlicrinal effect,^

CHAPTER 7. SUAIAIARY A N D FlTTlrRE RESEARCH 101

o l the RF frequency responsc of tllr svsteiu Subsequently. ail FPGA llald~varc iiripleiiir~i1-

tation of a high speed predistorter, wllitli considers all menlory rffects, along with n DSP

h a r d for algorithm implementation, would be a practical research topic. Another interest-

ing research topic is the design of a mideband adaptive biasing of the power amplifier. in

order to further enhance efficiency when coinbilled with memory effects predistortion. This

may be the direction to proreed for future wireless cornmunicatiori systems.

Appendix A

Predistortability Analysis of the

Proposed Predistortion

If the PD follo\vs the structure expressed in (3.4) and. without loss of generality. is reduced

iLs in11c11 as possible. it follows that

The ca.ncellation is easily observed if we replace bl wit,ll 1: b:3 with d;3. u ! , , ~ ba with dl,:{ . a,nd

71 '1 , : { ~vitli dL,2,:3. Aft,er inserting ~ ( 1 1 ) int,o ~ ( 1 , ) ant1 reinovi~ig t,llc. negligible high and even

older t c i~ns . we arrive at

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