digital data communication technique

McGraw-Hill ©The McGraw-Hill Companies, Inc., 2004

Digital Data Communication Techniques


Classification of transmission mode:

Data transmission

Parallel

Asynchronous

Synchronous

Serial


Parallel transmission:

In parallel mode, multiple bits are sent with each clock tick. We can send data n bits at a time instead of 1 through n links.Speed is main advantage in here It is usually limited to short distances Cost is main disadvantage in here


Serial transmission

In serial mode, 1 bit is sent with each clock tick.We can send data n bits (one after another) through 1 link. Transmission cost is reduced hereTwo kind: (A) Asynchronous (B) Synchronous


Asynchronous Serial transmission



In asynchronous transmission, we send 1 start bit (0) at the beginning May add a parity bit (odd or even).The final signal element is the stop element (binary 1, 1.5 or 2 bits). In the idle state (binary 1), Data transmitted on character at a time 5 to 8 bits Then looks for the next 1 to 0 transition indicating the next character.This process is Simple and cheap. Good for data with large gaps (e.g. providing input by the keyboard).


Synchronous Serial transmission

frame format of synchronous transmission


Synchronous Serial transmission

We send bits one after another without start/stop bits or gaps. Data is send frame by frame. Good over short distances. Embed the clock signal in the data: Guarantee transitions in the data stream: Still require an indication of the start and end of a block. Use preamble and postamble: - e.g. series of SYN (hex 16) characters. - e.g. block of 11111111 patterns ending in 11111110. More efficient (lower overhead) than asynchronous. It is more useful for high speed applications such as the transmission of data from one computer to another.


Data can be corrupted during transmission. For reliable communication, errors must be detected and corrected.

Note:Note:


There are two types of error, and they are:(A) Single-Bit Error and (B) Burst Error

Types of Error


In a single-bit error, only one bit in the data unit has changed

It may be occurred in serial and parallel transmission

(A) Single-Bit Error


A burst error means that 2 or more bits in the data unit have changed.

The length of burst is measured from the first corrupted bit to the last corrupted bit.

It is most likely to occur in serial transmission

(B) Burst Error


Error detection is simple than error correction and is the first step in error correction process.

To detect error, redundancy method is used.

Error detection


How can a receiver detect an error? One error detection mechanism would be to send

every data unit twice. But It is a problem. Not only would the transmission time double, but

also the time it takes to compare every bit by bit must be added.

Solution

Redundancy means adding extra bits for detecting errors at the destination. And finally there are discard.

Redundancy


Redundancy


Types of error detection

There are 4 prominent types of error detection method, and they are:

(A) Vertical Redundancy Check (VRC) or Parity Check

(B) Longitudinal Redundancy Check (LRC)

(C) Cyclic Redundancy Check (CRC)

(D) Checksum


In parity check, a parity bit is added to every data unit so that the total number of 1s is even (or odd for odd-parity).

Each character =¨character code + parity bit”. => The value of the parity bit is such that the

character has an even (even parity) or an odd (odd parity) number of ones.

For example: T = 1010100 with even parity = 10101001

and odd parity = 10101000

Typically even parity is used for synchronous transmission and odd parity is used for asynchronous transmission.

(A) Parity Check


Fig. Even-parity


Encoder and decoder for simple parity-check code


Example 1 For sender

Suppose the sender wants to send the word world. In ASCII the five characters are coded as w o r l d 1110111 1101111 1110010 1101100 1100100

The following shows the actual bits sent11101110 11011110 11100100 11011000 11001001

Even parity is used.


Example for receiver

Now suppose the word world in Example 1 is received by the receiver without being corrupted in transmission. 11101110 11011110 11100100 11011000 11001001

The receiver counts the 1s in each character and comes up with even numbers (6, 6, 4, 4, 4).

The data are accepted.

If any number becomes odd then the receiver knows discards them, and asks for retransmission.


Also called two-dimensional parity check,

a block of bits is divided into rows and a redundant row of bits is added to the whole block. In this method, a block of bits is organized in a table (row and column).



Example 3

Suppose the following block is sent: 10101001 00111001 11011101 11100111 10101010

However, it is hit by a burst noise of length 8, and some bits are corrupted. 10100011 10001001 11011101 11100111 10101010

When the receiver checks the parity bits, some of the bits do not follow the even-parity rule and the whole block is discarded.


Two-dimensional parity check increases the likelihood of detecting burst errors. If 2 bits in one data unit are damaged and two bits in exactly the same position in another data unit are also damaged, the checker will not detect error.

Performance of LRC


Performance of LRC


For a block of k bits, the transmitter generates an n-bit sequence. Transmit k+n bits which are exactly divisible by some number.

The sender uses a CRC generator function to produce redundancy code and the receiver uses a CRC function to detect the error

Receive divides frame by that number: => If no remainder, assume no error. => If remainder, assume error.

(C) Cyclic Redundancy Check: (CRC)


Cyclic Redundancy Check: (CRC)


CRC generator is used to produce the redundancy bits.

The dataword (data unit + redundant bits) is divided by predetermined divisor. The number of redundant bits (0s) will be 1 bit less from data unit, and will be added to the last of data unit.

A CRC generator uses modulo-2 technique to determine the reminder, which will be added to the last position of the data unit, called codeword (data unit + remainder).

CRC generator:


Division to generate the CRC (remainder):


A CRC checker functions exactly as the generators does.

A CRC generator uses modulo-2 technique to determine the reminder, which was added to the last position of the data unit, called codeword (data unit + remainder).

If the remainder is 0 then data unit is accepted otherwise discarded.

CRC checker:


Division to check the CRC (remainder):


Division in the CRC decoder for two cases:


CRC encoder and decoder:


The divisor in the CRC generator is most often represented not as a string of 1 or 0s, but as an algebraic polynomial.

Polynomial format is used because => It is short form => It can be used to prove the concept

mathematically

A polynomial should be selected to have at least the following properties:

=> It should not be divisible by x => It should be divisible by x+1.

A polynomial:


A polynomial to represent a binary word:


Table: Standard polynomials

NAME Polynomial Application

CRC-8 x8 + x2 + x + 1 ATM header

CRC-10 x10 + x9 + x5 + x4 + x 2 + 1 ATM AAL

ITU-16 x16 + x12 + x5 + 1 HDLC

ITU-32x32 + x26 + x23 + x22 + x16 + x12 + x11 + x10 + x8 + x7 + x5 + x4 + x2 + x + 1

LANs


It is obvious that we cannot choose x (binary 10)or x2 + x (binary 110) as the polynomial because both are divisible by x. However, we can choose x + 1 (binary 11) because it is not divisible by x, but is divisible by x + 1. We can also choose x2 + 1 (binary 101) because it is divisible by x + 1 (binary division).

Example 4


Example of polynomial divisor 5

Polynomial division to generate the remainder:


Polynomial division to check the CRC:


Checksum generator and checksum checker functions are used

(D) Checksum

Checksum generator:The sender follows these steps: The unit is divided into k sections, each of n bits (usually

16 bits). All sections are added using one’s complement to get the

sum. The sum is complemented and becomes the checksum. The checksum is sent with the data.Checksum checker:The receiver follows these steps: The unit is divided into k sections, each of n bits. All sections are added using one’s complement to get the

sum. The sum is complemented. If the result is zero, the data are accepted: otherwise,

rejected.


(D) Checksum


Example 6- sender

Suppose the following block of 16 bits is to be sent using a checksum of 8 bits. 10101001 00111001 The numbers are added using one’s complement 10101001 00111001Sum 11100010Checksum 00011101The pattern sent is 10101001 00111001 00011101 (Checksum)


Example 7- receiver

Now suppose the receiver receives the pattern sent in Example 6 and there is no error. 10101001 00111001 00011101When the receiver adds the three sections, it will get all 1s, which, after complementing, is all 0s and shows that there is no error.

1010100100111001 00011101

Sum 11111111 Complement 00000000 means that the pattern is OK.


Example 8- receiver

Now suppose there is a burst error of length 5 that affects 4 bits. 10101111 11111001 00011101When the receiver adds the three sections, it gets

1010111111111001 00011101

Partial Sum 1 11000101Carry 1Sum 11000110 Complement 00111001 the pattern is corrupted.


Error Correction

Forward Error Correction

Retransmission

Single-bit Error Correction

Burst-bit Error Correction


Retransmission

In error correction by retransmission, when an error is discovered, the receiver can have the sender retransmit the entire data unit.

We will discuss in chapter 8.


In forward error correction, it is possible to correct any single bit error automatically.

In error correcting code (to correct the

error), is more sophisticated than error detection code, this why more redundant bits are required.

(A) Single-bit Error Correction


If the total number of bits in a transmittable unit is m+r (where m is data unit and r is redundant bits), then r must be able to indicate at least m+r+1 different state. Of these, one state means no error, and m+r states indicate the location of an error in each of the m+r positions.

Must satisfy the following equation

2 r >= m+r+1 - For example, if the value of m is 7 , the smallest r

value that can satisfy this equation is 4 2 4 >=7+4+1

Redundancy bits


Table: Relationship between Data and redundancy bits

Number of data bits m Number of redundancy bits r Total bits m + r

2 3 5

5 4 9

7 4 11


We have examined the number of bits required to cover all of possible single bit error state in a transmission.

But how do we manipulate those bits to discover which state has occurred?

A technique developed by R.W.Hamming by positioning the redundancy bits to do this.

Hamming code

Problem & Solution


How many redundant bits ? …………. 2 r >= m+r+1

Detect Positions of the redundancy bits

Positioning the calculated redundancy bits (values of r)

Calculating the r values

Hamming code :

Fig. Positions of redundancy bits in Hamming code


The Hamming code can be applied to data units of any length and uses the relationship between data and redundancy bits.

The redundant bits will be placed in power of 2 position of the codeword, (m+r).

For example, a 7 bits ASCII code requires 4 redundancy bits and their position are 1,2,4,8 in codeword. The redundant bits are denoted r1, r2, r4 and r8.

Positioning the redundancy bits:


In the Humming code, each r bit is the parity bit for one combination of data bits.

The r1 bit is calculated using all bit positions whose binary representation includes a 1 in the rightmost position. The r2 bit calculates using all bit positions whose binary representation includes a 1 in the second position, and so on.

Positioning the redundancy bits (cont.):



- For example, the combination used to calculate each of the four r values for a 7 bits data sequence are as follow:

r1: bits 1(0001), 3(0011), 5(0101), 7(0111), 9(1001), 11(1011)

r2: bits 2(0010), 3(0011), 6(0110), 7(0111), 10(1010), 11(1011)

r4: bits 4(0100), 5(0101), 6(0110), 7(0111)

r8: bits 8(1000), 9(1001), 10(1010), 11(1011)

Example:



In the first step, we place each bit of the original character in its appropriate position in the m+r bits unit. In the subsequent steps, we calculate the even parities for the various bit combinations.

Calculating the value of r

Example of redundancy bit calculation


Now imagine that data is transmitted.

The receiver takes the transmission and recalculates four new parity bits using same sets of bits used by the sender plus the relevant parity (r) bit for each set.

Then it assembles the new parity values into a binary number in order of r position.

Once the bit is identified, the receiver can reverse its value and correct the error.

Say the transmitter transmits 10011100101 but the receiver receives 10010100101, the bit 7 is error. Then using hamming code we can detect the position of error and can correct the determined corrupted position.

Error detection and correctionSingle-bit Error


Error detection and correctionSingle-bit Error (Example)


Although the hamming code can not correct a burst error directly, it is possible to rearrange the data and then apply the code. Instead of sending all the bits in a data unit together, we can organize N units in a column and then send the first bit of each, followed by the second bit of each, and so on. In this way a burst error of M bits occurs (M<N), the error does not corrupt M bits of one single unit; it corrupts only 1 bit of a unit. With the hamming scheme, we can then correct the corrupted bit in each unit.

(B) Burst Error Correction


Example of Burst Error Correction


For the above figure, we need six data units where each unit is a character with Hamming redundant bits. When these bits arrive at the destination and are organized into data units, each corrupted bit belongs to one unit and is automatically corrected. The trick here is to let the burst error corrupt only 1 bit of each unit.

For more concepts use “ Data Communications and networking” , by FOROUZAN, 3rd Edition.

digital data communication technique

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