Digital acquisition with DANCE

S. Mosby and A. CoutureP-27; Nuclear Astrophysics and StructureLos Alamos National Laboratory

July 29, 2015

FRIB Data Acquisition Workshop

LA-UR-15-25963

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 1 of 9

A Detector for Advanced Neutron Capture Experiments

160 BaF2 crystals w/ 4 crystalgeometries85% efficiency - calorimeterCapable of high trigger rates:250 kHz/ch or 1 MHz on arrayRadioactive / Rare targets(5 µg target in Jan. 2014)

Couple to NEUANCE for fissionneutrons (Stilbene) as well as�-spec (HPGe and LaBr3/CeBr3)Add fission fragment spectrometerfor complete fission experiments(CoFiE)?

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

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Our new DAQ build

Upgrade from Acqiris DC265(cPCI, 4 ch, 8-bit, 500 MS/s, noon-board processing)Choice: CAEN VX1730B(VME64X, 16 ch, 14-bit,500 MS/s, on-board firmware)All channels independently trigger(no coinc requirements, but RUNgate on beam pulse)DANCE + NEUANCE + other = 14boards / 224 channelsMix PHA / PSD firmware ondigitizers depending on specificauxiliary detectorMIDAS-based acquisition software

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 3 of 9

Performance Gains

0.1

1

10

100

Len

gth

ofD

eadtim

eles

sR

ead

(ms)

1 10 100

Mean Time Between Crystal Hits (µs)

Current System

PSD, 100b/evt

PSD, 250b/evt

PSD, 500b/evt152Eu (6 µg/39 MBq)173Lu (50 µg)239Pu (50 mg)195Pt (35 mg)239Pu (1 mg)

DANCE Firmware Comparison

DANCE sees 20 beam pulses per second, PCI bandwidth limitedAcqiris-based DAQ to 512 µs time window when we really want 10 msFPGA firmware decreases data transfered over PCI busFull use of PCIe bus (black line) requires 1 optical link / 2 boards -desired performance needs ⇠300 MB/sec or 3 million peaks/sec to disk

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 4 of 9

BaF2 Pileup

750

800

850

900

Sig

nal

(arb

)

0 100 200 300 400 500 600 700

Sample Number (1 ns spacing)

Fast / slow components w/ 600 ps / 600 ns light curvesEnergy information is in slow decay, 150+ kHz rate creates ⇠20% pileupOld DAQ disentangled in software, now moving into firmware

Sense new pulseTruncate charge integralGenerate second firmware event

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 5 of 9

BaF2 Timing

4096

8192

12288

4096

8192

12288

4096

8192

12288

Sign

al (A

DU

)

4096

8192

12288

10 20 30Sample Number (2 ns/Sample)

4096

8192

12288

Fast component often saturatesfull scale of digitizer (full scaleoptimized for slow component)Modified CFD averages last 5points of waveform (solid green),projects back through fastcomponent to set CFD level(dashed green)⇠1 ns timing this way (⇠30%better than standard CFDalgorithm)Exploring use of analog filters tostretch leading edge, get morepoints to interpolate

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 6 of 9

Event Building

heapsort

Individual Channels Time Ordered Event Structures

Throughput concerns cause us to not perform any data sorting in thefrontendResult: each channel really is an asynchronous data streamPull whole file into memory (offline), heapsort (Numerical Recipes in C

1988) everything into a single data streamLoop through to build coincidences (shaded red)Detector IDs can be used for more complex operations based on detectortypeOther experiments using our software are developing online analysismodules

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

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Looking forward

We see ourselves as DAQ users not developers, so we don’t want towrite our own VHDL

...but we like FPGA performance...For DANCE, DAQ throughput is key (end goal is ⇠3 million peaks/sec)

Firmware pileup handling will be extraordinarily usefulDon’t want the DAQ frontend doing any extra work

Cost: very asynchronous data files

Our timing algorithm is specialized and (for the moment) seems unlikelyto be implemented on an FPGA

Could a future digitizer have a “userland” DSP to process firmware eventsprior to readout?Benefit: don’t record any waveforms (better compression)

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

Slide 8 of 9

Acknowledgements

DANCE:

B. Baramsai (C-NR)T. A. Bredeweg (C-NR)M. Jandel (C-NR)J. M. O’Donnell (P-27)G. Rusev (C-NR)J. Ullmann (P-27)C. Walker (C-NR)

This work benefited from the use of the LANSCE accelerator facility. Workwas performed under the auspices of the U.S. Department of Energy at LosAlamos National Laboratory by the Los Alamos National Security, LLC underContract No. DE-AC52-06NA25396 and at Lawrence Livermore NationalLaboratory by the Lawrence Livermore National Security, LLC under ContractNo. DE-AC52-07NA27344.

Operated by Los Alamos National Security, LLC for the U.S. Department of Energy’s NNSA

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