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Prof. Dr. Julio Villalba-Moreno Dept. Computer Architecture University of Malaga SPAIN Digit Recurrence Floating-point Division under HUB Format

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Page 1: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Prof. Dr. Julio Villalba-Moreno Dept. Computer Architecture

University of Malaga SPAIN

Digit Recurrence Floating-point Division under HUB Format

Page 2: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Talk Outline

• Introduction • HUB format

– Definition – Floating point HUB numbers – Advantages and drawbacks

• Division under HUB – Digit recurrence algorithm – Data path bit-width and number of iterations – On-the-fly conversion – Unbiased round to nearest

• Summary and conclusion

Page 3: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format

Page 4: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • HUB = Half-Unit Biased format

Conventional number in radix β

HUB number in radix β

BIAS

{ BIAS

Digit-vector

unit

Half-unit HUB

Conventional

Page 5: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

1.0001 1.0011 1.0101 1.0111 0.1111 0.1101 0.1011

HUB format

• Example (4 bits, radix 2)

½ulp

Conventional numbers

HUB numbers

1.0001 5 bits

ulp

ulp

Least Significant Bit = 1

Bias

Page 6: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • The extra LSB ILSB

– Value: 1 Implicit bit (ILSB)

• Not stored • Not transmitted • Not needed for representation

Required when operating

x x x . x x x x x x x x x x x 1

Implicit Least Significant Bit

ILSB

Page 7: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Exactly representable numbers (ERN)

(4 bits)

(5 bits)

Conventional ERN (4 bits)

New ERN (5 bits) HUB ERN (5 bits)

Conventional ERN (4 bits)

– The set of ERN is different for both representations – Set(HUB) ∩ Set(Conventional) = Ø (Disjoint sets) – Disantance between two consequtive numbers is the same – The amount of ERN is the same

– Both representations have the same precision

Page 8: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Floating point HUB number in radix-2 (β=2)

Ex Exponen (conventional) Mx Significand (HUB magnitude) Sx Sign (conventional)

– Normalized HUB significand:

BIAS

{ Digit-vector

Page 9: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Normalized Floating point HUB number in radix-2

Representative form Operational form

Digit-vector To operate

ILSB

Page 10: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format Single precision (SP) IEEE-754 and its HUB counterpart

Representative form

Page 11: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Advantages

– Two’s complement bit-wise – Round to nearest by truncation – No double rounding error – Simplicity

• Drawbacks – Not valid for integers – Other rounding modes require carry propagation – Not IEEE compliance

Page 12: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Two’s complement of a HUB number

– Invert the bits of the representative form (bit-wise) » The ILSB=1 No carry propagation

01.010 0111

10.101 1000 +1

10.101 1001

Bit-wise Inversion

01.010 011

10.101 100

10.101 1001

Bit-wise Inversion

HUB number (operational form) HUB number (representative form)

Page 13: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format

x . x x x x x x x x x x x x x x x x x x x

x . x x x x x x x x x x x 1

p - bits

m - bits Truncation

• Round to nearest of a HUB number: by truncation

Mx

M’x

Formally: M’[0:m-2]=M[0:m-2]

ILSB

Page 14: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Proposed rounding: round to nearest by truncation

1.110111

ERN ERN ERN

1.1101100111

1.110111100

1.111000 1.111001 1.110110 1.110101

ERN

Middle point

1.110111

ILSB

Page 15: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format

x . x x x x x x x x x x x 00000000000

x . x x x x x x x x x x 0 1

p - bits

m - bits Truncation &

Forcing LSB*=0

• The tie case (0 for all bits starting at ILSB)

LSB* = LSB of the representative form

Formally: M’[0:m-2]=M[0:m-3,0]

Mx

M’x

ILSB LSB*

Page 16: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format

1. 0 1 0 1 1 0 0 0 0 0

Truncation & Forcing LSB*=0

• The tie case, example

Mx

1. 0 1 0 1 0 1 Mx

Effective rounding down

1. 0 1 0 1 0 0 0 0 0 0 Mx

1. 0 1 0 1 0 1 Mx

Effective rounding up

ILSB LSB* ILSB LSB*

Tie case Tie case

Page 17: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • No double rounding error for HUB numbers

– Truncation avoids the double rounding error

1.001 0111 1001

1.001 1000 1.010

1.001

1st rounding 2nd rounding

Direct rounding

1.001 0111 1001

1.001 01111 1.0011

1.0011

1st rounding 2nd rounding

Direct rounding ILSB

ILSB

ILSB

Conventional

HUB

Page 18: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

HUB format • Efficiency of HUB format

– Fixed-point • [6]: Optimization of FIR filters • [7]: QR decomposition

– Floating-point • [9]: High dynamic range image and video systems • [8]: Quantitative analysis of HUB for floating point

adders, multipliers and conveters

Page 19: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating point [5,8] • Efficiency of HUB format

– Floating-point • Adder:

» Speed-up: 14% » Area reduction: 38% » Power reduction: 25% (single), 15% (double)

• Multiplier » Speedup: 17% » Area reduction: 22% » Power reduction: 2% (single), -2.6% (double)

[8] Measuring the improvement when using HUB formats to implement floating point systems under round to nearest, IEEE Transactions on VLSI 2015, DOI: 10.1109/TVLSI.2015.2502318

Page 20: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating point [5,8] • Efficiency of HUB format

– Floating-point • Division:

– Not studied yet

Objective: extend the HUB format to

Floating-point Division

Page 21: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division under HUB

Page 22: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB

x

d q

HUB number

HUB number

HUB number

M magnitud & normalized

– Division of two FP HUB numbers

Page 23: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB

Bound

Recurrence

Residual

– Digit recurrence algorithm [10]

Selection function

Quotient update

Page 24: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB – Digit recurrence algorithm for HUB

Mq ϵ (½, 2) Mx = 1.xxx…xxx1 Md = 1.ddd…ddd1

Normalization required

– Initialization step – w(0) = x/2 or w(0)=x-d if ρ =1 (maximum redundancy) – w(0) = x/4 if ρ <1

– Termination step – Correction of the initialization (1 or 2 positions left shift) – Correction if final negative residue – Normalization if quotient ϵ (½<1) – Rounding-to-nearest: by truncation / adding 1 ulp (conventional) – Check zero condition if exact quotient is needed

Page 25: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB – Data path bit-width (h)

– m (operational form of HUB number) plus » 1 guard bits due to normalization (bit G) » 1 bit if ρ =1 or 2 bits if ρ <1 (bit S, scaling of the intitilization step)

Page 26: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB – Data path bit-width (h)

Example for ρ=1

HUB Conventional

Conclusion: same data path bit-width for HUB and for its conventional counterpart

Page 27: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB – Operation inside the divisor

d= 1. xxx … xxx1 HUB

HUB

w(N)

HUB

HUB

Divider

No HUB HUB

q d

x

Page 28: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB – Number of iterations

– Depends on the number of bits to be computed by the iterations (h) and the radix (r)

Conclusion: same number of iterations for HUB and for its conventional counterpart

Page 29: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Floating-point division for HUB

Termination step *

Conventional recurrence

HUB Mx= 1. xxx … xxx

Mx= 1. xxx … xxx100

Md= 1. xxx … xxx

Md= 1. xxx … xxx100 Conventional

Termination step

Conventional recurrence

Mx= 1. xxx … xxx000 Md= 1. xxx … xxx000

Conventional with round to nearest HUB

h h h h

N-iterations N-iterations

ILSB

G S G S ILSB

R G S R G S

Page 30: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – On the fly conversion

– Overlapping the final conversion from redundant to conventional with the iterations

– Rounding, correction and normalization is integrated in the on-the-fly conversion of the last digit

Page 31: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding

Q(i) i MSD of the converted quotient (digit vector)

To avoid carry propagation:

On-the-fly algorithm: Concatenation

– On the fly conversion [10,12]

Page 32: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – On the fly conversion [10,12]

– Round to nearest addition of 1 ulp after regular iterations » Last digit can be out of range of the digit set [-a,a] if a ≥ r-2

» qN = a qN+1 ϵ [-a,a]

– A new form QR(i) is defined to combine the correction, normalization and rounding:

Page 33: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – On the fly conversion [10,12]

Rounded signficand before normalization and truncation

Final nomalized signficand:

Page 34: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – On the fly conversion for HUB

(Same as [10,12])

– Round to nearest is carried out by truncation No carry propagation no addition of 1 ulp after regular iterations

» Last digit is always inside the range of the digit set [-a,a]

– The form QR(i) is not required any more

Page 35: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding

Page 36: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – On the fly conversion for HUB We define QC as a function of the sign of w(N):

Final normalizaed and round to nearest HUB quotient (representative form):

QC(0)

sign(w(N))

Page 37: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – Optimizing the on-the-fly conversion

– QC can be obtained from Q(N-1) and QD(N-1) Last cycle:

Page 38: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding

HUB Conventional

Page 39: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – Unbiased round to nearest

– In conventional IEEE standard the tie case never happens [10] – In HUB, it can happen

– The tie case in HUB: – Remainder is zero & LSB of the quotient is zero

(4 bits)

(5 bits)

Conventional ERN (4 bits)

New ERN (5 bits) HUB ERN (5 bits, operational form)

The tie case (quotient before rounding)

1.0000

1.0101 1.0011 1.0101 1.0111 1.1001 1.1011

1.0010 1.0100 1.0110 1.1000 1.1010

LSB

Page 40: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

On-the-fly conversion and rounding – Unbiased round to nearest

Normalized Quotient before rounding 1.xxx…xxxKL

Normalized Quotient before rounding (tie case) 1.xxx…xxxK0 (operational form)

Normalized Quotient after rounding (tie case) 1.xxx…xxx01 (operational form) 1.xxx…xxx0 (representative form)

Page 41: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

Summary and conclusion

– HUB format – Simplify some important operations – Represented with the same number of bits as its conventional

counterpart – In general, it reduces the complexity of the hardware

– Digit recurrence division under HUB – The same data path bit-width as conventional (counterpart) – The same number of iterations – The same selection function – The same hardware than conventional format for the iterations – On-the-fly conversion for a ≥ r-2

» Less harware requirements » The selection of the last digit is simplified

Page 42: Digit Recurrence Floating-point Division under HUB Formatarith23.gforge.inria.fr/slides/Villalba.pdf · Prof. Dr. Julio Villalba-Moreno . Dept. Computer Architecture . University

THANK YOU!

QUESTIONS?