Development of a SiPM readout circuit and a trigger system for microfluidic scintillation detectorsMIKHAIL ASIATICI

08/05/2014

OVERVIEW

• So far

• PicoScope interfacement and preliminary PMT measurements

• Advanced SiPM workshop

• Amplifiers SPICE simulation

• PCBs

• Next steps

• PCB fabrication

• LabVIEW interface for XY table

• Tests with INFN PCBs?

ACQUISITION SYSTEM

1/20

SiPM

PMT

A

BPicoScop

e6403C

C

Dext

LabVIEW

PCUSB

Trigger(s)/signal(s)

in progress

PICOSCOPE 6403C: FEATURES• Input stages

• 350 MHz analog bandwidth (tr = 1 ns)

• 4 channels (+1 external trigger channel)

• AC, DC 1 MΩ, DC 50 Ω coupling

• Sampling

• Minimum sampling time: 200 ps 1 channel, 800 ps 2+ channels

• 512 MS internal memory

• Complex trigger conditions available

• Interfacing

• USB 3.0

• SDK available

2/20

C# INTERFACE

3/20

LABVIEW INTERFACE: OVERVIEW

4/20

LABVIEW INTERFACE: FEATURES (1)

5/20

• Each channel can be independently

• Set as signal, trigger or disabled (temperature and timebase input readily implementable)

• Connected to any pulse source (PMT, SiPM, …)

• Trigger modes

• Self trigger (on any signal channel)

• Single external trigger

• A function generator can emulate a periodic/random trigger

• Coincidence trigger with programmable coincidence window

• Online pulse integral calculation and histogram generation

• Optionally, remove pulses DC component (-> pedestal) and/or store absolute value of integrals

LABVIEW INTERFACE: FEATURES (2)

6/20

• Waveforms circular buffer

• Optionally sortable by integral value

• Visual indication of the integral of the current waveform on the histogram

• File logging

• XML format

• Easy to debug, to read and to parse

• Both events (integrals, timestamp, temperature and trigger position) and capture settings

• Files can be read back in LabVIEW to load events and capture settings

• An external C++ program performs XML -> ROOT conversion

LABVIEW INTERFACE: PMT ACQUISITIONS

7/20

• No source, no scintillator, Vbias = 1000 V, 25 ns integration

time, 50Ω couplingPeriodic trigger (10 Hz) Self trigger (- 5 mV, falling edge)

Thanks Pietro!

LABVIEW INTERFACE: PMT ACQUISITIONS

8/20

• Vbias = 1000 V, 100 ns integration time, 50 Ω coupling,

external trigger provided by NIM coincidence module from 2 scintillating fibers

90Sr source, no tile 90Sr source with scintillating tile (≈ 1 cm2)

Thanks Pietro!

CTA ADVANCED SIPM WORKSHOP- March 24-26, Cartigny- Better understanding of SiPM physics and models- Examples of SiPM readout circuits (PCBs based on

some of them)- Contacts with companies

- SensL could provide custom linear array for 50-60 k€- Philips could have some digital SiPM providing

spatial information in development- Waiting for NDA?

9/20

PCB: OVERVIEW

10/20

Step-up switching converter

Amplifiers

Low voltage power supply (4.75 V – 6 V)Optionally -5 V

LV LV

HV

PicoScope

SiPM(SMD package)

connector

(coax) cable(or direct mounting?)

AMPLIFIERS SIMULATIONS

• For SiPM: equivalent model by F. Corsi et al.1

• Parameters from one of the devices presented in the paper (SiPM IRST), with Q = e*M ≈ 200 fC (M ≈ 1.25 x 106 for the devices received)

• Amplifier 1: transconductance amplifier + voltage amplifier (single stage from C. Piemonte et al.)2 with wide-band voltage-feedback op amp (ADA4817)

11/20

1 F. Corsi et al. – Modelling a silicon photomultiplier (SiPM) as a signal source for optimum front-end design2 C. Piemonte et al. – Development of an automatic procedure for the characterization of silicon photomultipliers

≈ 10 mV/pe single stage≈ 100 mV/pe double stage(but slower)Tsettle5% ≈ 50 – 150 ns(trade gain for speed)Very low noise (EIN = 4.4 nV/sqrt(Hz))

AMPLIFIERS SIMULATIONS

• Amplifier 2: transconductance amplifier + non-inverting amplifier with wide band current-feedback op amp (AD8000) from F. Giordano et al.

12/20F. Giordano et al. – Tests on FBK SiPM sensor for a CTA-INFN Progetto PREMIALE demonstrator (presentation)

≈ 10 mV/pe single stage≈ 80 mV/pe double stageTsettle5% ≈ 40 – 60 ns(fast)Higher noise (EIN = 520 nV/sqrt(Hz))

AMPLIFIERS PERFORMANCES SUMMARY

• Gain in the order of 10s mV/pe, time constants in the order of 10s-100s ns

• Amplifier 1 less noisy

• Amplifier 2 faster

13/20

AMPLIFIERS PCB REQUIREMENTS

• The PCB is meant as a test board from which possibly derive a definitive configuration, so it is important to ensure the maximum possible flexibility

• For both the configurations, the signal can be extracted after single or double stage

• For all of the 4 signal sources, the output can be exctracted before/after a decoupling capacitor

• Capacitor performs on-board AC coupling, but might results in signal reflections

• Optional dual supply +/- 5 V as an additional way to produce a signal with no DC component (but maybe decoupling capacitor is enough)

• All the feedback resistors are potentiometers, to allow gain tuning

• There is always a certain degree of gain-bandwidth tradeoff

• Avoid saturation for events with a higher number of photoelectrons

• Bypassable on-board linear voltage regulator

• Compare noise with on-board/external voltage regulation14/20

SMD SIPM ADAPTER BOARD

15/20

Holes for mechanical supportSize? Position? Number?(currently M2)

SiPM (Hamamatsu S12571-050P)

Connector:- currently: or

- LEMO? BNC?

- Direct plugging?

(dimensions in mm)

AMPLIFIERS BOARD

16/20Power supply (HV, LV, optional -5 V, GND)

SiPM connectors (same choices as for SiPM boards)

Output connectors (here pin headers, different connector?)

Jumpers for on-board/external voltage regulation choice

Jumpers for single/dual voltagesupply choice

POWER SUPPLY BOARD• Step-up switching voltage regulator, to avoid the need of

an high-voltage supply just for SiPM biasing

• Output voltage tuning

• Integrated DAC with serial interface

• Digital pins available for a possible future integration with e.g. a microcontroller

• Potentiometer (here not shown)

• Input voltage range: 4.75 V – 6 V

• Output voltage range: 64 V – 69 V @ 2 mA

• Vop of the available SiPM: 66.6 V ± 1.3 V

• Recommended Vop range: 2.1 V

• Bypassable additional LC filter at the output to reduce ripple (not shown)

• Same architecture used for SiPM biasing in the Schwarzschild-Couder CTA Telescope

17/20K. Meagher (Georgia Tech) – SiPM Electronics for the Schwarzschild-Couder Telescope (presentation)

POWER SUPPLY BOARD

18/20

LV in (4.75 V – 6 V)

HV out (64 V – 69 V)

Digital interface pins

Jumpers to choose DAC/potentiometerfor output voltage regulation

PCB: TO BE DEFINED

• Connectors

• Physical dimensions

• Size, number and position of mounting holes

• (Number of SiPM adapter boards to be fabricated)

19/20

NEXT STEPS

• SiPM

• PCB fabrication

• (test with INFN amplifiers?)

• Amplifiers test and characterization

• SiPM signals acquisition

• XY table

• Assembly

• Development of a LabVIEW interface

20/20

THANK YOU FOR YOUR ATTENTION