design and verify embedded signal processing systems using...
TRANSCRIPT
1 © 2013 The MathWorks, Inc.
Design and Verify
Embedded Signal Processing Systems
Using MATLAB and Simulink
Giorgia Zucchelli, Application Engineer, MathWorks
10 January 2013, Technical University Eindhoven
2
Agenda
Introduction to Model Based Design
Application example: Parametric Audio Equalizer
– Targeting a fixed-point embedded processor
Workflow overview
Conclusions
3
INTRODUCTION
4
What is Model Based Design?
Methodology to design complex systems
– Using models and simulation
– Using tools for automation
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Why using Model Based Design?
Find errors early
Reduce costly prototypes
Increase productivity
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1. Focus on algorithmic design
2. Anticipate implementation
3. Verification test-benches
MathWorks model-based design
speeds up the development process
INTEGRATION
IMPLEMENTATION
TE
ST
& V
ER
IFIC
AT
ION
DESIGN
RESEARCH REQUIREMENTS
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Improve team communication with
multi-domain executable specifications
Many trusted functions
Use the most suitable
modeling approach
INTEGRATION
IMPLEMENTATION
DESIGN
TE
ST
& V
ER
IFIC
AT
ION
RESEARCH REQUIREMENTS
Algorithms
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Achieve early verification with refined models
anticipating real impairments
Bit-true simulation
Multi-domain physical
models
INTEGRATION
IMPLEMENTATION
DESIGN
TE
ST
& V
ER
IFIC
AT
ION
RESEARCH REQUIREMENTS
Fixed-Point
Physical Models
Algorithms
Analog Digital
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Rapid prototyping with code generation:
less debugging, better design
C / C++
Synthesizable HDL
INTEGRATION
IMPLEMENTATION
DESIGN
TE
ST
& V
ER
IFIC
AT
ION
RESEARCH REQUIREMENTS
Fixed-Point
Physical Models
Algorithms
Analog Digital
FPGA ASIC
VHDL, Verilog
MCU DSP
C, C++
Processors
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One testbench fits all:
unambiguous verification of the specs
INTEGRATION
IMPLEMENTATION
DESIGN
TE
ST
& V
ER
IFIC
AT
ION
RESEARCH REQUIREMENTS
Fixed-Point
Physical Models
Algorithms
Analog Digital System-level test
Co-simulation
“Hardware in the loop”
verification
FPGA ASIC
VHDL, Verilog
MCU DSP
C, C++
Processors
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APPLICATION EXAMPLE
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Demo: Parametric Audio Equalizer Digital filters used to adjust the frequency content of an audio signal
Parametric response that can be run-time controlled
Three band equalizer
– Low Band: 60 to 1500 Hz
– Mid Range: 1200 to 4800 Hz
– High Range: 4800 to 12 kHz
– Amplitude range: -8 to +8 dB
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TEXAS INSTRUMENTS
DM6437 EVM
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Target #1: TI DM6437 EVM
CAN/Serial Ethernet USB
JTAG
Processor
PCI
Video
Audio
PMU
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DM6437 EVM - Processor
Highest-performance fixed-point DSP
generation in the TMS320C6000™ DSP
platform
Very-long-instruction-word (VLIW)
architecture developed by Texas
Instruments (TI)
Some of the specs:
– 2.5-, 2-, 1.67, 1.51-, 1.43-ns Instruction Cycle
Time
– 400-, 500-, 600-, 660-, 700-MHz C64x+™
Clock Rate
– Eight 32-Bit C64x+ Instructions/Cycle
– 3200, 4000, 4800, 5280, 5600 MIPS
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DM6437 – Software stack
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WORKFLOW OVERVIEW
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Simulink - Host
PC-Based Audio Prototyping
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Simulink / MATLAB
Data
source
Data
analysis
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Simulink - Host
Fixed-Point Modeling
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Fixed-Point
Simulink / MATLAB
Data
source
Data
analysis
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Simulink - Host
C Code Verification
C code
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Black Box
S-function
Data
analysis
Data
source
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Simulink - Host
Automatic C Code Generation
Embedded
C
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Fixed-Point
Simulink / MATLAB
Data
analysis
Data
source
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Data
analysis
Data
source
Simulink - Host
Processor-in-the-Loop
?
Target
Embedded
C
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Simulink / MATLAB
? ?
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Simulink - Host
On-Target Rapid Prototyping
?
Target
DA
C
Embedded
C AD
C
INTEGRATION
IMPLEMENTATION
DESIGN
REQUIREMENTS
Fixed-Point
MCU DSP
C, C++
Processors
Algorithms
TE
ST
& V
ER
IFIC
AT
ION
Simulink / MATLAB
Data
analysis
Data
source
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Fixed-point design: motivation
ASIC/FPGA or fixed-point DSP implementation
Saves power and/or cost
Word length and fraction length must be specified
sign + integer fractional
L
L-N N
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Fixed-point design: challenges
It introduces degradation that must be assessed
– Quantization error
– Overflow / Underflow
All variables must be converted including internals: this
is error prone and often uninspiring
sign + integer fractional
L
L-N N
Quantization overflow
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Fixed-point data type in MATLAB / Simulink
A_fp = fi(A, 1, 32, 10)
sign + integer fractional
L
L-N N
Quantization overflow
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CONCLUSIONS
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Quickly Iterate between Idea and Prototype
First prototype is functionally correct with automatic C
code generation
Spend your time in optimizing rather than debugging the
code
Find errors reusing the same testbench at each design
step
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