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Design and development of a two-phase closed loop

thermosyphon for CPU cooling

Miguel Andrade Pereira Barata Moura

miguel.moura@ist.utl.pt

IN+ - Instituto Superior Técnico, Universidade de Lisboa, Av. Rovisco Pais, 1049-001 Lisbon, Portugal

ABSTRACT The present work comprises the design and development of a benchmark facility based on a two-phase closed

loop thermosyphon. This study aims at inferring on the feasibility of pool boiling of dielectric fluids to be used as a

CPU cooling technique.

The devised system acts as a modular benchmark facility, allowing a detailed analysis of the various parameters

that influence its performance, which were investigated for steady state and transient working conditions.

Regarding the use of micro-structured surfaces, the micro-patterns consist of arrays of laser etched cavities, with

fixed shape and dimensions, so the sole varying parameter is the distance between cavities. The results show

that the overall thermal resistance is reduced 21% using the surface with cavities distance of 300μm, when

compared to the performance evaluated for a smooth surface. In transient power steps, the onset of nucleate

boiling was identified as the critical parameter influencing the system performance, due to the overshoot in the

temperature above steady-state values.

The tilt angle affects the overall performance of the system: a 10º inclination, compared to the horizontal position

lead to a decrease in 5% of the overall thermal resistance.

Concerning the orientation of the evaporator, the cooling system has a lower performance for the evaporator

mounted in the vertical position. However, this outcome is balanced by the benefits arising from more application

oriented implementation.

Based on this analysis, the geometry of the final system was optimized. The final thermal resistance achieved

was 𝑅𝑗𝑎=0.29 ºC/W for a heat load Q=130W.

Keywords

Pool boiling, closed loop thermosiphon, CPU cooling system, overall thermal resistance, micro-structured

surfaces

INTRODUCTION

Moore’s law states that the number of transistors in an integrated circuit (IC) approximately doubles every two

years [1]. In fact, half-century later this prediction is held true, in such a way that it has become a mandatory

target in every major computer-chip manufacturers. The exponential increase in the number of transistors

associated to larger clock frequencies and subsequently smaller packaging led to a significant increase of the

heat power dissipated. Such increase has been possible until 2004, when the Intel Pentium 4 processor appears

and becomes widely known due to severe thermal management failures. Single-core architecture was replaced

by multi-core architectures along with multi-thread software optimization, distributing the computational load

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across multiple and less powerful processors [3]. However, a decrease in the performance slope is notorious after

the multi-tread implementation when considering numerical simulations or computer gaming applications [4].

Hennessy and Patterson [2] state that thermal management of electronic devices is the major limitation in the

development of new processors in the near future. [5] state that the conventional air cooled systems have trouble

accompanying the heat flux generated by constant increase of clock frequency and number of transistors. In line

with this, the development of new CPU cooling techniques has been broadly studied. Liquid single-phase cooling

or two-phase heat-pipe heatsinks are the most efficient technologies available on the market, although in spite of

that, they are still widely studied in the literature [e.g. 6-7]. Phase-change technologies are considered as the

most promising heat transfer techniques owing to the latent heat of vaporization, which is associated to typical

heat transfer coefficients of 104 W/m2K, much higher that the value of 102 W/m2K, typical obtained from air-forced

convection. In this context, forced convection two-phase micro-channels, spray-cooling or pool boiling, among

others are widely studied [e.g. 8-10]. Considering the later, in spite of being characterized with a typical lower heat

transfer coefficient, when compared to other two, it is in fact considered as the most promising solution in the field

of electronic cooling, due to its inherent lower level of complexity, the higher reliability, ease of manufacturing and

implementation. However despite flourishing literature review exist in the optimization process of this device [11-

12], from the literature reviewed only few studies investigated the possibility of implementing a cooling solution for

CPU, based on two phase thermosyphons [13-16]. In any case, the authors who performed this kind of analysis

all agreed that there is in fact the convenience of using such a device as a CPU cooling technique.

In this context, the present work addresses the investigation, design and development of a bench mark

experimental facility based on a two-phase closed loop thermosyphon to address the feasibility of pool boiling as

a cooling technique for the replacement of conventional ones and implementation on desktop computers for

dedicated use.

CONTROL AND VALIDATION OF A TRANSISTOR AS A CPU SIMULATOR

Controlling circuit

Although in a different scale, a transistor is in fact the fundamental building element of a processor’s core

integrated circuit. The experimental setup shown in Figure 1 was used to understand and to optimize all the

parameters in order to precisely control the power dissipate by a transistor.

a) b)

Figure 1 - a) Electronic control circuit diagram; b) Experimental setup

In order to simulate an extremely demanding CPU a Pentium 4 like configuration was chosen, due to the fact that

it has a single-core architecture which means that the dissipated heat flux through the die is much higher than that

in recent multi-core technologies. The selected transistor is a IRFP450 N-channel power MOSFET with a TO-247

package. Relevant characteristics are the maximum dissipated power of 190W and its Integrated Heat Spreader -

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IHS which has a contact area of 172mm2. Thus, this device can simulate the thermal behavior of the

aforementioned processor, with a maximum heat flux dissipation of 110.47W/cm2. Maximum junction temperature

is 150ºC, much higher than in any CPU, to allow a safe margin in the operating temperature of the system.

Furthermore, its considerably high on-state internal resistance allows higher voltage for the same current and

dissipated power, thus allowing the power supply to work in a more stable condition. Figure 2 depicts a visual

comparison between an actual die size of a 2005 Intel Pentium 4 CPU and the transistor chosen. CPU die size is

200mm2 and the transistor IHS is 172mm2.

Figure 2 – Intel Pentium 4 IHS bottom view (left), processor die top view (centre) and selected transistor bottom view (right).

The developed electronic circuit imposes constant current in the transistor, so the user can control the dissipated

power by means of the DC power supply frontal voltage controls. However, the integrated potentiometer does not

provide precise control of the resulting dissipated power. This means that, to allow a full and more precise

simulation the CPU thermal behavior, automation of the power supply is also required. Due to the

abovementioned reason, a control system has to be developed, comprising a user interface panel.

The resulting circuit and user interface panel comprise the following features: manual control of voltage output;

automatic control via programed micro-controller; trigger of a pre-programed sequence by means of micro-

controller programing.

Finally, the transistor CPU simulated system must be integrated in a functional way with the cooling device to be

developed. In this scope, the entire package is surrounded by a PTFE 2cm thickness block and 10cm in diameter,

to minimize heat losses to the environment. The only open boundary is the top of the IHS to interact with the

cooling system. Four compression springs hold the simulated package together and contact pressure

reproducibility is assured due to known spring deflection, in order to reproduce the same contact resistance

between the transistor, thermal grease and IHS in every experiment. Concerning junction temperature acquisition,

a 0.6mm hole was drilled in the side base of the transistor up to the mid-section to accommodate a 0.5mm K-

Type insulated probe thermocouple. Insulated probes have lower response time but, reminding that the drilled

section of the transistor is in electrical contact with the Emitter, a voltage difference above ground is expected,

which would compromise temperature readings

Validation

In the present work, efforts were conducted in order to accurately replicate a CPU thermal behavior, namely the

power density, the die size and the materials. Although the IHS has the exact same material and dimensions, and

the simulated die dimensions are similar to those of s real CPU, the thermal response of this CPU simulator must

be validated under steady-state and transient power loads. Infrared thermography was used to infer on the

temperature distribution and peak temperature of the transistor and of the CPU, respectively. An example of

obtained temperature profile of the two devices in reported in Figure 3.

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ºC

a) b)

Figure 3 - IR image of CPU and transistor assembly at PD=15W. a) Intel Pentium 4; b) Simulator of the CPU thermal behaviour. Dashed lines indicate acquisition region.

The dashed line in the figures indicates the pixel region where temperature values were acquired. These are

quantitatively reported in Figure 4. From the plot depicted in this figure, it can be clearly inferred that the

temperature distribution and the maximum temperature of the two tested electronic devices is very similar. This

confirms that the chosen transistor can properly simulate the thermal behaviour of the CPU under investigation, in

the present study.

Figure 4 - Temperature profile a) and maximum temperature b) measured by IR thermography

FINAL EXPERIMENTAL FACILITY DESIGN

Evaporator design

Given the importance of the evaporator to the overall thermal performance of the cooler, particular attention was

given to the design of this element. The major conditions to be satisfied in the design of the evaporator are listed

as follows:

- Possibility to interchange the evaporator surface.

- Material compatibility with the fluid and resistance to the operational temperature.

- Possibility to change the size of the pool.

- Presence of Vapour line and Liquid line connections

- Possibility to accommodate pressure and temperature sensors

- Possibility to operate in vertical and horizontal positions.

- Minimum size compatible with thermal requirement of the fluid (critical heat flux 18 𝑊/𝑐𝑚2 ).

PD

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Due to structural stiffness and ease of manufacturing, an acrylic cylindrical based evaporator was selected, with

an inner diameter of 42 mm. The cylindrical evaporator was machined with two grooves for Viton O-rings, a liquid

return line and a slot to accommodate the thermocouple measuring the liquid saturation temperature. The cover

comprises the pressure transducer and the vapour outlet.

The final design of the evaporator is schematically represented in Figure 5.

1. Liquid inlet line;

2. Vapour outlet line;

3. Aluminum interface surface;

4. Pressure tap;

5. Pressure taps for differential

measurement;

6. Thermocouples;

7. Fill / exhaust valve;

8. CPU simulated heat source;

Figure 5 - Final design of the evaporator

Condenser design

The selected condenser consists radiator-like geometry comprising flat tubes with plain serpentine fins. Due to the

particular geometry of the system, no corresponding correlations were found in literature. Hence, a numerical

CFD simulation using a commercial code (COMSOL Multiphysics 4.3b) was carried out in order to infer on the

heat transfer performance of the abovementioned geometry. Figure 6 identifies the simulated domains and the

boundary conditions used in the simulation.

a) b) c)

Figure 6 - a) CAD model; b) fluid and solid domain mesh; c) Qualitative temperature distribution in both domains for ReDh = 280 in a single element of the plain serpentine fins.

The performed simulation allowed evaluating the heat transfer of the entire condenser. The resulting value was

equal to 217 𝑊 at atmospheric pressure, which is an acceptable value. The simulation shows that a single row of

22 mm flat tubes with a frontal area of 120 𝑚𝑚 x 120 𝑚𝑚 is sufficient to remove the heat generated in the process

and consequently condense the fluid.

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Figure 7 - Overview of the final condenser

Final experimental facility design

The thermosyphon developed here was then tested in a modular benchmark facility, which was assembled to

address the effect of several parameters on the performance of the devised cooling system. In this context, the

effect of the surface structure, condenser positioning and arrangement, evaporator orientation and dimensions

was investigated for both steady and transient operating conditions.

Figure 8 - Overview of the complete two phase closed loop thermosyphon

The following measurement instrumentation was use during the test:

- A GEFRAN -1..2bar gauge pressure is flush-mounted into the vapour line, connecting the evaporator to

the condenser inlet. Error in the pressure reading according to the manufacturer were of 0.05%FSO

acquired by a NI USB-6008 board from National Instruments, with 12-bit resolution and acquisition

frequency to 1.0 𝑘𝐻𝑧.

- 6 K-type thermocouples by Omega, with an uncertainty of ±1ºC. The thermocouples were positioned

respectively, inside the IHS of the transistor, inside the evaporator, at the inlet and outlet of the

evaporator and of the condenser. The output signal of the thermocouples is acquired with a Data

Translation DT9828 12-bit ADC cold-junction compensated.

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RESULTS AND DISCUSSION

Effect of surface microstructure

The parametric study developed in this work focused on the distance between cavities and, as a result, the

number of cavities in each aluminum surface. Hence, the surfaces are micro-structured with regular arrays of

cavities, with fixed size and shape. The distance between cavities is 800µm, 600µm, 400µm and 300µm.

In Figure 9a, analyzing the evolution of the thermal resistance vs the imposed heat load, under steady-state

conditions, the thermal resistance shows a clear decreasing trend as the thermal load increases. The surface

having the smallest distance between cavities and therefore the largest cavity density provided the best

performance of the system, which can be attributed to the increased number of nucleation sites, with

corresponding higher heat removal.

Tests were also performed under transient conditions, to infer on the response of the system to a steep increase

of the heat load. The plot reported in Figure 9b evidences the appearance of an overshoot, occurring due to the

fast transition from the natural convection to the nucleate boiling regime. Considering these transient power steps

and also a benchmark power load of a typical CPU, the onset of nucleate boiling was identified as the critical

parameter influencing the system performance, due to the overshoot in temperature above steady-state values.

However, due to stochastic nature of the phenomena, little conclusions can be withdrawn, exception made to the

fact that higher cavity density minimizes the overshoot. Furthermore, maximum overshoot recorded across the

entire power range tested with the surfaces of 400m and 300m was lower than 4ºC and the peak temperature

at overshoot was always lower the steady-state settled temperature, as summarized in Table 1.

a) b)

Figure 9 – a) Evolution of the thermal resistance versus the applied heat load and cavity distance; b) Typical step response in junction temperature.

Table 1 - Values of overshoot for transient conditions (power steps) obtained with the various micro-structured surfaces analysed in the present work

40 W 60 W 80 W 100 W 125 W 150 W

Smooth 0.7 1.9 2.4 5.4 4.6 7.9

𝐒 = 𝟖𝟎𝟎µ𝐦 5.0 5.5 4.3 4.5 4.0 4.8

𝐒 = 𝟔𝟎𝟎µ𝐦 4.4 4.0 4.1 3.1 4.1 2.1

𝐒 = 𝟒𝟎𝟎µ𝐦 1.7 2.2 3.8 2.2 1.0 1.0

𝐒 = 𝟑𝟎𝟎µ𝐦 1.5 2.5 3.4 3.8 1.7 0.3

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Effect of condenser tilt angle

Regarding the effect of the tilt angle of the condenser, the results clearly show the existence of an optimum angle.

This trend is particularly clear with increasing heat loads. A polynomial fit to the resulting data allows a rough

estimative of the optimum angle, as function of the power dissipated by the cooling system. These results are

depicted in Figure 10. In the design process of a thermosyphon for CPU cooling, the optimum tilt angle could be

chosen according to the abovementioned results. Looking towards a practical application of the devised system

and considering, for instance the CPU as an Intel i7 with a Thermal Design Point TDP=95W, it is recommended to

use a tilt angle between 9º and 13º degrees facing downward. Fortunately, the resulting optimum angle also

benefits the implementation inside the highly restricted space that is available inside a modern desktop.

Figure 10- Effect of the condenser tilt angle on the overall thermal resistance

Effect of evaporator orientation

Considering the usual vertical orientation of common processors inside a tower PC, the effect of the evaporator

orientation was investigated. The tests reported in Figure 11 show, as expected, a small decrease in the

performance of the system, when comparing to that obtained when the evaporation is mounted in the horizontal

position. However, this outcome is balanced by the benefits arising from a more application oriented

implementation.

Figure 11 - Effect of the evaporator orientation on the performance of the system

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FINAL REMARKS

The present work comprises the design and development of a bench mark facility, which is based on a two-phase

closed loop thermosyphon. This study aims at demonstrating the feasibility of pool boiling of dielectric fluids to be

used as a CPU cooling technique.

The devised system acts as a modular benchmark facility, allowing a detailed analysis of the various parameters

that may affect its performance, which were investigated for steady state and transient working conditions.

Based on this detailed analysis, the geometry of the final system was optimized. The final thermal resistance

achieved was 𝑅𝑗𝑎=0.29 ºC/W for a heat load Q=130W.

NOMENCLATURE

Acronyms

ADC Analog to Digital Converter

CFD Computational Fluid Dynamics

CPU Central Processor Unit

IC Integrated Circuit

IHS Integrated Heat Spreader

IR Infra-Red

Latin Letters

𝐼 electrical current 𝐴

𝑞′′ heat flux 𝑊 𝑐𝑚2⁄

𝑄 heat rate 𝑊

𝑅𝑗𝑎 junction to ambient thermal resistance ℃ 𝑊⁄

𝑆 cavity distance 𝜇𝑚

𝑇 temperature ℃

𝑈 electrical voltage 𝑉

Subscripts

amb ambient

j junction

max maximum

sat at saturation conditions

ACKNOWLEDGEMENTS The authors are grateful to Fundação para a Ciência e a Tecnologia (FCT) for partially financing the research under the framework of the project RECI/EMS-SIS/0147/2012 and for supporting M. Moura with a research fellowship.

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