design and analysis of a fso mimo transmitter receiver ... · space time coding (stc) is a...

Design and Analysis of a FSO MIMO Transmitter Receiver CircuitCompatible with Space Time Coding

A Thesis

Submitted to the Faculty

of

Drexel University

by

Shrenik Ashwin Vora

in partial fulfillment of the

requirements for the degree

of

Master of Science in Electrical Engineering

September 2010

ii

Dedications

I gratefully dedicate this thesis to my Parents who have done everything possible to

help me realize my dreams.

iii

Acknowledgments

I would like to thank my advisors Dr. Timothy Kurzweg and Dr. Kapil Dandekar for

their constant support and guidance in helping me successfully complete this work. I

would also like to thank Douglas Pfeil for patiently helping me achieve my research

goals. I thank my lab mates and friends; Weston Aenchbacher, Milad Alemohammad,

Mihnea Dumitru, Prathaban Mookiah, Nicholas Vacirca and everyone at the Drexel

Opto-Electro-Mechanical Lab and the Drexel Wiresless System Lab who helped me

complete this thesis by sharing their knowledge and resources.

A special thanks to my little sister, Riddhi, who by always looking up to me

has encouraged me to do my best. I would also like to thank all my friends who

made my stay in the United States pleasant and memorable. Lastly, I would like

to thank Megha for her support and encouragement at times when completing this

thesis seemed impossible.

This material is based upon work supported by the National Science Foundation

under Grant Numbers 0854946 and 0923003.

iv

Table of Contents

LIST OF TABLES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viLIST OF FIGURES . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . viiABSTRACT .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . x1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1

1.1 Motivation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11.2 Thesis Contributions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41.3 Thesis Organization . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

2. Background . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1 Optics for Communications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

2.1.1 Free Space Optics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 72.1.2 Chip-to-Chip Communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 82.1.3 Previous Work in Chip-to-Chip FSO. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

2.2 Space-Time Coding for FSO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92.3 System Components . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

2.3.1 Comparison of VCSEL and Edge-emitting LASER .. . . . . . . . . . . . . . 122.3.2 Vertical Cavity Surface Emitting Laser (VCSEL) . . . . . . . . . . . . . . . . . 132.3.3 Photodiodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.3.3.1 PIN Photodiode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 163. Component Selection and Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1 VCSEL Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 183.1.1 Thorlabs ‘VCSEL-850’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.1.2 Lasermate ‘VCT-F85A32-IS-V2’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 203.1.3 Finisar ‘HFE4094-342’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.2 VCSEL Driver Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 213.2.1 LinearTech ‘LTC5100’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 223.2.2 Maxim ‘MAX3740A’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 Photodiode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.3.1 Thorlabs ‘FDS010’. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 243.3.2 Lasermate ‘PDT-A85A30’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253.3.3 Finisar ‘HFE3081-103’ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

3.4 Receiver Circuit Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 253.4.1 Limiting Amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 263.4.2 Conversion of Balanced to Unbalanced Signal and Amplification 273.4.3 Amplification using Matched Amplifiers . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

3.5 Summary of Chosen Components and Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . 303.6 VCSEL Driver Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

3.6.1 Circuit Design and Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 313.6.2 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 353.6.3 Board Fabrication and Testing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 373.6.4 VCSEL Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

3.7 Receiver Board Design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

v

3.7.1 Circuit Design and Schematic . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 393.7.2 Layout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 403.7.3 Board Fabrication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

4. FSO Link Tests and Sytem Performance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.1 SISO Link Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 434.2 Data Rate Tests. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

4.2.1 Test Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 484.2.2 Test Results and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

4.3 Range Tests . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 524.3.1 Test Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 534.3.2 Test Results and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54

4.4 Noise Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 574.4.1 Test Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 584.4.2 Test Results and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 60

4.5 MISO Tests and Space-Time Coding Evaluation . . . . . . . . . . . . . . . . . . . . . . . . . . 644.5.1 Test Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 654.5.2 Test Results and Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 66

5. Conclusions and Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 695.1 Conclusions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 695.2 Future Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71

BIBLIOGRAPHY .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73APPENDICES. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .A. Transmitter Board User Guide . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77

A.1 Basic Setup. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77A.2 Common Cathode Operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 77A.3 Operation without Monitoring Photodiode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 78

B. Gerber Files for the Transmitter Board . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80C. MATLAB Script for BER Calculation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 87D. MATLAB Script for Noise Analysis . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 90E. MATLAB Script for Space Time Coding Simulation . . . . . . . . . . . . . . . . . . . . . . . . . . . 93F. List Of Acronyms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 95

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List of Tables

3.1 Comparison of VCSEL options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.2 Comparison of VCSEL Driver options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3 Comparison of Photodiode options . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

4.1 Comparison of Variances for Noise Distribution at Different Points in theCircuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65

A.1 Board Control Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79

vii

List of Figures

1.1 FSO System with Aligned VCSEL-Photodiode Pairs . . . . . . . . . . . . . . . . . . . . . . . . . 3

1.2 FSO System with Misaligned VCSEL-Photodiode Pairs . . . . . . . . . . . . . . . . . . . . . 3

1.3 Increased Crosstalk in FSO Systems with Densely Packed Component Ar-rays Separated with Long Interconnection Distances . . . . . . . . . . . . . . . . . . . . . . . . . 4

1.4 Scope of Work . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5

2.1 Representation of the FAST-Net concept[10] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

2.2 Space Time Coding . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

2.3 VCSEL Model [20]. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13

2.4 Cross Section of a Single Mode VCSEL (left) and a Multi Mode VCSEL(right) [5] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.5 Near Field Images of Two Different Multimode VCSELs with IncreasingCurrent [5] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

2.6 Schematic of a typical PIN photodiode[7] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

3.1 Block Diagram for Components Selection and Board Design for a CompleteFSO System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

3.2 Layout of MAX3740A Evaluation Board[36] . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.3 Block Diagram of the Receiver Circuit using a Limiting Amplifier . . . . . . . . . . 27

3.4 Equivalent circuit of a Ruthroff Balun Transformer [41]. . . . . . . . . . . . . . . . . . . . . . 28

3.5 Block Diagram of the Receiver Circuit using a BALUN and an Amplifier . . 28

3.6 Block Diagram of the Receiver Circuit using a Dual Matched Amplifier . . . . 30

3.7 Partial Schematic of the VCSEL Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

3.8 Partial Layout of the VCSEL Driver . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

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3.9 VCSEL Driver Board after Fabrication and Assembly. . . . . . . . . . . . . . . . . . . . . . . . 38

3.10 Completed VCSEL Board. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

3.11 Schematic of a Single Receiver Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

3.12 Layout for a Single Receiver Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42

4.1 Block Diagram of SISO Link . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46

4.2 SISO Link Setup . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47

4.3 Snapshots of Eye-Diagrams for Data Rates 100Mbps through 1000Mbps . . . 49

4.4 Eye height versus Data Rate. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

4.5 Percent eye width versus data rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

4.6 Delay measurement for 100Mbps Signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 52

4.7 BER vs. Interconnection Distance between VCSEL and Photodiode fordifferent bias and modulation currents at 100Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

4.8 BER vs. Interconnection Distance between VCSEL and Photodiode fordifferent bias and modulation currents at 500Mbps . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

4.9 BER vs. Interconnection Distance between VCSEL and Photodiode fordifferent bias and modulation currents at 1000Mbps . . . . . . . . . . . . . . . . . . . . . . . . . 56

4.10 Eye diagram for the output signal with 4mA of bias and 8mA of modula-tion currents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

4.11 Positions for Noise Analysis in the SISO System. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

4.12 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Photodiode/TIA at Ib = 8mA&Im = 8mA at the LeastPossible Interconnection Distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61

4.13 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Photodiode/TIA at Ib = 8mA, Im = 8mA & InterconnectionDistance=6mm .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

ix

4.14 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Photodiode/TIA at Ib = 8mA, Im = 8mA & InterconnectionDistance=12mm .. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62

4.15 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the BALUN at Ib = 8mA, Im = 8mA & the Least PossibleInterconnection Distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

4.16 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Amplifier at Ib = 8mA, Im = 8mA & the Least PossibleInterconnection Distance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63

4.17 Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Transmitter at Ib = 8mA&Im = 8mA . . . . . . . . . . . . . . . . . . . . . . . . . . 64

4.18 VCSEL-Photodiode Setup for Space-Time Coding Evaluation . . . . . . . . . . . . . . . 67

4.19 Expected Improvement in BER using Space Time Coding . . . . . . . . . . . . . . . . . . . 68

x

AbstractDesign and Analysis of a FSO MIMO Transmitter Receiver Circuit Compatible with

Space Time Coding

Shrenik Ashwin Vora

Advisor: Timothy P. Kurzweg and Kapil R. Dandekar, Ph.D.

Free Space Optical (FSO) interconnects can resolve several existing problems

in current copper-based chip-to-chip and board-to-board communications, including

electromagnetic interference and limited data capacity. FSO systems can overcome

these limitations by employing Multiple Input Multiple Output (MIMO) schemes

which increase the number of parallel datastreams. However, due to the increse in

the number of transmitters and receivers, MIMO FSO systems are prone to optical

crosstalk due to misalignment of components and divergence of optical transmitters.

Space time coding (STC) is a technique that can potentially mitigate the problems

caused by optical crosstalk in FSO systems. However, hardware suitable for imple-

mentation of STC on MIMO FSO systems has yet to be realized.

This thesis describes the design and testing of a MIMO transceiver system suitable

for implementing STC. The designed system includes a 4× 4 transmitter board, two

designs for the receiver board and the optical elements required for such communica-

tion. A prototype Single Input Single Output (SISO) link is constructed to charac-

terize the system by performing several tests, including data rate tests, range tests,

power tests and noise analysis. A Multiple Input Single Output (MISO) system is

also characterized to provide experimental inputs in a simulation which demonstrates

the practical effectiveness of STC in FSO systems.

1

1. Introduction

1.1 Motivation

The primary goal in the development of any new communication system is to make

the system faster and more reliable than existing ones. Many times, system speeds

can be increased by eliminating communication bottlenecks. One such bottleneck

that needs to be removed exists in the field of chip-to-chip and board-to-board com-

munications. Interconnects currently used in such systems typically consist of wires or

copper traces etched on the surface of a printed circuit board [50]. There are several

limitations associated with using such interconnects. Copper traces add to the area

on the board thereby making the boards larger and more expensive [49]. Wires also

increase cost and take up a lot of space; limiting the number of possible interconnects

[2]. These interconnects are also prone to electromagnetic interference which can add

significant noise to the data being transferred [24]. They have inherent reactance

(inductance and/or capacitance) which can limit the bandwidth of a connection [50]

besides causing disturbances in data signals. Free space optical (FSO) systems can

solve the above problems while making chip and board level communications faster

[24].

Chip-to-chip FSO systems can be implemented using several sets of components,

but using VCSEL (Vertical Cavity Surface Emitting Laser) and photodiode pairs

seems very promising as these elements can be easily packed in two-dimensional arrays

[20]. Such pairs have the potential to create low power communication systems at high

data rates, wide bandwidths, all while occupying minimal space [50]. However, there

are some problems with such interconnects that need to be resolved to harness their

full potential. For SISO (Single Input Single Output) optical systems, component

2

misalignment and vibrations can greatly reduce system performance. Some issues

can be mitigated by introducing diversity in the form of MIMO (Multiple Input

Multiple Output) systems. However, MIMO systems are prone to optical crosstalk.

‘Crosstalk’ is a phenomenon where one signal produces an undesired effect on another

signal. In the case of FSO systems, crosstalk would entail communication between a

transmitter (e.g.VCSEL) with an unintended detector. Several important parameters

like channel capacity, bit error rate and interconnection distance for FSO systems are

determined by crosstalk [18]. Crosstalk can be caused due to divergence of VCSEL

beams. A small misalignment can also result in a significant amount of power being

intercepted by a neighboring receiver [30].

Fig. 1.1 represents a 4× 4 communication channel that is perfectly aligned. The

interconnection distance between the VCSEL-photodiode pairs has to be small as

crosstalk increases very quickly with interconnection distance due to the VCSEL beam

divergence [18][50]. Lensing systems can be used to focus VCSEL beams and increase

the range but they add complexity to the design. The photodetectors are spaced

far enough from each other so as to avoid crosstalk. In fact, the spacing between

photodetectors is such that there is no crosstalk for that particular interconnection

distance. Such wider spacing makes the FSO system larger.

Fig. 1.2 demonstrates what happens when a component is slightly misaligned.

A slight tilt or displacement of a VCSEL may be induced in a system over time.

Such misalignment may cause a substantial amount of the power transmitted by a

VCSEL to be incident on an undesired photodiode. The crosstalk thus induced due

to misalignment reduces the reliability of such FSO systems.

If the effects of crosstalk are somehow eliminated or bypassed, FSO systems can be

a lot more compact and reliable while having longer interconnection distances. Space-

time coding is one such technique that can potentially take advantage of crosstalk to

3

Figure 1.1: FSO System with Aligned VCSEL-Photodiode Pairs

Figure 1.2: FSO System with Misaligned VCSEL-Photodiode Pairs

improve system performance [4]. The effect of each transmitter on every receiver due

to crosstalk is taken into account and is used to produce a very reliable communication

system. A system using space-time coding is illustrated in Fig. 1.3. The components

can be packed closer together and the interconnection distance can be increased as

problems posed by crosstalk can be resolved to an extent using space-time coding.

Thus space-time coding can be effectively used to eliminate some major problems with

FSO systems for chip and board level applications by allowing the overlapping data

signals at the different photodiodes to be effectively separated using signal processing.

4

Figure 1.3: Increased Crosstalk in FSO Systems with Densely Packed ComponentArrays Separated with Long Interconnection Distances

Most chip and board level FSO applications use hardware designed for fiber-

optics. Such transceiver circuits are designed to produce a constant voltage output

for a wide range of received signal levels. Space-time coding relies on actual received

signal strengths and thus such hardware cannot be used to test space-time coding.

Hence, it is desirable to design a MIMO transceiver circuit to study the effectiveness

of space-time coding for chip and board level MIMO FSO communications.

1.2 Thesis Contributions

This thesis proposes hardware design suitable for practically studying space-time

coding with chip-to-chip FSO systems. Fig. 1.4 illustrates the scope of work covered

in this thesis. The thesis describes the procedure followed in the design of the said

transceiver system and then proceeds to a discussion of results obtained from several

system analysis tests. Several high-speed optical components and chips are compared

for use in the transceiver circuit. The chosen components are used in the design

of a transmitter board capable of driving four VCSELs simultaneously. The design

can be used to drive several types of VCSELs and can be easily scaled to include

more outputs. Two receiver circuit options are described in this thesis. For the first

option (BALUN-Amplifier), commercially available components are put together to

5

Figure 1.4: Scope of Work

complete a receiver circuit. Circuit and printed circuit board (PCB) design for the

second option(Matched Amplifier) are also presented in this thesis. Both the receiver

circuit options are such that the basic design can be repeated to increase the number

of receivers. As a prototype for the Matched Amplifier option could not be built, a

SISO system using the BALUN-Amplifier circuit is used to conduct several system

analysis tests. The system response is captured across a wide range of input data

rates. The performance of the system at increasing interconnection distance at sev-

eral power levels is also tested. The distribution of the noise at several points in

the system is analyzed. The setup and results of these tests are discussed in this

thesis. In order to experimentally observe the effect of crosstalk and to simulate the

potential improvement due to space-time coding, a MISO(Multiple Input Single Out-

put) system is put together. Using the test results the system performance with and

without space-time coding is compared. Finally, the thesis suggests several changes

to improve the hardware design.

6

1.3 Thesis Organization

Chapter 2 of this thesis delves into background information on relevant material

like free-space optics, optical components and space-time coding. Chapter 3 pro-

vides information on commercially available components and includes a comparison

of suitable devices. It also includes sections on design and fabrication of transceiver

circuits. Chapter 4 describes a SISO system and the analysis of results from several

performance tests conducted using the SISO system. Chapter 4 also includes a MISO

test for crosstalk and a simulation to test space-time coding. Chapter 5 concludes

this thesis and provides an insight into possible future work related to this thesis.

7

2. Background

2.1 Optics for Communications

Optical communications come in two main varieties; fiber optics and free-space.

Fiber optic communication involves transmission of data through a fiber cable con-

sisting of a core in the center surrounded by a cladding which is inside a buffer

coating. On the other hand, free-space optics (FSO) involve no use of connecting

cables between the transmitter and the receiver.

2.1.1 Free Space Optics

Free Space Optics is an optical communications technology that transmits data

by propagating light between one or more sets of transmitters and receivers through

air (free space). FSO can enable transmission of many channels in parallel with high

density [24]. FSO systems typically operate in the infrared range between 850nm and

1550nm [52]. This range is suitable for FSO as it suffers relatively less absorption to

the surrounding atmosphere. Also, standard devices and components are available for

this wavelength range as it is used for fiber optic communications as well. To establish

a FSO communication channel it is usually imperative that there is no obstacle to

light between the transmitter and the receiver; in other words it is important to

have a direct line-of-sight (LOS). FSO combined with suitable electronics have the

potential to provide large interconnection density, low power dissipation, superior

crosstalk performance at high data rates and resolve board-to-board communication

bottlenecks [8][27]. Its unregulated spectrum offers FSO systems better scalability,

high-security and a wide bandwidth when compared to RF applications [33]. Below,

two forms of FSO interconnects are discussed. In this thesis, we focus on FSO for

8

micro-scale chip to chip communication.

2.1.2 Chip-to-Chip Communication

Chip-to-Chip (C2C) communications entail connecting two or more semiconduc-

tor chips mounted on the same or different printed circuit boards. Over the last few

decades an increasing number of products have started relying heavily on electronics

and this has heightened the use of semiconductor chips both in number and com-

plexity. While there is an increase in the number of chips being used there is also

demand for reducing the area occupied by these chips on printed circuit boards to

make the boards smaller and cheaper. However, the large number of interconnections

between chips with increasing I/O pins results in a lot of space being wasted by traces

etched on the board [49]. These connections are permanent and may require the entire

board to be re-fabricated if errors are made. This makes such interconnects rather

expensive to design, review and maintain. Constraints due to cost, area and chips

themselves, limit the number of wires that can be used for interconnects, leading to

communication bottlenecks [25]. Advantages of FSO can be used to overcome the

aforementioned problems in C2C communications.

A FSO system on a small scale usually requires proper alignment at the microm-

eter to sub-mircrometer level between transmitter-receiver pairs [24]. In absence of

corrective measures, component misalignments beyond tolerance levels can render a

communications module useless. Hence, to take full advantage of FSO systems at the

C2C level, these problems need to be resolved.

2.1.3 Previous Work in Chip-to-Chip FSO

Jurgen Jahns and his associates have done considerable work in development

of FSO systems on wafer and chip-to-chip communications level [24][25][27][26][17].

9

Jahns’ works include design and fabrication of FSO interconnects [25], a FSO system

using top-surface-emitting microlasers [27] and work in high interconnection density

using planar FSO links [26] with a later work integrating fiber and free space optics

[17]. Jahns’ work mainly uses lensing systems like microchannel and hybrid imaging

[25] for implementing FSO.

Another free space optical interconnection system is FAST-Net (Free-space Accel-

erator for Switching Terabit Networks) [9]. A schematic of the system is represented

by Fig. 2.1 where a multichip array is connected to itself using a setup consisting of

a lens-array and a mirror. The profile of an individual chip is highlighted in the inset

which shows that each chip consists of sets of VCSEL and photodiode arrays. For

communication between different chips, a beam of light propagates from a VCSEL

and is collimated using the lensing system. This collimated beam then reflects off a

mirror to the target photodiode through the lensing system. Several such ray paths

are shown in the figure as examples. Using this system it is possible to achieve a bi-

section bandwidth of 8Tbit/s at a data rate of 1GBit/s using sets of chips containing

about 128 VCSELs and photodiodes[10]. A prototype of the system demonstrated

that there was no measurable crosstalk [9]. However, the problem with such a system

is that it has to be perfectly aligned. A small misalignment in the microlens array

can cause this system to fail quickly [18].

2.2 Space-Time Coding for FSO

The components and devices currently used for FSO necessitate a compromise be-

tween high efficiency (both in speed and power consumption), low F# (ratio of focal

length to diameter of a lens) and spatial uniformity (changes in responsivity across

the photosensitive area) while low bit error rates are critically required [8]. A MIMO

FSO system can be used to improve the efficiency of the system by transmitting mul-

10

Figure 2.1: Representation of the FAST-Net concept[10]

tiple datastreams in parallel [43]. In MIMO systems where transmitter-receiver pairs

are placed very close together, there could be ‘crosstalk’ (one optical channel produc-

ing an undesired effect on another) between different channels. Hence, it is usually

imperative to implement encoding techniques in pratical FSO systems if lensing sys-

tems are not used to limit crosstalk. In fact, coding schemes have been proposed for

both short and long distance FSO systems. For FSO chip-to-chip communications,

on-off keying (OOK) and pulse-position modulation (PPM) are commonly used [46]

but they are very simple techniques with limited effectiveness. For longer distances,

error correction schemes like convolution coding, RS coding, multilevel coding and

etc. have been proposed to be used concurrently with PPM [6]. Space-time coding

can provide significant improvement in system performance for FSO systems as has

been proposed by several earlier works [4][46].

Siavash Alamouti first suggested a transmit diversity scheme to mitigate multipath

fading in RF systems [1]. This concept was later used to implement space-time

11

Figure 2.2: Space Time Coding

coding for FSO applications [46]. The latter publication suggests that crosstalk and

multipath effects in a MIMO communication system can be productively mitigated

using Alamouti-type space-time coding. The diversity here is in space and time. An

example is shown in Fig. 2.2 which represents a 2 × 2 MIMO system. In this case,

two bits X1 and X2 are to be transmitted at times t1 and t2 respectively. First, these

bits are encoded to be sent through the two transmitters. At time t1, X1 and X2

are sent through transmitters 1 and 2 respectively. At time t2, X2 and X1 are sent

through the two transmitters where X1 is the complement of the signal (logic 1 for

logic 0 and vice versa). This sequence gets multiplied with the channel matrix or

H-matrix as shown in the figure. Each element of the matrix is the attenuation from

every transmitter to each receiver, for example h11 is the attenuation from the first

transmitter to the first receiver. The output is the combination of the transmitted

signal and the channel matrix. This output has to be decoded to get the transmitted

signal. For this, the knowledge of the H-matrix is important which can be determined

through training. With the H-matrix and something known as maximum likelihood

detection, the transmitted signal can be decoded. The process is described in detail at

[46] and [4]. A simulation of the above concept was completed at Drexel University [4].

This simulation considered a 4× 4 MIMO system of VCSELs and photodiodes each

separated by a few hundred micrometers. The work demonstrated that a considerable

improvement in BER was possible using a MIMO space-time coded system when

compared to a parallel SISO system.

12

2.3 System Components

The main parts of the communication system are the transmission and reception

components. A type of laser can be used as a transmission device and a photodiode

can be used for detecting the transmitted signal. Several types of lasers and photodi-

odes are discussed here. With regards to lasers, the conventional Edge-emitting laser

and VCSELs are compared in the following section.

2.3.1 Comparison of VCSEL and Edge-emitting LASER

The fundamental difference between a VCSEL (Vertical Cavity Surface Emitting

Laser) and a general Edge-Emitting Laser (EEL) lies in the direction of beam emission

of each component. In the case of EELs, the beam of light propogates along the

surface of a semiconductor wafer and is finally reflected or coupled from a cleaved edge

of the wafer [20]. On the contrary, VCSELs emit light in a direction perpendicular

to the surface of the semiconductor wafer [20]. A fundamental difference also lies

in the fact that VCSELs have only one longitudinal mode while EELs have many

[5]. Though these differences confer distinct advantages on both VCSELs and EELs,

VCSELs are more suitable for our particular application. It is desirable to make a

MIMO system using a two dimensional array of transmitters and receivers to take

full advantage of space-time coding. It is not practical to form such two dimensional

arrays using EELs (though 1D arrays are possible). Because VCSELs emit light from

the surface of the semiconductor wafer directly, it is possible to form densely packed

two dimensional arrays of components. Another factor that makes the VCSELs more

suitable is the possibility of monolithic fabrication of laser cavity [20]. Additionally,

VCSELs have very low threshold currents and power requirements which reduces the

overall power consumption of the system. However, lower power limits the distance

to which light can be propagated and hence the separation between the VCSEL and

13

the photodiode arrays has to be relatively small.

2.3.2 Vertical Cavity Surface Emitting Laser (VCSEL)

Figure 2.3: VCSEL Model [20]

The structure of a VCSEL is shown in Fig. 2.3. This structure consists of an active

region sandwiched between a set of parallel reflectors. The volume of the cavity in

the middle should be kept small to ensure a small threshold current. The disc in the

center of the figure represents the gain region which consists of three quantum wells

and is about a wavelength thick. Around this active region is a highly reflective region

which is essentially a Distributed Bragg Reflector (DBR) with reflectivity of above

99.5%. These regions are made from semiconductor materials like AlAs (Aluminum

Arsenide) and AlGaAs (Aluminum Gallium Arsenide) [11]. It is this structure and

its dimensions that give the VCSEL its distinct characteristics. Longitudinal modes

are the light wavelengths produced by a given laser. The longitudinal mode spacing

for the VCSEL is very large when compared to the edge emitting laser and so VC-

SELs have only one longitudinal mode [5]. However, VCSELs can have one or more

transverse modes. These transverse modes determine the intensity distribution in the

14

cross-sections of the LASER beams [5].

As the name suggests, a Single Transverse Mode (STM) VCSEL or Single Mode

VCSEL for short, has only one allowed mode. This is achieved by physically restrict-

ing the lateral size of the optical cavity. Fig. 2.4 shows how this is done; an oxidation

layer is used to form an aperture so as to allow only one mode to pass through.

Figure 2.4: Cross Section of a Single Mode VCSEL (left) and a Multi Mode VCSEL(right) [5]

Multitransverse Mode (MTM) VCSELs or simply multi-mode VCSELs are cur-

rently cheaper and easier to make than single mode VCSELs [51]. Unlike single mode

VCSELs, the multi-mode VCSELs allow more than one optical transverse mode to

pass through depending on the operating conditions. Fig. 2.4 shows the cross section

of a typical multi-mode VCSEL. The aperture made by the oxidation layer in this

case is large enough to pass multiple modes. Even in the case of multi-mode VC-

SELs not all modes are observed at all times. Usually only one mode is active while

operating near the threshold current and more modes are generated as the current

is increased above the threshold. Shapes of such higher order modes are modeled as

Laguerre-Gaussian or Bessel functions [5]. Fig. 2.5 shows intensity profiles for emer-

gent transverse modes at increasing bias currents. Because of their cheaper cost and

ease of availibility, multi-mode VCSELs were chosen to be used for this project.

A VCSEL’s power output may vary over time due to temperature changes or

15

Figure 2.5: Near Field Images of Two Different Multimode VCSELs with IncreasingCurrent [5]

degradation [16]. Many times, it is important to maintain a constant power output

at the VCSEL. As VCSELs emit light (infrared radiation), a photodiode (i.e. moni-

toring photodiode) packaged with the VCSEL can be used to provide feedback. This

photodiode can be external or integrated with the VCSEL structure [16]. The current

output of the monitoring photodiode can be sent to the VCSEL driver for adjusting

the VCSEL’s power level.

2.3.3 Photodiodes

There are several options for optical sensing which include photodiodes, photo-

multipliers, phototransistors and CdS(Cadmium Sulphide) photocells [7]. Each have

their own advantages, but photodiodes surpass the others in dynamic range, stability,

cost-effectiveness, linearity and several other features [15]. Photodiodes are essentially

the same as conventional semiconductor diodes with a fundamental difference in size;

photodiode chips are larger to allow the light to enter the device [15]. Photodiodes

are, in essence, a type of PN junction diode. Like PN junction diodes, a depletion re-

gion (interface at the junction which is depleted of majority carriers) is created when

the diode is biased. When photons (light) fall on this region, electron-hole pairs are

generated which give rise to a current [23]. This current is proportional to the photon

irradiation [23].

16

Different types of photodiodes are currently available; PN photodiode, PIN pho-

todiode, avalanche photodiode (APD) and Schottky-barrier photodiode are a few of

them [7]. PN diodes cannot be used in high-speed communication applications as

their thin depletion region limits their speed of operation. Schottky-barrier diodes

are promising from the point of view of speed but more research needs to be done for

developing them [7]. Avalanche photodiodes require a large reverse voltage for oper-

ation. High voltages are expensive and difficult to handle in semiconductor devices

[7]. Thus it may be impractical to use them for low power chip-to-chip applications.

PIN photodiodes are discussed below.

2.3.3.1 PIN Photodiode

As mentioned earlier PN photodiodes are slow because of the thin depletion re-

gion, this problem is solved in PIN photodiodes by adding a lightly doped instrinsic

layer between the P+ and N− regions. In Fig. 2.6, the intrinsic layer can be seen

sandwiched between the P+ and N− regions adding width to the depletion region[7].

Adding the intrinsic layer increases the chances of a photon being absorbed and

increases sensitivity while the thicker depletion region decreases capacitance and con-

sequently produces a faster device response[7]. As long as the energy of a photon is

greater than the bandgap (built-in potential at the junction), the device can operate.

Hence, the bandgap should be low enough for the required wavelength of light to be

successfully absorbed. Different materials are used to achieve the desired wavelength

band. For example, InGaAs(Indium Gallium Arsenide) is used in the 1500nm to

1600nm band[7].

17

Figure 2.6: Schematic of a typical PIN photodiode[7]

18

3. Component Selection and Board Design

To complete hardware design for a high-speed chip-to-chip FSO system, several

components have to be chosen and printed circuit boards have to be designed such

that each part complies with data rate and other requirements of the system. These

components and boards are shown in Fig. 3.1. They are mainly classified into two

sections; the transmitter and the receiver. The transmitter consists of the VCSEL,

a PCB to house the VCSEL, a driver chip to supply current to the VCSEL and a

driver board to house the driver chip and additional circuitry to control VCSEL input

current. The receiver consists of the photodiode, a PCB to house the photodiode, the

transimpedance amplifier, a main amplifier and a board to house all the components

besides the photodiode.

3.1 VCSEL Selection

Several factors were considered while selecting a VCSEL for use. For data com-

munication in the GigaHertz range, the rise and fall times for the VCSELs were

expected to be of the order of pico-seconds. It was required that the VCSELs have

small packages so that they can be stacked close together to form tight arrays for

testing. VCSELs with packaged monitoring photodiodes were preferred to make it

possible to have a feedback loop with the driver circuitry to ensure constant power

output from the VCSEL. Delivery lead times, minimum order quantities, available

technical support and cost were also considered. To maintain a standard wavelength

for VCSEL and photodiodes, 850nm devices were chosen due to the large selection

choice and easy availibility of optical components at this wavelength. Details of some

of the VCSELs that were considered are briefly discussed in the following subsections

19

Figure 3.1: Block Diagram for Components Selection and Board Design for a Com-plete FSO System

20

Parameter VCSEL-850 VCT-F85A32-IS-V2 HFE4094-342Package TO-46 TO-46 TO-46

Threshold Current(mA) 1.8 2.2 1.8Power Output(mW) 2 1.85 2.5

Wavelength(nm) 850 845 850Rise Time(ps) 130 NA 50Fall Time(ps) 150 NA 50

Beam Divergence(deg.) 15 25 14Monitor Photodiode Yes Yes Yes

Operation Mode Common Cathode Common Cathode Common Anode

Table 3.1: Comparison of VCSEL options

and summarized in Table 3.1. The chosen VCSEL is highlighted in the table.

3.1.1 Thorlabs ‘VCSEL-850’

The VCSEL-850 is a multi-mode VCSEL packaged in a TO-46 can with a typical

wavelength output of 845nm. It is a common-cathode VCSEL, which means that the

VCSEL comes fabricated with its cathode connected to the monitoring photodiode

anode. It has a relatively high divergence angle of about 25o. A higher divergence

angle means more crosstalk when such VCSELs are placed close together. Such

increased crosstalk is usually undesirable but it may prove beneficial in quantifying

the success of space-time coding. This VCSEL typically has a low rise/fall time(50ps),

low power(1.85mW ) and a low threshold current(2.2mA) [47].

3.1.2 Lasermate ‘VCT-F85A32-IS-V2’

Lasermate’s VCT-F85A32-IS-V2 is a single-mode VCSEL which means that the

beam propagated by the VCSEL is Gaussian and more or less circular in shape. The

device is slightly more expensive than the other parts considered. This device has a

rather small divergence angle of only 14o. The smaller divergence angle may make it

21

harder to get sufficient crosstalk for evaluating space-time coding using this device.

The VCSEL’s anode is connected to the monitoring photodiode cathode and so it

is classified as a common anode device. The typical threshold current and power

dissipation of the device are 1.8mA and 2.5mW respectively [32].

3.1.3 Finisar ‘HFE4094-342’

The HFE4094-342 is Finisar’s multi-mode common-cathode VCSEL rated for op-

eration upto 2.5Gbps. The device’s power output and threshold current is exactly

the same as Lasermate’s VCSEL. However, the HFE4094-342 has a slightly larger di-

vergence angle. It is also the least expensive of all the devices considered. A slightly

higher optical power output when compared to Thorlabs’ VCSEL gives this device

a longer range for FSO tests [12]. This VCSEL is also easily available and has a

photodiode paired to suit it. Due to these reasons, the HFE4094-342 was chosen for

testing the system.

3.2 VCSEL Driver Selection

Standard VCSEL driver packages are available for fiber-optic applications. These

VCSEL drivers can also be used to drive VCSELs for chip-to-chip FSO applications

as long as they can provide sufficient drive current for the range required in free

space applications. Among the features expected of the chip, it should have an

inbuilt feedback loop to accommodate input from a monitoring photodiode. However,

the driver should also be able to drive VCSELs without monitoring photodiodes as

many VCSEL arrays do not have packaged photodiodes. The driver chip should have

controls to easily adjust bias and modulating currents going to the VCSEL. Two

VCSEL driver chips are discussed below and their features are summarized in Table

3.2 with the chosen chip highlighted in gray.

22

Parameter LTC5100 MAX3740AMax Data Rate(Gbps) 3.2 3.2

Max Modulation Current(mA) 12 15Rise and Fall Time(ps) 60 65

Automatic Power Control Yes YesEvaluation Board and Design Yes Yes

Operation Mode Common Cathode Common Cathode

Table 3.2: Comparison of VCSEL Driver options

3.2.1 LinearTech ‘LTC5100’

The LTC5100 is rated for common-cathode operation in the data range of 155Mbps

to 3.2Gbps. It supports modulation currents from 1mA to 12mA. It has differential

input signals and a programmable pin for fault indication. It is featured with an

inbuilt analog to digital converter (ADC) for monitoring critical parameters. It has

AC coupled inputs which eliminate the need for external capacitors. An on-chip

DAC allows direct circuit control without on-board potentiometers. It has an auto-

matic power control circuitry which uses the input from the monitoring photodiode

to maintain constant current for the VCSEL [34]. An evaluation kit is available for

the driver complete with the software to control it. The evaluation board was used

to explore the features of the device and it was found that the LTC5100 was ade-

quate for use. However, while making a prototype design, an external microcontroller

or computer may be required to control the device parameters akin to the software

interface designed for the evaluation board.

3.2.2 Maxim ‘MAX3740A’

The MAX3740A is a high speed VCSEL driver that can support data rates up

to 3.2Gbps with common-cathode operation. With an upper limit of 15mA, it can

support higher bias and modulation currents than the LTC5100. Like the LTC5100

23

it uses monitoring photodiode feedback for automatic power control. It also has a

differential configurtaion and a fault indication circuitry. Unlike the LTC5100, the

chip has separate pins for controlling and monitoring bias and modulation currents

which allows on-board control of these parameters [35]. The MAX3740A also has an

evaluation board to test the chip. The layout of the evaluation board is illustrated in

Fig. 3.2. The evaluation board is capable of testing the driver chip with and without

the VCSEL. It is populated with the necessary potentiometers for controlling circuit

parameters, and test points for monitoring circuit performance. Since the MAX3740A

can be easily used for standalone operation it was chosen over the LTC5100.

Figure 3.2: Layout of MAX3740A Evaluation Board[36]

24

Parameter FDS010 PDT-A85A30 HFE3081-103Package TO-46 TO-46 TO-46

Junction Capacitance(pF) 2 1.2 NAWavelength(nm) 800 850 850

Rise and Fall Time(ps) 1000 NA 120Packaged TIA No No Yes

Table 3.3: Comparison of Photodiode options

3.3 Photodiode Selection

As mentioned in Section 2.3.3, photodiodes generate a current proportional to

the incident light. This current has to be converted to a voltage for further use. A

transimpedance amplifier (TIA) or a transresistor amplifier is a device that converts

a current signal to a voltage signal [45]. Hence, a photodiode should be followed by

a TIA stage. Capacitances added between the photodiode and the transimpedance

amplifier may reduce the bandwidth of the system [42]. Hence, to reduce costs and

keep stray capacitances at a minimum, TIA packaged with the photodiode is prefer-

able. The capacitance due to the depletion region in the photodiode is called the

junction capacitance. This junction capacitance should also be small to ensure high

bandwidth and low noise [3]. The aforementioned factors should be considered in

addition to other relevant conditions mentioned for selection of VCSELs in Section

3.1. The features of the photodiodes compared in this section are summarized in

Table 3.3 with the chosen photodiode shaded in gray.

3.3.1 Thorlabs ‘FDS010’

This is a relatively low speed photodiode with a wide wavelength range of 200−

1100nm. Though the photodiode is the most sensitive at the chosen VCSEL wave-

length of 850nm, it is likely to pick up a lot of ambient noise due to the wide range.

25

The photodiode has a relatively high junction capacitance of 2pF (at -10V bias) and

a rise/fall time of about 1ns. The device can still be used for lower speed operations

till about 350MHz [48].

3.3.2 Lasermate ‘PDT-A85A30’

Lasermate’s photodetector is faster with with a typical bandwidth of above 1.5GHz.

The typical capacitance is about 1.2pF which makes it more desirable for use at high

speeds. The device is very sensitive for the chosen VCSEL wavelength of 850nm.

However, the device does not have an inbuilt TIA [31] and thus would need addi-

tional circuitry for current to voltage conversion.

3.3.3 Finisar ‘HFE3081-103’

The HFE3081-103 is a high speed photodetector capable of speeds of upto 2.5Gbps.

It has a very narrow wavelength range between 770nm to 870nm. It also has an inbuilt

TIA eliminating the need for an external one. The rise and fall times are extremely

short at about 100ps. The device also has a differential output which is very good for

common mode noise rejection. This device is also the photodiode suggested for use

with the preferred VCSEL, the Finisar HFE4094-342 [13]. Hence, this photodiode

can be said to be the most suitable for the application and was chosen for conducting

tests. In Table 3.3, the column for this photodiode is shaded in gray.

3.4 Receiver Circuit Selection

The role of the receiver circuitry is to amplify the small voltage signal from the TIA

for further use in space-time coding. For that purpose, the output from the receiver

should be proportional to the light incident on the photodiode. Several options for

the receiver circuitry are discussed in the following sections.

26

3.4.1 Limiting Amplifier

Limiting amplifiers are devices that have internal voltage clamps to restrict the

amplified output voltage at a desired level. Such circuits are usually used to protect

loads that have a limited input range and other applications that require a restricted

voltage input [21]. Limiting amplifiers are commonly used in wireless and communi-

cation circuits. The received signal in wireless communications can have a very wide

dynamic range which necessitates use of circuitry to convert the received signal to a

constant level for further processing. A limiting amplifier or an automatic gain con-

troller(AGC) can be used for such applications. Limiting amplifiers are preferred as

they can handle a large dynamic range using simple circuitry and minimal power dissi-

pation [19]. Like wireless communications, chip-to-chip FSO systems can also receive

a signal with a rather wide dynamic range if distance between transmitter-receiver

pair is variable or if there are misalignments or changes in the channel.

A schematic of a receiver system with a limiting amplifier is shown in Fig. 3.3. The

selected photodiode is packaged with a TIA so the output of the photodiode board

is a small differential voltage signal. This signal is fed to a limiting amplifier which

produces an almost constant voltage output, this property of a limiting amplifier is

also shown in Fig. 3.3. Two input signals are shown to have different voltage levels,

V1 and V2, but the output after amplification of both the signals is V3. Though

limiting amplifiers are commonly used in communication circuits especially fiber-

optic connections, it may be difficult to use them when space-time coding is involved.

For calculating the required H-matrix for space-time coding, the individual gain of

each transmitter at a particular receiver is considered. A limiting amplifier amplifier

obviously cannot provide this individual gain. However, a limiting amplifier, Maxim’s

MAX3748A, was considered for use. MAX3748A has a RSSI (received signal strength

indicator) pin [37] which can be used to quantify the gain of the received signal for

27

processing in space-time coding. Using the RSSI function would require additional

circuitry which would add to the cost and effort in designing the receiver system.

Figure 3.3: Block Diagram of the Receiver Circuit using a Limiting Amplifier

3.4.2 Conversion of Balanced to Unbalanced Signal and Amplification

As the name suggests a wideband amplifier is a device that provides a constant

gain over a wide range of input frequencies. Many commercially available wideband

amplifiers have single-ended inputs. However, most transimpedance amplifiers in-

cluding the one packaged with the chosen photodiode have differential outputs. This

differential signal has to be converted into a single ended signal for amplification using

a wideband amplifier. A BALUN is a device that can convert a balanced signal to an

28

Figure 3.4: Equivalent circuit of a Ruthroff Balun Transformer [41]

unbalanced signal and vice versa [41]. In other words, a BALUN can be used to con-

vert a differential signal to a single-ended signal. An equivalent circuit of a Ruthroff

BALUN [44] is shown in Fig. 3.4. For the differential to single-ended conversion,

the two differential signals would be applied to the secondary side of the transformer

around the center-tap ground and the single-ended signal is obtained at the primary

side. To obtain a voltage amplitude that is equivalent to the difference between the

differential pair, the transformer impedance ratio should be 1:1.

Figure 3.5: Block Diagram of the Receiver Circuit using a BALUN and an Amplifier

The block diagram for a receiver system using a BALUN and a wideband ampli-

29

fier is shown in Fig. 3.5. The differential signal produced by the photodiode-TIA

package is fed to the BALUN. The BALUN converts this small differential signal into

a single-ended signal, this signal is then amplified using a wideband amplifier. A pro-

totype system to test and implement this approach was designed by putting together

some commercially available devices. The Minicircuits’ TC1-1-13M+ was used as the

BALUN and the ZKL-2+ was used as the wideband amplifier. The TC1-1-13M+ is

a high bandwidth(4.5MHz to 3GHz) transformer with a typical phase unbalance of

about 2o [39]. The phase unbalance is the angular change induced in the data signal

due to the device, a minimal phase unbalance is thus desirable. The ZKL-2+ is a

connectorized high gain amplifier with a wide range of 10MHz to 2GHz. It provides

a constant gain of about 31dB across the said frequency range[38]. The prototype is

built by connecting a test-board for the TC1-1-13M+ with the ZKL-2+. Tests were

performed using this setup as it can be easily assembled using commercially available

components.

3.4.3 Amplification using Matched Amplifiers

It may be advantageous to maintain a differential signal right through the am-

plification stage as differential signals provide better noise rejection and stability.

Matched amplifiers are commercially available and can be used for this purpose.

Such amplifiers usually have two identical amplifiers packaged on the same chip to

keep them as matched as possible. The block diagram of such a system is shown

in Fig. 3.6. The differential signal is directly amplified and then used for further

processing.

The Minicircuits’ MERA-556+ is a dual amplifier that is very closely matched

with a phase imbalance of only 0.6o which is smaller than the BALUN used earlier.

The amplitude imbalance which is the change in amplitude between the differential

30

Figure 3.6: Block Diagram of the Receiver Circuit using a Dual Matched Amplifier

pair due to the device is very small for the device as well. The device has frequency

range from DC to 2.2GHz and high linear gain of about 20dB in that range [40]. A

test circuit was designed using this system and it is discussed in further detail in the

next chapter. The system designed using this device is more preferable than the one

with the BALUN as it provides similar amplification while maintaining the benefits

of a differential signal with lesser phase imbalance.

3.5 Summary of Chosen Components and Circuits

The VCSEL and photodiode chosen for building a prototype system were Fin-

isar’s HFE4094-342 and HFD3081-103 respectively. These devices were chosen due

to their compatibility, ease of availibility and performance benefits over other com-

ponents considered. The MAX3740A was chosen as the driver chip as it makes the

31

transmitter design simple and offers easy control over circuit parameters. For the re-

ceiver circuit, the BALUN-Amplifier option and the Matched Amplifier option were

designed. However, the BALUN-Amplifier option is extremely easy to put together

and thus was used in the prototype system.

3.6 VCSEL Driver Board Design

The VCSEL driver or the transmitter is the circuit board that converts the data

input into a driving current for the VCSEL. The heart of the driver is the VCSEL

driver chip and the entire circuitry on the board is built around it.

3.6.1 Circuit Design and Schematic

The board has been designed based on the design of the MAX3740A evaluation

board [36]. However, there are several changes in the designed board. The additional

circuitry for simulating a monitoring photodiode in the evaluation board has been

removed. The circuit has been modified to enable drive currents for both common

cathode VCSELs and VCSELs without monitoring photodiodes. Common anode

VCSELs can be driven without monitoring photodiodes. The final design consists

of four driver chips and thus can drive four VCSELs. Fig. 3.7 is the first page of

the board schematic. The top left part is the circuitry for the power supply and the

rest is the main driver circuitry. The same driver circuitry without the power supply

section is repeated over the next three pages of the schematic (not shown here) for

the other three VCSELs. The individual driver circuit can be repeated any number

of times to produce more VCSEL drivers.

32

55

44

33

22

11

DD

CC

BB

AA

VCC1

VCCEXT

VCC1

VCC1

VCC1

VCC1

VCCEXT

R3

350

R3

350

Q3

MOSFET

Q3

MOSFET

R15

50k

R15

50k

L3

BLM18HD102SN1

L3

BLM18HD102SN1

12

C7

0.01uF

C7

0.01uF

JU7

JU7

1 2

C8

0.01uF

C8

0.01uF

TP21

TP211

C13

0.1uF

C13

0.1uF

JU1

JU1

12

J6J6

12

3

TP8

TP8 1

R2

10k

R2

10k

TP3

TP3 1

C16

0.1uF

C16

0.1uF

TP4

TP4 1

J5J5

12

3

C9

0.1uF

C9

0.1uF

R34

open

R34

open

C18

10uF

C18

10uF

TP9

TP9

1

R9

49.9

R9

49.9

C6

0.01uF

C6

0.01uF

TP11

TP11

1

C4

0.01uF

C4

0.01uF

TP1

TP1

1

R1

10k

R1

10k

R8

4.7k

R8

4.7k

R26

open

R26

open

C11

0.01uF C11

0.01uF

JU10

JU10

12

L41uH

L41uH

12

U1

MAX3740A

U1

MAX3740A

GND

1

TX_DISABLE

2

IN+

3

IN-

4

FAULT

5

SQUELCH

6

VCC7

TC18

TC29

GND10

MODSET11

PEAKSET12

GND

13

OUT-

14

OUT+

15

VCC

16

BIASSET

17

BIAS

18

BIASMON19

VCC20

COMP21

MD22

REF23

PWRMON24

C15

0.1uF

C15

0.1uF

R12

499

R12

499

R14

20k

R14

20k

J7J7

12

3

JU4

JU4

12

TP20

TP201

R27

open

R27

open

JU6

JU6

12

R16

500k

R16

500k

JU3

JU3

12

L1

BLM18HD102SN1

L1

BLM18HD102SN1

12

TP10

TP101

R13

10k

R13

10k

TP12

TP12

1

R36

open

R36

open

TP2

TP2

1TP6

TP6 1

FMMT491A/ZTX

Q2

FMMT491A/ZTX

Q2

R35

open

R35

open

JU8

JU81

2

D2

D2

C17

0.1uF

C17

0.1uF

TP5

TP5 1

C3

0.047uF

C3

0.047uF

C14

10uF

C14

10uF

TP7

TP7 1

C5

0.1uF

C5

0.1uF

Figure 3.7: Partial Schematic of the VCSEL Driver

33

Some common features of the schematic are discussed in this paragraph. Several

analog potentiometers are used in the circuit to control circuit parameters like the

driver currents, temperature compensation and so on. Vacant pads are provided

parallel to these potentiometers to change the sensitivity and resistance range of these

potentiometers. Jumpers are used in several places to change circuit operation like

enabling fault indicators, disabling feedback from monitoring photodiodes and so on.

Test points have also been mounted at several locations to monitor the performance

of the circuit. Following is the detailed explanation of the circuit.

Power Supply: This part of the circuit is responsible for creating a stable

power source for the circuit and filtering out any supply noise. A 3.3V DC

voltage is applied to TP20 while TP21 is grounded. Shunting the jumper JU81

provides power to the main driver chip while shunting JU10 provides power to

other LEDs and transistors. Several blocking capacitors have been placed to

filter out any AC components in the supply voltage.

Power and Ground Pins: All power pins on the driver chip are connected to

the supply circuit with a blocking cap placed close to the pin so as to remove

any local transients. Ground pins are simply connected to the common ground.

Input and Output Pins: The chip has differential input and output pins.

Both input pins are connected to SMA connectors through a blocking capacitor

to remove any DC components or offsets in the differential input signal. The

output desired is single-ended, hence the negative output pin is terminated using

a 50Ω resistor and a capacitor to filter out AC reflections. The positive output

pin provides the modulating current and is connected to a SMA connector

through a capacitor to block the DC bias current from the output pin. The

BIAS pin provides the DC bias current to the VCSEL and is connected to the

34

output through a choke to prevent any AC modulating current from entering

the BIAS pin.

Control Pins: The pins described in this section are the ones that are used

to control circuit operation using potentiometers. The two temperature com-

pensation pins, TC1 and TC2 have a potentiometer connected across them to

control the temperature compensation of the modulation current. A 500kΩ po-

tentiometer has been chosen as it falls in the active region (range of resistance

values that affect the device) for temperature compensation of the device. A

potentiometer is similarly connected at the BIASSET and MODULATION pins

to control the bias and modulation currents respectively. In the case of the BI-

ASSET pin, the resistance is set to a constant 1.7kΩ while using the feedback

from a monitoring photodiode. The PEAKSET pin is used to set the ampli-

tude of the peaking current and a potentiometer is employed for that purpose.

This potentiometer should be disconnected to disable peaking of the modulating

current. All potentiometer values are chosen to suit the active regions for the

respective pins on the chip. The SQUELCH pin is used to suppress the output

in absence of an input signal and this function is activated by connecting the

jumper JU7 to connect the pin to the power source.

Monitoring Pins: The FAULT pin indicates a fault condition in the circuit

which typically happens if some safety conditions are violated or certain pins

are shorted to power or ground signals. The fault indication circuit is turned on

by connecting the jumper JU6 which connects the fault pin to the LED driver

circuit. The LED driver consists of a transistor in Common Emitter (CE)

configuration which is turned on when the fault pin asserts a high signal at

its base. The BIASMON pin monitors the bias current provided by the circuit

such that the output current of this pin is nine times smaller than the actual

35

bias current. The voltage measured across a resistor between BIASMON and

ground can be used to calculate the bias current. In this circuit a 350Ω resistor

is used and thus the bias current is given by IBIAS = (9 X VBIASMON)/350. The

PWRMON pin is similarly used to monitor the average power transmitted by

the driver and this pin is grounded in the absence of a monitoring photodiode.

Other Pins: The TX DISABLE pin is used to disable the driver chip. The

jumper JU3 is connected between ground and this pin to act as a switch for

turning the driver circuit on or off. The MD(monitoring diode) and the COMP

(compensation) pins are used together. The monitoring photodiode is connected

to the MD pin. A fixed capacitor of 0.47µF between MD and COMP is used

for compensating the automatic power control (APC) circuit in the chip. In the

absence of a monitoring photodiode, the COMP pin is grounded via JU1. The

REF pin provides the reference to the APC circuit in the chip. The potentiome-

ter R1, acts as a variable resistance which controls the amount of monitoring

photodiode feedback provided to the circuit and thus can be used to control the

power output of the circuit.

The schematic described above was used to create a board layout for the transmitter

circuit.

3.6.2 Layout

A partial layout of the VCSEL driver board is shown in Fig. 3.8. The figure

includes the same portion of the circuit shown in the schematic. The transmitter

circuitry is repeated three more times in a similar layout to make the complete board.

The board has four layers; top, power, ground and bottom. The top layer is the layer

where all the components are mounted and a majority of routing is done. This layer

appears as blue traces in the figure. The power and ground are plane layers in the

36

middle. The bottom layer is also a routing layer but it only has a couple of traces that

were difficult to route on the top layer. The red traces are the ones on the bottom

layer.

Figure 3.8: Partial Layout of the VCSEL Driver

Several standard design practices for board design were followed to ensure a good

design, some important rules followed for design are discussed here. All angles on

the traces are 45o to avoid induced capacitances that might limit the bandwidth and

chipping of corners while milling. Keeping constant angles also ensure that traces are

usually parallel to each other and thus unlikely to cross paths. For ensuring proper

isolation for milling, all traces are kept at least eight mils away from each other. Most

37

of the traces on the board are about 12 mils thick. Thicker trace widths are used for

lines that carry more power. Hence data signals are thicker than the regular traces

and the power traces are the thickest. A silkscreen layer is used to mark different

components on the board. Gerber files for the different layers can be seen in the

Appendix.

3.6.3 Board Fabrication and Testing

The 4 × 4 MIMO board was fabricated and assembled at Advanced Circuits in

Colorado (www.4pcb.com). The populated board was thoroughly tested to check for

errors in fabrication and ensure functionality. All components on the board were

tested for undesired shorts to GND or VCC. Continuity tests were conducted to

ensure that the desired connections were made using traces and vias. After checking

for fabrication errors, functional testing was conducted. A complete testing procedure

can be found in the User Guide for the transmitter board in Appendix A. A picture

of the completed board can be seen in Fig. 3.9

3.6.4 VCSEL Board

The VCSEL board is a simple board designed to house the VCSEL and connectors

for the monitoring photodiode. It consists of a straight trace, 28 mils thick, connecting

the input SMA connector to the VCSEL at the other end. The monitoring photodiode

pin of the VCSEL is connected to a header using a simple trace. An image of this

board can be seen in Fig. 3.10.

3.7 Receiver Board Design

The purpose of the receiver board is to amplify the differential signal coming out

of the photodiode/TIA pair to an acceptable level for further processing.

38

Figure 3.9: VCSEL Driver Board after Fabrication and Assembly

39

Figure 3.10: Completed VCSEL Board

3.7.1 Circuit Design and Schematic

The design for the receiving amplifier is relatively simple consisting of a few com-

ponents; a matched amplifier, two transformers, two chokes and a few passive com-

ponents. The schematic for the receiver is shown in Fig. 3.11. It consists of two

similar parts at the top and bottom, each used for one end of the differential signal.

The differential signal from the photodiode is applied to the SMA connectors SMA1

and SMA2. This signal passes through the transformer TX1 which is the same Mini-

circuits TC1-1-13M+ device used as a BALUN earlier. This transformer with 1:1

impedance ratio ensures equal voltage levels on both ends of the differential signal.

This signal is then AC coupled to the amplifier to avoid any DC component from

entering the amplifier. A capacitor of 1nF provides sufficiently low impedance to the

data rates of interest. Each amplifier is biased through a resistor and a RF choke.

The amplifier needs a constant 5V bias at its output pins with 65mA of current, the

50Ω resistors are used to provide a stable bias at those pins. For this resistance value,

a 8.25V supply power is required to maintain a 65mA current input to the amplifier.

The RF choke used is the Minicircuits TCCH-80+. The choke blocks any supply

AC ripples from entering the bias voltage and more importantly it blocks the AC

output of the amplifier from entering the supply circuitry. Connected in parallel to

the chokes are bypass capacitors that ground any transients from the power supply.

40

Coupling capacitors are also used at the output of the amplifier to block the DC bias

from entering the output. The transformer TX2 is used for the same purpose as TX1

described earlier.

5

5

4

4

3

3

2

2

1

1

D D

C C

B B

A A

Title

Size Document Number Rev

Date: Sheet of

<Doc> <RevCode>

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A

1 1Thursday, July 08, 2010

Title


Date: Sheet of

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<Title>

A


Title


Date: Sheet of

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<Title>

A


SMA2

SMA

SMA2

SMA

123

C6

0.01u

C6

0.01uJ3

TCCH-80+

J3

TCCH-80+

RF_IN

1

NC

2DC

3

NC

4

TX1

TC-1-13M+

TX1

TC-1-13M+

SEC_DOT1

NC2

SEC3

PRI4

PRI_DOT6

TP1

VCC_8V25V

TP1

VCC_8V25V

1

C3

1n

C3

1n

C70.1uC70.1u

C1

1n

C1

1n

C50.1uC50.1u

SMA3

SMA

SMA3

SMA

123

R2

50

R2

50

C8

0.01u

C8

0.01u

SMA1

SMA

SMA1

SMA

123

J4

TCCH-80+

J4

TCCH-80+

RF_IN

1

NC

2DC

3

NC

4

C2

1n

C2

1n

TX2

TC-1-13M+

TX2

TC-1-13M+

SEC_DOT1

NC2

SEC3

PRI4

PRI_DOT6

U1

MERA-556+

U1

MERA-556+

IN11

GND2

GND3

IN24

OUT25

GND6

GND7

OUT18

PAD

9

TP2

VCC_8V25V

TP2

VCC_8V25V

1

SMA4

SMA

SMA4

SMA

123

R1

50

R1

50

C4

1n

C4

1n

Figure 3.11: Schematic of a Single Receiver Circuit

3.7.2 Layout

RF components are usually very sensitive to impedance mismatches and inade-

quate grounding. Several RF components have been used for the receiver and while

designing the layout, care has to be taken with regards to trace widths and grounding

41

of signals. Based on the material of the board, the traces have their own impedance

which should be matched with the components to avoid mismatch losses in the circuit.

The trace width can be changed to ensure a certain impedance for a given material

in the specified frequency range. It has to be ensured that data traces are 50Ω so

as to match the impedance of the components chosen for this circuit. The layout

has been designed for fabrication on Rogers Corp. RO4350B board with dielectric

thickness of 20mils and 0.5oz copper on each side. A 44mil trace width provides a

50Ω impedance for this material. Hence, 44mil traces are used in the layout shown in

Fig. 3.12. Plated hole vias are used to connect the traces on the top layer to the plane

ground layer at the bottom. Adequate vias are drilled close to the amplifier grounds

to provide a stable ground and to act as a heat sink for the amplifier. The length

of both the data traces is kept identical to avoid any mismatches in the differential

data signal. The design rules discussed for the transmitter design were also followed

for this layout.

3.7.3 Board Fabrication

This two layer board was milled in-house using facilities at Drexel University. The

board was populated by applying solder paste to the component pins and precisely

placing these components on the board. This board was then carefully baked at 220oC

for two minutes to melt the solder paste. Finally, the board was cooled gradually to

allow the solder to solidify and make permanent connections between the board and

the components. However, the board could not be completed as plated hole vias for

the thin Rogers board were not easily available at the time.

42

Figure 3.12: Layout for a Single Receiver Circuit

43

4. FSO Link Tests and Sytem Performance

Though the ultimate objective for designing this system is to implement a 4 × 4

Multiple Input Multiple Output(MIMO) FSO system, there are a number of repeat-

able sub-components in the circuit that could benefit by being tested individually.

A SISO link allows for the testing of a prototype transceiver system. It is relatively

easier, cheaper and faster to debug and modify a SISO system when compared to a

full MIMO system. Since the same basic circuits are repeated for a MIMO system,

the system performance can be characterised using a SISO system that incorporates

all basic circuits. Once tested, the SISO system can be scaled to form a complete

MIMO system. However, a SISO link cannot be used to evaluate space-time coding.

Hence, a 2 X 1 MISO (Multiple Input Single Output) system is used for space-time

coding measurements.

4.1 SISO Link Setup

The block diagram for testing a SISO link is shown in Fig. 4.1. The system here is

comprised of a BER generator, a dual power supply, the transmitter board, VCSEL,

photodiode, the receiver circuit and a high-speed oscilloscope. The functions of these

components and devices in the SISO link are discussed below.

BER Generator: The Bit Error Rate (BER) generator serves as the source of

the system. The Tektronix gigaBERT 1400 generator used in this setup provides

a differential input. A pseudo random bit sequence (PRBS) is generated using

this generator and fed to to the transmitter board as an input. This input is

also fed to the oscilloscope using T-connectors for use in system evaluation.

Power Supply: The power supply is connected to the transmitter board, pho-

44

todiode board and the amplifier. The transmitter board and photodiode board

need 3.3V to drive the transmitter circuitry and bias the photodiode respec-

tively. The amplifier needs a higher voltage (12V ) for providing amplification.

A dual power supply, Agilent E3630, is used for the setup.

Transmitter Board: The function of the transmitter board is to generate a

drive current for the VCSEL. The board houses the driver chip and the neces-

sary circuits and controls for adjusting the input to the VCSEL. It has analog

potentiometers to control the total power, biasing current and modulating cur-

rent fed to the VCSEL. It also has a LED indicator to indicate fault conditions

in the driver circuit. The board receives a differential signal but the output to

the VCSEL is single-ended as most of the VCSELs are configured to receive a

single-ended driving signal.

VCSEL Board and VCSEL: The VCSEL board houses the VCSEL (Finisar

HFE4094-342) and connects it to the transmitter board through a SMA con-

nector. It also has a header to connect the monitoring photodiode output to

the transmitter for automatic power control.

Photodiode Board and PD: The photodiode board houses the photodiode

(Finisar HFD3081-103) and has two headers to provide voltage for biasing the

photodiode. This photodiode has a built-in TIA and outputs a differential

signal.

BALUN and Amplifier: The transformer TC1-1-13M+ is used as a BALUN

as described in section 3.4. The device is soldered on a commercially available

test board and connected to the amplifier ZKL-2+ using SMA connectors. The

BALUN receives the differential output from the photodiode and feeds a single

ended signal to the amplifier. The output of the amplifier with a gain of about

45

30dB is connected to the oscilloscope.

Oscilloscope: The oscilloscope, Agilent Infiniium 54855A, is used for data

capturing. Both input and output waveforms are sampled at a specified rate

and the data is stored on the internal disk of the scope as a CSV file. This data

is processed in MATLAB for further system analysis. The scope also captures

eye diagrams and measurements associated with eye diagrams like eye height,

eye width and duty-cycle distortion.

Data Processing in MATLAB: The captured data is processed in MATLAB

using scripts specially written to calculate Bit Error Rate and perform noise

analysis. MATLAB is also used to plot the results obtained after processing the

data.

The actual setup is shown in Fig. 4.2

46

Figure 4.1: Block Diagram of SISO Link

47

BALUN

AmplifierTransmitter

VCSEL

Photodiode

Figure 4.2: SISO Link Setup

48

4.2 Data Rate Tests

The driver and receiver circuit has been designed for operation over a wide fre-

quency range from 100Mbps to 1000Mbps. It is important to verify reliable circuit

operation and characterize the system performance throughout this data range. Eye

diagrams provide a good pictorial representation of the signal and can be used as a

tool in comparing the quality of the data signal at different frequencies [14].

4.2.1 Test Setup

The SISO link described in Section 4.1 was used for these tests. The VCSEL

and the photodiode are kept very close to each other with their cases less than 1mm

apart to allow the maximum VCSEL irradiation to fall on the photodiode. Thus,

the results are expected to be a fair representation of the frequency characteristics of

the circuit regardless of the channel noise. Eye diagrams for rates between 100Mbps

and 1000Mbps were captured in steps of 100Mbps. The VCSEL bias and modulation

currents for each measurement were set at 8mA. The eye diagrams were captured

between 40% and 60% level. Eye height and eye width for each step were recorded

and then plotted for comparison. To provide a common basis of comparison of eye

widths, the percentage of the measured eye width over the duration of each bit at the

given data rate was plotted. A waveform capture of input and output traces was also

taken at each data rate to measure the delay due to the system.

4.2.2 Test Results and Analysis

The snapshots of eye diagrams for all tested data rates are shown in Fig. 4.3. It

can be observed that the ‘eye’ deteriorates with frequency. At 100Mbps, the eye has

a near rectangular shape with an empty interior which indicates a clean signal. This

eye height and width decreases with increasing frequency. The corners start sloping

49

Figure 4.3: Snapshots of Eye-Diagrams for Data Rates 100Mbps through 1000Mbps

50

off gradually to almost straight lines for 1000Mbps. Fig. 4.4 shows the captured eye

heights for each data rate. The input was held constant at 8mA of bias and 8mA

of modulating current for all measurements to ensure comparable results. For the

observed measurements, the eye height consistently decreases from about 1.3V for

100Mbps to 0.65V for 1000Mbps. The peak voltage of the signal does not change

through these frequencies but the data points in the lines have a wider spread which

reduces the eye height. The eye height measurement determines eye closure due to the

noise in the system. Hence, it appears that the noise in the system slightly increases

with frequency. For a PIN photoreceiver, the noise is dependant on frequency [29].

The noise sources for PIN photoreceivers can be modeled as shot noise, thermal noise

and channel noise. The first two have a linear relationship with data rate while the

last one has a third order relationship [29]. This increased noise causes the eye height

to decrease at higher data rates.

100 200 300 400 500 600 700 800 900 1000600

700

800

900

1000

1100

1200

1300

Data Rate(Mbps)

Eye Height (mV)

Figure 4.4: Eye height versus Data Rate

51

The horizontal opening of an eye diagram can be characterized using the eye

width. The measured eye-width as a percentage of the bit duration for each data rate

is plotted in Fig. 4.5. This eye width measurement can be used in determining the

sampling rate for digitizing the data signal. A larger eye width means that very few

samples may suffice in successfully determining a digital one or a zero. For example,

for 100Mbps, the eye width is 97.7% of the duration of a bit at that data rate(10ns).

This means that a single sample in any portion of the bit is very likely to provide the

correct value of the digital signal. The eye-height is reduced to about 67% of the bit

width for 1000Mbps. However, this eye width is sufficient to digitize the signal at a

fairly low sampling rate. The decrease in the eye width could be attributed to the

RC parasitics induced by different components of the system.

0 200 400 600 800 100065

70

75

80

85

90

95

100

Data Rate(Mbps)

%Eye Width

Figure 4.5: Percent eye width versus data rate

The system delay was calculated by measuring the time difference between the dif-

ferential input and the output. An example of this measurement is shown in Fig. 4.6.

52

Figure 4.6: Delay measurement for 100Mbps Signal

The top two waveforms in the figure represent the differential input and the bottom

waveform is the output. The delays were similarly measured for other data rates

as well. The delay remained almost constant regardless of frequency and repeated

measurements were taken at different data rates to obtain an average measurement

of 25.1ns.

4.3 Range Tests

To improve system performance the effective Signal to Noise Ratio (SNR) at the

receiver is usually increased. This can be done by increasing the transmitted power

[22]. In the case of a VCSEL-PD based chip-to-chip FSO system, the transmitted

power can be increased by increasing the current input to the VCSEL. The VCSEL’s

input current has two components; the bias and the modulating current. The bias

current is a constant DC current which is usually set to always keep the VCSEL on,

53

as turning the VCSEL “on” and “off” during modulation involves a delay equal to

the ‘turn-on’ time of the VCSEL. This point is discussed experimentally in the results

part of this section. The modulating current contains all the data information and is

offset by the bias current’s DC level. It is important to understand the significance

of the bias and modulating currents while increasing the transmitted power of the

system.

Another factor that can change the effective SNR at the receiver is the distance

between the VCSEL and the photodiode. The VCSEL beam is divergent, therefore

the longer the distance between the VCSEL and the photodiode, the lesser the power

captured by the detector. Hence, by decreasing the distance between the VCSEL-PD

pair, one can increase the effective SNR at the receiver. Hence, the system should be

tested to characterize its performance under increasing interconnection distance and

varying transmitted power.

4.3.1 Test Setup

The SISO system described in Section 4.1 is used for conducting these range

and output power tests. It is obvious that increasing the output power enhances

the range of the system and thus the higher range of output currents as determined

by the specifications of the VCSEL are chosen for the test. The VCSEL can safely

accept input currents of up to 15mA, thus 10mA of bias and 10mA peak-to-peak

of modulation is one of the highest possible input currents. Several measurements

were taken at varying input current conditions of up to 10mA of bias and modulation

currents. At each input current, the distance between the VCSEL and the photo-

diode is successively increased in 2mm steps. Bit Error Rates (BER) are used as a

measure of system performance. The number of bits required to get a reliable BER

measurement is determined using Equation 4.1, where n is number of bits required,

54

pn is the estimated error, tw is obtained for a given confidence interval from the table

of tail probabilities for a standard normal and v is the error width [28].

n =1− pnpn

(2twv

)2

(4.1)

One million bits for each step are taken to ensure less than 0.1% error in measurement

with a confidence interval of 90% (pn = 0.001 and tw = 1.645). The data is sampled

at the rate of ten samples per bit at speeds of 100Mbps, 500Mbps and 1000Mbps.

The captured data is processed in MATLAB (code in Appendix C) by taking the

average value of the ten samples for each bit. BER for each measurement is calcu-

lated by comparing the output bits with the input bits after thresholding. BER vs.

interconnection distance between the VCSEL-PD pair is plotted for each of the three

data rates as seen in Figs. 4.7, 4.8 and 4.9 where Ib is the bias current and Im is

the modulation current in milliAmps. Each plot includes the multiple input current

conditions for easy comparison.


For interconnection distances smaller than the ones shown in the Figs. 4.7, 4.8

and 4.9 , no bit errors were measured. At Ib = 10mA and Im = 10mA, an error rate

of less than 1% can be achieved up to 20mm interconnection distance at 100Mbps,

up to 16mm at 500Mbps, and only 10mm at 1000Mbps. As discussed earlier, the

system performance deteriorates at higher frequencies. However, the trend followed

for each of the three plots is similar.

In all three plots it can be observed that at a given data rate, results are grouped by

the modulation currents and not the bias or total maximum currents. In all graphs,

lines representing modulation currents of 8mA and those representing modulation

currents of 10mA follow similar trends and have similar BER for a given data speed.

55

10 11 12 13 14 15 16 17 18 19 2010

-6

10-5

10-4

10-3

10-2

10-1

Interconnection Distance(mm)

BER

Ib= 8 and I

m= 6

Ib= 8 and I

m= 8

Ib= 8 and I

m= 10

Ib= 10 and I

m= 8

Ib= 10 and I

m= 10

Figure 4.7: BER vs. Interconnection Distance between VCSEL and Photodiode fordifferent bias and modulation currents at 100Mbps

8 9 10 11 12 13 14 15 1610

-6

10-5

10-4

10-3

10-2

10-1


BER

Ib= 8 and I

m= 6

Ib= 8 and I

m= 8

Ib= 8 and I

m= 10

Ib= 10 and I

m= 8

Ib= 10 and I

m= 10


56

4 5 6 7 8 9 10 11 1210

-7

10-6

10-5

10-4

10-3

10-2

10-1


BER

Ib= 8 and I

m= 6

Ib= 8 and I

m= 8

Ib= 8 and I

m= 10

Ib= 10 and I

m= 8

Ib= 10 and I

m= 10


Also, higher modulation currents produce lower BER at a given distance and data

rate regardless of the bias current. Hence, it can be concluded that the modulation

current is the component that contributes to the increase in effective received power

and not the bias current. However, as explained below, the bias current should also

be increased with modulation current to ensure that the VCSEL is always on.

Figure 4.10 shows the eye diagram of an output signal with an input bias current

of 4mA and modulation current of 8mA peak-to-peak at 400Mbps. In this case, the

diode is turned off by the negative half-cycle of the modulation current, as the driving

current is less than the lasing threshold. At data rates comparable to the one used

here, the turn-on time of the VCSEL is larger than the rise time of the data signal.

The eye diagram shows that the positive half-cycle is smaller than the negative one or

in other words, the duty-cycle is not 50%. The duty cycle distortion in the signal was

measured to be 24.4% which means that the duration of the digital ‘0’ bit is 24.4%

longer than it should be. This duty-cycle distortion can be attributed to the time

57

Figure 4.10: Eye diagram for the output signal with 4mA of bias and 8mA of modu-lation currents

it takes to turn the VCSEL ‘on’. The negative half-cycle of the modulated current

drives the VCSEL 4mA below the DC bias of 4mA. For a part of the negative cycle,

instantaneous drive current is below the VCSEL threshold of 1.8mA and the VCSEL

is turned off for that part. In the positive half-cycle, the current stays above the

threshold and the VCSEL is on. Now, the VCSEL ‘turn-on’ is not instantaneous but

has a small delay involved. It is due to this delay that the zero bit is wider than it

should be. The VCSEL should, therefore, always be biased such that it never gets

turned off due to the modulation current.

4.4 Noise Analysis

The interconnection distance range with respect to modulation and bias currents

was analyzed in the previous section. While capturing the data on the scope for the

range tests, it was visually observed that the BER increases significantly when the

noise levels are comparable to the output voltage levels. The system noise makes

58

it difficult to accurately receive the transmitted signal. Hence, it is important to

characterize noise in the system. The noise can be analyzed at the output of every

section of the circuit that has the potential to add noise to the data signal. Four such

points in the transceiver circuit were identified. The points include the outputs of the

transmitter driver board before the VCSEL, the photodiode and the transimpedance

amplifier pair, the BALUN and the wideband amplifier. These four positions are

indicated in Fig. 4.11. The single connecting lines in the signal indicate a single-

ended signal while the double lines indicate a differential signal. By performing the

Chi squared test [28] it can be verified that the noise distribution is Gaussian. If that

is the case, the system channel can be easily separated from the noise by taking the

average of the observed output values as Gaussian distributions have a zero mean

[28].

Figure 4.11: Positions for Noise Analysis in the SISO System

4.4.1 Test Setup

The SISO link described in Section 4.1 was used for conducting the noise anal-

ysis. To begin the tests, the SISO link was used ‘as is’ to collect data for the noise

at the output of the amplifier. The input was a 100Mbps PRBS signal biased at

59

8mA and modulated with a 8mA signal. The output data was sampled at a rate

of 20GSamples/s allowing a very good representation of the noise to be captured.

About 262,000 samples of noise were obtained for each measurement. The same input

and capture conditions were maintained for all measurements. A set of measurements

were taken at each of the four points indicated in Fig. 4.11. For the first set (at point

4 in the figure), the VCSEL and photodiode cases were kept almost touching each

other. Two more measurements at point 4 were obtained at interconnection dis-

tances of 6mm and 12mm. For measuring the noise after the BALUN (point 3), the

oscilloscope was directly connected to the output of the BALUN. In case of the photo-

diode/TIA pair (point 2), the differential output signal was measured by connecting

the SMA connectors on the photodiode board to the scope via a pair of DC blocks

to prevent overloading of the scope. In both the above cases, measurements were

obtained at three different interconnection distances as described for the amplifier.

The transmitter board (point 1) noise was obtained by connecting its output directly

to the oscilloscope. Varying interconnection distances is obviously meaningless in the

case of the transmitter board.

While processing the data in MATLAB, the first task was to extract the noise

from the measurements by separating the actual data signal and the noise. To this

end, the digital bits (ones and zeros) were first identified using a thresholding process

similar to the one used for BER calculations. The average voltage value for a digital

1 or digital 0 for the given measurement was then appropriately subtracted from the

samples to obtain the noise. This noise was then normalized for comparison using

equation 4.2, where x is an individual noise sample, µ is the mean of the noise samples

and σ is their standard deviation [28].

NormalizedNoise =x− µσ

(4.2)

60

The normalized noise is then compared with a simulated Gaussian distribution gener-

ated using MATLAB functions. Inbuilt functions are used to perform the Chi-squared

(χ2) test by comparison with the simulated distribution. This test verifies that the

normalized noise signal is Gaussian for a given confidence interval. The test was

conducted for a 99.995% confidence interval using MATLAB functions. Before per-

forming a χ2 Test, the noise data was divided in fifty parts and analysed individually

for confirming the results through repetition. The mean and variance of the noise

samples are calculated for characterizing each measurement. The simulated and ex-

perimental distributions are plotted for comparison. The MATLAB script for this

noise analysis can be found in Appendix D.


The χ2 analysis performed on various measurements revealed that all noise samples

obtained were Gaussian with at least 99.995% confidence. Figures 4.12 through 4.17

show comparisons of simulated Gaussian distribution and normalized experimental

noise distributions for the different conditions measured. It can be noted from the

figures that all experimental distributions closely match the expected simulated ones.

On all plots, the x axis represents the standard deviation from the mean. For

example, the values 1 and -1 represent a distance of one standard deviation from the

mean. The area under the curve between any two x-axis points gives the probability

that a given point is within that range of standard deviations and the axis label on

the y-axis indicates this point. Figures 4.12, 4.13 and 4.14 show photodiode noise

distribution comparisons at the smallest, 6mm and 12mm interconnection distances

respectively. All three indicate a close resemblance between the simulated and exper-

imental distributions. The interconnection distance plots for noise measurements at

other points of the circuit are also similar and thus plots for only one interconnection

61

distance for each case is shown. As the noise is Gaussian, one can easily find the

H-matrix by calculating the average value of the received output signal. However,

since a MISO system is tested for this thesis, a H-vector is calculated in stead of an

H-matrix.

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

x

P(X<x)

Experimental Distribution

Simulated Distribution

Figure 4.12: Comparison of Experimental and Simulated Distribution of Noise atthe output of the Photodiode/TIA at Ib = 8mA&Im = 8mA at the Least PossibleInterconnection Distance

Table 4.1 shows a comparison of noise variances for the different measurements

being considered. The variances for the photodiode/TIA pair and the BALUN are

quite similar in terms of orders of magnitude. In fact, the variances for the BALUN

can all be observed to be less than an order of magnitude smaller than the photodiode

ones. While converting from differential to single-ended, the BALUN introduces a

minor loss in signal power which could be responsible for the lower variance values.

While comparing the variances for the BALUN and the amplifier, one might notice

that the variances for the amplifier are about a thousand times larger than those

62

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

x

P(X<x)



Figure 4.13: Comparison of Experimental and Simulated Distribution of Noise atthe output of the Photodiode/TIA at Ib = 8mA, Im = 8mA & Interconnection Dis-tance=6mm

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

x

P(X<x)



Figure 4.14: Comparison of Experimental and Simulated Distribution of Noise atthe output of the Photodiode/TIA at Ib = 8mA, Im = 8mA & Interconnection Dis-tance=12mm

63

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

x

P(X<x)



Figure 4.15: Comparison of Experimental and Simulated Distribution of Noise at theoutput of the BALUN at Ib = 8mA, Im = 8mA & the Least Possible InterconnectionDistance

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

x

P(X<x)



Figure 4.16: Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Amplifier at Ib = 8mA, Im = 8mA & the Least Possible InterconnectionDistance

64

-4 -3 -2 -1 0 1 2 3 40

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

x

P(X<x)



Figure 4.17: Comparison of Experimental and Simulated Distribution of Noise at theoutput of the Transmitter at Ib = 8mA&Im = 8mA

for the BALUN. The gain for the amplifier is about 30dB which is a factor of 1000.

Hence, it can be concluded that the noise at the output of the BALUN is amplified.

This increased noise limits the range of the system. If the dual matched amplifier

circuit described in Chapter 3 is used for the receiver, the differential nature of the

signal is maintained even after amplification. Even though the noise is amplified in

the case of the matched amplifiers too, the common mode noise can be removed due

to the differential nature of the signal. Using the dual matched amplifier solution,

lower BER can possibly be achieved at greater interconnection distances compared

to the ones observed in the range tests.

4.5 MISO Tests and Space-Time Coding Evaluation

The MIMO FSO transceiver was designed to evaluate space-time coding using

chip-to-chip FSO communications. The designed transmitter board is capable of

driving four VCSELs at a given time. However, there is only one receiver system and

65

Interconnection Distance Photodiode/TIA (V 2) BALUN (V 2) Amplifier (V 2)Least Possible 5.1798X10−6 3.4481X10−6 2.4X10−3

6mm 2.7045X10−6 5.3543X10−7 5.135X10−4

12mm 2.1031X10−6 5.1911X10−7 4.4678X10−4

Table 4.1: Comparison of Variances for Noise Distribution at Different Points in theCircuit

thus a single photodiode can only be used to receive the transmitted signal. A MISO

(Multiple Input Single Output) system using two VCSELs and a single photodiode

can be used to observe the effect of crosstalk and illustrate the possible improvement

to the system performance due to space-time coding.

4.5.1 Test Setup

The test setup shown in Fig. 4.1 was modified to conduct these MISO tests. In

stead of using a single VCSEL, two VCSELs were placed very close to each other

with the packaging cans almost touching. Fig. 4.18 shows this modified setup. As

can be seen from the figure, the two divergent laser beams start interfering with each

other after traveling a certain distance. The photodiode is placed sufficiently far

from the VCSELs so that the crosstalk between the VCSELs can be observed on the

photodiode. The previous range tests (Section 4.3) revealed that the VCSEL output

power depends on its modulation current. Hence, the modulation current on each

VCSEL was varied to control the crosstalk level observed at the photodiode. As this

system has a single output, a 2 × 1 H-vector can be determined. The noise on the

output signal is expected to be Gaussian and so the channel gains for each H-vector

element can be simply determined by taking the average of the output voltage levels

observed. H-vector elements are determined by keeping only one VCSEL ‘on’ at a

time and capturing the output on the detector due to that VCSEL. The output data

66

is processed to find the peak-to-peak voltage due to each VCSEL. This voltage level

corresponds to an element in the vector matrix. The noise variance at the output

is also determined. To calculate BER for the MISO system, both the VCSELs are

turned on with separate data being transmitted through each. The output from the

system and the differential input signal are captured. The same measurements are

repeated for two other crosstalk levels generated by varying the bias and modulating

currents.

With the experimental noise data, the effect of space-time coding can be evaluated

using a MATLAB simulation (Appendix E). The MATLAB script finds the expected

BER for the received signal, given the experimental H-vector and the noise variance,

using equation 4.3 where y is the simulated output, x1 is the input bit, x2 is the

interferer bit and η is the noise.

y = h11x1 + h21x2 + η (4.3)

The calculated BER of the simulated output system signal is compared with the BER

obtained from the experimental data. Space-time coding is then implemented on the

same simulated output system. The results of this simulation are discussed in the

next section.


The results obtained from the test and simulation are shown in Fig. 4.19. The

x axis in the plot represents percent optical crosstalk. This cross talk is determined

using the H-vector. For example, the H-vector for the 48% case in the figure was

calculated to be

H =

0.1305

0.0623

67

Figure 4.18: VCSEL-Photodiode Setup for Space-Time Coding Evaluation

The crosstalk percent was calculated by taking the ratio of the channel gain of the

interferer (0.0623) to the transmitted signal (0.1305). This example thus gives a

crosstalk percent of about 48%. In Fig. 4.19, it can be observed that the BERs

for the actual output signal and the simulated output signal are very similar. This

fact confirms that the calculated H-vector and the measured Gaussian noise variance

can be successfully used to reproduce the output signal. For the simulation it was

found that space-time coding can reduce the BER by a factor of approximately ten

times. The three data points were obtained at 39%, 48% and 60% crosstalk levels

(as defined earlier). It can be observed that even though the actual BER increased

between the 39% and 48% marks, the BER after space-time coding between these

two points reduced by a small amount. This observation suggests that space-time

coding uses crosstalk to its advantage in improving signal quality. However, at 60%

crosstalk the BER for space-time coding also increased significantly. It seems that

though space-time coding uses crosstalk to its advantage, the BER improvement is

68

at some point limited by the quality of the received signal.

35 40 45 50 55 60 6510

-4

10-3

10-2

10-1

Percent Crosstalk

BER

Experimental BER

Simulated BER

Space Time Coding Simulation BER

Figure 4.19: Expected Improvement in BER using Space Time Coding

69

5. Conclusions and Future Work

5.1 Conclusions

It is established that crosstalk due to beam divergence and component misalign-

ments are the main impediments in successfully implementing FSO systems for chip-

to-chip and board-to-board communications [18]. Space-time coding is a technique

that has the potential to actually take advantage of optical crosstalk, giving the FSO

system better performance. However, most of the currently available optical hard-

ware is designed for fiber optics and is not ideal for testing space time coding on FSO

systems. Hence, the development of such a transceiver is of interest, and has been

addressed in this thesis.

Chapter 3 of this study describes the procedure followed in selecting the com-

ponents and designing the circuits for a FSO system. The VCSEL and photodi-

odes chosen for the prototype design were Finisar’s HFE4094-342 and HFD3081-103

respectively. The former was chosen because of its low threshold current and an

inbuilt monitoring photodiode while the latter was chosen as it had a packaged tran-

simpedance amplifier. Maxim’s MAX3740A was chosen as the VCSEL driver chip

as it allows easy on-board control of circuit parameters and can be used to operate

several different types of VCSELs. The transmitter board was designed based on the

evaluation board for the MAX3740A, though several design changes were introduced

to customize the board for the application. The designed transmitter board can han-

dle up to four datastreams at a time. Space time coding requires an output which

is proportional to the photodiode current. Hence, limiting amplifiers cannot be used

for this application. Two designs involving wideband amplifiers have been suggested

in this thesis. The first design utilizes a BALUN to convert the differential output

70

of the photodiode/TIA pair to a single-ended signal which is then amplified using

a wideband amplifier. This design was put together using commercially available

Minicircuits’ components (TC1-1-13M+ and ZKL2+). The second design uses a dual

matched amplifier to maintain a differential signal throughout the system. Though

the layout for this system was designed, its fabrication could not be completed due

to the unavailability of plated via holes for the thin Rogers board used in the design.

A SISO prototype system was assembled using the components and circuits de-

scribed above. A SISO system allows for quick testing and modification of the design.

This SISO system can then be scaled to form a MIMO system of the desired size.

Several tests were conducted to characterize this SISO system. The first test was the

data rate test which evaluated the system performance at different input data rates.

It was found that the system performance deteriorated at higher data rates. The

frequency dependance of noise at the photodetector and RC parasitics may be the

main causes of this deterioration. The delay of the overall system was measured to

be about 25.1ns. Range tests were conducted on the system at 100Mbps, 500Mbps

and 1000Mbps by varying the interconnection distance between the VCSEL and the

photodiode. This test was conducted to not only determine the range of the system

but also quantify the effect of bias and modulation currents. Results revealed that the

system could achieve an error rate of less than 1% at 10mA of bias and modulation

currents with up to 20mm interconnection distance at 100Mbps, 16mm at 500Mbps

and 10mm at 1000Mbps. Also, it was concluded that received signal strength depends

on modulation current alone and not the bias current. However, the VCSEL should

be biased significantly above its threshold so that the modulation current does not

turn the VCSEL off and cause duty cycle distortion. Noise at the output of the trans-

mitter board, the photodiode/TIA pair, the BALUN and the amplifier was studied.

It was found with a confidence interval of at least 99.995% that the noise at all these

71

points was Gaussian. Also, the variance of the noise at the output of the amplifier

was approximately a thousand times larger than that at the BALUN. This increase

is equivalent to the gain of the amplifier and could be reduced if a dual matched am-

plifier is used. The space-time coding simulation proved that the output signal can

be closely characterized using the H-matrix and the noise level in the original signal.

The results suggest that space-time coding uses crosstalk to its adavantage and can

potentially improve the BER of a signal by a factor of ten. Morever, the simulation

establishes that the designed hardware can be successfully used to implement and

test space-time coding for chip-to-chip MIMO FSO communications.

5.2 Future Work

Testing the SISO system motivated some design changes in the system. The

coupling capacitors at the output of the transmitter board prevented the bias current

from reaching the VCSEL, thereby rendering the circuit inoperable. In the second

revision of the transmitter board, these capacitors should be replaced by 0Ω resistors.

In the current system, the monitoring photodiode output on the VCSEL board has

to be connected to the transmitter using banana clips. Headers should be mounted

on the sides of the transmitter board and the VCSEL board for direct connection

of the monitoring photodiode output. Fabrication and testing for the dual matched

amplifier receiver design should be completed to possibly achieve lower noise levels

and longer interconnection distances. Though, the input wavelength range of the

photodiode is only 770nm to 870nm it is possible that significant ambient noise is

detected by the photodiode. Hence, the tests should also be conducted by enclosing

the system in an enclosure that keeps external radiation out (e.g. metal enclosure).

The system should be tested and characterized for operation with packaged arrays

of VCSELs and photodiodes. The MISO test and simulation was meant to be a

72

simple test to establish the design’s suitability for space-time coding and determine if

space-time coding can improve the system performance. However, a complete MIMO

system for studying space time coding needs to be assembled for an in-depth analysis

of space-time coding for MIMO FSO communications.

73

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77

Appendix A. Transmitter Board User Guide

The VCSEL transmitter board is capable of driving four VCSELs simultaneouslywith different differential input datastreams. The board inputs and outputs can beconnected to other devices using SMA cables. The same basic circuit driver circuit isrepeated four times in the transmitter board. Hence, in this user guide, references willbe made to the components in the first driver circuit. While driving other circuits,similar actions should be performed on corresponding components of those drivercircuits.

A.1 Basic Setup

Remove all jumpers from the board.

Replace capacitor C9 with a 0Ω resistor.

Adjust the RPWRSET potentiometer, R1, to 10kΩ between TP2 and pin 1 ofJU1 for the least power output when the circuit starts.

Adjust the RPEAKSET potentiometer, R14, to 20kΩ between TP10 and GNDto disable peaking.

Adjust the RTC potentiometer, R16, to 0Ω between TP7 and TP8 to disabletemperature compensation.

Connect a 3.3V DC supply to TP20 and ground TP21. Ensure that 3.3V isreceived at TP6, TP11 and pin 1 of JU10. This set of components are testpoints for ensuring proper voltage supply to the entire circuit and are commonto all drivers. Turn off the power supply.

Connect shunts on JU3, JU6, JU7, JU8 and JU10. The circuit control usingthese jumpers is shown in Table.

A.2 Common Cathode Operation

The drivers on the transmitter board can be operated with a common cathodeVCSEL as follows.

Connect a VCSEL board with a common cathode VCSEL to J6 using a SMAconnector.

Connect the monitoring photodiode output of the VCSEL to pin 1 of JU1 usingbanana clips.

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Connect a differential input signal (250mVPP and 2.2VPP ) between J5 and J7using SMA cables.

Adjust the RBIASSET potentiometer, R15, to 1.7kΩ between TP4 and GND.

Adjust the RMODSET potentiometer, R2, to 10kΩ between TP9 and GND.

The output power of the VCSEL can be increased by reducing the resistanceon R1. The bias current can be calculated by finding VBIASMON betweenTP3 and GND using IBIAS = (9 × VBIASMON)/350. The modulation cur-rent can be calculated by finding VPWRMON between TP1 and GND usingIMD = (VBIASMON/(2×RPWRSET ).

A.3 Operation without Monitoring Photodiode

The transmitter board can be driven without the automatic power control (APC)function to operate VCSELs without a monitoring photodiode. Common anode VC-SELs can be driven using this function if required. This option offers manual controlof bias and modulation currents.

Install jumpers at JU4 and JU1.

Connect a VCSEL board with a VCSEL to J6 using a SMA connector.

Connect a differential input signal (250mVPP and 2.2VPP ) between J5 and J7using SMA cables.

The bias current can be set by adjusting the VBIASMON pin at an appropriatelevel, this pin can be observed between GND and TP3. The voltage level canbe found using the relation VBIASMON = (IBIAS × 350)/9.

The modulation current can be set by adjusting the RMODSET potentiometer,R2 to the required resistance level obtained from the ‘Modulation Current vs.RMODSET ’ plot in the MAX3740A datasheet.

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Component Name FunctionD2 Fault Indication LED is illuminated for a fault conditionJU1 COMP Ground COMP pin to disable APC.JU3 TX Ground TXDISABLE pin to turn on the driver.JU4 PWRMON Ground PWRMON pin to disable APC.JU6 FAULT Enable fault indication.JU7 SQUELCH Enable squelch function.JU8 POWER Provide power to the board.JU10 VCCEXT Provide power to fault indication circuit.R1 RPWRSET Control output power in APC mode.R2 RMODSET Control modulation current.R14 RPEAKSET Control peaking for falling edge of VCSEL.R15 RBIASSET Control bias current.R16 RTC Control modulation temperature compensation.

Table A.1: Board Control Description

Note: Additional information can be found in the MAX3740A Datasheet.

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Appendix B. Gerber Files for the Transmitter Board

List of Gerber files:

Top Routing Layer

Bottom Routing Layer

Power Plane Layer

Ground Plane Layer

Silk Screen Layer

Drill Layer

87

Appendix C. MATLAB Script for BER Calculation

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%ber script.m%Shrenik Vora%08/26/2010%This program calculates the BER for data from a CSV file that has the%input and output data%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

clear all;clc;close all;

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%INPUT SECTION%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Read the data fileM = csvread('filename');

%Store the differential input data in an arrayinput array = M(:,3) - M(:,2);

%Determine threshold for A\D conversion using the mean of the input datainput tresh = mean(input array);

%Store the output data in an arrayoutput array = M(:,4);

%Determine threshold for A\D conversion using the mean of the output dataoutput tresh = mean(output array);

%Determine size of the input and output data array for comparison[input size,x] = size(input array);[output size,x] = size(output array);

%Display error and stop execution for array size mismatchif(input size 6= output size)disp('Array size mismatch. Quit the program now?');disp('<a href="matlab:dbquit;">Yes</a>/<a href="matlab:dbcont;">No</a>');keyboard;

end%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Loop Variables%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

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%Indexing variable to loop through the data pointsi = 1;

%This variable is set equal to number of samples per bitloopcount = 10;

% Variable to record the number of bit errorsfinal err count= 5000000;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Main Loop%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%% The while loop accounts for possible misalignments in data by looping% through different initial points based on number of samples per bitwhile(loopcount > 0)

% Initialize variables for counting number of bits and errors for each looperr count = 0;bit count = 0;

%Nested while loop runs starting at each possible initial point based on%number of samples per bit

while i < (input size - loopcount),

%Increment the starting point for each new loopif(i < loopcount)

i = i + 1;

%The else block compares copares input and output bits for errorselse

%Set the input bit voltage level by taking average of bit voltage valueinbit set = (input array(i+4)+ input array(i+5))/2;

%Digitize the bit by comparing with the thresholdif(inbit set> input tresh)

input bit = 1;else

input bit = 0;end

%Set the output bit voltage level by taking average of bit voltage valueoutbit set=(output array(i+4)+output array(i+5))/2;

%Digitize the bit by comparing with the thresholdif(outbit set> output tresh)

output bit = 1;else

output bit = 0;end

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%Increment the bit count for each bit digitizedbit count = bit count + 1;

%Compare input and output bits to find and increment count of error bitsif(input bit 6= output bit)

err count = err count + 1;end

%Increment the index by number of samples per biti = i + loopcount;

endend

%Find the least error count among all initial pointsif(err count < final err count)

final err count = err count;end

%Reset index to 1i = 1;

%Change the initial point for the looploopcount = loopcount - 1;

end%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Print Outputs%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Output the total number of bitsbit count

%Output the total error bitsfinal err count

%Output the bit error ratebit error rate = final err count/bit count%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

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Appendix D. MATLAB Script for Noise Analysis

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%stc sim.m%Shrenik Vora%08/26/2010%The script confirms that the distribution of noise samples is Gaussian and%calculates the variance and mean of the noise samples%The code is written for data collected at the rate of 200 times per bit%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%clear all;close all;clc;

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Input Section%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Load the system output data filedata = csvread('filename');noise = squeeze(data(:,2));

%Calculate the mean of input for thresholdingthreshold=mean(noise);

%Determine the size of the input array[noise size,x] = size(noise);

%Create an array to hold noise samples separated from data valuesnew noise = zeros(round(noise size*0.7),2);%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Loop Variables%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Indexing variable to loop through the data pointsi = 1;

%Variables to determine the last filled slot in the noise arrayend pointer = 1;end point fixer = 0;

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Noise Extraction%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%This loop separates the noise from the data signalwhile(i < (noise size-200))

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%Find average value of a bittotal = 0;for j=(i+30):(i+169)

total = total + noise(j);endaverage = total/140;

%Subtract the average value from each noise samplefor j=(i+30):(i+169)

noise(j) = noise(j) - average;new noise(end pointer,:) = [0 noise(j)];

%Determine the last point filled in the noise arrayend pointer = end pointer + 1;end point fixer = end point fixer + 1;if(end point fixer ==50)

end point fixer = 0;end

end

%Increment by 200 samples to proceed to the next biti=i+200;

end

%Fill the remaining array with null valuesend pointer = end pointer - end point fixer;new noise(end pointer:end,:) = [];final noise = squeeze(new noise(:,2));

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Determine the variance and mean of the noisevariance = var(final noise)average mean = mean(final noise)

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Plot normalized noise and simulated Gaussian noise%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Calculate normalized noisenormalized noise = (final noise - mean(final noise))/std(final noise);

%Simulate a Gaussian noise arraytheoritical noise = normrnd(0,1,10000,1);

%Set range of x axisx range = linspace(-4,4,101);

%Determine probability density of both signals[F X] = ksdensity(normalized noise,x range);[Ft Xt] = ksdensity(theoritical noise,x range);

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%Plot the resultsplot(X,F,Xt,Ft,'--r','LineWidth',4)xlhand = get(gca,'xlabel');set(xlhand,'string','x','fontsize',20)ylhand = get(gca,'ylabel');set(ylhand,'string','P(X<x)','fontsize',20)set(gca,'FontSize',16)legend('Experimental Distribution','Theoritical Distribution')%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Chi squared Test for Gaussian Distribution%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Variable to count the number of test failuresfail count = 0;

%Size of noise samples[new noise size,y] = size(normalized noise);

%Variable to divide noise into 50 partsblock size = new noise size/50;

%Index variable for the loopk = 1;

%This loop performs Chi squared test on noise samples divided into 50 partswhile(k < new noise size)

%Distribution density of Noise samples[F block X block]=ksdensity(normalized noise(k:(k+block size-1),...

:),x range);

%Calculate difference from simulated Gaussian signalstatistic = sum((F block-Ft).ˆ2./Ft);

%Chi squared testif(statistic > chi2inv(0.00005, 100))

fail count = fail count + 1;endk = k+block size;

end%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Output the number of test failuresfail count

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Appendix E. MATLAB Script for Space Time Coding Simulation

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%stc sim.m%Originally written by Paul Martin%Modified by Shrenik Vora%08/26/2010%Space time coding simulation for a 2X1 MISO system%The script simulates a received signal based on experimental h-matrix and%noise variance%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%clear all;close all;clc;

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Set Inputs%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Set the number of bits to be simulatedk=1e6;

%Set the H-matrix valuesgain = [0.0912 0.0551];

%Variable to set input bits to onesamplitude = 1;

%Set noise variance for the main signal and the interferervariance1 = 4.25e-4;variance2 = 4e-4;

%Set all input bits to zerosbitstream in=zeros(2,k);

%Generate datastreams for both the received signalsbitstream in(2,:)=randi(2,1,k)-1;bitstream in(1,1:2:k)=1;linear instream = reshape(bitstream in,1,2*k);%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Simulate received signal using noise variance and h-matrix%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%rec1=gain(1).*bitstream in(1,:)+gain(2).*bitstream in(2,:)...

+sqrt(variance1).*(randn(1,k));rec2=gain(1).*(-bitstream in(2,:)+amplitude)+gain(2).*bitstream in(1,:)...

+sqrt(variance2).*randn(1,k);

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received signal(1,:) = rec1;received signal(2,:) = rec2;%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Space Time Coding Block%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Estimated Signals (EQ 8 of Simon)est1 = gain(1).*rec1 + gain(2).*rec2 - gain(1).*gain(2)*amplitude;est2 = gain(2).*rec1 - gain(1).*rec2 + gain(1).ˆ2.*amplitude;

xi = 0;xihat = 1;

%Decision for Odd Numbers (EQ 17 of Simon paper)xihat side1 = (est1 - xihat).ˆ2 + (gain(1).ˆ2 + gain(2).ˆ2 - 1).*(xihat)ˆ2;xi side1 = (est1 - xi).ˆ2 + (gain(1).ˆ2 + gain(2).ˆ2 - 1).*xiˆ2;

bitstream out=xihat side1 ≤ xi side1;bitstream out=bitstream out.*xihat + not(bitstream out).*xi;

%Determine number of error bits after Space Time Codingstc error=sum(bitstream out 6=linear instream(1:2:length(linear instream)));%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%Error in signal without Space Time Coding%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%threshold=mean(received signal(1,:));

received stream(1,:)=(received signal(1,:)>threshold).*amplitude;real error=sum(received stream(1,:) 6= bitstream in(1,:));%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%

%Output the error with and without space time codingreal errorstc error

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Appendix F. List Of Acronyms

1D: One Dimensional

2D: Two Dimensional

ADC: Analog to Digital Converter

AGC: Automatic Gain Controller

AlAs: Aluminum Arsenide

AlGasAs: Aluminum Gallium Arsenide

APC: Automatic Power Control

APD: Avalanche Photodiode

BER: Bit Error Rate

C2C: Chip-to-Chip Communication

CdS: Cadmium Sulphide

CE: Common Emitter

DAC: Digital to Analog Converter

DBR: Distributed Bragg Reflector

EEL: Edge Emitting Laser

FASTNET: Free-space Accelerator for Switching Terabit Networks

FSO: Free Space Optics

InGaAs: Indium Gallium Arsenide

LOS: Line of Sight

MD: Monitoring Photodiode

MIMO: Multiple Input Multiple Output

MISO: Multiple Input Single Output

MTM: Multiple Transverse Mode

OOK: On-off Keying

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PCB: Printed Circuit Board

PPM: Pulse Position Modulation

PRBS: Pseudo-random Bit Sequence

RSSI: Received Signal Strength Receiver

SISO: Single Input Single Output

SNR: Signal to Noise Ratio

STC: Space Time Coding

STM: Single Transverse Mode

TIA: Transimpedance Amplifier

VCSEL: Vertical Cavity Surface Emitting Laser

design and analysis of a fso mimo transmitter receiver ... · space time coding (stc) is a...

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