deliverable13: non-real-time simulation results report · non-real-time simulation results report...

ADINE is a project co-funded by the European Commission

Project no: TREN/07/FP6EN/S07.73164/038533 /CONS

Project acronym: ADINE

Project title: Active Distribution Network

Deliverable13:

Non-Real-Time Simulation Results Report

Due date of deliverable: 30.09.2008

Actual submission date: 30.09.2008

Start date of project: 1.10.2007 Duration: 36 months

Organization name of lead contractor for this deliverable: Tampere University of Technology

Revision [1.0]

Project co-funded by the European Commission within the Sixth Framework Programme (2002-2006)

Dissemination level

PU Public X

PP Restricted to other programme participants (including the Commission Services)

RE Restricted to a group specified by the consortium (including the Commission Services)

CO Confidential, only for members of the consortium (including the Commission Services)

ADINE Deliverable 13

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TABLE OF CONTENTS:

1. INTRODUCTION .................................................................................................................................. 3

2. STATIC SYNCHRONOUS COMPENSATOR, STATCOM ............................................................. 3

2.1. STATCOM Topologies ...................................................................................................................... 4

3. STATCOM CONTROL ......................................................................................................................... 5

3.1. Harmonic Detection and Current Reference Generation ............................................................... 6 3.1.1. Synchronous d-q Frame Based Harmonic Detection ....................................................................... 6 3.1.2. Band-Pass Filter Based Selective Harmonic Detection ................................................................... 7 3.1.3. Recursive Discrete Fourier Transform Based Selective Harmonic Detection ................................. 8

3.2. Current Control Methods .................................................................................................................. 8 3.2.1. Linear Current Control Based on PD Controllers and Space-Vector PWM .................................... 8 3.2.2. Three-Phase Hysteresis Current Control .......................................................................................... 9 3.2.3. Space-Vector Based α-β Hysteresis Current Control ...................................................................... 9

4. SIMULATION RESULTS ................................................................................................................... 10

4.1. Harmonic Detection Methods .......................................................................................................... 10 4.1.1. Steady-State Load Compensation .................................................................................................. 10 4.1.2. Nonperiodic Load Compensation .................................................................................................. 11

4.2. Current Control Methods ................................................................................................................ 12

4.3. Electric Arc Furnace Flicker Mitigation ........................................................................................ 13

5. CONCLUSIONS ................................................................................................................................... 15

6. REFERENCES...................................................................................................................................... 16


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1. INTRODUCTION

The ADINE-project (Active Distribution Network) is aimed to develop, demonstrate and validate a new

Active Network Management (ANM) method of distribution network including distributed generation (DG)

and enabling solutions to support it. The enabling solutions operate as active components managing the

network allowing easier interconnection of DG units. The solutions cover protection, voltage and reactive

power control and planning and information systems of networks.

The ADINE-project is co-funded by the European commission. The project partners include:

• Technology Centre Hermia Ltd., Finland

• Tampere University of Technology, Department of Electrical Energy Engineering, Finland

• ABB Oy Distribution and Automation, Finland

• Lund University, Department of Industrial Electrical Engineering and Automation, Sweden

• Compower AB, Sweden

• AREVA T&D Ltd., Finland

• AREVA Energietechnik GmbH., Germany

This report is prepared as a part of ADINE subproject 4, SP4 - Flexible STATCOM for distribution network.

The goal of SP4 is to develop and demonstrate a static synchronous compensator (STATCOM) capable of

filtering harmonics, eliminating flickers, compensating reactive power, controlling the voltage level and

improving the recovery of the distribution network during line fault.

The goal of the report is to study different solutions for STATCOM topology and control system and to

examine the STATCOM operation by means of non-real-time computer simulations. First, the structure of

STATCOM is examined and AC/DC converter topologies for STATCOM are studied. The three-level

neutral point clamped voltage source converter is selected as the STATCOM topology for the simulations.

Next, solutions for STATCOM control system are examined. Finally, the operation of control methods and

three-level STATCOM are examined by means of non-real-time computer simulations. The simulations are

carried out using the combination of Matlab Simulink and Simplorer softwares.

2. STATIC SYNCHRONOUS COMPENSATOR, STATCOM

Different solutions have been developed to mitigate power system disturbances such as harmonics and

voltage fluctuation and to compensate reactive power. The most sophisticated solutions are based on AC/DC

converters employing force-commutated power semiconductors, GTOs and IGBTs. Such compensators

operate as controlled ac voltage or current sources and provide operation independent of the system voltage

and dynamic performance sufficient for compensating highly nonlinear and rapidly varying loads [1].

At the moment one of the best-known converter based compensators is the STATCOM, STATic

synchronous COMpensator, which principle is shown in Fig. 1 [1]. The STATCOM comprises a voltage (or

current) source converter connected in parallel with the transmission line via an inductor or an LCL filter that

filters out the ripple current resulting from the converter switching. A coupling transformer is required if the

connection voltage level cannot be achieved using direct connection. Typical applications of STATCOM are

flicker mitigation, wind farm voltage stabilization, current distortion compensation, and reactive power

compensation.


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Figure 1. Principle of voltage source converter based STATCOM

2.1. STATCOM Topologies

The majority of STATCOMs reported in the literature are based on the use of voltage source converters

(VSCs) [2-9]. The STATCOMs based on VSCs can be grouped into two-level, multipulse and multilevel

technologies. The multipulse and multilevel VSCs are the prevailing technologies used in medium and high

voltage STATCOMs. Compared to two-level VSCs (2LVSCs) they can generate staircase output voltages

close to sinusoidal waveform without using power switches with higher blocking voltages or series

connected power switches [3]. Thus the output voltage harmonic content is reduced compared to that of

2LVSCs and the size of the coupling transformer can be reduced or a direct connection to the installation

point can be used.

The problem of multipulse STATCOMs is the zig-zag transformers that are required to connect the

STATCOM to the mains [2, 8]. Therefore they have high cost and complexity, large volume, and high power

losses [2, 8]. By contrast, the multilevel VSCs comprise a dc-link structure with three or more voltage levels

and an array of semiconductor power switches controlled to generate multilevel output voltages [2, 3]. Thus

the complex zig-zag transformers used in the multipulse converters are not required. As a result, the

multilevel VSCs have become the trend in STATCOM applications [4-7].

The best-known multilevel VSC topologies for STATCOM are diode clamped (neutral point clamped) and

cascaded multilevel topologies [2-8]. The principles of three-level and five-level diode clamped multilevel

(DCM) converters are shown in Figs. 2(a)-(b) and the principles of five-level and 9-level cascaded multilevel

converters are shown in Figs. 2(c)-(d). In DCM converters the total dc-link voltage udc is divided into several

potential levels by connecting capacitors in series [3]. The intermediate dc-link voltage levels are connected

to the phase outputs through the clamping diodes, which also limit the switch voltage stresses equal to the

voltage of one capacitor. Difficulty of DCM converters with more than three voltage levels is control

complexity, large amount of required clamping diodes, and the problem to keep the capacitor voltages

balanced [2, 3].

The cascaded multilevel voltage source converters (CMVSCs) are based on the chain connection of single-

phase full-bridge modules (H-bridges), each including a separate dc-capacitor [5, 6, 8]. The converter phase

voltage with the respect to the star-point is the sum of the H-bridge module output voltages. Conventionally

the phases are connected in wye, but also delta-connection is possible, which in STATCOM applications

allows the compensation of negative-sequence currents [8]. The advantages of the CMVSCs are the simple

topology layout and modular structure. However, the difficulty is to keep the capacitor voltages balanced and

the converter control is rather complex [2, 8, 9].


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(a) (c)

(b) (d)

Figure 2. (a) Three-level DCM converter, (b) five-level DCM converter, (c) five-level cascaded

multilevel converter, (d) 9-level cascaded multilevel converter

Among the possible STATCOM topologies this study focuses on the three-level neutral point clamped

topology shown in Fig. 2(a). The advantages of three-level topology over the two-level topology are the

reduced output voltage harmonics and the possibility to use power switches with lower blocking voltages.

Compared to topologies with more than three-levels the advantage is simpler converter control

implementation, simple method for dc-link voltage balancing and simpler topology structure. The converter

voltage rating can be increased by employing series connected power switches.

3. STATCOM CONTROL

The operating principle of VSC based STATCOMs is to control the power transfer between the converter

and the system by adjusting the converter ac-voltage. If the converter voltage equals the system voltage no

power flow occurs because the voltage over the supply filter is zero. The STATCOM draws lagging current,

i.e. absorbs VArs, when the converter voltage is adjusted smaller than the system voltage. Similarly, leading

current is drawn, i.e. VArs are generated, when the converter voltage is adjusted higher than the system

voltage [1]. The active power transfer is controlled by adjusting the converter output voltage phase-angle

with the respect to the system voltage and is required to control the converter dc-link voltage.

Two essential parts of the STATCOM control system are generation of the references for voltage/current

disturbance compensation and closed loop current control [10-12]. In this study the compensation references

are generated by detecting the disturbances from measured load currents. Three methods for harmonic

detection and current reference generation are studied. Moreover, three different current control methods for

NPC converter are examined. The principle of the control system examined is shown in Fig. 3.


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Figure 3. Principle of STATCOM control system

3.1. Harmonic Detection and Current Reference Generation 3.1.1. Synchronous d-q Frame Based Harmonic Detection

The first current reference generation method examined is the synchronous d-q frame based harmonic

detection [14-16]. The operating principle of the method, shown in Fig. 4, is based on separating all non-

active current components from the fundamental frequency active current component. This is carried out

using measured load currents, which are transformed into rotating d-q coordinates where the real d-axis is

tied to the angle of the supply voltage space-vector. The current reference i*st,d for d-axis STATCOM current

is obtained by removing the dc-component of d-axis load current iload,d and inverting the remaining ac-

component. The q-axis STATCOM current reference i*st,q is obtained by inverting the q-axis load current

iload,q.

In this study the detection method is used with two current control delay compensation methods to improve

the STATCOM performance. The purpose of the delay compensation methods is to decrease the effect of

current control delay resulting from discrete-time control algorithm calculation, measurement delays, and

compensator dynamics. The first one, the computational delay compensation, is included in block ‘CDC’ of

Fig. 4 and is used when the load currents are non-periodic [15, 16]. The method is based on the estimated

compensator dynamics and linear extrapolation of current references. The second delay compensation

method is used when the load currents are strictly periodic and is based on the prediction of load current

behavior using current measurement data sampled and stored during previous line cycles [16, 17]. In

Figure 4 the load current samples are stored in blocks ’m samples’ and when the predictive delay

compensation is used the STATCOM d-q current references at discrete time instant k are generated using the

load current samples iload,d(k-(m-2)) and iload,q(k-(m-2)) instead of newly sampled values iload,d(k) and iload,q(k).


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Figure 4. Principle of synchronous d-q frame based harmonic detection

3.1.2. Band-Pass Filter Based Selective Harmonic Detection

The second harmonic detection method studied is based on the use of discrete-time band-pass filters [18].

The operating principle of the method, shown in Fig. 5, is to measure the load currents and to detect the

desired load current harmonics in rotating d-q coordinates using band-pass filters. The d-axis load current

iload,d harmonic detection in Fig. 5 includes three band-pass filters (BPF) tuned to filter 100 Hz, 300 Hz and

600 Hz signals. The q-axis load current iload,q harmonic detection is otherwise similar, but the fundamental

frequency reactive current is also extracted using a low-pass filter (LPF). The STATCOM current references

i*st,d and i

*st,q are obtained by summing and inverting the detected non-active current components. The current

control delay is compensated using discrete-time phase lead compensators (PLC), which add positive phase

angle to the detected harmonics [18].

Figure 5. Principle of band-pass filter based selective harmonic detection


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3.1.3. Recursive Discrete Fourier Transform Based Selective Harmonic Detection

The third harmonic detection method studied is based on recursive discrete Fourier transform (RDFT) [19].

The operating principle of the method, shown in Fig. 6, is to detect the desired load current harmonics using

individual d-q frames rotating at frequency nfsup (or −nfsup in the case of a negative sequence harmonic),

where n denotes the nth harmonic order [10, 17, 19]. The d- and q-axis load current components flowing at

the frequency of the reference frames are seen as dc-quantities and are extracted in blocks ‘Filter’ using

moving average calculation. The overall operation of the method corresponds to recursive discrete Fourier

transform [19].

The current control delay compensation is included in the d-q coordinate transformations by adding a

compensating angle φd,n to the synchronous reference frame angle φsup when the transformation back to the

50 Hz d-q frame is carried out [19]. The d- and q-axis STATCOM current references i*st,d and i

*st,q are

obtained by summing and inverting the detected non-active current components.

A drawback of the RDFT method is the large computation performance and memory capacity required,

because the d- and q-axis current samples in each reference frame must be stored for the moving average

calculation [10]. However, the accuracy, detection speed and selectivity of the RDFT method are better than

those of the band-pass filter based method.

Figure 6. Principle of recursive discrete Fourier transform based selective harmonic detection

3.2. Current Control Methods

3.2.1. Linear Current Control Based on PD Controllers and Space-Vector PWM

The principle of the first current control method examined is shown in Fig. 7. The operating principle of the

method is based on the fact that current flow between the STATCOM and the mains can be controlled by

varying the voltage over the supply filter Lf [16, 20]. Since the mains voltage usup is fixed the supply filter

voltage is controlled with STATCOM voltage ust. The closed loop control of STATCOM currents ist is

implemented in supply voltage oriented d-q reference frame using PD controllers. The PD controller outputs

u*LR,d and u

*LR,q are summed with cross coupling compensation terms –ωsupLfist,q and ωsupLfist,d, respectively,

to obtain the references for supply filter voltages u*Lf,(d,q). The supply filter voltage references are subtracted


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from the supply voltage components usup,d and usup,q to obtain the STATCOM voltage references that are

realized using space-vector pulse-width modulation (SVPWM).

Figure 7. Principle of linear current control based on PD controllers and SVPWM

3.2.2. Three-Phase Hysteresis Current Control

Second current control method studied is three-phase hysteresis current control (HCC) [21]. The operating

principle of the method is shown in Fig. 8. The measured STATCOM currents ist,(a,b,c) are subtracted from the

references i*st,(a,b,c) and the errors ∆ist,(a,b,c) are led to hysteresis comparators. The outputs of the comparators,

denoted as λa, λb and λc, can have values –1, 0, and 1 and are used in the switching logic to determine the

switching states, which force the converter phase currents to remain within the hysteresis bands. The

capacitor voltage balancing algorithms are included in the switching logic.

Figure 8. Principle of three-phase hysteresis current control.

3.2.3. Space-Vector Based α-β Hysteresis Current Control

The third current control method studied is the space-vector based α-β hysteresis current control [22]. The

operating principle of the method is shown in Fig. 9. The STATCOM currents are measured, transformed

into stationary α-β coordinates and subtracted from the current references i*st,α and i

*st,β. The errors ∆ist,α and

∆ist,β are led to hysteresis comparators which outputs λα and λβ can have values –2, –1, 0, 1, and 2. The

variables λα and λβ are used in the switching logic to determine the switching states that keep the converter

currents within the hysteresis bands.


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Figure 9. Principle of space-vector based α-β hysteresis current control.

4. SIMULATION RESULTS

This chapter examines the operation of the harmonic detection methods, current control methods, and three-

level STATCOM by means of computer simulations. Simulations were carried out using the Simplorer and

Simulink softwares. The circuit models were implemented in Simplorer and the control system models in

Simulink. The control system models were combined with the circuit models using Simplorer’s Simulink

coupling interface. First, the operation of the harmonic detection methods studied in Section 3.1 is examined

by simulating the operation of a three-level 10 MVA STATCOM. Second, the performances of the current

control methods discussed in Section 3.2 are examined and compared. Finally, the operation of an electric

arc furnace flicker mitigation system based on a 2 MVA STATCOM is examined.

4.1. Harmonic Detection Methods

In this section the harmonic detection methods presented in Section 3.1 are examined by simulating the

operation of a 10 MVA three-level STATCOM connected to a 21 kV line. The goal is to use the STATCOM

to mitigate supply current harmonics up to the 13th order. The STATCOM control system is similar to that

shown in Fig. 3. The STATCOM dc-link voltage is 40 kV, the supply filter inductance is 32.8 mH and the

switching frequency is 700 – 1000 Hz.

4.1.1. Steady-State Load Compensation

First, the STATCOM operation is studied during steady-state. The compensated load is a three-phase diode

bridge supplying a resistive-inductive load. The load phase-a current is shown in Fig. 10(a) and, for

comparison, Fig. 10(b) shows the supply phase-a current compensated using the synchronous d-q frame

based harmonic detection method without delay compensation. The results obtained using the BPF and the

RDFT based methods are shown in Figs. 10(c)-(d). The results obtained using the synchronous d-q frame

based detection method with delay compensation is shown in Fig. 10(e). Ratios of the supply phase-a current

harmonics to the corresponding load current harmonics are shown in Fig. 10(f). The results show that

harmonic mitigation is not possible without control delay compensation. When control delay compensation

is used the 5th and the 7

th supply current harmonics are decreased by ca. 80 % and, depending on the

detection method used, the 11th and the 13

th harmonics by ca. 40 % or more. Best compensation accuracy is

achieved with the RDFT based detection method.

(a)


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(b) (c)

(d) (e)

(f)

Figure 10. Steady-state compensation results. (a) Load currents. Supply currents compensated

using (b) the synchronous d-q frame based detection without delay compensation, (c) BPF based

detection, (d) RDFT based detection, (e) synchronous d-q frame based detection with delay

compensation, (f) the ratios of 5th, 7

th, 11

th, and 13

th supply current harmonics to corresponding

load current harmonics.

4.1.2. Nonperiodic Load Compensation

Next, the STATCOM operation in nonperiodic load compensation is examined. The load currents and the

compensated supply currents are shown in Figs. 11 – 14. The results show that the detection speed of

selective methods is not sufficient to solve the harmonic content of stochastic load currents and the

compensation performance is impaired (Figs. 12 – 13). However, the supply current waveforms are

improved with each of the detection methods. Thus, mitigation of current harmonics is possible during

periodic load conditions with all harmonic detection methods studied if control delay compensation methods

examined are used. Nonetheless, the synchronous d-q frame based harmonic detection method provides

fastest detection speed to compensate nonperiodic load currents.

Figure 11. Load currents.

Figure 12. Supply currents compensated using the BPF based selective harmonic detection.


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Figure 13. Supply currents compensated using the RDFT based selective harmonic detection.

Figure 14. Supply currents compensated using the synchronous d-q frame based harmonic

detection.

4.2. Current Control Methods

In this section the performances of current control methods studied in Section 3.2 are examined and

compared. The comparison is carried out by simulating the operation of a 2 MVA STATCOM in current

distortion filtering. The STATCOM is connected to a 2 kV line through an LCL filter where the converter

side inductance is 400 µH and the supply side inductance is 100 µH. The filter capacitors (33 µF) are

connected in delta and the filter is damped passively by connecting damping resistors (8 Ω) in series with the

capacitors. The dc-link voltage is 3.6 kV and the average STATCOM switching frequency is 3.5 kHz. The

control system used is similar to that shown in Fig. 3. The harmonic detection method used in the

simulations is the synchronous d-q frame based method studied in Section 3.1.1. The control delay is

compensated using the computational delay compensation (CDC) method.

The load currents and the filtered supply currents are shown in Fig. 15. The ratios of individual supply

current harmonics to the corresponding load current harmonics are shown in Fig. 16. The HCC methods

perform better in the filtering of harmonics above the 19th order because linear current control method

includes a larger control delay in the current control loop, resulting from discrete-time control algorithm

calculation and pulse-width modulation. The 3-phase HCC performs slightly better than the α-β HCC

method. The supply current THDs are shown in Fig. 17. The smallest THD is obtained with the 3-phase

HCC and the largest with linear current control method.

(a) (b)

(c) (d)

Figure 15. (a) Load currents. Supply currents compensated using (b) linear current control, (c)

3-phase hysteresis current control, (d) α-β hysteresis current control.


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(a)

(b)

(c)

Figure 16. Ratio of the supply current harmonics to the corresponding load harmonics.

(a) Phase-a, (b) phase-b, (c) phase-c.

Figure 17. Supply currents THDs.

4.3. Electric Arc Furnace Flicker Mitigation

Finally, the operation of three-level STATCOM in an electric arc furnace flicker mitigation application is

examined. The principle of the simulation model, reduced to 2 kV and 2 MVA level, is shown in Fig. 18.

The model comprises a 2 MVA three-level STATCOM and two passive filter banks tuned to 2nd

and 3rd

harmonic frequencies. The model parameters are given in Table I. The average STATCOM switching

frequency is 3.5 kHz. The STATCOM operation is simulated using the current control methods studied in

Section 3.2 and the current references are generated using the synchronous d-q frame based method studied

in Section 3.1.1. The flicker mitigation performance is analyzed by calculating short-term Pst flicker indices

at the point-of-common-coupling before and after the compensation.

Figure 18. Principle of flicker mitigation system simulation model.

TABLE I. SIMULATION MODEL PARAMETERS.

Mains STATCOM Passive filters


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usup 2 kV Lsf 100 µH L2F 5268.35 µH

fsup 50 Hz Lff 400 µH R2F 13.22 Ω

Lnet 76.39 µH Cf,SVPWM 15 µF C2F1 1920.88 µF

Rnet 1.41 mΩ Rd,SVPWM 3.5 Ω C2F2 641.3 µF

LTR1 397.25 µH Cf,HCC 33 µF R2Fd 66.2 mΩ

RTR1 6.05 mΩ Rd,HCC 8 Ω L3F 1348.76 mH

RTR2 0.83 mΩ C1, C2 9.6 mF C3F 862.13 µF

LTR2 58.0 µH uC1, uC2 1.8 kV R3Fd 50 mΩ

The control system used in the simulations is shown in Fig. 19 and consists of control loops for STATCOM

current, dc voltage, supply voltage, and average reactive power. The purpose of the supply voltage control

loop is to compensate rapid supply voltage fluctuations by controlling the reactive current injected by the

STATCOM at the point of common coupling (PCC). The control loop is not used to regulate the voltage to

prevent interaction with the average reactive power control loop. The purpose of the average reactive power

control loop is to correct the power factor at unity over a long time period.

Figure 19. STATCOM control system.

The simulated EAF currents, the compensated supply currents and dc-voltages during a 110 ms period are

shown in Figs. 20 – 23. Without compensation the supply currents in Fig. 20 are unbalanced and distorted.

After compensation the supply currents in Figs. 21(a), 22(a), and 23(a) are nearly sinusoidal and balanced.

The dc-link voltage waveforms in Figs. 21(b), 22(b), and 23(b) show that the capacitor voltages are

balanced.

Figure 20. Electric arc furnace currents.

(a) (b)


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Figure 21. (a) Supply currents compensated using the linear current control based on PD

controllers and SVPWM. (b) DC-link capacitor voltages.

(a) (b)

Figure 22. (a) Supply currents compensated using the 3-phase HCC method. (b) DC-link capacitor voltages.

(a) (b)

Figure 23. (a) Supply currents compensated using the basic α-β HCC method. (b) DC-link capacitor voltages.

Finally, the short-term flicker severity indices Pst were calculated for the voltages at the PCC. The PCC

voltage rms values before and after compensation with the linear current control based on PD controllers and

SVPWM are shown in Fig. 24. The results show that the voltage fluctuation is effectively mitigated. The

waveforms obtained with the other current control methods are very similar and therefore not included. The

results of flicker index calculation are shown in Fig. 25. The flicker indices obtained without compensation

are denoted as ‘Uncomp.’. The results show that the compensation decreases the flicker index Pst values from

ca. 2.0 – 2.7 to below 0.7. In conclusion, nearly similar flicker mitigation performances were achieved with

each current control method examined.

(a) (b)

Figure 24. Rms voltages at the point-of-common-coupling. (a) Without compensation, (b) after the compensation

with the linear current control based on PD controllers and space-vector PWM.

Figure 25. Short-term flicker severity indices Pst.

5. CONCLUSIONS

The goal of the report was to examine the STATCOM operation by means of non-real-time computer

simulations. The three-level neutral point clamped voltage source converter was selected as the STATCOM

topology for the simulations. The simulations were carried out using the combination of Simplorer and

Simulink softwares. First, the operation of three harmonic detection methods studied was compared. In

steady-state load compensation somewhat similar compensation results were obtained. However, the


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detection accuracy of selective harmonic detection methods was impaired in nonperiodic load compensation

due to the finite detection time required to solve the harmonic content of the load current. The best

performance in nonperiodic load compensation was achieved with the synchronous d-q frame based method.

The comparison of current control methods studied indicated that the best performance in current distortion

compensation was achieved with the 3-phase hysteresis current control method. Finally, the operation of the

current control methods examined was compared in an electric arc furnace flicker mitigation application. The

compensation system simulated comprised a 2 MVA STATCOM and two passive filter banks tuned to 2nd

and 3rd

harmonic frequencies. The simulation results showed that the compensation system examined is an

effective solution for voltage flicker mitigation.

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