dcc & slb software requirements ecal od electronics workshop nuno almeida

OD Workshop LIP 2005/04/07 Nuno Almeida

DCC & SLB Software RequirementsDCC & SLB Software Requirements

ECAL OD Electronics WorkshopECAL OD Electronics Workshop Nuno AlmeidaNuno Almeida


DCC Software

SLB Software

System Tests @ Blg. 904

OutlineOutline


DCC SoftwareDCC Software


DCC SoftwareDCC Software

DCC GCONFIG DCC-T

ROOT

CCTRL XDAQ

DDECODER


DCC DriverDCC Driver

EcalDevice

DCCDCCConfigurator

DCCStatusDecoder TTCInfo DCCMemoryHandler

DCCErrorHandler

DeviceConfiguratorGeneric API for ECAL Devices,

includes a common interface for control, configuration and status report

A specialization of the DeviceConfigurator ,it clones the common configurationparameters over the 9 FPGA circuits

Allows TTCRx information access(L1A and Bx numbers )

TTS, Links, Operation and DCC Data Flags decoding DAQ/Spy Memory readout,

input handler FIFO readout andevent list access

Handles Error Flags, Channel Error Tables and performs error clearing


Debugging Tools : HAL Debugger GUIDebugging Tools : HAL Debugger GUI

Generic tool.

Allows simple register access (read/write) from the defined entries in the HAL Table.

Possibility to readout all items defined in the VME64x Configuration Space.


Debugging Tools : DCC Debugger GUIDebugging Tools : DCC Debugger GUI

DCC Configuration :Xtal Weights (~10000), Channel States, Op. Modes,Op. Attributes, TTC Codes.

Detailed Status Monitoring.

Error Monitoring.

VME TTC Emulation.

Data Readout (DAQ, Spy Memory and Input Handlers), event info.

Data decoding and data format check.


Debugging Tools : Data DecoderDebugging Tools : Data Decoder

Decodes readout buffers with single/multiples events.

Identifies if the event has the correct BOE and EOE bit fields and a coherent length.

Verifies channel, strip, xtal and block ids and data synchronization (LV1 and BX).

Integrated in the ECAL online data quality monitoring.

Integrated in the ORCA Calorimetry and interfaced with the DaqPrototype (COBRA extension) for online Daq (Event Filter ) purposes. Used in the FU in the 2004 H4 test beam.


====================================================================== Block name : DCCHEADER, size : 1960 bytes, event WOffset : 0 W[00001] BOE = 00005 TTYPE = 00005 L1 = 00001 W[00003] BX = 00094 ID = 00013 W[00005] H1 = 00001 XSAMP = 00010 TSAMP = 00001 ZS = 00000 SR = 00000 TCC4 = 00000 TCC3 = 00000 TCC2 = 00000 TCC1 = 00000 W[00007] DCCERR = 00000 LENGTH = 00245 W[00009] H2 = 00002 W[00011] ORBCNT = 00000 W[00013] H3 = 00003 CHST14 = 00000 CHST13 = 00000 CHST12 = 00000 CHST11 = 00000 CHST10 = 00000 CHST9 = 00000 W[00015] CHST8 = 00000 CHST7 = 00000 CHST6 = 00000 CHST5 = 00000 CHST4 = 00000 CHST3 = 00000 CHST2 = 00000 CHST1 = 00000 W[00017] H4 = 00004 CHST28 = 00000 CHST27 = 00000 CHST26 = 00000 CHST25 = 00000 CHST24 = 00000 CHST23 = 00000 W[00019] CHST22 = 00000 CHST21 = 00000 CHST20 = 00000 CHST19 = 00000 CHST18 = 00000 CHST17 = 00000 CHST16 = 00000 CHST15 = 00000 W[00021] H5 = 00005 CHST42 = 00000 CHST41 = 00000 CHST40 = 00000 CHST39 = 00000 CHST38 = 00000 CHST37 = 00000 W[00023] CHST36 = 00000 CHST35 = 00000 CHST34 = 00000 CHST33 = 00000 CHST32 = 00000 CHST31 = 00000 CHST30 = 00000 CHST29 = 00000 W[00025] H6 = 00006 CHST56 = 00000 CHST55 = 00000 CHST54 = 00000 CHST53 = 00000 CHST52 = 00000 CHST51 = 00000 W[00027] CHST50 = 00000 CHST49 = 00000 CHST48 = 00000 CHST47 = 00000 CHST46 = 00000 CHST45 = 00000 CHST44 = 00000 CHST43 = 00000 W[00029] H7 = 00007 CHST70 = 00000 CHST69 = 00000 CHST68 = 00000 CHST67 = 00000 CHST66 = 00000 CHST65 = 00001 W[00031] CHST64 = 00000 CHST63 = 00000 CHST62 = 00001 CHST61 = 00001 CHST60 = 00000 CHST59 = 00000 CHST58 = 00000 CHST57 = 00000 ====================================================================== ====================================================================== Block name : TOWERHEADER, size : 616 bytes, event WOffset : 32 W[00000] L1 = 00001 BX = 04095 W[00001] LENGTH = 00076 ID = 00061 ====================================================================== ====================================================================== Block name : XTAL, size : 24 bytes, event WOffset : 34 W[00000] ADC1 = 00215 M = 00000 XTALID = 00001 STRPID = 00001 W[00001] ADC3 = 00217 ADC2 = 00215 W[00002] ADC5 = 00218 ADC4 = 00219 W[00003] ADC7 = 00218 ADC6 = 00217 W[00004] ADC9 = 00217 ADC8 = 00218 W[00005] ADC10 = 00219 ====================================================================== …====================================================================== Block name : DCCTRAILER, size : 8 bytes, event WOffset : 488 W[00000] CRC = 00000 W[00001] EOE = 00010 LENGTH = 00245

======================================================================

Debugging Tools : Data DecoderDebugging Tools : Data Decoder


DCC Test Bench DCC Test Bench

Emulates the DCC Sub-SystemInterfaces (FE,SRP and TCC) :

70 GOL links (2MEM +68FE) @ 800MBit/s 1 SRP GOL link. 4 TCC LVDS electrical links.

Storage Capacity of 40 MBytes (~ 1000 Events). Controls the operation of the TTCvi.

DCC-T DCC


Debugging Tools : DCC-T GUIDebugging Tools : DCC-T GUI

DCC –T Configuration( Trigger Mode, Active Modules, Latencies,... ).

Status Monitoring.

Tests in different trigger conditions.

Assotiation of SR flags (ORCA) to different readout conditions .

Test operation including data check between emulated events and readout events (VME Spy Memory & S-Link).


Distributed DCC Test System

ECAL Supervisor :1. Identifies VME64x complient devices in the crate.

2. Retrives the DOM Configuration (DStore) and configures the devices (GConfig).

3. DCC is set in test mode.

DCC-T :4. Identifies and configures the DCC-T.

5. Prepares the GIII for operation (FEDKit)

6. Deals with simulated data (TCC, SR,FE and triggers) emulating the DCC events.

7. Load input data and triggers in the DCC-T memories

8. Prepare DCC to receive triggers (ECAL Supervisor).

9. Starts the test and compares emulated data against readout data ( io2 events received from RC::VME and FedKit::SLINK)

DStore

ECALSupervis

orDCC

DCC-TDCC-

T

i2oFEDkit

GIII

SOAP


SLB SoftwareSLB Software


STC

SLB

SLB-T

SLB Test BenchSLB Test Bench

20 m Kerpen Cable

Production test bench 1 6U-VME Crate. 1 SLB-T. 5 STCs. 1 VME-PCI interface (SBS). 1 PC.

STC (Serial Tester Card from Wisconsin Univ.)Works as a trigger primitive transmitter/receiver.Allows to compare data transmitted from the SLB with data loaded in the STC RAM (32 [email protected] MHz).

SLB – TTrigger primitive emulator @ 40.04 MHz.Low jitter clock Rx_Clk and the sync signal Rx_BC0.Test of up to 5 SLBs


Distributed SLB Test System

XDAQ SLB-T

XDAQ SLB

ContainerSLB

STCSLB-

T

SLB-T GUISLB GUI

SOAP


SLB Production Tests

Test 0 : Serial number VME readout serial number must match with the SLB id.

Test 1 : Configuration and state transitions Power on configuration, reconfiguration, state transitions (VME & Broadcast).

Test 2 : Synchronization FIFOsSLB-T transmitted data are readout and verified in each sync FIFO (128 positions).

Test 3: Accumulators SLB-T starts transmitting data, after several orbits the accumulator contents are verified. The test is repeated for several threshold values.

Test 4 : Data alignmentSame as test 3 but with different channel delays.

Test 5 : Data transmissionData transmitted by the SLB (1 LHC Orbit) are collected in the STC RAM and verified.

Test 6 : BER measurementData transmitted by the SLB are compared continuously by the STC (~12 hours). If errors occur STC enters into an Error state and a resynchronization procedure is required.


SLB Production Tests

Test Prodution Results :

Stored in a XML files.

Organized by board Id & test Id.

Each entrie has an execution data, a test result (ok/error/ber), and a link to a log file.

One “history file” for each SLB.

Browsing Test Results :

A Java script application allows:

Query test results by SLB id.

Retrieve modules with/without errors.

Test result statistics.


Test System @ Blg. 904


Test System @ Blg. 904

DCC

CCS

TCC

DCC-T

TCC-T

TTCvi

CAEN

STC

CAEN

CAEN

ECAL OD Crate

TTC Crate

Tester Crate

Vitesse electrical links (SLB-STC)

Trigger primitives

SR Flags

TTC signals, clock

FE Data


Distributed Test System @ Blg. 904

DStore

ECALSupervisorDC

C

DCC-T

i2o

FEDkitGIII

CCS

STC STC

TCC-TTCC-

T

DCC-T

Requirements : Sharing of simulated data :

DCC-T and TCC-T (FE,SRP,TCC)TCC-T and STC (TCC)

Sharing of triggers:Orbit number and Bx

Resynchronization

Type of tests

SOAP

TCC-TSL

B

Test SupervisorGUI

dcc & slb software requirements ecal od electronics workshop nuno almeida

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