dc to dc converters topologies

8/12/2019 DC to DC Converters Topologies

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Evaluation of DC-to-DC Converters Topologies with Quadratic

Conversion Ratios for Photovoltaic Power Systems

Jean-Paul GAUBERT, Gwladys CHANEDEAUUniversit de Poitiers, France

Laboratoire dAutomatique et dInformatique Industrielle (LAII-ESIP)40, Avenue du Recteur Pineau, 86022 Poitiers Cedex, France

[email protected] [email protected]

http://laii.univ-poitiers.fr

Keywords

Renewable energy systems, Photovoltaic, DC power supply, Converter circuit, convertercontrol

Abstract

This paper presents a new class of pulsewidth modulation (PWM) DC-to-DC converters withquadratic conversion ratios for photovoltaic applications without a transformer. The aim of thesestructures is to obtain at the same time high conversion ratio and excellent efficiency for a wide sourcevoltage range. The DC voltage conversion ratios of these converters have a quadratic dependence onduty cycle providing thus a large step-up and offering the possibility of higher switching frequency.This research focuses on the development of these new structures with only one single active switchand their theoretical analysis with relevant equations and operating principle. Moreover, a completesimulation and experimental results are presented to confirm their interest in photovoltaic applications.These results are used to compare on the one hand the conversion ratios versus duty cycle and on theother hand the efficiency versus the conversion ratios of each topology.

Introduction

Renewable energy sources play a more and more important role in electricity generation. Energy from

the sun or the wind nowadays represents the most suitable solution in particular for domestic powerlevels. Moreover, they are available everywhere and are free to harness. Currently, in differentEuropean countries, states or local councils, through electricity companies, are providing moneyincentives for energy produced by renewable sources and injected or not into the utility grid.In our laboratory, we have a project with the local council of a hybrid photovoltaic-wind generating

system for domestic applications. In our case the DC bus is common and its value is set at a constantvalue. The two renewable energy sources are connected in parallel on the DC bus with their particularconverters contrary to a solution of multi-input [1]. The type of topology can be employed either ingrid connected or in stand-alone conversions systems [2] with a single inverter [3]. This study focuseson photovoltaic system (PV) and DC-to-DC conversion stage with only one converter instead of acascade of basic choppers for every PV panel [4-5]. The aim is to reach the suitable DC voltage supplyfor the inverter avoiding the use of a transformer and remain underneath security voltage (50 V) at theoutput of PV. To lower module count, the DC-to-DC converter must operate at a high switchingfrequency to reduce reactive component values and obtain useful conversion ratio with highefficiency.The paper proposes to evaluate performance of new topologies of step-up DC-to-DC converters withquadratic conversion ratio based on a synthesis procedure with matrix representation. This theoretical

analysis permits to extract the topologies whose conversion ratio m is above one for a duty cycle equalto 0.5 and has only one controllable switch associated with three diodes, two inductors and one

capacitor. Also, it is possible to apply a specific algorithm to obtain Maximum Power Point Tracking(MPPT) of photovoltaic module [6], in the same way as basic converters such as boost.


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Electrical characteristics of solar panels

The technology of photovoltaic (PV) is concerned with the solar energy conversion into usableelectrical form. The basic element of a PV array is the solar cell, which is basically a p-nsemiconductor junction. The mathematical model of a solar cell is usually based on a current source in

parallel with a one diode, one shunt resistance and one output series resistance [7]. The relationshipbetween current and voltage may be determined from the diode characteristic equation and is givenby:

( . ) .exp 1

. .

s sph o

k sh

q V R I V R I I I I

n k T R=

+ +

(1)

Where Vand I represent, respectively, the output voltage and current of the PV, phI is the

photocurrent generated by the solar radiation, oI is the reverse saturation current, q is the electronic

charge, sR and shR are the series and shunt resistance, n is a dimensionless factor, kis the Boltzman

constant, kT is the solar cell operating temperature in K . The current vs voltage ( )I V of a solar cell

is equivalent to a diode characteristic curve. A computer simulation based in equation (1) is used to

obtain the output characteristics, first for various insulation levels from 400 to 1000W/m (Fig. 1), andthen for various temperatures (Fig. 2) for the module bp solar MSX60 taken as a typical example [8].

Fig. 1: Typical current/voltage

( )I V characteristic for different insulations

Fig. 2: Effect of temperature on ( )I V

characteristicThe output characteristics of a solar cell are non linear and are strongly influenced by solar radiation,

load condition and to a lesser extentby temperature.Moreover, there is a unique point on the ( )I V curve at which the solar cell will generate maximum power. It is designed by the maximum powerpoint. So, DC-to-DC converters are used to match the output of a PV generator to a variable load or toa DC bus. Their control strategies have to operate the PV array at its maximum power point (MPP)with the highest efficiency.

Circuit configurations

In DC-to-DC converters applications requiring high conversion ratios, elementary PWM topologies

must operate with a duty cycle close to one. Thus, on the one hand the regulation range is very lowand on the other hand the switching frequency is limited by the off times of the controllable switch.

Moreover, in the case of step-up converters, high conversion ratios are achieved for values of closeto one which correspond to an operating area where the efficiency is lower. This can be avoided with anew family of DC-to-DC converters using only one controllable switch and three diodes and whose

conversion ration has a quadratic dependence on duty cycle . Also, conversion range can be extendedsignificantly and these new topologies provide high values for the output voltage without degrading

efficiency.


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D3

C2 C1R

L1iL1

T2

is

vC2

-

+

Vo

Vg

L2D2

T1

iL2

iC2

D3

C2 C1R

L1iL1

T2

is

vC2

-

+

Vo

Vg

L2D2

T1

iL2

iC2

In these DC-to-DC converters, the ratio m between the output voltage and the input voltage is a

function of on-time T of the controllable switch, related to the switching period T. The main idea iscascading two basic converters to obtain a quadratic conversion ratio but two controllable switches arenecessary in this case. So, additional complexity of the converter network may compromise potentialadvantages of the extended conversion range. However, keeping the same components as for two basic

structures (4 switches, 2 inductors and 2 capacitors including the one parallel connected across theload R) and placing them in different positions provide several solutions in which the conversion ratio

m is a function of, at least, one term in 2 and which have only one controllable switch. For example,

two boost converters in cascade provide a conversion ratio 21/(1 )m = (Fig. 3), hence a higher

maximum value for m is achieved before the efficiency decreases. To eliminate the first controllableswitch, it is necessary to change its connection as shown in figure 4. The type of this new switchdepends on the variations of its current and its voltage. The locus of the operating point in thecurrent/voltage plane allows to decide whether the transition of the switch is forced (in the case of a

switching locus in a quadrant where i and v have the same sign) or spontaneous (in the case of a

switching locus in a quadrant where i and v have opposite signs). In the position like in figure 5, the

type of this new switch is a diode. Also, this solution owns only one controllable switch, three diodes,two inductors and two capacitors by taking into account the output capacitor. Note that the two

topologies with ideal switches are electrically equivalent:- first switched network(0 . )t T< < : T1 and T2 (Fig. 3) or T2 and D1 (Fig. 5) ON; D2 and

D3 OFF,

- second switched network( . )T t T < < : D2 and D3 ON; T1 and T2 (Fig. 3) or T2 and D1

(Fig. 5) OFF.

Fig. 3: Scheme of two series boost converters Fig. 4: Slight modification scheme of two seriesboost converters

Fig. 5: Modified Scheme of two series boost converters

Fig. 6: Basic scheme of generalized analysis Fig. 7: Basic PWM converter structure,2/ ( )m Vo Vg f = =

D3

C2C1

R

L1iL1

T2

is

vC2

-

+

Vo

VgL2

D2

iL2

D1

C2 C1

R

is

-

+

Vo

Vg

C1

R

is

-

+

Vo

Vg

1 2

0 0Converter cell


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This analysis can be generalized to the other basic structures of DC-to-DC converters such as buck [9]or buck-boost [10-11] or Cuk [12] with the same configuration and elements (Fig. 6) or in other wayvoltage lift technique [13].In order to find out the entire set of these fourth-order converters, a synthesis procedure based on amatrix representation of DC-to-DC converters topologies was required [14]. The basic PWMconverter structure is shown in figure 7 and consists of an input voltage source (point 1) and an outputvoltage sink (point 2) both connected to the common node (reference potential or ground, point 0).

Here, load R is in parallel with a single capacitor 1C . For the other elements: 2 inductors, one

capacitor and four switches are in the box named converter cell. Inside this one there thus exists an

additional node designed by point 3. The capacitor 2C is obligatorily laid out between this point 3 and

another of the three external points (0, 1 and 2) because of the nature of input and output sources.Allpossible configurations are generated by displacing the three energy-storage components: two

inductors ( 1L and 2L ) and one capacitor 2C , capacitor 1C is always parallel connected across the load

resistance, between the three points previously mentioned. Now, graphs are obtained for the two

switched networks: 1G if 0 .t T< < and 2G if .T t T < < . The input voltage source and the two

capacitors are the branches and the two inductors with load R are the chords for the graphs1

G and

2G . In this case, figure 8 shows the six possibilities by taking into account the voltage polarity for

disposing capacitor 2C and figure 9 the twelve possibilities of placement for inductors 1L and 2L with

reverse current.

Fig. 8: Possible positions of the capacitor 2C in the graph iG of quadratic PWM converter

Fig. 9: Possible positions of an inductor ( 1L and 2L ) in the graph iG of quadratic PWM converter

From the graphs of figures 8 and 9 it is possible to translate the various positions of the reactive

elements by a pair of incidence matrices ( 1H and 2H ) which represent the two switched networks.

The rows of incidence matrices correspond to nodes and columns to edges of graph. By convention,

value 1 in the row corresponds to the from node, value -1 to the to node and all other entries are 0


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for each oriented edge. For example, matrices (2) and (3) give results respectively for positions of

capacitor 2C with the two polarities and for inductors ( 1L and 2L ) with possibility of reverse current.

1 2 3 4 5 6

0 1 1 0 0 0 0

1 0 0 1 1 0 02 0 0 0 0 1 1

3 1 1 1 1 1 1

(2)

1 2 3 4 5 6 7 8 9 10 11 12

0 1 1 1 1 0 0 1 1 0 0 0 0

1 1 1 0 0 1 1 0 0 1 1 0 0

2 0 0 1 1 1 1 0 0 0 0 1 1

3 0 0 0 0 0 0 1 1 1 1 1 1

(3)

The pair of incidence matrices 1H and 2H can be written by an equivalent pair of numbers:

1 1 1 2 2 2,i j k i j k . Index 1 corresponds to the first operating phase (graph 1G ) while index 2

represents the second operating phase (graph 2G ). Thus, ii represents the position of the capacitor 2C

and belongs to { }1,2,3,4,5,6 , ij and ik represent respectively the positions of inductors 1L and

2L and belong to { }1,2,3,4,5,6,7,8,9,10,11,12 . In this step, the full number of combinations isvery important. However, many combinations are redundant or degenerated and the number of validtopologies is much lower. Moreover, all the unrealizable networks are automatically eliminated by aprocedure from systematic synthesis. Remaining solutions are analysed with a computer program by

respecting input requirements and following steps.Conditions imposed by the specifications:

conversion ratio upper 1 for a duty cycle = 0.5, only four switches among which one fully controllable associated with threediodes.

The taking into account of a combination of 2 configurations and development of the

incidences matrices 1H and 2H corresponding to the graphs 1G and 2G with notations

adopted on figure 10.The evaluation of the DC model by calculating the average values of the state variables.Here, solutions which give null average values for capacitors voltages or inductors currents

and have a conversion ration lower 1 for = 0.5 are eliminated.

The switches insertion procedure is carried out using the incidence matrices 1H and 2H .

Figure 11 indicates how the switches must be placed to obtain the two configurations 1G and

2G .

The switches implementation is determined by applying the law of the nodes for thecurrents in the switches when ON and the Kirchhoff's voltage law for the voltage across the

switches. So, sV and sI can be estimated for each ideal switch in networks iG . Under the

small ripple assumption, voltage across capacitor and current in inductor are DC only and it is

the same thing for voltages sV and currents sI . These DC quantities are functions of the duty

cycle . After, the choice of switch type depending on the sign of sV and sI over the two

switched network. Figure 12 shows the final solution for this example with only one


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controllable switch (S3) associated with three diodes and the basic expression of theconversion ratio m.

Matrice 1H

1 2 1 2

0 1 1 1 1 1 0

1 1 0 0 0 1 1

2 0 1 0 1 0 0

3 0 0 1 0 0 1

Vg C C R L L

Graph 1G

Matrice 2H

1 2 1 2

0 1 1 0 1 0 0

1 1 0 0 0 1 02 0 1 1 1 0 1

3 0 0 1 0 1 1

Vg C C R L L

Graph 2G

Fig. 10: Incidence matrices and associated graphs for the combination 1110, 61011

Fig. 11:Switches insertion procedureFig. 12: New quadratic converter: scheme G1,

2(1 ) /(1 )m = +

With this systematic analysis of all existing possibilities by a computer program a new family of step-up converters was uncovered with quadratic conversion ratios. Figure 13 and 14 show the scheme fortwo other new converters and also the basic expressions of the conversion ratio m for each of them.There are other new or alternative quadratic converters to derive from this systematic analysis, weretained here those which seemed to us most appropriate to our requirement in term of conversion

ratio and efficiency.

Fig. 13: New quadratic converter: scheme G2,2

(1 ) /(1 )m = +

Fig. 14: New quadratic converter: scheme G3,21/(1 )m

=

Vg

L1

1 L2

C2C1

R

3 2

0

Vg

L11

L2

C2

C1 R

3 2

0

Vg

L1

1 L2

C2

C1R

3

2

S2

S1

S3

S4 D1

D2

D3

C2

C1 R

L2

L1iL1

iL2

iC2

is

vC2

T

Vo

-

+Vg

D1

D2D3

C2

C1 R

L2L1iL1 iL2

iC2is

vC2 T

Vo

-

+Vg

D1

D2D3C2

C1R

L2

L1

iL1

iL2 iC2

is

vC2

T-

+Vg

Vo


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Analysis of step-up converters

The aim of analysis is to compare relationships between these news converters and to check the

possibilities of each topology. These new quadratic conversion ratios step-up converters with twoinductors, two capacitors and four switches permit to reach higher output voltages values and

efficiency than the conventional converter, while using only one controllable switch. Thus a moreextensive study of the features is interesting in order to compare these circuits. In this respect, thefollowing parameters must be taken into account for the calculation:

- the inductors series resistanceir,

- the internal resistanceDSONR of the transistor in the on-state if a power MOSFET is used,

- the threshold voltageOE and the dynamic resistance ONR of the diodes in the on-state.

The features of these new converters are analysed and compared in continuous conduction modes.These studies permit to calculate the stresses on the switching devices and calibrate the energy-storage

components thereafter. With / gE OK E V= , 1 1 /RLK r R= , 2 2 /RLK r R= , /RM DSONK R R= and

/RD ONK RR= the results for the conversion ratio and efficiency expression are described by the

following equations.1. Conventional boost converter:

[ ]0 2

(1 )* 1 *(1 )/

(1 ) * *(1 )

Eg

RL RM RD

Km V V

K K K

= =

+ + + (4)

And *(1 )m = (5)

2. Two series boost and G3 converters:2 2

0 4 2 2 3

1 2

(1 ) * 1 *(1 (1 ) )/

(1 ) *(1 ) * *(2 ) * 1 (1 )

E

g

RM RDRL RL

Km V V

K K K K

+ = =

+ + + + +

(6)

And 2*(1 )m = (7)

3. Converter on scheme G1:

[ ]

2

0 2 2 2

1 2

(1 )* (1 ) 2* *(1 )/

(1 ) *(1 ) * *(2 ) * (1 )*(2 )

E

g

RM RDRL RL

Km V V

K K K K

+ = =

+ + + + (8)

And2

(1 )*

(1 )m

=

+ (9)

4. Converter on scheme G2:2 2

0 2 2 2

1 2

(1 )* (1 ) *(1 2* )/

(1 ) *(1 ) * *(1 )

E

g

RM RDRL RL

Km V V

K K K K

+ + = =

+ + + + (10)

And2

(1 )*

(1 )m

=

+ (11)

Simulation results

At first the validity of the suggested schemes are analysed and tested by simulation carried out onsoftware Matlab\SimulinkTM and SimPowerSystems Blockset. To check the performances of these

new topologies on the voltage gain and efficiency vs conversion ratio are established. For that thevalues of the parameters are taken identical just as well in simulation as in experimental cases. Herethe following parameter set was used:

- input voltage 12Vg V= ,- output resistive charge: 500R = ,- two inductors of 2L mH= with series resistance 0.04ir= ,- a power MOSFETs HiPerFETTMIXFH21N50 with internal resistance 0.2DSONR = ,


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- three HiPerFETTM epitaxial diodes DSEP 29-06A with threshold voltage 1.2OE V= at10 ; 100VJFAVI A T C= = and dynamic resistance 0.0107ONR = ,

- two capacitors: output1 470C F= , intermediate 2 20C F= ,

- the switching frequency is fixed at 20KHz in respect with the possibility of real timeimplementation system.Results for classical boost and two series boost converters (or scheme G3) are given on figures 15 and

16. Figure 17 and 18 show the same characteristics for the other two new quadratic converters: schemeG1 and G2.

0,0

2,04,0

6,08,0

10,0

12,014,0

16,0

18,020,0

22,0

0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1

Duty cycle

Ratio

m=

Vo/Vg

Boost Two boost

0102030405060708090

100

0 2 4 6 8 10 12 14 16 18 20 22

Conversion ratio m = Vo/Vg

Effic

iencyin%

Boost Two boost

Fig. 15: Variations of / ( )m Vo Vg f = = Fig. 16: Variations of / ( )Po Pg f m = =

0,02,04,06,08,0

10,012,014,016,018,020,0

0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1

Duty cycle

Ratiom=Vo/Vg.

G1 G2

0102030405060708090100

0 2 4 6 8 10 12 14 16 18 20Conve rsion ratio m = Vo/Vg

Efficiencyin%

G1 G2


These first results from the detailed analysis confirm that quadratic converters with only a singleactive switch like two series boost converters and G3 make it possible to reach at the same time highconversions ratio with duty cycle far away from the unit and very good efficiency. For the convertersG1 and G2 the characteristics are close to that of a conventional boost. It should be noted also that themaximum conversion ratio is higher for two series boost, G1 and G3 converters that of conventionalboost.

Experimental results

The features of quadratic converters are depicted on the figures below. The predicted results areconfirmed by experimental verifications. So it is shown that two series boost or scheme G3 converters


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provide a large voltage step up (up to twelve times the input voltage) without a duty cycle too close toone and for a wide load range. Consequently, these transformerless DC-to-DC converters, which havea quadratic dependence on duty cycle, can operate with higher switching frequencies on the one handand on the other hand with less stress on all components, leading to a significant improvement of thesystem losses. Under the same conditions of tests and with identical reactive components theefficiency is lower than the conventional boost for these two topologies. The rise of switchingfrequency and a choice more adapted of components must make it possible to catch up this efficiencyvariation. With regard to the new topologies G1 and G2, it proves that the structure G1 provides betterefficiency for the same conversion ratio than the conventional boost converter.

0,0

2,0

4,06,0

8,0

10,0

12,0

14,0

0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1

Duty cycle

Ratiom

=Vo/Vg.

Boost Two Boost

0102030405060708090

100

0 2 4 6 8 10 12 14Conversion ratio m = Vo/Vg

Efficie

ncyin%

Boost Two Boost


0,0

2,0

4,0

6,0

8,0

10,0

12,0

14,0

0 0,1 0,2 0,3 0,4 0,5 0,6 0,7 0,8 0,9 1

Duty cycle

Ratiom=Vo/Vg

G1 G2

0102030405060708090

100

0 2 4 6 8 10 12 14

Convertion ratio m = Vo/Vg

Efficiencyin%

G1 G2


Table I: Experimental comparison of the topologies

Topologies Boost Two boost

or G3

G1 G2

m maximum

0.94 0.8 0.94 0.94

11.8 12.9 13.2 12.85

48.3 % 46.7 % 54.7 % 54.3 %

m = 8 0.885 0.67 0.86 0.89

83 % 77 % 88.5 % 83 %


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Table I summarizes the possibilities of each studied structure for maximum and fixed conversionratios.

Conclusion

In this study, new DC to DC converters topologies with quadratic conversion ratios for photovoltaicare investigated. These solutions permit to reach high conversion ratios without duty cycle too close toone and with good efficiency or better than the classical boost converter. Moreover, as the maximumof conversion ratio is reached with a duty cycle far away from the unit for two of them that decreasesthe stress on the components of these quadratic topologies. The wide range of duty cycle involves a

better precision in strategy control. In addition, the possibility of increasing the switching frequencymakes it possible to reduce the reactive elements of these structures. It is also interesting to increasethe voltage variation of the photovoltaic generator and to operate with higher switching frequencieswithout the use of a transformer for operating in a large input voltage variation. For quadraticconverters, it is evident that at least fourth-order networks are necessary in order to obtain required

features for these PWM DC-to-DC converters. In this way, efficiency, size, weight and costconsideration for any higher order converters seem unsuitable for the majority of industrial

applications. The optimization of these structures is in progress in order to carry out a more preciseevaluation of the components and behavior in discontinuous mode. In parallel, a perturbation andobservation method is fitted to realize the MPPT algorithm for the PV array. The control circuit isimplemented in real time by using a single-board DS1104 on a laboratory test bench.

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dc to dc converters topologies

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